linux/include/drm/exynos_drm.h
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   1/* exynos_drm.h
   2 *
   3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
   4 * Authors:
   5 *      Inki Dae <inki.dae@samsung.com>
   6 *      Joonyoung Shim <jy0922.shim@samsung.com>
   7 *      Seung-Woo Kim <sw0312.kim@samsung.com>
   8 *
   9 * Permission is hereby granted, free of charge, to any person obtaining a
  10 * copy of this software and associated documentation files (the "Software"),
  11 * to deal in the Software without restriction, including without limitation
  12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13 * and/or sell copies of the Software, and to permit persons to whom the
  14 * Software is furnished to do so, subject to the following conditions:
  15 *
  16 * The above copyright notice and this permission notice (including the next
  17 * paragraph) shall be included in all copies or substantial portions of the
  18 * Software.
  19 *
  20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  23 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  26 * OTHER DEALINGS IN THE SOFTWARE.
  27 */
  28
  29#ifndef _EXYNOS_DRM_H_
  30#define _EXYNOS_DRM_H_
  31
  32#include "drm.h"
  33
  34/**
  35 * User-desired buffer creation information structure.
  36 *
  37 * @size: user-desired memory allocation size.
  38 *      - this size value would be page-aligned internally.
  39 * @flags: user request for setting memory type or cache attributes.
  40 * @handle: returned a handle to created gem object.
  41 *      - this handle will be set by gem module of kernel side.
  42 */
  43struct drm_exynos_gem_create {
  44        uint64_t size;
  45        unsigned int flags;
  46        unsigned int handle;
  47};
  48
  49/**
  50 * A structure for getting buffer offset.
  51 *
  52 * @handle: a pointer to gem object created.
  53 * @pad: just padding to be 64-bit aligned.
  54 * @offset: relatived offset value of the memory region allocated.
  55 *      - this value should be set by user.
  56 */
  57struct drm_exynos_gem_map_off {
  58        unsigned int handle;
  59        unsigned int pad;
  60        uint64_t offset;
  61};
  62
  63/**
  64 * A structure for mapping buffer.
  65 *
  66 * @handle: a handle to gem object created.
  67 * @pad: just padding to be 64-bit aligned.
  68 * @size: memory size to be mapped.
  69 * @mapped: having user virtual address mmaped.
  70 *      - this variable would be filled by exynos gem module
  71 *      of kernel side with user virtual address which is allocated
  72 *      by do_mmap().
  73 */
  74struct drm_exynos_gem_mmap {
  75        unsigned int handle;
  76        unsigned int pad;
  77        uint64_t size;
  78        uint64_t mapped;
  79};
  80
  81/**
  82 * A structure to gem information.
  83 *
  84 * @handle: a handle to gem object created.
  85 * @flags: flag value including memory type and cache attribute and
  86 *      this value would be set by driver.
  87 * @size: size to memory region allocated by gem and this size would
  88 *      be set by driver.
  89 */
  90struct drm_exynos_gem_info {
  91        unsigned int handle;
  92        unsigned int flags;
  93        uint64_t size;
  94};
  95
  96/**
  97 * A structure for user connection request of virtual display.
  98 *
  99 * @connection: indicate whether doing connetion or not by user.
 100 * @extensions: if this value is 1 then the vidi driver would need additional
 101 *      128bytes edid data.
 102 * @edid: the edid data pointer from user side.
 103 */
 104struct drm_exynos_vidi_connection {
 105        unsigned int connection;
 106        unsigned int extensions;
 107        uint64_t edid;
 108};
 109
 110/* memory type definitions. */
 111enum e_drm_exynos_gem_mem_type {
 112        /* Physically Continuous memory and used as default. */
 113        EXYNOS_BO_CONTIG        = 0 << 0,
 114        /* Physically Non-Continuous memory. */
 115        EXYNOS_BO_NONCONTIG     = 1 << 0,
 116        /* non-cachable mapping and used as default. */
 117        EXYNOS_BO_NONCACHABLE   = 0 << 1,
 118        /* cachable mapping. */
 119        EXYNOS_BO_CACHABLE      = 1 << 1,
 120        /* write-combine mapping. */
 121        EXYNOS_BO_WC            = 1 << 2,
 122        EXYNOS_BO_MASK          = EXYNOS_BO_NONCONTIG | EXYNOS_BO_CACHABLE |
 123                                        EXYNOS_BO_WC
 124};
 125
 126struct drm_exynos_g2d_get_ver {
 127        __u32   major;
 128        __u32   minor;
 129};
 130
 131struct drm_exynos_g2d_cmd {
 132        __u32   offset;
 133        __u32   data;
 134};
 135
 136enum drm_exynos_g2d_event_type {
 137        G2D_EVENT_NOT,
 138        G2D_EVENT_NONSTOP,
 139        G2D_EVENT_STOP,         /* not yet */
 140};
 141
 142struct drm_exynos_g2d_set_cmdlist {
 143        __u64                                   cmd;
 144        __u64                                   cmd_gem;
 145        __u32                                   cmd_nr;
 146        __u32                                   cmd_gem_nr;
 147
 148        /* for g2d event */
 149        __u64                                   event_type;
 150        __u64                                   user_data;
 151};
 152
 153struct drm_exynos_g2d_exec {
 154        __u64                                   async;
 155};
 156
 157#define DRM_EXYNOS_GEM_CREATE           0x00
 158#define DRM_EXYNOS_GEM_MAP_OFFSET       0x01
 159#define DRM_EXYNOS_GEM_MMAP             0x02
 160/* Reserved 0x03 ~ 0x05 for exynos specific gem ioctl */
 161#define DRM_EXYNOS_GEM_GET              0x04
 162#define DRM_EXYNOS_VIDI_CONNECTION      0x07
 163
 164/* G2D */
 165#define DRM_EXYNOS_G2D_GET_VER          0x20
 166#define DRM_EXYNOS_G2D_SET_CMDLIST      0x21
 167#define DRM_EXYNOS_G2D_EXEC             0x22
 168
 169#define DRM_IOCTL_EXYNOS_GEM_CREATE             DRM_IOWR(DRM_COMMAND_BASE + \
 170                DRM_EXYNOS_GEM_CREATE, struct drm_exynos_gem_create)
 171
 172#define DRM_IOCTL_EXYNOS_GEM_MAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + \
 173                DRM_EXYNOS_GEM_MAP_OFFSET, struct drm_exynos_gem_map_off)
 174
 175#define DRM_IOCTL_EXYNOS_GEM_MMAP       DRM_IOWR(DRM_COMMAND_BASE + \
 176                DRM_EXYNOS_GEM_MMAP, struct drm_exynos_gem_mmap)
 177
 178#define DRM_IOCTL_EXYNOS_GEM_GET        DRM_IOWR(DRM_COMMAND_BASE + \
 179                DRM_EXYNOS_GEM_GET,     struct drm_exynos_gem_info)
 180
 181#define DRM_IOCTL_EXYNOS_VIDI_CONNECTION        DRM_IOWR(DRM_COMMAND_BASE + \
 182                DRM_EXYNOS_VIDI_CONNECTION, struct drm_exynos_vidi_connection)
 183
 184#define DRM_IOCTL_EXYNOS_G2D_GET_VER            DRM_IOWR(DRM_COMMAND_BASE + \
 185                DRM_EXYNOS_G2D_GET_VER, struct drm_exynos_g2d_get_ver)
 186#define DRM_IOCTL_EXYNOS_G2D_SET_CMDLIST        DRM_IOWR(DRM_COMMAND_BASE + \
 187                DRM_EXYNOS_G2D_SET_CMDLIST, struct drm_exynos_g2d_set_cmdlist)
 188#define DRM_IOCTL_EXYNOS_G2D_EXEC               DRM_IOWR(DRM_COMMAND_BASE + \
 189                DRM_EXYNOS_G2D_EXEC, struct drm_exynos_g2d_exec)
 190
 191/* EXYNOS specific events */
 192#define DRM_EXYNOS_G2D_EVENT            0x80000000
 193
 194struct drm_exynos_g2d_event {
 195        struct drm_event        base;
 196        __u64                   user_data;
 197        __u32                   tv_sec;
 198        __u32                   tv_usec;
 199        __u32                   cmdlist_no;
 200        __u32                   reserved;
 201};
 202
 203#ifdef __KERNEL__
 204
 205/**
 206 * A structure for lcd panel information.
 207 *
 208 * @timing: default video mode for initializing
 209 * @width_mm: physical size of lcd width.
 210 * @height_mm: physical size of lcd height.
 211 */
 212struct exynos_drm_panel_info {
 213        struct fb_videomode timing;
 214        u32 width_mm;
 215        u32 height_mm;
 216};
 217
 218/**
 219 * Platform Specific Structure for DRM based FIMD.
 220 *
 221 * @panel: default panel info for initializing
 222 * @default_win: default window layer number to be used for UI.
 223 * @bpp: default bit per pixel.
 224 */
 225struct exynos_drm_fimd_pdata {
 226        struct exynos_drm_panel_info panel;
 227        u32                             vidcon0;
 228        u32                             vidcon1;
 229        unsigned int                    default_win;
 230        unsigned int                    bpp;
 231};
 232
 233/**
 234 * Platform Specific Structure for DRM based HDMI.
 235 *
 236 * @hdmi_dev: device point to specific hdmi driver.
 237 * @mixer_dev: device point to specific mixer driver.
 238 *
 239 * this structure is used for common hdmi driver and each device object
 240 * would be used to access specific device driver(hdmi or mixer driver)
 241 */
 242struct exynos_drm_common_hdmi_pd {
 243        struct device *hdmi_dev;
 244        struct device *mixer_dev;
 245};
 246
 247/**
 248 * Platform Specific Structure for DRM based HDMI core.
 249 *
 250 * @is_v13: set if hdmi version 13 is.
 251 * @cfg_hpd: function pointer to configure hdmi hotplug detection pin
 252 * @get_hpd: function pointer to get value of hdmi hotplug detection pin
 253 */
 254struct exynos_drm_hdmi_pdata {
 255        bool is_v13;
 256        void (*cfg_hpd)(bool external);
 257        int (*get_hpd)(void);
 258};
 259
 260#endif  /* __KERNEL__ */
 261#endif  /* _EXYNOS_DRM_H_ */
 262
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