linux/drivers/video/mxsfb.c
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   1/*
   2 * Copyright (C) 2010 Juergen Beisert, Pengutronix
   3 *
   4 * This code is based on:
   5 * Author: Vitaly Wool <vital@embeddedalley.com>
   6 *
   7 * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
   8 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
   9 *
  10 * This program is free software; you can redistribute it and/or
  11 * modify it under the terms of the GNU General Public License
  12 * as published by the Free Software Foundation; either version 2
  13 * of the License, or (at your option) any later version.
  14 * This program is distributed in the hope that it will be useful,
  15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 * GNU General Public License for more details.
  18 */
  19
  20#define DRIVER_NAME "mxsfb"
  21
  22/**
  23 * @file
  24 * @brief LCDIF driver for i.MX23 and i.MX28
  25 *
  26 * The LCDIF support four modes of operation
  27 * - MPU interface (to drive smart displays) -> not supported yet
  28 * - VSYNC interface (like MPU interface plus Vsync) -> not supported yet
  29 * - Dotclock interface (to drive LC displays with RGB data and sync signals)
  30 * - DVI (to drive ITU-R BT656)  -> not supported yet
  31 *
  32 * This driver depends on a correct setup of the pins used for this purpose
  33 * (platform specific).
  34 *
  35 * For the developer: Don't forget to set the data bus width to the display
  36 * in the imx_fb_videomode structure. You will else end up with ugly colours.
  37 * If you fight against jitter you can vary the clock delay. This is a feature
  38 * of the i.MX28 and you can vary it between 2 ns ... 8 ns in 2 ns steps. Give
  39 * the required value in the imx_fb_videomode structure.
  40 */
  41
  42#include <linux/module.h>
  43#include <linux/kernel.h>
  44#include <linux/of_device.h>
  45#include <linux/of_gpio.h>
  46#include <linux/platform_device.h>
  47#include <linux/clk.h>
  48#include <linux/dma-mapping.h>
  49#include <linux/io.h>
  50#include <linux/pinctrl/consumer.h>
  51#include <linux/mxsfb.h>
  52
  53#define REG_SET 4
  54#define REG_CLR 8
  55
  56#define LCDC_CTRL                       0x00
  57#define LCDC_CTRL1                      0x10
  58#define LCDC_V4_CTRL2                   0x20
  59#define LCDC_V3_TRANSFER_COUNT          0x20
  60#define LCDC_V4_TRANSFER_COUNT          0x30
  61#define LCDC_V4_CUR_BUF                 0x40
  62#define LCDC_V4_NEXT_BUF                0x50
  63#define LCDC_V3_CUR_BUF                 0x30
  64#define LCDC_V3_NEXT_BUF                0x40
  65#define LCDC_TIMING                     0x60
  66#define LCDC_VDCTRL0                    0x70
  67#define LCDC_VDCTRL1                    0x80
  68#define LCDC_VDCTRL2                    0x90
  69#define LCDC_VDCTRL3                    0xa0
  70#define LCDC_VDCTRL4                    0xb0
  71#define LCDC_DVICTRL0                   0xc0
  72#define LCDC_DVICTRL1                   0xd0
  73#define LCDC_DVICTRL2                   0xe0
  74#define LCDC_DVICTRL3                   0xf0
  75#define LCDC_DVICTRL4                   0x100
  76#define LCDC_V4_DATA                    0x180
  77#define LCDC_V3_DATA                    0x1b0
  78#define LCDC_V4_DEBUG0                  0x1d0
  79#define LCDC_V3_DEBUG0                  0x1f0
  80
  81#define CTRL_SFTRST                     (1 << 31)
  82#define CTRL_CLKGATE                    (1 << 30)
  83#define CTRL_BYPASS_COUNT               (1 << 19)
  84#define CTRL_VSYNC_MODE                 (1 << 18)
  85#define CTRL_DOTCLK_MODE                (1 << 17)
  86#define CTRL_DATA_SELECT                (1 << 16)
  87#define CTRL_SET_BUS_WIDTH(x)           (((x) & 0x3) << 10)
  88#define CTRL_GET_BUS_WIDTH(x)           (((x) >> 10) & 0x3)
  89#define CTRL_SET_WORD_LENGTH(x)         (((x) & 0x3) << 8)
  90#define CTRL_GET_WORD_LENGTH(x)         (((x) >> 8) & 0x3)
  91#define CTRL_MASTER                     (1 << 5)
  92#define CTRL_DF16                       (1 << 3)
  93#define CTRL_DF18                       (1 << 2)
  94#define CTRL_DF24                       (1 << 1)
  95#define CTRL_RUN                        (1 << 0)
  96
  97#define CTRL1_FIFO_CLEAR                (1 << 21)
  98#define CTRL1_SET_BYTE_PACKAGING(x)     (((x) & 0xf) << 16)
  99#define CTRL1_GET_BYTE_PACKAGING(x)     (((x) >> 16) & 0xf)
 100
 101#define TRANSFER_COUNT_SET_VCOUNT(x)    (((x) & 0xffff) << 16)
 102#define TRANSFER_COUNT_GET_VCOUNT(x)    (((x) >> 16) & 0xffff)
 103#define TRANSFER_COUNT_SET_HCOUNT(x)    ((x) & 0xffff)
 104#define TRANSFER_COUNT_GET_HCOUNT(x)    ((x) & 0xffff)
 105
 106
 107#define VDCTRL0_ENABLE_PRESENT          (1 << 28)
 108#define VDCTRL0_VSYNC_ACT_HIGH          (1 << 27)
 109#define VDCTRL0_HSYNC_ACT_HIGH          (1 << 26)
 110#define VDCTRL0_DOTCLK_ACT_FAILING      (1 << 25)
 111#define VDCTRL0_ENABLE_ACT_HIGH         (1 << 24)
 112#define VDCTRL0_VSYNC_PERIOD_UNIT       (1 << 21)
 113#define VDCTRL0_VSYNC_PULSE_WIDTH_UNIT  (1 << 20)
 114#define VDCTRL0_HALF_LINE               (1 << 19)
 115#define VDCTRL0_HALF_LINE_MODE          (1 << 18)
 116#define VDCTRL0_SET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
 117#define VDCTRL0_GET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
 118
 119#define VDCTRL2_SET_HSYNC_PERIOD(x)     ((x) & 0x3ffff)
 120#define VDCTRL2_GET_HSYNC_PERIOD(x)     ((x) & 0x3ffff)
 121
 122#define VDCTRL3_MUX_SYNC_SIGNALS        (1 << 29)
 123#define VDCTRL3_VSYNC_ONLY              (1 << 28)
 124#define SET_HOR_WAIT_CNT(x)             (((x) & 0xfff) << 16)
 125#define GET_HOR_WAIT_CNT(x)             (((x) >> 16) & 0xfff)
 126#define SET_VERT_WAIT_CNT(x)            ((x) & 0xffff)
 127#define GET_VERT_WAIT_CNT(x)            ((x) & 0xffff)
 128
 129#define VDCTRL4_SET_DOTCLK_DLY(x)       (((x) & 0x7) << 29) /* v4 only */
 130#define VDCTRL4_GET_DOTCLK_DLY(x)       (((x) >> 29) & 0x7) /* v4 only */
 131#define VDCTRL4_SYNC_SIGNALS_ON         (1 << 18)
 132#define SET_DOTCLK_H_VALID_DATA_CNT(x)  ((x) & 0x3ffff)
 133
 134#define DEBUG0_HSYNC                    (1 < 26)
 135#define DEBUG0_VSYNC                    (1 < 25)
 136
 137#define MIN_XRES                        120
 138#define MIN_YRES                        120
 139
 140#define RED 0
 141#define GREEN 1
 142#define BLUE 2
 143#define TRANSP 3
 144
 145enum mxsfb_devtype {
 146        MXSFB_V3,
 147        MXSFB_V4,
 148};
 149
 150/* CPU dependent register offsets */
 151struct mxsfb_devdata {
 152        unsigned transfer_count;
 153        unsigned cur_buf;
 154        unsigned next_buf;
 155        unsigned debug0;
 156        unsigned hs_wdth_mask;
 157        unsigned hs_wdth_shift;
 158        unsigned ipversion;
 159};
 160
 161struct mxsfb_info {
 162        struct fb_info fb_info;
 163        struct platform_device *pdev;
 164        struct clk *clk;
 165        void __iomem *base;     /* registers */
 166        unsigned allocated_size;
 167        int enabled;
 168        unsigned ld_intf_width;
 169        unsigned dotclk_delay;
 170        const struct mxsfb_devdata *devdata;
 171        int mapped;
 172};
 173
 174#define mxsfb_is_v3(host) (host->devdata->ipversion == 3)
 175#define mxsfb_is_v4(host) (host->devdata->ipversion == 4)
 176
 177static const struct mxsfb_devdata mxsfb_devdata[] = {
 178        [MXSFB_V3] = {
 179                .transfer_count = LCDC_V3_TRANSFER_COUNT,
 180                .cur_buf = LCDC_V3_CUR_BUF,
 181                .next_buf = LCDC_V3_NEXT_BUF,
 182                .debug0 = LCDC_V3_DEBUG0,
 183                .hs_wdth_mask = 0xff,
 184                .hs_wdth_shift = 24,
 185                .ipversion = 3,
 186        },
 187        [MXSFB_V4] = {
 188                .transfer_count = LCDC_V4_TRANSFER_COUNT,
 189                .cur_buf = LCDC_V4_CUR_BUF,
 190                .next_buf = LCDC_V4_NEXT_BUF,
 191                .debug0 = LCDC_V4_DEBUG0,
 192                .hs_wdth_mask = 0x3fff,
 193                .hs_wdth_shift = 18,
 194                .ipversion = 4,
 195        },
 196};
 197
 198#define to_imxfb_host(x) (container_of(x, struct mxsfb_info, fb_info))
 199
 200/* mask and shift depends on architecture */
 201static inline u32 set_hsync_pulse_width(struct mxsfb_info *host, unsigned val)
 202{
 203        return (val & host->devdata->hs_wdth_mask) <<
 204                host->devdata->hs_wdth_shift;
 205}
 206
 207static inline u32 get_hsync_pulse_width(struct mxsfb_info *host, unsigned val)
 208{
 209        return (val >> host->devdata->hs_wdth_shift) &
 210                host->devdata->hs_wdth_mask;
 211}
 212
 213static const struct fb_bitfield def_rgb565[] = {
 214        [RED] = {
 215                .offset = 11,
 216                .length = 5,
 217        },
 218        [GREEN] = {
 219                .offset = 5,
 220                .length = 6,
 221        },
 222        [BLUE] = {
 223                .offset = 0,
 224                .length = 5,
 225        },
 226        [TRANSP] = {    /* no support for transparency */
 227                .length = 0,
 228        }
 229};
 230
 231static const struct fb_bitfield def_rgb666[] = {
 232        [RED] = {
 233                .offset = 16,
 234                .length = 6,
 235        },
 236        [GREEN] = {
 237                .offset = 8,
 238                .length = 6,
 239        },
 240        [BLUE] = {
 241                .offset = 0,
 242                .length = 6,
 243        },
 244        [TRANSP] = {    /* no support for transparency */
 245                .length = 0,
 246        }
 247};
 248
 249static const struct fb_bitfield def_rgb888[] = {
 250        [RED] = {
 251                .offset = 16,
 252                .length = 8,
 253        },
 254        [GREEN] = {
 255                .offset = 8,
 256                .length = 8,
 257        },
 258        [BLUE] = {
 259                .offset = 0,
 260                .length = 8,
 261        },
 262        [TRANSP] = {    /* no support for transparency */
 263                .length = 0,
 264        }
 265};
 266
 267static inline unsigned chan_to_field(unsigned chan, struct fb_bitfield *bf)
 268{
 269        chan &= 0xffff;
 270        chan >>= 16 - bf->length;
 271        return chan << bf->offset;
 272}
 273
 274static int mxsfb_check_var(struct fb_var_screeninfo *var,
 275                struct fb_info *fb_info)
 276{
 277        struct mxsfb_info *host = to_imxfb_host(fb_info);
 278        const struct fb_bitfield *rgb = NULL;
 279
 280        if (var->xres < MIN_XRES)
 281                var->xres = MIN_XRES;
 282        if (var->yres < MIN_YRES)
 283                var->yres = MIN_YRES;
 284
 285        var->xres_virtual = var->xres;
 286
 287        var->yres_virtual = var->yres;
 288
 289        switch (var->bits_per_pixel) {
 290        case 16:
 291                /* always expect RGB 565 */
 292                rgb = def_rgb565;
 293                break;
 294        case 32:
 295                switch (host->ld_intf_width) {
 296                case STMLCDIF_8BIT:
 297                        pr_debug("Unsupported LCD bus width mapping\n");
 298                        break;
 299                case STMLCDIF_16BIT:
 300                case STMLCDIF_18BIT:
 301                        /* 24 bit to 18 bit mapping */
 302                        rgb = def_rgb666;
 303                        break;
 304                case STMLCDIF_24BIT:
 305                        /* real 24 bit */
 306                        rgb = def_rgb888;
 307                        break;
 308                }
 309                break;
 310        default:
 311                pr_debug("Unsupported colour depth: %u\n", var->bits_per_pixel);
 312                return -EINVAL;
 313        }
 314
 315        /*
 316         * Copy the RGB parameters for this display
 317         * from the machine specific parameters.
 318         */
 319        var->red    = rgb[RED];
 320        var->green  = rgb[GREEN];
 321        var->blue   = rgb[BLUE];
 322        var->transp = rgb[TRANSP];
 323
 324        return 0;
 325}
 326
 327static void mxsfb_enable_controller(struct fb_info *fb_info)
 328{
 329        struct mxsfb_info *host = to_imxfb_host(fb_info);
 330        u32 reg;
 331
 332        dev_dbg(&host->pdev->dev, "%s\n", __func__);
 333
 334        clk_prepare_enable(host->clk);
 335        clk_set_rate(host->clk, PICOS2KHZ(fb_info->var.pixclock) * 1000U);
 336
 337        /* if it was disabled, re-enable the mode again */
 338        writel(CTRL_DOTCLK_MODE, host->base + LCDC_CTRL + REG_SET);
 339
 340        /* enable the SYNC signals first, then the DMA engine */
 341        reg = readl(host->base + LCDC_VDCTRL4);
 342        reg |= VDCTRL4_SYNC_SIGNALS_ON;
 343        writel(reg, host->base + LCDC_VDCTRL4);
 344
 345        writel(CTRL_RUN, host->base + LCDC_CTRL + REG_SET);
 346
 347        host->enabled = 1;
 348}
 349
 350static void mxsfb_disable_controller(struct fb_info *fb_info)
 351{
 352        struct mxsfb_info *host = to_imxfb_host(fb_info);
 353        unsigned loop;
 354        u32 reg;
 355
 356        dev_dbg(&host->pdev->dev, "%s\n", __func__);
 357
 358        /*
 359         * Even if we disable the controller here, it will still continue
 360         * until its FIFOs are running out of data
 361         */
 362        writel(CTRL_DOTCLK_MODE, host->base + LCDC_CTRL + REG_CLR);
 363
 364        loop = 1000;
 365        while (loop) {
 366                reg = readl(host->base + LCDC_CTRL);
 367                if (!(reg & CTRL_RUN))
 368                        break;
 369                loop--;
 370        }
 371
 372        writel(VDCTRL4_SYNC_SIGNALS_ON, host->base + LCDC_VDCTRL4 + REG_CLR);
 373
 374        clk_disable_unprepare(host->clk);
 375
 376        host->enabled = 0;
 377}
 378
 379static int mxsfb_set_par(struct fb_info *fb_info)
 380{
 381        struct mxsfb_info *host = to_imxfb_host(fb_info);
 382        u32 ctrl, vdctrl0, vdctrl4;
 383        int line_size, fb_size;
 384        int reenable = 0;
 385
 386        line_size =  fb_info->var.xres * (fb_info->var.bits_per_pixel >> 3);
 387        fb_size = fb_info->var.yres_virtual * line_size;
 388
 389        if (fb_size > fb_info->fix.smem_len)
 390                return -ENOMEM;
 391
 392        fb_info->fix.line_length = line_size;
 393
 394        /*
 395         * It seems, you can't re-program the controller if it is still running.
 396         * This may lead into shifted pictures (FIFO issue?).
 397         * So, first stop the controller and drain its FIFOs
 398         */
 399        if (host->enabled) {
 400                reenable = 1;
 401                mxsfb_disable_controller(fb_info);
 402        }
 403
 404        /* clear the FIFOs */
 405        writel(CTRL1_FIFO_CLEAR, host->base + LCDC_CTRL1 + REG_SET);
 406
 407        ctrl = CTRL_BYPASS_COUNT | CTRL_MASTER |
 408                CTRL_SET_BUS_WIDTH(host->ld_intf_width);
 409
 410        switch (fb_info->var.bits_per_pixel) {
 411        case 16:
 412                dev_dbg(&host->pdev->dev, "Setting up RGB565 mode\n");
 413                ctrl |= CTRL_SET_WORD_LENGTH(0);
 414                writel(CTRL1_SET_BYTE_PACKAGING(0xf), host->base + LCDC_CTRL1);
 415                break;
 416        case 32:
 417                dev_dbg(&host->pdev->dev, "Setting up RGB888/666 mode\n");
 418                ctrl |= CTRL_SET_WORD_LENGTH(3);
 419                switch (host->ld_intf_width) {
 420                case STMLCDIF_8BIT:
 421                        dev_dbg(&host->pdev->dev,
 422                                        "Unsupported LCD bus width mapping\n");
 423                        return -EINVAL;
 424                case STMLCDIF_16BIT:
 425                case STMLCDIF_18BIT:
 426                        /* 24 bit to 18 bit mapping */
 427                        ctrl |= CTRL_DF24; /* ignore the upper 2 bits in
 428                                            *  each colour component
 429                                            */
 430                        break;
 431                case STMLCDIF_24BIT:
 432                        /* real 24 bit */
 433                        break;
 434                }
 435                /* do not use packed pixels = one pixel per word instead */
 436                writel(CTRL1_SET_BYTE_PACKAGING(0x7), host->base + LCDC_CTRL1);
 437                break;
 438        default:
 439                dev_dbg(&host->pdev->dev, "Unhandled color depth of %u\n",
 440                                fb_info->var.bits_per_pixel);
 441                return -EINVAL;
 442        }
 443
 444        writel(ctrl, host->base + LCDC_CTRL);
 445
 446        writel(TRANSFER_COUNT_SET_VCOUNT(fb_info->var.yres) |
 447                        TRANSFER_COUNT_SET_HCOUNT(fb_info->var.xres),
 448                        host->base + host->devdata->transfer_count);
 449
 450        vdctrl0 = VDCTRL0_ENABLE_PRESENT |      /* always in DOTCLOCK mode */
 451                VDCTRL0_VSYNC_PERIOD_UNIT |
 452                VDCTRL0_VSYNC_PULSE_WIDTH_UNIT |
 453                VDCTRL0_SET_VSYNC_PULSE_WIDTH(fb_info->var.vsync_len);
 454        if (fb_info->var.sync & FB_SYNC_HOR_HIGH_ACT)
 455                vdctrl0 |= VDCTRL0_HSYNC_ACT_HIGH;
 456        if (fb_info->var.sync & FB_SYNC_VERT_HIGH_ACT)
 457                vdctrl0 |= VDCTRL0_VSYNC_ACT_HIGH;
 458        if (fb_info->var.sync & FB_SYNC_DATA_ENABLE_HIGH_ACT)
 459                vdctrl0 |= VDCTRL0_ENABLE_ACT_HIGH;
 460        if (fb_info->var.sync & FB_SYNC_DOTCLK_FAILING_ACT)
 461                vdctrl0 |= VDCTRL0_DOTCLK_ACT_FAILING;
 462
 463        writel(vdctrl0, host->base + LCDC_VDCTRL0);
 464
 465        /* frame length in lines */
 466        writel(fb_info->var.upper_margin + fb_info->var.vsync_len +
 467                fb_info->var.lower_margin + fb_info->var.yres,
 468                host->base + LCDC_VDCTRL1);
 469
 470        /* line length in units of clocks or pixels */
 471        writel(set_hsync_pulse_width(host, fb_info->var.hsync_len) |
 472                VDCTRL2_SET_HSYNC_PERIOD(fb_info->var.left_margin +
 473                fb_info->var.hsync_len + fb_info->var.right_margin +
 474                fb_info->var.xres),
 475                host->base + LCDC_VDCTRL2);
 476
 477        writel(SET_HOR_WAIT_CNT(fb_info->var.left_margin +
 478                fb_info->var.hsync_len) |
 479                SET_VERT_WAIT_CNT(fb_info->var.upper_margin +
 480                        fb_info->var.vsync_len),
 481                host->base + LCDC_VDCTRL3);
 482
 483        vdctrl4 = SET_DOTCLK_H_VALID_DATA_CNT(fb_info->var.xres);
 484        if (mxsfb_is_v4(host))
 485                vdctrl4 |= VDCTRL4_SET_DOTCLK_DLY(host->dotclk_delay);
 486        writel(vdctrl4, host->base + LCDC_VDCTRL4);
 487
 488        writel(fb_info->fix.smem_start +
 489                        fb_info->fix.line_length * fb_info->var.yoffset,
 490                        host->base + host->devdata->next_buf);
 491
 492        if (reenable)
 493                mxsfb_enable_controller(fb_info);
 494
 495        return 0;
 496}
 497
 498static int mxsfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
 499                u_int transp, struct fb_info *fb_info)
 500{
 501        unsigned int val;
 502        int ret = -EINVAL;
 503
 504        /*
 505         * If greyscale is true, then we convert the RGB value
 506         * to greyscale no matter what visual we are using.
 507         */
 508        if (fb_info->var.grayscale)
 509                red = green = blue = (19595 * red + 38470 * green +
 510                                        7471 * blue) >> 16;
 511
 512        switch (fb_info->fix.visual) {
 513        case FB_VISUAL_TRUECOLOR:
 514                /*
 515                 * 12 or 16-bit True Colour.  We encode the RGB value
 516                 * according to the RGB bitfield information.
 517                 */
 518                if (regno < 16) {
 519                        u32 *pal = fb_info->pseudo_palette;
 520
 521                        val  = chan_to_field(red, &fb_info->var.red);
 522                        val |= chan_to_field(green, &fb_info->var.green);
 523                        val |= chan_to_field(blue, &fb_info->var.blue);
 524
 525                        pal[regno] = val;
 526                        ret = 0;
 527                }
 528                break;
 529
 530        case FB_VISUAL_STATIC_PSEUDOCOLOR:
 531        case FB_VISUAL_PSEUDOCOLOR:
 532                break;
 533        }
 534
 535        return ret;
 536}
 537
 538static int mxsfb_blank(int blank, struct fb_info *fb_info)
 539{
 540        struct mxsfb_info *host = to_imxfb_host(fb_info);
 541
 542        switch (blank) {
 543        case FB_BLANK_POWERDOWN:
 544        case FB_BLANK_VSYNC_SUSPEND:
 545        case FB_BLANK_HSYNC_SUSPEND:
 546        case FB_BLANK_NORMAL:
 547                if (host->enabled)
 548                        mxsfb_disable_controller(fb_info);
 549                break;
 550
 551        case FB_BLANK_UNBLANK:
 552                if (!host->enabled)
 553                        mxsfb_enable_controller(fb_info);
 554                break;
 555        }
 556        return 0;
 557}
 558
 559static int mxsfb_pan_display(struct fb_var_screeninfo *var,
 560                struct fb_info *fb_info)
 561{
 562        struct mxsfb_info *host = to_imxfb_host(fb_info);
 563        unsigned offset;
 564
 565        if (var->xoffset != 0)
 566                return -EINVAL;
 567
 568        offset = fb_info->fix.line_length * var->yoffset;
 569
 570        /* update on next VSYNC */
 571        writel(fb_info->fix.smem_start + offset,
 572                        host->base + host->devdata->next_buf);
 573
 574        return 0;
 575}
 576
 577static struct fb_ops mxsfb_ops = {
 578        .owner = THIS_MODULE,
 579        .fb_check_var = mxsfb_check_var,
 580        .fb_set_par = mxsfb_set_par,
 581        .fb_setcolreg = mxsfb_setcolreg,
 582        .fb_blank = mxsfb_blank,
 583        .fb_pan_display = mxsfb_pan_display,
 584        .fb_fillrect = cfb_fillrect,
 585        .fb_copyarea = cfb_copyarea,
 586        .fb_imageblit = cfb_imageblit,
 587};
 588
 589static int __devinit mxsfb_restore_mode(struct mxsfb_info *host)
 590{
 591        struct fb_info *fb_info = &host->fb_info;
 592        unsigned line_count;
 593        unsigned period;
 594        unsigned long pa, fbsize;
 595        int bits_per_pixel, ofs;
 596        u32 transfer_count, vdctrl0, vdctrl2, vdctrl3, vdctrl4, ctrl;
 597        struct fb_videomode vmode;
 598
 599        /* Only restore the mode when the controller is running */
 600        ctrl = readl(host->base + LCDC_CTRL);
 601        if (!(ctrl & CTRL_RUN))
 602                return -EINVAL;
 603
 604        vdctrl0 = readl(host->base + LCDC_VDCTRL0);
 605        vdctrl2 = readl(host->base + LCDC_VDCTRL2);
 606        vdctrl3 = readl(host->base + LCDC_VDCTRL3);
 607        vdctrl4 = readl(host->base + LCDC_VDCTRL4);
 608
 609        transfer_count = readl(host->base + host->devdata->transfer_count);
 610
 611        vmode.xres = TRANSFER_COUNT_GET_HCOUNT(transfer_count);
 612        vmode.yres = TRANSFER_COUNT_GET_VCOUNT(transfer_count);
 613
 614        switch (CTRL_GET_WORD_LENGTH(ctrl)) {
 615        case 0:
 616                bits_per_pixel = 16;
 617                break;
 618        case 3:
 619                bits_per_pixel = 32;
 620        case 1:
 621        default:
 622                return -EINVAL;
 623        }
 624
 625        fb_info->var.bits_per_pixel = bits_per_pixel;
 626
 627        vmode.pixclock = KHZ2PICOS(clk_get_rate(host->clk) / 1000U);
 628        vmode.hsync_len = get_hsync_pulse_width(host, vdctrl2);
 629        vmode.left_margin = GET_HOR_WAIT_CNT(vdctrl3) - vmode.hsync_len;
 630        vmode.right_margin = VDCTRL2_GET_HSYNC_PERIOD(vdctrl2) - vmode.hsync_len -
 631                vmode.left_margin - vmode.xres;
 632        vmode.vsync_len = VDCTRL0_GET_VSYNC_PULSE_WIDTH(vdctrl0);
 633        period = readl(host->base + LCDC_VDCTRL1);
 634        vmode.upper_margin = GET_VERT_WAIT_CNT(vdctrl3) - vmode.vsync_len;
 635        vmode.lower_margin = period - vmode.vsync_len - vmode.upper_margin - vmode.yres;
 636
 637        vmode.vmode = FB_VMODE_NONINTERLACED;
 638
 639        vmode.sync = 0;
 640        if (vdctrl0 & VDCTRL0_HSYNC_ACT_HIGH)
 641                vmode.sync |= FB_SYNC_HOR_HIGH_ACT;
 642        if (vdctrl0 & VDCTRL0_VSYNC_ACT_HIGH)
 643                vmode.sync |= FB_SYNC_VERT_HIGH_ACT;
 644
 645        pr_debug("Reconstructed video mode:\n");
 646        pr_debug("%dx%d, hsync: %u left: %u, right: %u, vsync: %u, upper: %u, lower: %u\n",
 647                        vmode.xres, vmode.yres,
 648                        vmode.hsync_len, vmode.left_margin, vmode.right_margin,
 649                        vmode.vsync_len, vmode.upper_margin, vmode.lower_margin);
 650        pr_debug("pixclk: %ldkHz\n", PICOS2KHZ(vmode.pixclock));
 651
 652        fb_add_videomode(&vmode, &fb_info->modelist);
 653
 654        host->ld_intf_width = CTRL_GET_BUS_WIDTH(ctrl);
 655        host->dotclk_delay = VDCTRL4_GET_DOTCLK_DLY(vdctrl4);
 656
 657        fb_info->fix.line_length = vmode.xres * (bits_per_pixel >> 3);
 658
 659        pa = readl(host->base + host->devdata->cur_buf);
 660        fbsize = fb_info->fix.line_length * vmode.yres;
 661        if (pa < fb_info->fix.smem_start)
 662                return -EINVAL;
 663        if (pa + fbsize > fb_info->fix.smem_start + fb_info->fix.smem_len)
 664                return -EINVAL;
 665        ofs = pa - fb_info->fix.smem_start;
 666        if (ofs) {
 667                memmove(fb_info->screen_base, fb_info->screen_base + ofs, fbsize);
 668                writel(fb_info->fix.smem_start, host->base + host->devdata->next_buf);
 669        }
 670
 671        line_count = fb_info->fix.smem_len / fb_info->fix.line_length;
 672        fb_info->fix.ypanstep = 1;
 673
 674        clk_prepare_enable(host->clk);
 675        host->enabled = 1;
 676
 677        return 0;
 678}
 679
 680static int __devinit mxsfb_init_fbinfo(struct mxsfb_info *host)
 681{
 682        struct fb_info *fb_info = &host->fb_info;
 683        struct fb_var_screeninfo *var = &fb_info->var;
 684        struct mxsfb_platform_data *pdata = host->pdev->dev.platform_data;
 685        dma_addr_t fb_phys;
 686        void *fb_virt;
 687        unsigned fb_size = pdata->fb_size;
 688
 689        fb_info->fbops = &mxsfb_ops;
 690        fb_info->flags = FBINFO_FLAG_DEFAULT | FBINFO_READS_FAST;
 691        strlcpy(fb_info->fix.id, "mxs", sizeof(fb_info->fix.id));
 692        fb_info->fix.type = FB_TYPE_PACKED_PIXELS;
 693        fb_info->fix.ypanstep = 1;
 694        fb_info->fix.visual = FB_VISUAL_TRUECOLOR,
 695        fb_info->fix.accel = FB_ACCEL_NONE;
 696
 697        var->bits_per_pixel = pdata->default_bpp ? pdata->default_bpp : 16;
 698        var->nonstd = 0;
 699        var->activate = FB_ACTIVATE_NOW;
 700        var->accel_flags = 0;
 701        var->vmode = FB_VMODE_NONINTERLACED;
 702
 703        host->dotclk_delay = pdata->dotclk_delay;
 704        host->ld_intf_width = pdata->ld_intf_width;
 705
 706        /* Memory allocation for framebuffer */
 707        if (pdata->fb_phys) {
 708                if (!fb_size)
 709                        return -EINVAL;
 710
 711                fb_phys = pdata->fb_phys;
 712
 713                if (!request_mem_region(fb_phys, fb_size, host->pdev->name))
 714                        return -ENOMEM;
 715
 716                fb_virt = ioremap(fb_phys, fb_size);
 717                if (!fb_virt) {
 718                        release_mem_region(fb_phys, fb_size);
 719                        return -ENOMEM;
 720                }
 721                host->mapped = 1;
 722        } else {
 723                if (!fb_size)
 724                        fb_size = SZ_2M; /* default */
 725                fb_virt = alloc_pages_exact(fb_size, GFP_DMA);
 726                if (!fb_virt)
 727                        return -ENOMEM;
 728
 729                fb_phys = virt_to_phys(fb_virt);
 730        }
 731
 732        fb_info->fix.smem_start = fb_phys;
 733        fb_info->screen_base = fb_virt;
 734        fb_info->screen_size = fb_info->fix.smem_len = fb_size;
 735
 736        if (mxsfb_restore_mode(host))
 737                memset(fb_virt, 0, fb_size);
 738
 739        return 0;
 740}
 741
 742static void __devexit mxsfb_free_videomem(struct mxsfb_info *host)
 743{
 744        struct fb_info *fb_info = &host->fb_info;
 745
 746        if (host->mapped) {
 747                iounmap(fb_info->screen_base);
 748                release_mem_region(fb_info->fix.smem_start,
 749                                fb_info->screen_size);
 750        } else {
 751                free_pages_exact(fb_info->screen_base, fb_info->fix.smem_len);
 752        }
 753}
 754
 755static struct platform_device_id mxsfb_devtype[] = {
 756        {
 757                .name = "imx23-fb",
 758                .driver_data = MXSFB_V3,
 759        }, {
 760                .name = "imx28-fb",
 761                .driver_data = MXSFB_V4,
 762        }, {
 763                /* sentinel */
 764        }
 765};
 766MODULE_DEVICE_TABLE(platform, mxsfb_devtype);
 767
 768static const struct of_device_id mxsfb_dt_ids[] = {
 769        { .compatible = "fsl,imx23-lcdif", .data = &mxsfb_devtype[0], },
 770        { .compatible = "fsl,imx28-lcdif", .data = &mxsfb_devtype[1], },
 771        { /* sentinel */ }
 772};
 773MODULE_DEVICE_TABLE(of, mxsfb_dt_ids);
 774
 775static int __devinit mxsfb_probe(struct platform_device *pdev)
 776{
 777        const struct of_device_id *of_id =
 778                        of_match_device(mxsfb_dt_ids, &pdev->dev);
 779        struct mxsfb_platform_data *pdata = pdev->dev.platform_data;
 780        struct resource *res;
 781        struct mxsfb_info *host;
 782        struct fb_info *fb_info;
 783        struct fb_modelist *modelist;
 784        struct pinctrl *pinctrl;
 785        int panel_enable;
 786        enum of_gpio_flags flags;
 787        int i, ret;
 788
 789        if (of_id)
 790                pdev->id_entry = of_id->data;
 791
 792        if (!pdata) {
 793                dev_err(&pdev->dev, "No platformdata. Giving up\n");
 794                return -ENODEV;
 795        }
 796
 797        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 798        if (!res) {
 799                dev_err(&pdev->dev, "Cannot get memory IO resource\n");
 800                return -ENODEV;
 801        }
 802
 803        if (!request_mem_region(res->start, resource_size(res), pdev->name))
 804                return -EBUSY;
 805
 806        fb_info = framebuffer_alloc(sizeof(struct mxsfb_info), &pdev->dev);
 807        if (!fb_info) {
 808                dev_err(&pdev->dev, "Failed to allocate fbdev\n");
 809                ret = -ENOMEM;
 810                goto error_alloc_info;
 811        }
 812
 813        host = to_imxfb_host(fb_info);
 814
 815        host->base = ioremap(res->start, resource_size(res));
 816        if (!host->base) {
 817                dev_err(&pdev->dev, "ioremap failed\n");
 818                ret = -ENOMEM;
 819                goto error_ioremap;
 820        }
 821
 822        host->pdev = pdev;
 823        platform_set_drvdata(pdev, host);
 824
 825        host->devdata = &mxsfb_devdata[pdev->id_entry->driver_data];
 826
 827        pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
 828        if (IS_ERR(pinctrl)) {
 829                ret = PTR_ERR(pinctrl);
 830                goto error_getpin;
 831        }
 832
 833        host->clk = clk_get(&host->pdev->dev, NULL);
 834        if (IS_ERR(host->clk)) {
 835                ret = PTR_ERR(host->clk);
 836                goto error_getclock;
 837        }
 838
 839        panel_enable = of_get_named_gpio_flags(pdev->dev.of_node,
 840                                               "panel-enable-gpios", 0, &flags);
 841        if (gpio_is_valid(panel_enable)) {
 842                unsigned long f = GPIOF_OUT_INIT_HIGH;
 843                if (flags == OF_GPIO_ACTIVE_LOW)
 844                        f = GPIOF_OUT_INIT_LOW;
 845                ret = devm_gpio_request_one(&pdev->dev, panel_enable,
 846                                            f, "panel-enable");
 847                if (ret) {
 848                        dev_err(&pdev->dev,
 849                                "failed to request gpio %d: %d\n",
 850                                panel_enable, ret);
 851                        goto error_panel_enable;
 852                }
 853        }
 854
 855        fb_info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL);
 856        if (!fb_info->pseudo_palette) {
 857                ret = -ENOMEM;
 858                goto error_pseudo_pallette;
 859        }
 860
 861        INIT_LIST_HEAD(&fb_info->modelist);
 862
 863        ret = mxsfb_init_fbinfo(host);
 864        if (ret != 0)
 865                goto error_init_fb;
 866
 867        for (i = 0; i < pdata->mode_count; i++)
 868                fb_add_videomode(&pdata->mode_list[i], &fb_info->modelist);
 869
 870        modelist = list_first_entry(&fb_info->modelist,
 871                        struct fb_modelist, list);
 872        fb_videomode_to_var(&fb_info->var, &modelist->mode);
 873
 874        /* init the color fields */
 875        mxsfb_check_var(&fb_info->var, fb_info);
 876
 877        platform_set_drvdata(pdev, fb_info);
 878
 879        ret = register_framebuffer(fb_info);
 880        if (ret != 0) {
 881                dev_err(&pdev->dev,"Failed to register framebuffer\n");
 882                goto error_register;
 883        }
 884
 885        if (!host->enabled) {
 886                writel(0, host->base + LCDC_CTRL);
 887                mxsfb_set_par(fb_info);
 888                mxsfb_enable_controller(fb_info);
 889        }
 890
 891        dev_info(&pdev->dev, "initialized\n");
 892
 893        return 0;
 894
 895error_register:
 896        if (host->enabled)
 897                clk_disable_unprepare(host->clk);
 898        fb_destroy_modelist(&fb_info->modelist);
 899error_init_fb:
 900        kfree(fb_info->pseudo_palette);
 901error_pseudo_pallette:
 902error_panel_enable:
 903        clk_put(host->clk);
 904error_getclock:
 905error_getpin:
 906        iounmap(host->base);
 907error_ioremap:
 908        framebuffer_release(fb_info);
 909error_alloc_info:
 910        release_mem_region(res->start, resource_size(res));
 911
 912        return ret;
 913}
 914
 915static int __devexit mxsfb_remove(struct platform_device *pdev)
 916{
 917        struct fb_info *fb_info = platform_get_drvdata(pdev);
 918        struct mxsfb_info *host = to_imxfb_host(fb_info);
 919        struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 920
 921        if (host->enabled)
 922                mxsfb_disable_controller(fb_info);
 923
 924        unregister_framebuffer(fb_info);
 925        kfree(fb_info->pseudo_palette);
 926        mxsfb_free_videomem(host);
 927        iounmap(host->base);
 928        clk_put(host->clk);
 929
 930        framebuffer_release(fb_info);
 931        release_mem_region(res->start, resource_size(res));
 932
 933        platform_set_drvdata(pdev, NULL);
 934
 935        return 0;
 936}
 937
 938static void mxsfb_shutdown(struct platform_device *pdev)
 939{
 940        struct fb_info *fb_info = platform_get_drvdata(pdev);
 941        struct mxsfb_info *host = to_imxfb_host(fb_info);
 942
 943        /*
 944         * Force stop the LCD controller as keeping it running during reboot
 945         * might interfere with the BootROM's boot mode pads sampling.
 946         */
 947        writel(CTRL_RUN, host->base + LCDC_CTRL + REG_CLR);
 948}
 949
 950static struct platform_driver mxsfb_driver = {
 951        .probe = mxsfb_probe,
 952        .remove = __devexit_p(mxsfb_remove),
 953        .shutdown = mxsfb_shutdown,
 954        .id_table = mxsfb_devtype,
 955        .driver = {
 956                   .name = DRIVER_NAME,
 957                   .of_match_table = mxsfb_dt_ids,
 958        },
 959};
 960
 961module_platform_driver(mxsfb_driver);
 962
 963MODULE_DESCRIPTION("Freescale mxs framebuffer driver");
 964MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 965MODULE_LICENSE("GPL");
 966
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