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" "1	/a>	spav class="comment">/*	/spav4." "2	/a>	spav class="comment"> * sec-irq.c	/spav4." "3	/a>	spav class="comment"> *	/spav4." "4	/a>	spav class="comment"> * Copyright (c) 2011 Samsung Electronics Co., Ltd	/spav4." "5	/a>	spav class="comment"> *              http://www.samsung.com	/spav4." "6	/a>	spav class="comment"> *	/spav4." "7	/a>	spav class="comment"> *  This program is free software; you cav redistribute  it and/or modify it	/spav4." "8	/a>	spav class="comment"> *  under  the terms of  the GNU General2"Public License as published by the	/spav4." "9	/a>	spav class="comment"> *  Free Software Founda=d"v;  either vers
   2 of the  License, or (at your	/spav4."  pala>	spav class="comment"> *  ue=d"v) any later vers
  .	/spav4." 11	/a>	spav class="comment"> *	/spav4." 12	/a>	spav class="comment"> */	/spav4." 13	/a>." 14	/a>#include <linux/device.h	/a>>." 15	/a>#include <linux/interrupt.h	/a>>." 16	/a>#include <linux/irq.h	/a>>." 17	/a>#include <linux/regmap.h	/a>>." 18	/a>." 19	/a>#include <linux/mfd/samsung/core.h	/a>>." 20	/a>#include <linux/mfd/samsung/irq.h	/a>>." 21	/a>#include <linux/mfd/samsung/s2mps11.h	/a>>." 22	/a>#include <linux/mfd/samsung/s5m8763.h	/a>>." 23	/a>#include <linux/mfd/samsung/s5m8767.h	/a>>." 24	/a>." 25	/a>static struct"	a href="+code=regmap_irq" class="sref">regmap_irq	/a>"	a href="+code=s2mps11_irqs" class="sref">s2mps11_irqs	/a>[] = {." 26	/a>        [	a href="+code=S2MPS11_IRQ_PWRONF" class="sref">S2MPS11_IRQ_PWRONF	/a>] = {." 27	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,." 28	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S2MPS11_IRQ_PWRONF_MASK" class="sref">S2MPS11_IRQ_PWRONF_MASK	/a>,." 29	/a>        },." 30	/a>        [	a href="+code=S2MPS11_IRQ_PWRONR" class="sref">S2MPS11_IRQ_PWRONR	/a>] = {." 31	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,." 32	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S2MPS11_IRQ_PWRONR_MASK" class="sref">S2MPS11_IRQ_PWRONR_MASK	/a>,." 33	/a>        },." 34	/a>        [	a href="+code=S2MPS11_IRQ_JIGONBF" class="sref">S2MPS11_IRQ_JIGONBF	/a>] = {." 35	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,." 36	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S2MPS11_IRQ_JIGONBF_MASK" class="sref">S2MPS11_IRQ_JIGONBF_MASK	/a>,." 37	/a>        },." 38	/a>        [	a href="+code=S2MPS11_IRQ_JIGONBR" class="sref">S2MPS11_IRQ_JIGONBR	/a>] = {." 39	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,." 40	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S2MPS11_IRQ_JIGONBR_MASK" class="sref">S2MPS11_IRQ_JIGONBR_MASK	/a>,." 41	/a>        },." 42	/a>        [	a href="+code=S2MPS11_IRQ_ACOKBF" class="sref">S2MPS11_IRQ_ACOKBF	/a>] = {." 43	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,." 44	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S2MPS11_IRQ_ACOKBF_MASK" class="sref">S2MPS11_IRQ_ACOKBF_MASK	/a>,." 45	/a>        },." 46	/a>        [	a href="+code=S2MPS11_IRQ_ACOKBR" class="sref">S2MPS11_IRQ_ACOKBR	/a>] = {." 47	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,." 48	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S2MPS11_IRQ_ACOKBR_MASK" class="sref">S2MPS11_IRQ_ACOKBR_MASK	/a>,." 49	/a>        },." 50	/a>        [	a href="+code=S2MPS11_IRQ_PWRON1S" class="sref">S2MPS11_IRQ_PWRON1S	/a>] = {." 51	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,." 52	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S2MPS11_IRQ_PWRON1S_MASK" class="sref">S2MPS11_IRQ_PWRON1S_MASK	/a>,." 53	/a>        },." 54	/a>        [	a href="+code=S2MPS11_IRQ_MRB" class="sref">S2MPS11_IRQ_MRB	/a>] = {." 55	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,." 56	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S2MPS11_IRQ_MRB_MASK" class="sref">S2MPS11_IRQ_MRB_MASK	/a>,." 57	/a>        },." 58	/a>        [	a href="+code=S2MPS11_IRQ_RTC60S" class="sref">S2MPS11_IRQ_RTC60S	/a>] = {." 59	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 2,." 60	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S2MPS11_IRQ_RTC60S_MASK" class="sref">S2MPS11_IRQ_RTC60S_MASK	/a>,." 61	/a>        },." 62	/a>        [	a href="+code=S2MPS11_IRQ_RTCA1" class="sref">S2MPS11_IRQ_RTCA1	/a>] = {." 63	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 2,." 64	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S2MPS11_IRQ_RTCA1_MASK" class="sref">S2MPS11_IRQ_RTCA1_MASK	/a>,." 65	/a>        },." 66	/a>        [	a href="+code=S2MPS11_IRQ_RTCA2" class="sref">S2MPS11_IRQ_RTCA2	/a>] = {." 67	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 2,." 68	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S2MPS11_IRQ_RTCA2_MASK" class="sref">S2MPS11_IRQ_RTCA2_MASK	/a>,." 69	/a>        },." 70	/a>        [	a href="+code=S2MPS11_IRQ_SMPL" class="sref">S2MPS11_IRQ_SMPL	/a>] = {." 71	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 2,." 72	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S2MPS11_IRQ_SMPL_MASK" class="sref">S2MPS11_IRQ_SMPL_MASK	/a>,." 73	/a>        },." 74	/a>        [	a href="+code=S2MPS11_IRQ_RTC1S" class="sref">S2MPS11_IRQ_RTC1S	/a>] = {." 75	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 2,." 76	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S2MPS11_IRQ_RTC1S_MASK" class="sref">S2MPS11_IRQ_RTC1S_MASK	/a>,." 77	/a>        },." 78	/a>        [	a href="+code=S2MPS11_IRQ_WTSR" class="sref">S2MPS11_IRQ_WTSR	/a>] = {." 79	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 2,." 80	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S2MPS11_IRQ_WTSR_MASK" class="sref">S2MPS11_IRQ_WTSR_MASK	/a>,." 81	/a>        },." 82	/a>        [	a href="+code=S2MPS11_IRQ_INT120C" class="sref">S2MPS11_IRQ_INT120C	/a>] = {." 83	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 3,." 84	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S2MPS11_IRQ_INT120C_MASK" class="sref">S2MPS11_IRQ_INT120C_MASK	/a>,." 85	/a>        },." 86	/a>        [	a href="+code=S2MPS11_IRQ_INT140C" class="sref">S2MPS11_IRQ_INT140C	/a>] = {." 87	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 3,." 88	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S2MPS11_IRQ_INT140C_MASK" class="sref">S2MPS11_IRQ_INT140C_MASK	/a>,." 89	/a>        },." 90	/a>};." 91	/a>." 92	/a>." 93	/a>static struct"	a href="+code=regmap_irq" class="sref">regmap_irq	/a>"	a href="+code=s5m8767_irqs" class="sref">s5m8767_irqs	/a>[] = {." 94	/a>        [	a href="+code=S5M8767_IRQ_PWRR" class="sref">S5M8767_IRQ_PWRR	/a>] = {." 95	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,." 96	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8767_IRQ_PWRR_MASK" class="sref">S5M8767_IRQ_PWRR_MASK	/a>,." 97	/a>        },." 98	/a>        [	a href="+code=S5M8767_IRQ_PWRF" class="sref">S5M8767_IRQ_PWRF	/a>] = {." 99	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,."100	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8767_IRQ_PWRF_MASK" class="sref">S5M8767_IRQ_PWRF_MASK	/a>,."101	/a>        },."102	/a>        [	a href="+code=S5M8767_IRQ_PWR1S" class="sref">S5M8767_IRQ_PWR1S	/a>] = {."103	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,."104	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8767_IRQ_PWR1S_MASK" class="sref">S5M8767_IRQ_PWR1S_MASK	/a>,."105	/a>        },."106	/a>        [	a href="+code=S5M8767_IRQ_JIGR" class="sref">S5M8767_IRQ_JIGR	/a>] = {."107	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,."108	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8767_IRQ_JIGR_MASK" class="sref">S5M8767_IRQ_JIGR_MASK	/a>,."109	/a>        },."110	/a>        [	a href="+code=S5M8767_IRQ_JIGF" class="sref">S5M8767_IRQ_JIGF	/a>] = {."111	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,."112	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8767_IRQ_JIGF_MASK" class="sref">S5M8767_IRQ_JIGF_MASK	/a>,."113	/a>        },."114	/a>        [	a href="+code=S5M8767_IRQ_LOWBAT2" class="sref">S5M8767_IRQ_LOWBAT2	/a>] = {."115	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,."116	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8767_IRQ_LOWBAT2_MASK" class="sref">S5M8767_IRQ_LOWBAT2_MASK	/a>,."117	/a>        },."118	/a>        [	a href="+code=S5M8767_IRQ_LOWBAT1" class="sref">S5M8767_IRQ_LOWBAT1	/a>] = {."119	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,."120	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8767_IRQ_LOWBAT1_MASK" class="sref">S5M8767_IRQ_LOWBAT1_MASK	/a>,."121	/a>        },."122	/a>        [	a href="+code=S5M8767_IRQ_MRB" class="sref">S5M8767_IRQ_MRB	/a>] = {."123	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 2,."124	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8767_IRQ_MRB_MASK" class="sref">S5M8767_IRQ_MRB_MASK	/a>,."125	/a>        },."126	/a>        [	a href="+code=S5M8767_IRQ_DVSOK2" class="sref">S5M8767_IRQ_DVSOK2	/a>] = {."127	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 2,."128	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8767_IRQ_DVSOK2_MASK" class="sref">S5M8767_IRQ_DVSOK2_MASK	/a>,."129	/a>        },."130	/a>        [	a href="+code=S5M8767_IRQ_DVSOK3" class="sref">S5M8767_IRQ_DVSOK3	/a>] = {."131	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 2,."132	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8767_IRQ_DVSOK3_MASK" class="sref">S5M8767_IRQ_DVSOK3_MASK	/a>,."133	/a>        },."134	/a>        [	a href="+code=S5M8767_IRQ_DVSOK4" class="sref">S5M8767_IRQ_DVSOK4	/a>] = {."135	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 2,."136	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8767_IRQ_DVSOK4_MASK" class="sref">S5M8767_IRQ_DVSOK4_MASK	/a>,."137	/a>        },."138	/a>        [	a href="+code=S5M8767_IRQ_RTC60S" class="sref">S5M8767_IRQ_RTC60S	/a>] = {."139	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 3,."140	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8767_IRQ_RTC60S_MASK" class="sref">S5M8767_IRQ_RTC60S_MASK	/a>,."141	/a>        },."142	/a>        [	a href="+code=S5M8767_IRQ_RTCA1" class="sref">S5M8767_IRQ_RTCA1	/a>] = {."143	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 3,."144	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8767_IRQ_RTCA1_MASK" class="sref">S5M8767_IRQ_RTCA1_MASK	/a>,."145	/a>        },."146	/a>        [	a href="+code=S5M8767_IRQ_RTCA2" class="sref">S5M8767_IRQ_RTCA2	/a>] = {."147	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 3,."148	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8767_IRQ_RTCA2_MASK" class="sref">S5M8767_IRQ_RTCA2_MASK	/a>,."149	/a>        },."150	/a>        [	a href="+code=S5M8767_IRQ_SMPL" class="sref">S5M8767_IRQ_SMPL	/a>] = {."151	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 3,."152	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8767_IRQ_SMPL_MASK" class="sref">S5M8767_IRQ_SMPL_MASK	/a>,."153	/a>        },."154	/a>        [	a href="+code=S5M8767_IRQ_RTC1S" class="sref">S5M8767_IRQ_RTC1S	/a>] = {."155	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 3,."156	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8767_IRQ_RTC1S_MASK" class="sref">S5M8767_IRQ_RTC1S_MASK	/a>,."157	/a>        },."158	/a>        [	a href="+code=S5M8767_IRQ_WTSR" class="sref">S5M8767_IRQ_WTSR	/a>] = {."159	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 3,."160	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8767_IRQ_WTSR_MASK" class="sref">S5M8767_IRQ_WTSR_MASK	/a>,."161	/a>        },."162	/a>};."163	/a>."164	/a>static struct"	a href="+code=regmap_irq" class="sref">regmap_irq	/a>"	a href="+code=s5m8763_irqs" class="sref">s5m8763_irqs	/a>[] = {."165	/a>        [	a href="+code=S5M8763_IRQ_DCINF" class="sref">S5M8763_IRQ_DCINF	/a>] = {."166	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,."167	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8763_IRQ_DCINF_MASK" class="sref">S5M8763_IRQ_DCINF_MASK	/a>,."168	/a>        },."169	/a>        [	a href="+code=S5M8763_IRQ_DCINR" class="sref">S5M8763_IRQ_DCINR	/a>] = {."170	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,."171	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8763_IRQ_DCINR_MASK" class="sref">S5M8763_IRQ_DCINR_MASK	/a>,."172	/a>        },."173	/a>        [	a href="+code=S5M8763_IRQ_JIGF" class="sref">S5M8763_IRQ_JIGF	/a>] = {."174	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,."175	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8763_IRQ_JIGF_MASK" class="sref">S5M8763_IRQ_JIGF_MASK	/a>,."176	/a>        },."177	/a>        [	a href="+code=S5M8763_IRQ_JIGR" class="sref">S5M8763_IRQ_JIGR	/a>] = {."178	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,."179	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8763_IRQ_JIGR_MASK" class="sref">S5M8763_IRQ_JIGR_MASK	/a>,."180	/a>        },."181	/a>        [	a href="+code=S5M8763_IRQ_PWRONF" class="sref">S5M8763_IRQ_PWRONF	/a>] = {."182	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,."183	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8763_IRQ_PWRONF_MASK" class="sref">S5M8763_IRQ_PWRONF_MASK	/a>,."184	/a>        },."185	/a>        [	a href="+code=S5M8763_IRQ_PWRONR" class="sref">S5M8763_IRQ_PWRONR	/a>] = {."186	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 1,."187	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8763_IRQ_PWRONR_MASK" class="sref">S5M8763_IRQ_PWRONR_MASK	/a>,."188	/a>        },."189	/a>        [	a href="+code=S5M8763_IRQ_WTSREVNT" class="sref">S5M8763_IRQ_WTSREVNT	/a>] = {."190	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 2,."191	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8763_IRQ_WTSREVNT_MASK" class="sref">S5M8763_IRQ_WTSREVNT_MASK	/a>,."192	/a>        },."193	/a>        [	a href="+code=S5M8763_IRQ_SMPLEVNT" class="sref">S5M8763_IRQ_SMPLEVNT	/a>] = {."194	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 2,."195	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8763_IRQ_SMPLEVNT_MASK" class="sref">S5M8763_IRQ_SMPLEVNT_MASK	/a>,."196	/a>        },."197	/a>        [	a href="+code=S5M8763_IRQ_ALARM1" class="sref">S5M8763_IRQ_ALARM1	/a>] = {."198	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 2,."199	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8763_IRQ_ALARM1_MASK" class="sref">S5M8763_IRQ_ALARM1_MASK	/a>,."200	/a>        },."201	/a>        [	a href="+code=S5M8763_IRQ_ALARM0" class="sref">S5M8763_IRQ_ALARM0	/a>] = {."202	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 2,."203	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8763_IRQ_ALARM0_MASK" class="sref">S5M8763_IRQ_ALARM0_MASK	/a>,."204	/a>        },."205	/a>        [	a href="+code=S5M8763_IRQ_ONKEY1S" class="sref">S5M8763_IRQ_ONKEY1S	/a>] = {."206	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 3,."207	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8763_IRQ_ONKEY1S_MASK" class="sref">S5M8763_IRQ_ONKEY1S_MASK	/a>,."208	/a>        },."209	/a>        [	a href="+code=S5M8763_IRQ_TOPOFFR" class="sref">S5M8763_IRQ_TOPOFFR	/a>] = {."210	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 3,."211	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8763_IRQ_TOPOFFR_MASK" class="sref">S5M8763_IRQ_TOPOFFR_MASK	/a>,."212	/a>        },."213	/a>        [	a href="+code=S5M8763_IRQ_DCINOVPR" class="sref">S5M8763_IRQ_DCINOVPR	/a>] = {."214	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 3,."215	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8763_IRQ_DCINOVPR_MASK" class="sref">S5M8763_IRQ_DCINOVPR_MASK	/a>,."216	/a>        },."217	/a>        [	a href="+code=S5M8763_IRQ_CHGRSTF" class="sref">S5M8763_IRQ_CHGRSTF	/a>] = {."218	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 3,."219	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8763_IRQ_CHGRSTF_MASK" class="sref">S5M8763_IRQ_CHGRSTF_MASK	/a>,."220	/a>        },."221	/a>        [	a href="+code=S5M8763_IRQ_DONER" class="sref">S5M8763_IRQ_DONER	/a>] = {."222	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 3,."223	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8763_IRQ_DONER_MASK" class="sref">S5M8763_IRQ_DONER_MASK	/a>,."224	/a>        },."225	/a>        [	a href="+code=S5M8763_IRQ_CHGFAULT" class="sref">S5M8763_IRQ_CHGFAULT	/a>] = {."226	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 3,."227	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8763_IRQ_CHGFAULT_MASK" class="sref">S5M8763_IRQ_CHGFAULT_MASK	/a>,."228	/a>        },."229	/a>        [	a href="+code=S5M8763_IRQ_LOBAT1" class="sref">S5M8763_IRQ_LOBAT1	/a>] = {."230	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 4,."231	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8763_IRQ_LOBAT1_MASK" class="sref">S5M8763_IRQ_LOBAT1_MASK	/a>,."232	/a>        },."233	/a>        [	a href="+code=S5M8763_IRQ_LOBAT2" class="sref">S5M8763_IRQ_LOBAT2	/a>] = {."234	/a>                .	a href="+code=reg_offset" class="sref">reg_offset	/a> = 4,."235	/a>                .	a href="+code=mask" class="sref">mask	/a> = 	a href="+code=S5M8763_IRQ_LOBAT2_MASK" class="sref">S5M8763_IRQ_LOBAT2_MASK	/a>,."236	/a>        },."237	/a>};."238	/a>."239	/a>static struct"	a href="+code=regmap_irq_chip" class="sref">regmap_irq_chip	/a> 	a href="+code=s2mps11_irq_chip" class="sref">s2mps11_irq_chip	/a> = {."240	/a>        .	a href="+code=nam." class="sref">nam.	/a> = 	span class="string">"s2mps11",."241	/a>        .	a href="+code=irqs" class="sref">irqs	/a> = 	a href="+code=s2mps11_irqs" class="sref">s2mps11_irqs	/a>,."242	/a>        .	a href="+code=num_irqs" class="sref">num_irqs	/a> = 	a href="+code=ARRAY_SIZE" class="sref">ARRAY_SIZE	/a>(	a href="+code=s2mps11_irqs" class="sref">s2mps11_irqs	/a>),."243	/a>        .	a href="+code=num_regs" class="sref">num_regs	/a> = 3,."244	/a>        .	a href="+code=status_bas." class="sref">status_bas.	/a> = 	a href="+code=S2MPS11_REG_INT1" class="sref">S2MPS11_REG_INT1	/a>,."245	/a>        .	a href="+code=mask_bas." class="sref">mask_bas.	/a> = 	a href="+code=S2MPS11_REG_INT1M" class="sref">S2MPS11_REG_INT1M	/a>,."246	/a>        .	a href="+code=ack_bas." class="sref">ack_bas.	/a> = 	a href="+code=S2MPS11_REG_INT1" class="sref">S2MPS11_REG_INT1	/a>,."247	/a>};."248	/a>."249	/a>static struct"	a href="+code=regmap_irq_chip" class="sref">regmap_irq_chip	/a> 	a href="+code=s5m8767_irq_chip" class="sref">s5m8767_irq_chip	/a> = {."250	/a>        .	a href="+code=nam." class="sref">nam.	/a> = 	span class="string">"s5m8767",."251	/a>        .	a href="+code=irqs" class="sref">irqs	/a> = 	a href="+code=s5m8767_irqs" class="sref">s5m8767_irqs	/a>,."252	/a>        .	a href="+code=num_irqs" class="sref">num_irqs	/a> = 	a href="+code=ARRAY_SIZE" class="sref">ARRAY_SIZE	/a>(	a href="+code=s5m8767_irqs" class="sref">s5m8767_irqs	/a>),."253	/a>        .	a href="+code=num_regs" class="sref">num_regs	/a> = 3,."254	/a>        .	a href="+code=status_bas." class="sref">status_bas.	/a> = 	a href="+code=S5M8767_REG_INT1" class="sref">S5M8767_REG_INT1	/a>,."255	/a>        .	a href="+code=mask_bas." class="sref">mask_bas.	/a> = 	a href="+code=S5M8767_REG_INT1M" class="sref">S5M8767_REG_INT1M	/a>,."256	/a>        .	a href="+code=ack_bas." class="sref">ack_bas.	/a> = 	a href="+code=S5M8767_REG_INT1" class="sref">S5M8767_REG_INT1	/a>,."257	/a>};."258	/a>."259	/a>static struct"	a href="+code=regmap_irq_chip" class="sref">regmap_irq_chip	/a> 	a href="+code=s5m8763_irq_chip" class="sref">s5m8763_irq_chip	/a> = {."260	/a>        .	a href="+code=nam." class="sref">nam.	/a> = 	span class="string">"s5m8763",."261	/a>        .	a href="+code=irqs" class="sref">irqs	/a> = 	a href="+code=s5m8763_irqs" class="sref">s5m8763_irqs	/a>,."262	/a>        .	a href="+code=num_irqs" class="sref">num_irqs	/a> = 	a href="+code=ARRAY_SIZE" class="sref">ARRAY_SIZE	/a>(	a href="+code=s5m8763_irqs" class="sref">s5m8763_irqs	/a>),."263	/a>        .	a href="+code=num_regs" class="sref">num_regs	/a> = 4,."264	/a>        .	a href="+code=status_bas." class="sref">status_bas.	/a> = 	a href="+code=S5M8763_REG_IRQ1" class="sref">S5M8763_REG_IRQ1	/a>,."265	/a>        .	a href="+code=mask_bas." class="sref">mask_bas.	/a> = 	a href="+code=S5M8763_REG_IRQM1" class="sref">S5M8763_REG_IRQM1	/a>,."266	/a>        .	a href="+code=ack_bas." class="sref">ack_bas.	/a> = 	a href="+code=S5M8763_REG_IRQ1" class="sref">S5M8763_REG_IRQ1	/a>,."267	/a>};."268	/a>."269	/a>int"	a href="+code=sec_irq_init" class="sref">sec_irq_init	/a>(struct"	a href="+code=sec_pmic_dev" class="sref">sec_pmic_dev	/a> *	a href="+code=sec_pmic" class="sref">sec_pmic	/a>)."270	/a>{."271	/a>        int"	a href="+code=ret" class="sref">ret	/a> = 0;."272	/a>        int"	a href="+code=typ." class="sref">typ.	/a> = 	a href="+code=sec_pmic" class="sref">sec_pmic	/a>->device_typ.	/a>;."273	/a>."274	/a>        if (!	a href="+code=sec_pmic" class="sref">sec_pmic	/a>->irq	/a>) {."275	/a>                dev_warn	/a>(	a href="+code=sec_pmic" class="sref">sec_pmic	/a>->dev	/a>,."276	/a>                         "No interrupt specified, no interrupts\n");."277	/a>                	a href="+code=sec_pmic" class="sref">sec_pmic	/a>->irq_bas.	/a> = 0;."278	/a>                return 0;."279	/a>        }."280	/a>."281	/a>        switch (	a href="+code=typ." class="sref">typ.	/a>) {."282	/a>        cas. 	a href="+code=S5M8763X" class="sref">S5M8763X	/a>:."283	/a>                	a href="+code=ret" class="sref">ret	/a> = 	a href="+code=regmap_add_irq_chip" class="sref">regmap_add_irq_chip	/a>(	a href="+code=sec_pmic" class="sref">sec_pmic	/a>->regmap	/a>, 	a href="+code=sec_pmic" class="sref">sec_pmic	/a>->irq	/a>,."284	/a>                                  IRQF_TRIGGER_FALLING	/a> | IRQF_ONESHOT	/a>,."285	/a>                                  sec_pmic	/a>->irq_bas.	/a>, &s5m8763_irq_chip	/a>,."286	/a>                                  &sec_pmic	/a>->irq_data	/a>);."287	/a>                break;."288	/a>        cas. 	a href="+code=S5M8767X" class="sref">S5M8767X	/a>:."289	/a>                	a href="+code=ret" class="sref">ret	/a> = 	a href="+code=regmap_add_irq_chip" class="sref">regmap_add_irq_chip	/a>(	a href="+code=sec_pmic" class="sref">sec_pmic	/a>->regmap	/a>, 	a href="+code=sec_pmic" class="sref">sec_pmic	/a>->irq	/a>,."290	/a>                                  IRQF_TRIGGER_FALLING	/a> | IRQF_ONESHOT	/a>,."291	/a>                                  sec_pmic	/a>->irq_bas.	/a>, &s5m8767_irq_chip	/a>,."292	/a>                                  &sec_pmic	/a>->irq_data	/a>);."293	/a>                break;."294	/a>        cas. 	a href="+code=S2MPS11X" class="sref">S2MPS11X	/a>:."295	/a>                	a href="+code=ret" class="sref">ret	/a> = 	a href="+code=regmap_add_irq_chip" class="sref">regmap_add_irq_chip	/a>(	a href="+code=sec_pmic" class="sref">sec_pmic	/a>->regmap	/a>, 	a href="+code=sec_pmic" class="sref">sec_pmic	/a>->irq	/a>,."296	/a>                                  IRQF_TRIGGER_FALLING	/a> | IRQF_ONESHOT	/a>,."297	/a>                                  sec_pmic	/a>->irq_bas.	/a>, &s2mps11_irq_chip	/a>,."298	/a>                                  &sec_pmic	/a>->irq_data	/a>);."299	/a>                break;."300	/a>        default:."301	/a>                dev_err	/a>(	a href="+code=sec_pmic" class="sref">sec_pmic	/a>->dev	/a>, "Unknown device typ. %d\n",."302	/a>                        sec_pmic	/a>->device_typ.	/a>);."303	/a>                return -EINVAL	/a>;."304	/a>        }."305	/a>."306	/a>        if (	a href="+code=ret" class="sref">ret	/a> != 0) {."307	/a>                dev_err	/a>(	a href="+code=sec_pmic" class="sref">sec_pmic	/a>->dev	/a>, "Failed to register IRQ chip: %d\n", 	a href="+code=ret" class="sref">ret	/a>);."308	/a>                return 	a href="+code=ret" class="sref">ret	/a>;."309	/a>        }."310	/a>."311	/a>        return 0;."312	/a>}."313	/a>."314	/a>void"	a href="+code=sec_irq_exit" class="sref">sec_irq_exit	/a>(struct"	a href="+code=sec_pmic_dev" class="sref">sec_pmic_dev	/a> *	a href="+code=sec_pmic" class="sref">sec_pmic	/a>)."315	/a>{."316	/a>        	a href="+code=regmap_del_irq_chip" class="sref">regmap_del_irq_chip	/a>(	a href="+code=sec_pmic" class="sref">sec_pmic	/a>->irq	/a>, sec_pmic	/a>->irq_data	/a>);."317	/a>}."318	/a>
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