1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76#include <linux/kernel.h>
77#include <linux/module.h>
78#include <linux/init.h>
79#include <linux/smp.h>
80#include <linux/cpufreq.h>
81#include <linux/pci.h>
82#include <linux/errno.h>
83#include <linux/slab.h>
84
85#include <asm/cpu_device_id.h>
86#include <asm/processor-cyrix.h>
87
88
89#define PCI_PMER1 0x80
90#define PCI_PMER2 0x81
91#define PCI_PMER3 0x82
92#define PCI_IRQTC 0x8c
93#define PCI_VIDTC 0x8d
94#define PCI_MODOFF 0x94
95#define PCI_MODON 0x95
96#define PCI_SUSCFG 0x96
97
98
99#define GPM (1<<0)
100#define GIT (1<<1)
101#define GTR (1<<2)
102#define IRQ_SPDUP (1<<3)
103#define VID_SPDUP (1<<4)
104
105
106#define SUSMOD (1<<0)
107
108#define SMISPDUP (1<<1)
109
110#define SUSCFG (1<<2)
111
112#define PWRSVE_ISA (1<<3)
113#define PWRSVE (1<<4)
114
115struct gxfreq_params {
116 u8 on_duration;
117 u8 off_duration;
118 u8 pci_suscfg;
119 u8 pci_pmer1;
120 u8 pci_pmer2;
121 struct pci_dev *cs55x0;
122};
123
124static struct gxfreq_params *gx_params;
125static int stock_freq;
126
127
128static int pci_busclk;
129module_param(pci_busclk, int, 0444);
130
131
132
133
134
135
136
137static int max_duration = 255;
138module_param(max_duration, int, 0444);
139
140
141
142
143#define POLICY_MIN_DIV 20
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160static int gx_freq_mult[16] = {
161 4, 10, 4, 6, 9, 5, 7, 8,
162 0, 0, 0, 0, 0, 0, 0, 0
163};
164
165
166
167
168
169static struct pci_device_id gx_chipset_tbl[] __initdata = {
170 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY), },
171 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), },
172 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), },
173 { 0, },
174};
175MODULE_DEVICE_TABLE(pci, gx_chipset_tbl);
176
177static void gx_write_byte(int reg, int value)
178{
179 pci_write_config_byte(gx_params->cs55x0, reg, value);
180}
181
182
183
184
185
186static __init struct pci_dev *gx_detect_chipset(void)
187{
188 struct pci_dev *gx_pci = NULL;
189
190
191 for_each_pci_dev(gx_pci) {
192 if ((pci_match_id(gx_chipset_tbl, gx_pci)) != NULL)
193 return gx_pci;
194 }
195
196 pr_debug("error: no supported chipset found!\n");
197 return NULL;
198}
199
200
201
202
203
204
205
206static unsigned int gx_get_cpuspeed(unsigned int cpu)
207{
208 if ((gx_params->pci_suscfg & SUSMOD) == 0)
209 return stock_freq;
210
211 return (stock_freq * gx_params->off_duration)
212 / (gx_params->on_duration + gx_params->off_duration);
213}
214
215
216
217
218
219
220
221static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration,
222 u8 *off_duration)
223{
224 unsigned int i;
225 u8 tmp_on, tmp_off;
226 int old_tmp_freq = stock_freq;
227 int tmp_freq;
228
229 *off_duration = 1;
230 *on_duration = 0;
231
232 for (i = max_duration; i > 0; i--) {
233 tmp_off = ((khz * i) / stock_freq) & 0xff;
234 tmp_on = i - tmp_off;
235 tmp_freq = (stock_freq * tmp_off) / i;
236
237
238 if (abs(tmp_freq - khz) <= abs(old_tmp_freq - khz)) {
239 *on_duration = tmp_on;
240 *off_duration = tmp_off;
241 old_tmp_freq = tmp_freq;
242 }
243 }
244
245 return old_tmp_freq;
246}
247
248
249
250
251
252
253
254static void gx_set_cpuspeed(unsigned int khz)
255{
256 u8 suscfg, pmer1;
257 unsigned int new_khz;
258 unsigned long flags;
259 struct cpufreq_freqs freqs;
260
261 freqs.cpu = 0;
262 freqs.old = gx_get_cpuspeed(0);
263
264 new_khz = gx_validate_speed(khz, &gx_params->on_duration,
265 &gx_params->off_duration);
266
267 freqs.new = new_khz;
268
269 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
270 local_irq_save(flags);
271
272
273
274 if (new_khz != stock_freq) {
275
276 switch (gx_params->cs55x0->device) {
277 case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
278 pmer1 = gx_params->pci_pmer1 | IRQ_SPDUP | VID_SPDUP;
279
280
281 gx_write_byte(PCI_IRQTC, 4);
282
283 gx_write_byte(PCI_VIDTC, 100);
284 gx_write_byte(PCI_PMER1, pmer1);
285
286 if (gx_params->cs55x0->revision < 0x10) {
287
288 suscfg = gx_params->pci_suscfg|SUSMOD;
289 } else {
290
291 suscfg = gx_params->pci_suscfg|SUSMOD|PWRSVE;
292 }
293 break;
294 case PCI_DEVICE_ID_CYRIX_5520:
295 case PCI_DEVICE_ID_CYRIX_5510:
296 suscfg = gx_params->pci_suscfg | SUSMOD;
297 break;
298 default:
299 local_irq_restore(flags);
300 pr_debug("fatal: try to set unknown chipset.\n");
301 return;
302 }
303 } else {
304 suscfg = gx_params->pci_suscfg & ~(SUSMOD);
305 gx_params->off_duration = 0;
306 gx_params->on_duration = 0;
307 pr_debug("suspend modulation disabled: cpu runs 100%% speed.\n");
308 }
309
310 gx_write_byte(PCI_MODOFF, gx_params->off_duration);
311 gx_write_byte(PCI_MODON, gx_params->on_duration);
312
313 gx_write_byte(PCI_SUSCFG, suscfg);
314 pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &suscfg);
315
316 local_irq_restore(flags);
317
318 gx_params->pci_suscfg = suscfg;
319
320 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
321
322 pr_debug("suspend modulation w/ duration of ON:%d us, OFF:%d us\n",
323 gx_params->on_duration * 32, gx_params->off_duration * 32);
324 pr_debug("suspend modulation w/ clock speed: %d kHz.\n", freqs.new);
325}
326
327
328
329
330
331
332
333
334
335
336
337
338static int cpufreq_gx_verify(struct cpufreq_policy *policy)
339{
340 unsigned int tmp_freq = 0;
341 u8 tmp1, tmp2;
342
343 if (!stock_freq || !policy)
344 return -EINVAL;
345
346 policy->cpu = 0;
347 cpufreq_verify_within_limits(policy, (stock_freq / max_duration),
348 stock_freq);
349
350
351
352
353
354
355
356 tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2);
357 if (tmp_freq < policy->min)
358 tmp_freq += stock_freq / max_duration;
359 policy->min = tmp_freq;
360 if (policy->min > policy->max)
361 policy->max = tmp_freq;
362 tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2);
363 if (tmp_freq > policy->max)
364 tmp_freq -= stock_freq / max_duration;
365 policy->max = tmp_freq;
366 if (policy->max < policy->min)
367 policy->max = policy->min;
368 cpufreq_verify_within_limits(policy, (stock_freq / max_duration),
369 stock_freq);
370
371 return 0;
372}
373
374
375
376
377
378static int cpufreq_gx_target(struct cpufreq_policy *policy,
379 unsigned int target_freq,
380 unsigned int relation)
381{
382 u8 tmp1, tmp2;
383 unsigned int tmp_freq;
384
385 if (!stock_freq || !policy)
386 return -EINVAL;
387
388 policy->cpu = 0;
389
390 tmp_freq = gx_validate_speed(target_freq, &tmp1, &tmp2);
391 while (tmp_freq < policy->min) {
392 tmp_freq += stock_freq / max_duration;
393 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2);
394 }
395 while (tmp_freq > policy->max) {
396 tmp_freq -= stock_freq / max_duration;
397 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2);
398 }
399
400 gx_set_cpuspeed(tmp_freq);
401
402 return 0;
403}
404
405static int cpufreq_gx_cpu_init(struct cpufreq_policy *policy)
406{
407 unsigned int maxfreq, curfreq;
408
409 if (!policy || policy->cpu != 0)
410 return -ENODEV;
411
412
413 if (pci_busclk)
414 maxfreq = pci_busclk * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
415 else if (cpu_khz)
416 maxfreq = cpu_khz;
417 else
418 maxfreq = 30000 * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
419
420 stock_freq = maxfreq;
421 curfreq = gx_get_cpuspeed(0);
422
423 pr_debug("cpu max frequency is %d.\n", maxfreq);
424 pr_debug("cpu current frequency is %dkHz.\n", curfreq);
425
426
427 policy->cpu = 0;
428
429 if (max_duration < POLICY_MIN_DIV)
430 policy->min = maxfreq / max_duration;
431 else
432 policy->min = maxfreq / POLICY_MIN_DIV;
433 policy->max = maxfreq;
434 policy->cur = curfreq;
435 policy->cpuinfo.min_freq = maxfreq / max_duration;
436 policy->cpuinfo.max_freq = maxfreq;
437 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
438
439 return 0;
440}
441
442
443
444
445
446static struct cpufreq_driver gx_suspmod_driver = {
447 .get = gx_get_cpuspeed,
448 .verify = cpufreq_gx_verify,
449 .target = cpufreq_gx_target,
450 .init = cpufreq_gx_cpu_init,
451 .name = "gx-suspmod",
452 .owner = THIS_MODULE,
453};
454
455static int __init cpufreq_gx_init(void)
456{
457 int ret;
458 struct gxfreq_params *params;
459 struct pci_dev *gx_pci;
460
461
462 gx_pci = gx_detect_chipset();
463 if (gx_pci == NULL)
464 return -ENODEV;
465
466
467 if (max_duration > 0xff)
468 max_duration = 0xff;
469
470 pr_debug("geode suspend modulation available.\n");
471
472 params = kzalloc(sizeof(struct gxfreq_params), GFP_KERNEL);
473 if (params == NULL)
474 return -ENOMEM;
475
476 params->cs55x0 = gx_pci;
477 gx_params = params;
478
479
480 pci_read_config_byte(params->cs55x0, PCI_SUSCFG, &(params->pci_suscfg));
481 pci_read_config_byte(params->cs55x0, PCI_PMER1, &(params->pci_pmer1));
482 pci_read_config_byte(params->cs55x0, PCI_PMER2, &(params->pci_pmer2));
483 pci_read_config_byte(params->cs55x0, PCI_MODON, &(params->on_duration));
484 pci_read_config_byte(params->cs55x0, PCI_MODOFF,
485 &(params->off_duration));
486
487 ret = cpufreq_register_driver(&gx_suspmod_driver);
488 if (ret) {
489 kfree(params);
490 return ret;
491 }
492
493 return 0;
494}
495
496static void __exit cpufreq_gx_exit(void)
497{
498 cpufreq_unregister_driver(&gx_suspmod_driver);
499 pci_dev_put(gx_params->cs55x0);
500 kfree(gx_params);
501}
502
503MODULE_AUTHOR("Hiroshi Miura <miura@da-cha.org>");
504MODULE_DESCRIPTION("Cpufreq driver for Cyrix MediaGX and NatSemi Geode");
505MODULE_LICENSE("GPL");
506
507module_init(cpufreq_gx_init);
508module_exit(cpufreq_gx_exit);
509
510