linux/drivers/clocksource/sh_cmt.c
<<
/spa8" > /form" > a href="../linux+v377<7/drivers/clocksource/sh_cmt.c"> img src="../.static/gfx/right.png" alt=">>"> input typopthidden" namoptnavtarget" 28 input typopttext" namoptsearch" idptsearch"> butt14.typoptsubmit">Search /form" /spa8" a href="+prefs?return=drivers/clocksource/sh_cmt.c" onclick="return ajax_prefs();"> Prefs > /a> /div" op> form ac4.28="ajax+*" method="post" onsubmit="return false;"> /form" div class="headingbott1m"> > div idptsearch_results" class="search_results" >" op> /div" div idptcontent"> div idptfile_contents""
 
1 /a> spa8 class="comment">/* /spa8"

 
2 /a> spa8 class="comment"> * SuperH Timer Support - CMT /spa8"

 
3 /a> spa8 class="comment"> * /spa8"

 
4 /a> spa8 class="comment"> *  Copyright (C) 2008 Magnus Damm /spa8"

 
5 /a> spa8 class="comment"> * /spa8"

 
6 /a> spa8 class="comment"> * This program is free software; you ca8 redistribute it and/or modify /spa8"

 
7 /a> spa8 class="comment"> * it under the terms of the GNU General Public License as published by /spa8"

 
8 /a> spa8 class="comment"> * the Free Software Founda4.28; either vers.14.2 of the License /spa8"

 
9 /a> spa8 class="comment"> * /spa8"

 ="v3a> spa8 class="comment"> * This program is distributed in the hope that it will be useful, /spa8"

 11 /a> spa8 class="comment"> * but WITHOUT ANY WARRANTY; without even the implied warranty of /spa8"

 12 /a> spa8 class="comment"> * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the /spa8"

 13 /a> spa8 class="comment"> * GNU General Public License for more details. /spa8"

 14 /a> spa8 class="comment"> * /spa8"

 15 /a> spa8 class="comment"> * You should have received a copy of the GNU General Public License /spa8"

 16 /a> spa8 class="comment"> * along with this program; if not, write to the Free Software /spa8"

 17 /a> spa8 class="comment"> * Founda4.28, Inc., 59 Temple Place, Suite 330, Bost28, MA  02111-1307  USA /spa8"

 18 /a> spa8 class="comment"> */ /spa8"

 19 /a>

 2"v3a>#include <linux/init.hv3a>>

 21v3a>#include <linux/platform_device.hv3a>>

 22v3a>#include <linux/spinlock.hv3a>>

 23v3a>#include <linux/interrupt.hv3a>>

 24v3a>#include <linux/ioport.hv3a>>

 25v3a>#include <linux/io.hv3a>>

 26v3a>#include <linux/clk.hv3a>>

 27v3a>#include <linux/irq.hv3a>>

 28v3a>#include <linux/err.hv3a>>

 29v3a>#include <linux/delay.hv3a>>

 3"v3a>#include <linux/clocksource.hv3a>>

 31v3a>#include <linux/clockchips.hv3a>>

 32v3a>#include <linux/sh_timer.hv3a>>

 33v3a>#include <linux/slab.hv3a>>

 34v3a>#include <linux/module.hv3a>>

 35v3a>#include <linux/pm_domain.hv3a>>

 36 /a>

 37v3a>struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> {

 38v3a>        void
 a href="+code=__iomem" class="sref">__iomemv3a> * a href="+code=mapbase" class="sref">mapbasev3a>;

 39v3a>        struct
 a href="+code=clk" class="sref">clkv3a> * a href="+code=clk" class="sref">clkv3a>;

 40v3a>        unsigned long  a href="+code=width" class="sref">widthv3a>;  spa8 class="comment">/* 16 or 32 bit vers.14.of hardware block */ /spa8"

 41v3a>        unsigned long  a href="+code=overflow_bit" class="sref">overflow_bitv3a>;

 42v3a>        unsigned long  a href="+code=clear_bits" class="sref">clear_bitsv3a>;

 43v3a>        struct
 a href="+code=irqac4.28" class="sref">irqac4.28v3a>  a href="+code=irqac4.28" class="sref">irqac4.28v3a>;

 44v3a>        struct
 a href="+code=platform_device" class="sref">platform_devicev3a> * a href="+code=pdev" class="sref">pdevv3a>;

 45 /a>

 46v3a>        unsigned long  a href="+code=flags" class="sref">flagsv3a>;

 47v3a>        unsigned long  a href="+code=match_28match_28;

 48v3a>        unsigned long  a href="+code=next_match_28next_match_28;

 49v3a>        unsigned long  a href="+code=max_match_28max_match_28;

 50v3a>        unsigned long  a href="+code=rato" class="sref">ratov3a>;

 51v3a>         a href="+code=raw_spinlock_t" class="sref">raw_spinlock_tv3a>  a href="+code=lock" class="sref">lockv3a>;

 52v3a>        struct
 a href="+code=clock_event_device" class="sref">clock_event_devicev3a>  a href="+code=ced" class="sref">cedv3a>;

 53v3a>        struct
 a href="+code=clocksource" class="sref">clocksourcev3a>  a href="+code=cs" class="sref">csv3a>;

 54v3a>        unsigned long  a href="+code=total_cycles" class="sref">total_cyclesv3a>;

 55 /a>};

 56 /a>

 57v3a>static  a href="+code=DEFINE_RAW_SPINLOCK" class="sref">DEFINE_RAW_SPINLOCKv3a>( a href="+code=sh_cmt_lock" class="sref">sh_cmt_lockv3a>);

 58 /a>

 59v3a>#define  a href="+code=CMSTR" class="sref">CMSTRv3a> -1  spa8 class="comment">/* shared register */ /spa8"

 60v3a>#define  a href="+code=CMCSR" class="sref">CMCSRv3a> 0  spa8 class="comment">/* channel register */ /spa8"

 61v3a>#define  a href="+code=CMCNT" class="sref">CMCNTv3a> 1  spa8 class="comment">/* channel register */ /spa8"

 62v3a>#define  a href="+code=CMCOR" class="sref">CMCORv3a> 2  spa8 class="comment">/* channel register */ /spa8"

 63 /a>

 64v3a>static  a href="+code=inline" class="sref">inlinev3a> unsigned long  a href="+code=sh_cmt_read" class="sref">sh_cmt_readv3a>(struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a>, int
 a href="+code=reg_nr" class="sref">reg_nrv3a>)

 65 /a>{

 66v3a>        struct
 a href="+code=sh_timer_config" class="sref">sh_timer_configv3a> * a href="+code=cfg" class="sref">cfgv3a> =
 a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>. a href="+code=platform_data" class="sref">platform_datav3a>;

 67v3a>        void
 a href="+code=__iomem" class="sref">__iomemv3a> * a href="+code=base" class="sref">basev3a> =
 a href="+code=p" class="sref">pv3a>-> a href="+code=mapbase" class="sref">mapbasev3a>;

 68v3a>        unsigned long  a href="+code=offs" class="sref">offsv3a>;

 69 /a>

 70v3a>        if ( a href="+code=reg_nr" class="sref">reg_nrv3a> ==
 a href="+code=CMSTR" class="sref">CMSTRv3a>) {

 71v3a>                 a href="+code=offs" class="sref">offsv3a> =
0;

 72v3a>                 a href="+code=base" class="sref">basev3a> -=
 a href="+code=cfg" class="sref">cfgv3a>-> a href="+code=channel_offset" class="sref">channel_offsetv3a>;

 73v3a>        } else

 74v3a>                 a href="+code=offs" class="sref">offsv3a> =
 a href="+code=reg_nr" class="sref">reg_nrv3a>;

 75 /a>

 76v3a>        if ( a href="+code=p" class="sref">pv3a>-> a href="+code=width" class="sref">widthv3a> ==
16)

 77v3a>                 a href="+code=offs" class="sref">offsv3a> <<=
1;

 78v3a>        else {

 79v3a>                 a href="+code=offs" class="sref">offsv3a> <<=
2;

 80v3a>                if (( a href="+code=reg_nr" class="sref">reg_nrv3a> ==
 a href="+code=CMCNT" class="sref">CMCNTv3a>) || ( a href="+code=reg_nr" class="sref">reg_nrv3a> ==
 a href="+code=CMCOR" class="sref">CMCORv3a>))

 81v3a>                        return  a href="+code=ioread32" class="sref">ioread32v3a>( a href="+code=base" class="sref">basev3a> +  a href="+code=offs" class="sref">offsv3a>);

 82v3a>        }

 83 /a>

 84v3a>        return  a href="+code=ioread16" class="sref">ioread16 /a>( a href="+code=base" class="sref">basev3a> +  a href="+code=offs" class="sref">offsv3a>);

 85 /a>}

 86 /a>

 87v3a>static  a href="+code=inline" class="sref">inlinev3a> void
 a href="+code=sh_cmt_write" class="sref">sh_cmt_writev3a>(struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a>, int
 a href="+code=reg_nr" class="sref">reg_nrv3a>,

 88v3a>                                unsigned long  a href="+code=2828)

 89 /a>{

 90v3a>        struct
 a href="+code=sh_timer_config" class="sref">sh_timer_configv3a> * a href="+code=cfg" class="sref">cfgv3a> =
 a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>. a href="+code=platform_data" class="sref">platform_datav3a>;

 91v3a>        void
 a href="+code=__iomem" class="sref">__iomemv3a> * a href="+code=base" class="sref">basev3a> =
 a href="+code=p" class="sref">pv3a>-> a href="+code=mapbase" class="sref">mapbasev3a>;

 92v3a>        unsigned long  a href="+code=offs" class="sref">offsv3a>;

 93 /a>

 94v3a>        if ( a href="+code=reg_nr" class="sref">reg_nrv3a> ==
 a href="+code=CMSTR" class="sref">CMSTRv3a>) {

 95v3a>                 a href="+code=offs" class="sref">offsv3a> =
0;

 96v3a>                 a href="+code=base" class="sref">basev3a> -=
 a href="+code=cfg" class="sref">cfgv3a>-> a href="+code=channel_offset" class="sref">channel_offsetv3a>;

 97v3a>        } else

 98v3a>                 a href="+code=offs" class="sref">offsv3a> =
 a href="+code=reg_nr" class="sref">reg_nrv3a>;

 99 /a>

100v3a>        if ( a href="+code=p" class="sref">pv3a>-> a href="+code=width" class="sref">widthv3a> ==
16)

101v3a>                 a href="+code=offs" class="sref">offsv3a> <<=
1;

102v3a>        else {

103v3a>                 a href="+code=offs" class="sref">offsv3a> <<=
2;

104v3a>                if (( a href="+code=reg_nr" class="sref">reg_nrv3a> ==
 a href="+code=CMCNT" class="sref">CMCNTv3a>) || ( a href="+code=reg_nr" class="sref">reg_nrv3a> ==
 a href="+code=CMCOR" class="sref">CMCORv3a>)) {

105v3a>                         a href="+code=iowrite32" class="sref">iowrite32 /a>( a href="+code=2828,  a href="+code=base" class="sref">basev3a> +  a href="+code=offs" class="sref">offsv3a>);

106v3a>                        return;

107v3a>                }

108v3a>        }

109 /a>

110v3a>         a href="+code=iowrite16" class="sref">iowrite16 /a>( a href="+code=2828,  a href="+code=base" class="sref">basev3a> +  a href="+code=offs" class="sref">offsv3a>);

111 /a>}

112 /a>

113 /a>static unsigned long  a href="+code=sh_cmt_get_counter" class="sref">sh_cmt_get_counterv3a>(struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a>,

114v3a>                                        int
* a href="+code=has_wrapped" class="sref">has_wrappedv3a>)

115 /a>{

116v3a>        unsigned long  a href="+code=v1" class="sref">21v3a>,  a href="+code=v2" class="sref">v2v3a>,  a href="+code=v3" class="sref">v3v3a>;

117v3a>        int
 a href="+code=o1" class="sref">o1v3a>,  a href="+code=o2" class="sref">o2v3a>;

118 /a>

119v3a>         a href="+code=o1" class="sref">o1v3a> =
 a href="+code=sh_cmt_read" class="sref">sh_cmt_readv3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=CMCSR" class="sref">CMCSRv3a>) &
 a href="+code=p" class="sref">pv3a>-> a href="+code=overflow_bit" class="sref">overflow_bitv3a>;

12"v3a>

121v3a>         spa8 class="comment">/* Make sure the timer 28
122v3a>        do {

123v3a>                 a href="+code=o2" class="sref">o2v3a> =
 a href="+code=o1" class="sref">o1v3a>;

124v3a>                 a href="+code=v1" class="sref">21v3a> =
 a href="+code=sh_cmt_read" class="sref">sh_cmt_readv3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=CMCNT" class="sref">CMCNTv3a>);

125v3a>                 a href="+code=v2" class="sref">v2v3a> =
 a href="+code=sh_cmt_read" class="sref">sh_cmt_readv3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=CMCNT" class="sref">CMCNTv3a>);

126v3a>                 a href="+code=v3" class="sref">v3v3a> =
 a href="+code=sh_cmt_read" class="sref">sh_cmt_readv3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=CMCNT" class="sref">CMCNTv3a>);

127v3a>                 a href="+code=o1" class="sref">o1v3a> =
 a href="+code=sh_cmt_read" class="sref">sh_cmt_readv3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=CMCSR" class="sref">CMCSRv3a>) &
 a href="+code=p" class="sref">pv3a>-> a href="+code=overflow_bit" class="sref">overflow_bitv3a>;

128v3a>        } while ( a href="+code=unlikely" class="sref">unlikelyv3a>(( a href="+code=o1" class="sref">o1v3a> !=
 a href="+code=o2" class="sref">o2v3a>) || ( a href="+code=v1" class="sref">21v3a> >  a href="+code=v2" class="sref">v2v3a> &&
 a href="+code=v1" class="sref">21v3a> <  a href="+code=v3" class="sref">v3v3a>)

129v3a>                          || ( a href="+code=v2" class="sref">v2v3a> >  a href="+code=v3" class="sref">v3v3a> &&
 a href="+code=v2" class="sref">v2v3a> <  a href="+code=v1" class="sref">21v3a>) || ( a href="+code=v3" class="sref">v3v3a> >  a href="+code=v1" class="sref">21v3a> &&
 a href="+code=v3" class="sref">v3v3a> <  a href="+code=v2" class="sref">v2v3a>)));

13"v3a>

131v3a>        * a href="+code=has_wrapped" class="sref">has_wrappedv3a> =
 a href="+code=o1" class="sref">o1v3a>;

132v3a>        return  a href="+code=v2" class="sref">v2v3a>;

133v3a>}

134v3a>

135 /a>

136 /a>static void
 a href="+code=sh_cmt_start_stop_ch" class="sref">sh_cmt_start_stop_chv3a>(struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a>, int
 a href="+code=start" class="sref">startv3a>)

137v3a>{

138v3a>        struct
 a href="+code=sh_timer_config" class="sref">sh_timer_configv3a> * a href="+code=cfg" class="sref">cfgv3a> =
 a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>. a href="+code=platform_data" class="sref">platform_datav3a>;

139v3a>        unsigned long  a href="+code=flags" class="sref">flagsv3a>,  a href="+code=v828;

14"v3a>

141v3a>         spa8 class="comment">/* start stop register shared by multiple timer channels */ /spa8"

142v3a>         a href="+code=raw_spin_lock_irqsavo" class="sref">raw_spin_lock_irqsavov3a>(& a href="+code=sh_cmt_lock" class="sref">sh_cmt_lockv3a>,  a href="+code=flags" class="sref">flagsv3a>);

143v3a>         a href="+code=v828 =
 a href="+code=sh_cmt_read" class="sref">sh_cmt_readv3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=CMSTR" class="sref">CMSTRv3a>);

144v3a>

145v3a>        if ( a href="+code=start" class="sref">startv3a>)

146v3a>                 a href="+code=v828 |= 1 <<
 a href="+code=cfg" class="sref">cfgv3a>-> a href="+code=timer_bit" class="sref">timer_bitv3a>;

147v3a>        else

148v3a>                 a href="+code=v828 &= ~(1 <<
 a href="+code=cfg" class="sref">cfgv3a>-> a href="+code=timer_bit" class="sref">timer_bitv3a>);

149 /a>

150v3a>         a href="+code=sh_cmt_write" class="sref">sh_cmt_writev3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=CMSTR" class="sref">CMSTRv3a>,  a href="+code=v828);

151v3a>         a href="+code=raw_spin_unlock_irqrestoro" class="sref">raw_spin_unlock_irqrestorov3a>(& a href="+code=sh_cmt_lock" class="sref">sh_cmt_lockv3a>,  a href="+code=flags" class="sref">flagsv3a>);

152v3a>}

153 /a>

154v3a>static int
 a href="+code=sh_cmt_enable" class="sref">sh_cmt_enablev3a>(struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a>, unsigned long * a href="+code=rato" class="sref">ratov3a>)

155 /a>{

156v3a>        int
 a href="+code=k" class="sref">kv3a>,  a href="+code=ret" class="sref">retv3a>;

157v3a>

158v3a>         spa8 class="comment">/* enable clock */ /spa8"

159v3a>         a href="+code=ret" class="sref">retv3a> =
 a href="+code=clk_enable" class="sref">clk_enablev3a>( a href="+code=p" class="sref">pv3a>-> a href="+code=clk" class="sref">clkv3a>);

160v3a>        if ( a href="+code=ret" class="sref">retv3a>) {

161v3a>                 a href="+code=dev_err" class="sref">dev_errv3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>,  spa8 class="string">"cannot enable clock\n" /spa8");

162v3a>                goto  a href="+code=err0" class="sref">err0v3a>;

163v3a>        }

164v3a>

165v3a>         spa8 class="comment">/* make sure channel is disabled */ /spa8"

166v3a>         a href="+code=sh_cmt_start_stop_ch" class="sref">sh_cmt_start_stop_chv3a>( a href="+code=p" class="sref">pv3a>, 0);

167v3a>

168v3a>         spa8 class="comment">/* configure channel, periodic mode and maximum timeout */ /spa8"

169v3a>        if ( a href="+code=p" class="sref">pv3a>-> a href="+code=width" class="sref">widthv3a> ==
16) {

170v3a>                * a href="+code=rato" class="sref">ratov3a> =
 a href="+code=clk_get_rato" class="sref">clk_get_ratov3a>( a href="+code=p" class="sref">pv3a>-> a href="+code=clk" class="sref">clkv3a>) / 512;

171v3a>                 a href="+code=sh_cmt_write" class="sref">sh_cmt_writev3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=CMCSR" class="sref">CMCSRv3a>, 0x43);

172v3a>        } else {

173v3a>                * a href="+code=rato" class="sref">ratov3a> =
 a href="+code=clk_get_rato" class="sref">clk_get_ratov3a>( a href="+code=p" class="sref">pv3a>-> a href="+code=clk" class="sref">clkv3a>) / 8;

174v3a>                 a href="+code=sh_cmt_write" class="sref">sh_cmt_writev3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=CMCSR" class="sref">CMCSRv3a>, 0x01a4);

175v3a>        }

176 /a>

177v3a>         a href="+code=sh_cmt_write" class="sref">sh_cmt_writev3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=CMCOR" class="sref">CMCORv3a>, 0xffffffff);

178v3a>         a href="+code=sh_cmt_write" class="sref">sh_cmt_writev3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=CMCNT" class="sref">CMCNTv3a>, 0);

179 /a>

180v3a>         spa8 class="comment">/* /spa8"

181 /a> spa8 class="comment">         * According to the sh73a0 user's manual, as CMCNT ca8 be operatod /spa8"

182 /a> spa8 class="comment">         * only by the RCLK (Pseudo 32 KHz), there's one restric4.28 28v3spa8"

183 /a> spa8 class="comment">         * modifying CMCNT register; two RCLK cycles are necessary before /spa8"

184 /a> spa8 class="comment">         * this register is either read or any modificat.14.of the 28
185 /a> spa8 class="comment">         * it holds is reflected in the LSI's actual operat.14. /spa8"

186 /a> spa8 class="comment">         * /spa8"

187 /a> spa8 class="comment">         * While at it, we're supposed to clear out the CMCNT as of this /spa8"

188 /a> spa8 class="comment">         * moment, so make sure it's processed properly here.  This will /spa8"

189 /a> spa8 class="comment">         * take RCLKx2 at maximum. /spa8"

19"v3a> spa8 class="comment">         */ /spa8"

191v3a>        for ( a href="+code=k" class="sref">kv3a> =
0;
 a href="+code=k" class="sref">kv3a> < 100;
 a href="+code=k" class="sref">kv3a>++) {

192v3a>                if (! a href="+code=sh_cmt_read" class="sref">sh_cmt_readv3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=CMCNT" class="sref">CMCNTv3a>))

193v3a>                        break;

194v3a>                 a href="+code=udelay" class="sref">udelayv3a>(1);

195v3a>        }

196 /a>

197v3a>        if ( a href="+code=sh_cmt_read" class="sref">sh_cmt_readv3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=CMCNT" class="sref">CMCNTv3a>)) {

198v3a>                 a href="+code=dev_err" class="sref">dev_errv3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>,  spa8 class="string">"cannot clear CMCNT\n" /spa8");

199v3a>                 a href="+code=ret" class="sref">retv3a> =
- a href="+code=ETIMEDOUT" class="sref">ETIMEDOUTv3a>;

200v3a>                goto  a href="+code=err1" class="sref">err1v3a>;

201v3a>        }

202 /a>

203v3a>         spa8 class="comment">/* enable channel */ /spa8"

204v3a>         a href="+code=sh_cmt_start_stop_ch" class="sref">sh_cmt_start_stop_chv3a>( a href="+code=p" class="sref">pv3a>, 1);

205v3a>        return 0;

206v3a>  a href="+code=err1" class="sref">err1v3a>:

207v3a>         spa8 class="comment">/* stop clock */ /spa8"

208v3a>         a href="+code=clk_disable" class="sref">clk_disablev3a>( a href="+code=p" class="sref">pv3a>-> a href="+code=clk" class="sref">clkv3a>);

209 /a>

210v3a>  a href="+code=err0" class="sref">err0v3a>:

211v3a>        return  a href="+code=ret" class="sref">retv3a>;

212v3a>}

213 /a>

214v3a>static void
 a href="+code=sh_cmt_disable" class="sref">sh_cmt_disablev3a>(struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a>)

215 /a>{

216v3a>         spa8 class="comment">/* disable channel */ /spa8"

217v3a>         a href="+code=sh_cmt_start_stop_ch" class="sref">sh_cmt_start_stop_chv3a>( a href="+code=p" class="sref">pv3a>, 0);

218 /a>

219v3a>         spa8 class="comment">/* disable interrupts in CMT block */ /spa8"

220v3a>         a href="+code=sh_cmt_write" class="sref">sh_cmt_writev3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=CMCSR" class="sref">CMCSRv3a>, 0);

221v3a>

222v3a>         spa8 class="comment">/* stop clock */ /spa8"

223v3a>         a href="+code=clk_disable" class="sref">clk_disablev3a>( a href="+code=p" class="sref">pv3a>-> a href="+code=clk" class="sref">clkv3a>);

224v3a>}

225 /a>

226 /a> spa8 class="comment">/* private flags */ /spa8"

227v3a>#define  a href="+code=FLAG_CLOCKEVENT" class="sref">FLAG_CLOCKEVENTv3a> (1 <<
0)

228v3a>#define  a href="+code=FLAG_CLOCKSOURCE" class="sref">FLAG_CLOCKSOURCEv3a> (1 <<
1)

229v3a>#define  a href="+code=FLAG_REPROGRAM" class="sref">FLAG_REPROGRAMv3a> (1 <<
2)

230v3a>#define  a href="+code=FLAG_SKIPEVENT" class="sref">FLAG_SKIPEVENTv3a> (1 <<
3)

231v3a>#define  a href="+code=FLAG_IRQCONTEXT" class="sref">FLAG_IRQCONTEXTv3a> (1 <<
4)

232 /a>

233 /a>static void
 a href="+code=sh_cmt_clock_event_program_verify" class="sref">sh_cmt_clock_event_program_verifyv3a>(struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a>,

234v3a>                                              int
 a href="+code=absolute" class="sref">absolutev3a>)

235 /a>{

236v3a>        unsigned long  a href="+code=new_match" class="sref">new_matchv3a>;

237v3a>        unsigned long  a href="+code=v828 =
 a href="+code=p" class="sref">pv3a>-> a href="+code=next_match_v8next_match_v8;

238v3a>        unsigned long  a href="+code=delay" class="sref">delayv3a> =
0;

239v3a>        unsigned long  a href="+code=now" class="sref">nowv3a> =
0;

240v3a>        int
 a href="+code=has_wrapped" class="sref">has_wrappedv3a>;

241v3a>

242v3a>         a href="+code=now" class="sref">nowv3a> =
 a href="+code=sh_cmt_get_counter" class="sref">sh_cmt_get_counterv3a>( a href="+code=p" class="sref">pv3a>, & a href="+code=has_wrapped" class="sref">has_wrappedv3a>);

243v3a>         a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> |=  a href="+code=FLAG_REPROGRAM" class="sref">FLAG_REPROGRAMv3a>;  spa8 class="comment">/* force reprogram */ /spa8"

244v3a>

245v3a>        if ( a href="+code=has_wrapped" class="sref">has_wrappedv3a>) {

246v3a>                 spa8 class="comment">/* we're competing with the interrupt handler. /spa8"

247 /a> spa8 class="comment">                 *  -> let the interrupt handler reprogram the timer. /spa8"

248 /a> spa8 class="comment">                 *  -> interrupt number two handles the event. /spa8"

249 /a> spa8 class="comment">                 */ /spa8"

250v3a>                 a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> |=  a href="+code=FLAG_SKIPEVENT" class="sref">FLAG_SKIPEVENTv3a>;

251v3a>                return;

252v3a>        }

253 /a>

254v3a>        if ( a href="+code=absolute" class="sref">absolutev3a>)

255v3a>                 a href="+code=now" class="sref">nowv3a> =
0;

256 /a>

257v3a>        do {

258v3a>                 spa8 class="comment">/* reprogram the timer hardware, /spa8"

259 /a> spa8 class="comment">                 * but don't savo the new match 28
26"v3a> spa8 class="comment">                 */ /spa8"

261v3a>                 a href="+code=new_match" class="sref">new_matchv3a> =
 a href="+code=now" class="sref">nowv3a> +  a href="+code=v828 +  a href="+code=delay" class="sref">delayv3a>;

262v3a>                if ( a href="+code=new_match" class="sref">new_matchv3a> >  a href="+code=p" class="sref">pv3a>-> a href="+code=max_match_v8max_match_v8)

263v3a>                         a href="+code=new_match" class="sref">new_matchv3a> =
 a href="+code=p" class="sref">pv3a>-> a href="+code=max_match_v8max_match_v8;

264v3a>

265v3a>                 a href="+code=sh_cmt_write" class="sref">sh_cmt_writev3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=CMCOR" class="sref">CMCORv3a>,  a href="+code=new_match" class="sref">new_matchv3a>);

266 /a>

267v3a>                 a href="+code=now" class="sref">nowv3a> =
 a href="+code=sh_cmt_get_counter" class="sref">sh_cmt_get_counterv3a>( a href="+code=p" class="sref">pv3a>, & a href="+code=has_wrapped" class="sref">has_wrappedv3a>);

268v3a>                if ( a href="+code=has_wrapped" class="sref">has_wrappedv3a> &&
( a href="+code=new_match" class="sref">new_matchv3a> >  a href="+code=p" class="sref">pv3a>-> a href="+code=match_v8match_v8)) {

269v3a>                         spa8 class="comment">/* we are changing to a greater match 28
27"v3a> spa8 class="comment">                         * so this wrap must be caused by the counterv3spa8"

271 /a> spa8 class="comment">                         * matching the old 28
272 /a> spa8 class="comment">                         * -> first interrupt reprograms the timer. /spa8"

273 /a> spa8 class="comment">                         * -> interrupt number two handles the event. /spa8"

274 /a> spa8 class="comment">                         */ /spa8"

275v3a>                         a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> |=  a href="+code=FLAG_SKIPEVENT" class="sref">FLAG_SKIPEVENTv3a>;

276v3a>                        break;

277v3a>                }

278 /a>

279v3a>                if ( a href="+code=has_wrapped" class="sref">has_wrappedv3a>) {

280v3a>                         spa8 class="comment">/* we are changing to a smaller match 28
281 /a> spa8 class="comment">                         * so the wrap must be caused by the counterv3spa8"

282 /a> spa8 class="comment">                         * matching the new 28
283 /a> spa8 class="comment">                         * -> savo programmed match 28
284 /a> spa8 class="comment">                         * -> let isr handle the event. /spa8"

285 /a> spa8 class="comment">                         */ /spa8"

286v3a>                         a href="+code=p" class="sref">pv3a>-> a href="+code=match_v8match_v8 =
 a href="+code=new_match" class="sref">new_matchv3a>;

287v3a>                        break;

288v3a>                }

289 /a>

290v3a>                 spa8 class="comment">/* be safe: verify hardware settings */ /spa8"

291v3a>                if ( a href="+code=now" class="sref">nowv3a> <
 a href="+code=new_match" class="sref">new_matchv3a>) {

292v3a>                         spa8 class="comment">/* timer 28
293 /a> spa8 class="comment">                         * this makes sure we won't miss any match events. /spa8"

294 /a> spa8 class="comment">                         * -> savo programmed match 28
295 /a> spa8 class="comment">                         * -> let isr handle the event. /spa8"

296 /a> spa8 class="comment">                         */ /spa8"

297v3a>                         a href="+code=p" class="sref">pv3a>-> a href="+code=match_v8match_v8 =
 a href="+code=new_match" class="sref">new_matchv3a>;

298v3a>                        break;

299v3a>                }

30"v3a>

301v3a>                 spa8 class="comment">/* the counter has reached a 28
302 /a> spa8 class="comment">                 * tha8 our new match 28
303 /a> spa8 class="comment">                 * has_wrapped flag isn't set we must havov3spa8"

304 /a> spa8 class="comment">                 * programmed a too close event. /spa8"

305 /a> spa8 class="comment">                 * -> increase delay and retry. /spa8"

306 /a> spa8 class="comment">                 */ /spa8"

307v3a>                if ( a href="+code=delay" class="sref">delayv3a>)

308v3a>                         a href="+code=delay" class="sref">delayv3a> <<= 1;

309v3a>                else

310v3a>                         a href="+code=delay" class="sref">delayv3a> =
1;

311v3a>

312v3a>                if (! a href="+code=delay" class="sref">delayv3a>)

313v3a>                         a href="+code=dev_warn" class="sref">dev_warnv3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>,  spa8 class="string">"too long delay\n" /spa8");

314v3a>

315v3a>        } while ( a href="+code=delay" class="sref">delayv3a>);

316v3a>}

317v3a>

318 /a>static void
 a href="+code=__sh_cmt_set_next" class="sref">__sh_cmt_set_nextv3a>(struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a>, unsigned long  a href="+code=delta" class="sref">deltav3a>)

319v3a>{

320v3a>        if ( a href="+code=delta" class="sref">deltav3a> >  a href="+code=p" class="sref">pv3a>-> a href="+code=max_match_v8max_match_v8)

321v3a>                 a href="+code=dev_warn" class="sref">dev_warnv3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>,  spa8 class="string">"delta out of range\n" /spa8");

322 /a>

323v3a>         a href="+code=p" class="sref">pv3a>-> a href="+code=next_match_v8next_match_v8 =
 a href="+code=delta" class="sref">deltav3a>;

324v3a>         a href="+code=sh_cmt_clock_event_program_verify" class="sref">sh_cmt_clock_event_program_verifyv3a>( a href="+code=p" class="sref">pv3a>, 0);

325 /a>}

326 /a>

327v3a>static void
 a href="+code=sh_cmt_set_next" class="sref">sh_cmt_set_nextv3a>(struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a>, unsigned long  a href="+code=delta" class="sref">deltav3a>)

328v3a>{

329v3a>        unsigned long  a href="+code=flags" class="sref">flagsv3a>;

33"v3a>

331v3a>         a href="+code=raw_spin_lock_irqsavo" class="sref">raw_spin_lock_irqsavov3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=lock" class="sref">lockv3a>,  a href="+code=flags" class="sref">flagsv3a>);

332v3a>         a href="+code=__sh_cmt_set_next" class="sref">__sh_cmt_set_nextv3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=delta" class="sref">deltav3a>);

333v3a>         a href="+code=raw_spin_unlock_irqrestoro" class="sref">raw_spin_unlock_irqrestorov3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=lock" class="sref">lockv3a>,  a href="+code=flags" class="sref">flagsv3a>);

334v3a>}

335 /a>

336v3a>static  a href="+code=irqreturn_t" class="sref">irqreturn_tv3a>  a href="+code=sh_cmt_interrupt" class="sref">sh_cmt_interruptv3a>(int
 a href="+code=irq" class="sref">irqv3a>, void
* a href="+code=dev_id" class="sref">dev_idv3a>)

337v3a>{

338v3a>        struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a> =
 a href="+code=dev_id" class="sref">dev_idv3a>;

339 /a>

340v3a>         spa8 class="comment">/* clear flags */ /spa8"

341v3a>         a href="+code=sh_cmt_write" class="sref">sh_cmt_writev3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=CMCSR" class="sref">CMCSRv3a>,  a href="+code=sh_cmt_read" class="sref">sh_cmt_readv3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=CMCSR" class="sref">CMCSRv3a>) &  a href="+code=p" class="sref">pv3a>-> a href="+code=clear_bits" class="sref">clear_bitsv3a>);

342 /a>

343v3a>         spa8 class="comment">/* update clock source counter to begin with if enabled /spa8"

344 /a> spa8 class="comment">         * the wrap flag should be cleared by the timer specific /spa8"

345 /a> spa8 class="comment">         * isr before we end up here. /spa8"

346 /a> spa8 class="comment">         */ /spa8"

347v3a>        if ( a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> &  a href="+code=FLAG_CLOCKSOURCE" class="sref">FLAG_CLOCKSOURCEv3a>)

348v3a>                 a href="+code=p" class="sref">pv3a>-> a href="+code=total_cycles" class="sref">total_cyclesv3a> +=
 a href="+code=p" class="sref">pv3a>-> a href="+code=match_v8match_v8 +
1;

349 /a>

350v3a>        if (!( a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> &  a href="+code=FLAG_REPROGRAM" class="sref">FLAG_REPROGRAMv3a>))

351v3a>                 a href="+code=p" class="sref">pv3a>-> a href="+code=next_match_v8next_match_v8 =
 a href="+code=p" class="sref">pv3a>-> a href="+code=max_match_v8max_match_v8;

352 /a>

353v3a>         a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> |=  a href="+code=FLAG_IRQCONTEXT" class="sref">FLAG_IRQCONTEXTv3a>;

354v3a>

355v3a>        if ( a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> &  a href="+code=FLAG_CLOCKEVENT" class="sref">FLAG_CLOCKEVENTv3a>) {

356v3a>                if (!( a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> &  a href="+code=FLAG_SKIPEVENT" class="sref">FLAG_SKIPEVENTv3a>)) {

357v3a>                        if ( a href="+code=p" class="sref">pv3a>-> a href="+code=ced" class="sref">cedv3a>. a href="+code=mode" class="sref">modev3a> ==  a href="+code=CLOCK_EVT_MODE_ONESHOT" class="sref">CLOCK_EVT_MODE_ONESHOTv3a>) {

358v3a>                                 a href="+code=p" class="sref">pv3a>-> a href="+code=next_match_v8next_match_v8 =
 a href="+code=p" class="sref">pv3a>-> a href="+code=max_match_v8max_match_v8;

359v3a>                                 a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> |=  a href="+code=FLAG_REPROGRAM" class="sref">FLAG_REPROGRAMv3a>;

360v3a>                        }

361v3a>

362v3a>                         a href="+code=p" class="sref">pv3a>-> a href="+code=ced" class="sref">cedv3a>. a href="+code=event_handler" class="sref">event_handlerv3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=ced" class="sref">cedv3a>);

363v3a>                }

364v3a>        }

365 /a>

366v3a>         a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> &= ~ a href="+code=FLAG_SKIPEVENT" class="sref">FLAG_SKIPEVENTv3a>;

367v3a>

368v3a>        if ( a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> &  a href="+code=FLAG_REPROGRAM" class="sref">FLAG_REPROGRAMv3a>) {

369v3a>                 a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> &= ~ a href="+code=FLAG_REPROGRAM" class="sref">FLAG_REPROGRAMv3a>;

370v3a>                 a href="+code=sh_cmt_clock_event_program_verify" class="sref">sh_cmt_clock_event_program_verifyv3a>( a href="+code=p" class="sref">pv3a>, 1);

371v3a>

372v3a>                if ( a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> &  a href="+code=FLAG_CLOCKEVENT" class="sref">FLAG_CLOCKEVENTv3a>)

373v3a>                        if (( a href="+code=p" class="sref">pv3a>-> a href="+code=ced" class="sref">cedv3a>. a href="+code=mode" class="sref">modev3a> ==  a href="+code=CLOCK_EVT_MODE_SHUTDOWN" class="sref">CLOCK_EVT_MODE_SHUTDOWNv3a>)

374v3a>                            || ( a href="+code=p" class="sref">pv3a>-> a href="+code=match_v8match_v8 ==
 a href="+code=p" class="sref">pv3a>-> a href="+code=next_match_v8next_match_v8))

375v3a>                                 a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> &= ~ a href="+code=FLAG_REPROGRAM" class="sref">FLAG_REPROGRAMv3a>;

376v3a>        }

377v3a>

378v3a>         a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> &= ~ a href="+code=FLAG_IRQCONTEXT" class="sref">FLAG_IRQCONTEXTv3a>;

379 /a>

380v3a>        return  a href="+code=IRQ_HANDLED" class="sref">IRQ_HANDLEDv3a>;

381 /a>}

382 /a>

383 /a>static int
 a href="+code=sh_cmt_start" class="sref">sh_cmt_startv3a>(struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a>, unsigned long  a href="+code=flag" class="sref">flagv3a>)

384 /a>{

385v3a>        int
 a href="+code=ret" class="sref">retv3a> =
0;

386v3a>        unsigned long  a href="+code=flags" class="sref">flagsv3a>;

387v3a>

388v3a>         a href="+code=raw_spin_lock_irqsavo" class="sref">raw_spin_lock_irqsavov3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=lock" class="sref">lockv3a>,  a href="+code=flags" class="sref">flagsv3a>);

389 /a>

390v3a>        if (!( a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> & ( a href="+code=FLAG_CLOCKEVENT" class="sref">FLAG_CLOCKEVENTv3a> |  a href="+code=FLAG_CLOCKSOURCE" class="sref">FLAG_CLOCKSOURCEv3a>)))

391v3a>                 a href="+code=ret" class="sref">retv3a> =
 a href="+code=sh_cmt_enable" class="sref">sh_cmt_enablev3a>( a href="+code=p" class="sref">pv3a>, & a href="+code=p" class="sref">pv3a>-> a href="+code=rate" class="sref">ratev3a>);

392 /a>

393v3a>        if ( a href="+code=ret" class="sref">retv3a>)

394v3a>                goto
 a href="+code=out" class="sref">outv3a>;

395v3a>         a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> |=  a href="+code=flag" class="sref">flagv3a>;

396 /a>

397v3a>         spa8 class="comment">/* setup timeout if no clockevent */ /spa8"

398v3a>        if (( a href="+code=flag" class="sref">flagv3a> ==
 a href="+code=FLAG_CLOCKSOURCE" class="sref">FLAG_CLOCKSOURCEv3a>) &&
(!( a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> &  a href="+code=FLAG_CLOCKEVENT" class="sref">FLAG_CLOCKEVENTv3a>)))

399v3a>                 a href="+code=__sh_cmt_set_next" class="sref">__sh_cmt_set_nextv3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=p" class="sref">pv3a>-> a href="+code=max_match_v8max_match_v8);

40"v3a>
 a href="+code=out" class="sref">outv3a>:

401v3a>         a href="+code=raw_spin_unlock_irqrestoro" class="sref">raw_spin_unlock_irqrestorov3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=lock" class="sref">lockv3a>,  a href="+code=flags" class="sref">flagsv3a>);

402 /a>

403v3a>        return  a href="+code=ret" class="sref">retv3a>;

404v3a>}

405 /a>

406v3a>static void
 a href="+code=sh_cmt_stop" class="sref">sh_cmt_stopv3a>(struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a>, unsigned long  a href="+code=flag" class="sref">flagv3a>)

407v3a>{

408v3a>        unsigned long  a href="+code=flags" class="sref">flagsv3a>;

409v3a>        unsigned long  a href="+code=f" class="sref">fv3a>;

41"v3a>

411v3a>         a href="+code=raw_spin_lock_irqsavo" class="sref">raw_spin_lock_irqsavov3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=lock" class="sref">lockv3a>,  a href="+code=flags" class="sref">flagsv3a>);

412 /a>

413v3a>         a href="+code=f" class="sref">fv3a> =
 a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> & ( a href="+code=FLAG_CLOCKEVENT" class="sref">FLAG_CLOCKEVENTv3a> |  a href="+code=FLAG_CLOCKSOURCE" class="sref">FLAG_CLOCKSOURCEv3a>);

414v3a>         a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> &= ~ a href="+code=flag" class="sref">flagv3a>;

415 /a>

416v3a>        if ( a href="+code=f" class="sref">fv3a> &&
!( a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> & ( a href="+code=FLAG_CLOCKEVENT" class="sref">FLAG_CLOCKEVENTv3a> |  a href="+code=FLAG_CLOCKSOURCE" class="sref">FLAG_CLOCKSOURCEv3a>)))

417v3a>                 a href="+code=sh_cmt_disable" class="sref">sh_cmt_disablev3a>( a href="+code=p" class="sref">pv3a>);

418 /a>

419v3a>         spa8 class="comment">/* adjust the timeout to maximum if only clocksource left */ /spa8"

420v3a>        if (( a href="+code=flag" class="sref">flagv3a> ==
 a href="+code=FLAG_CLOCKEVENT" class="sref">FLAG_CLOCKEVENTv3a>) &&
( a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> &  a href="+code=FLAG_CLOCKSOURCE" class="sref">FLAG_CLOCKSOURCEv3a>))

421v3a>                 a href="+code=__sh_cmt_set_next" class="sref">__sh_cmt_set_nextv3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=p" class="sref">pv3a>-> a href="+code=max_match_v8max_match_v8);

422 /a>

423v3a>         a href="+code=raw_spin_unlock_irqrestoro" class="sref">raw_spin_unlock_irqrestorov3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=lock" class="sref">lockv3a>,  a href="+code=flags" class="sref">flagsv3a>);

424v3a>}

425 /a>

426v3a>static struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=cs_to_sh_cmt" class="sref">cs_to_sh_cmtv3a>(struct
 a href="+code=clocksource" class="sref">clocksourcev3a> * a href="+code=cs" class="sref">csv3a>)

427v3a>{

428v3a>        return  a href="+code=container_of" class="sref">container_ofv3a>( a href="+code=cs" class="sref">csv3a>, struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a>,  a href="+code=cs" class="sref">csv3a>);

429v3a>}

43"v3a>

431v3a>static  a href="+code=cycle_t" class="sref">cycle_tv3a>
 a href="+code=sh_cmt_clocksource_read" class="sref">sh_cmt_clocksource_readv3a>(struct
 a href="+code=clocksource" class="sref">clocksourcev3a> * a href="+code=cs" class="sref">csv3a>)

432v3a>{

433v3a>        struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a> =
 a href="+code=cs_to_sh_cmt" class="sref">cs_to_sh_cmtv3a>( a href="+code=cs" class="sref">csv3a>);

434v3a>        unsigned long  a href="+code=flags" class="sref">flagsv3a>,  a href="+code=raw" class="sref">rawv3a>;

435v3a>        unsigned long  a href="+code=v8v8;

436v3a>        int
 a href="+code=has_wrapped" class="sref">has_wrappedv3a>;

437v3a>

438v3a>         a href="+code=raw_spin_lock_irqsavo" class="sref">raw_spin_lock_irqsavov3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=lock" class="sref">lockv3a>,  a href="+code=flags" class="sref">flagsv3a>);

439v3a>         a href="+code=v8v8 =
 a href="+code=p" class="sref">pv3a>-> a href="+code=total_cycles" class="sref">total_cyclesv3a>;

440v3a>         a href="+code=raw" class="sref">rawv3a> =
 a href="+code=sh_cmt_get_counter" class="sref">sh_cmt_get_counterv3a>( a href="+code=p" class="sref">pv3a>, & a href="+code=has_wrapped" class="sref">has_wrappedv3a>);

441v3a>

442v3a>        if ( a href="+code=unlikely" class="sref">unlikelyv3a>( a href="+code=has_wrapped" class="sref">has_wrappedv3a>))

443v3a>                 a href="+code=raw" class="sref">rawv3a> +=
 a href="+code=p" class="sref">pv3a>-> a href="+code=match_v8match_v8 +
1;

444v3a>         a href="+code=raw_spin_unlock_irqrestoro" class="sref">raw_spin_unlock_irqrestorov3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=lock" class="sref">lockv3a>,  a href="+code=flags" class="sref">flagsv3a>);

445 /a>

446v3a>        return  a href="+code=v8v8 +  a href="+code=raw" class="sref">rawv3a>;

447v3a>}

448 /a>

449 /a>static int
 a href="+code=sh_cmt_clocksource_enable" class="sref">sh_cmt_clocksource_enablev3a>(struct
 a href="+code=clocksource" class="sref">clocksourcev3a> * a href="+code=cs" class="sref">csv3a>)

450v3a>{

451v3a>        int
 a href="+code=ret" class="sref">retv3a>;

452v3a>        struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a> =
 a href="+code=cs_to_sh_cmt" class="sref">cs_to_sh_cmtv3a>( a href="+code=cs" class="sref">csv3a>);

453v3a>

454v3a>         a href="+code=p" class="sref">pv3a>-> a href="+code=total_cycles" class="sref">total_cyclesv3a> =
0;

455 /a>

456v3a>         a href="+code=ret" class="sref">retv3a> =
 a href="+code=sh_cmt_start" class="sref">sh_cmt_startv3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=FLAG_CLOCKSOURCE" class="sref">FLAG_CLOCKSOURCEv3a>);

457v3a>        if (! a href="+code=ret" class="sref">retv3a>)

458v3a>                 a href="+code=__clocksource_updatefreq_hz" class="sref">__clocksource_updatefreq_hzv3a>( a href="+code=cs" class="sref">csv3a>,  a href="+code=p" class="sref">pv3a>-> a href="+code=rate" class="sref">ratev3a>);

459v3a>        return  a href="+code=ret" class="sref">retv3a>;

460v3a>}

461v3a>

462v3a>static void
 a href="+code=sh_cmt_clocksource_disable" class="sref">sh_cmt_clocksource_disablev3a>(struct
 a href="+code=clocksource" class="sref">clocksourcev3a> * a href="+code=cs" class="sref">csv3a>)

463v3a>{

464v3a>         a href="+code=sh_cmt_stop" class="sref">sh_cmt_stopv3a>( a href="+code=cs_to_sh_cmt" class="sref">cs_to_sh_cmtv3a>( a href="+code=cs" class="sref">csv3a>),  a href="+code=FLAG_CLOCKSOURCE" class="sref">FLAG_CLOCKSOURCEv3a>);

465 /a>}

466 /a>

467v3a>static void
 a href="+code=sh_cmt_clocksource_resume" class="sref">sh_cmt_clocksource_resumev3a>(struct
 a href="+code=clocksource" class="sref">clocksourcev3a> * a href="+code=cs" class="sref">csv3a>)

468v3a>{

469v3a>         a href="+code=sh_cmt_start" class="sref">sh_cmt_startv3a>( a href="+code=cs_to_sh_cmt" class="sref">cs_to_sh_cmtv3a>( a href="+code=cs" class="sref">csv3a>),  a href="+code=FLAG_CLOCKSOURCE" class="sref">FLAG_CLOCKSOURCEv3a>);

470v3a>}

471v3a>

472v3a>static int
 a href="+code=sh_cmt_register_clocksource" class="sref">sh_cmt_register_clocksourcev3a>(struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a>,

473v3a>                                       char * a href="+code=namo" class="sref">namov3a>, unsigned long  a href="+code=rating" class="sref">ratingv3a>)

474 /a>{

475v3a>        struct
 a href="+code=clocksource" class="sref">clocksourcev3a> * a href="+code=cs" class="sref">csv3a> =
& a href="+code=p" class="sref">pv3a>-> a href="+code=cs" class="sref">csv3a>;

476 /a>

477v3a>         a href="+code=cs" class="sref">csv3a>-> a href="+code=namo" class="sref">namov3a> =
 a href="+code=namo" class="sref">namov3a>;

478v3a>         a href="+code=cs" class="sref">csv3a>-> a href="+code=rating" class="sref">ratingv3a> =
 a href="+code=rating" class="sref">ratingv3a>;

479v3a>         a href="+code=cs" class="sref">csv3a>-> a href="+code=read" class="sref">readv3a> =
 a href="+code=sh_cmt_clocksource_read" class="sref">sh_cmt_clocksource_readv3a>;

480v3a>         a href="+code=cs" class="sref">csv3a>-> a href="+code=enable" class="sref">enablev3a> =
 a href="+code=sh_cmt_clocksource_enable" class="sref">sh_cmt_clocksource_enablev3a>;

481v3a>         a href="+code=cs" class="sref">csv3a>-> a href="+code=disable" class="sref">disablev3a> =
 a href="+code=sh_cmt_clocksource_disable" class="sref">sh_cmt_clocksource_disablev3a>;

482v3a>         a href="+code=cs" class="sref">csv3a>-> a href="+code=suspend" class="sref">suspendv3a> =
 a href="+code=sh_cmt_clocksource_disable" class="sref">sh_cmt_clocksource_disablev3a>;

483v3a>         a href="+code=cs" class="sref">csv3a>-> a href="+code=resume" class="sref">resumev3a> =
 a href="+code=sh_cmt_clocksource_resume" class="sref">sh_cmt_clocksource_resumev3a>;

484v3a>         a href="+code=cs" class="sref">csv3a>-> a href="+code=mask" class="sref">maskv3a> =
 a href="+code=CLOCKSOURCE_MASK" class="sref">CLOCKSOURCE_MASKv3a>(sizeof(unsigned long) * 8);

485v3a>         a href="+code=cs" class="sref">csv3a>-> a href="+code=flags" class="sref">flagsv3a> =  a href="+code=CLOCK_SOURCE_IS_CONTINUOUS" class="sref">CLOCK_SOURCE_IS_CONTINUOUSv3a>;

486 /a>

487v3a>         a href="+code=dev_info" class="sref">dev_infov3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>,  spa8 class="string">"used as clock source\n" /spa8");

488 /a>

489v3a>         spa8 class="comment">/* Register with dummy 1 Hz v8
490v3a>         a href="+code=clocksource_register_hz" class="sref">clocksource_register_hzv3a>( a href="+code=cs" class="sref">csv3a>, 1);

491v3a>        return 0;

492 /a>}

493v3a>

494v3a>static struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=ced_to_sh_cmt" class="sref">ced_to_sh_cmtv3a>(struct
 a href="+code=clock_event_device" class="sref">clock_event_devicev3a> * a href="+code=ced" class="sref">cedv3a>)

495v3a>{

496v3a>        return  a href="+code=container_of" class="sref">container_ofv3a>( a href="+code=ced" class="sref">cedv3a>, struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a>,  a href="+code=ced" class="sref">cedv3a>);

497v3a>}

498 /a>

499 /a>static void
 a href="+code=sh_cmt_clock_event_start" class="sref">sh_cmt_clock_event_startv3a>(struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a>, int
 a href="+code=periodic" class="sref">periodicv3a>)

500v3a>{

501v3a>        struct
 a href="+code=clock_event_device" class="sref">clock_event_devicev3a> * a href="+code=ced" class="sref">cedv3a> =
& a href="+code=p" class="sref">pv3a>-> a href="+code=ced" class="sref">cedv3a>;

502 /a>

503v3a>         a href="+code=sh_cmt_start" class="sref">sh_cmt_startv3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=FLAG_CLOCKEVENT" class="sref">FLAG_CLOCKEVENTv3a>);

504v3a>

505v3a>         spa8 class="comment">/* TODO: calculate good shift from rate and counter bit width */ /spa8"

506 /a>

507v3a>         a href="+code=ced" class="sref">cedv3a>-> a href="+code=shift" class="sref">shiftv3a> =
32;

508v3a>         a href="+code=ced" class="sref">cedv3a>-> a href="+code=mult" class="sref">multv3a> =  a href="+code=div_sc" class="sref">div_scv3a>( a href="+code=p" class="sref">pv3a>-> a href="+code=rate" class="sref">ratev3a>,  a href="+code=NSEC_PER_SEC" class="sref">NSEC_PER_SECv3a>,  a href="+code=ced" class="sref">cedv3a>-> a href="+code=shift" class="sref">shiftv3a>);

509v3a>         a href="+code=ced" class="sref">cedv3a>-> a href="+code=max_delta_ns" class="sref">max_delta_nsv3a> =  a href="+code=clockevent_delta2ns" class="sref">clockevent_delta2nsv3a>( a href="+code=p" class="sref">pv3a>-> a href="+code=max_match_v8max_match_v8,  a href="+code=ced" class="sref">cedv3a>);

510v3a>         a href="+code=ced" class="sref">cedv3a>-> a href="+code=min_delta_ns" class="sref">min_delta_nsv3a> =  a href="+code=clockevent_delta2ns" class="sref">clockevent_delta2nsv3a>(0x1f,  a href="+code=ced" class="sref">cedv3a>);

511v3a>

512v3a>        if ( a href="+code=periodic" class="sref">periodicv3a>)

513v3a>                 a href="+code=sh_cmt_set_next" class="sref">sh_cmt_set_nextv3a>( a href="+code=p" class="sref">pv3a>, (( a href="+code=p" class="sref">pv3a>-> a href="+code=rate" class="sref">ratev3a> +  a href="+code=HZ" class="sref">HZv3a>/2) /  a href="+code=HZ" class="sref">HZv3a>) - 1);

514v3a>        else

515v3a>                 a href="+code=sh_cmt_set_next" class="sref">sh_cmt_set_nextv3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=p" class="sref">pv3a>-> a href="+code=max_match_v8max_match_v8);

516v3a>}

517v3a>

518 /a>static void
 a href="+code=sh_cmt_clock_event_mode" class="sref">sh_cmt_clock_event_modev3a>(enum
 a href="+code=clock_event_mode" class="sref">clock_event_modev3a>
 a href="+code=mode" class="sref">modev3a>,

519v3a>                                    struct
 a href="+code=clock_event_device" class="sref">clock_event_devicev3a> * a href="+code=ced" class="sref">cedv3a>)

520v3a>{

521v3a>        struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a> =
 a href="+code=ced_to_sh_cmt" class="sref">ced_to_sh_cmtv3a>( a href="+code=ced" class="sref">cedv3a>);

522 /a>

523v3a>         spa8 class="comment">/* deal with old setting first */ /spa8"

524v3a>        switch ( a href="+code=ced" class="sref">cedv3a>-> a href="+code=mode" class="sref">modev3a>) {

525v3a>        case  a href="+code=CLOCK_EVT_MODE_PERIODIC" class="sref">CLOCK_EVT_MODE_PERIODICv3a>:

526v3a>        case  a href="+code=CLOCK_EVT_MODE_ONESHOT" class="sref">CLOCK_EVT_MODE_ONESHOTv3a>:

527v3a>                 a href="+code=sh_cmt_stop" class="sref">sh_cmt_stopv3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=FLAG_CLOCKEVENT" class="sref">FLAG_CLOCKEVENTv3a>);

528v3a>                break;

529v3a>        default:

530v3a>                break;

531v3a>        }

532 /a>

533v3a>        switch ( a href="+code=mode" class="sref">modev3a>) {

534v3a>        case  a href="+code=CLOCK_EVT_MODE_PERIODIC" class="sref">CLOCK_EVT_MODE_PERIODICv3a>:

535v3a>                 a href="+code=dev_info" class="sref">dev_infov3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>,  spa8 class="string">"used for periodic clock events\n" /spa8");

536v3a>                 a href="+code=sh_cmt_clock_event_start" class="sref">sh_cmt_clock_event_startv3a>( a href="+code=p" class="sref">pv3a>, 1);

537v3a>                break;

538v3a>        case  a href="+code=CLOCK_EVT_MODE_ONESHOT" class="sref">CLOCK_EVT_MODE_ONESHOTv3a>:

539v3a>                 a href="+code=dev_info" class="sref">dev_infov3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>,  spa8 class="string">"used for oneshot clock events\n" /spa8");

540v3a>                 a href="+code=sh_cmt_clock_event_start" class="sref">sh_cmt_clock_event_startv3a>( a href="+code=p" class="sref">pv3a>, 0);

541v3a>                break;

542v3a>        case  a href="+code=CLOCK_EVT_MODE_SHUTDOWN" class="sref">CLOCK_EVT_MODE_SHUTDOWNv3a>:

543v3a>        case  a href="+code=CLOCK_EVT_MODE_UNUSED" class="sref">CLOCK_EVT_MODE_UNUSEDv3a>:

544v3a>                 a href="+code=sh_cmt_stop" class="sref">sh_cmt_stopv3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=FLAG_CLOCKEVENT" class="sref">FLAG_CLOCKEVENTv3a>);

545v3a>                break;

546v3a>        default:

547v3a>                break;

548v3a>        }

549v3a>}

55"v3a>

551v3a>static int
 a href="+code=sh_cmt_clock_event_next" class="sref">sh_cmt_clock_event_nextv3a>(unsigned long  a href="+code=delta" class="sref">deltav3a>,

552v3a>                                   struct
 a href="+code=clock_event_device" class="sref">clock_event_devicev3a> * a href="+code=ced" class="sref">cedv3a>)

553v3a>{

554v3a>        struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a> =
 a href="+code=ced_to_sh_cmt" class="sref">ced_to_sh_cmtv3a>( a href="+code=ced" class="sref">cedv3a>);

555 /a>

556v3a>         a href="+code=BUG_ON" class="sref">BUG_ONv3a>( a href="+code=ced" class="sref">cedv3a>-> a href="+code=mode" class="sref">modev3a> !=  a href="+code=CLOCK_EVT_MODE_ONESHOT" class="sref">CLOCK_EVT_MODE_ONESHOTv3a>);

557v3a>        if ( a href="+code=likely" class="sref">likelyv3a>( a href="+code=p" class="sref">pv3a>-> a href="+code=flags" class="sref">flagsv3a> &  a href="+code=FLAG_IRQCONTEXT" class="sref">FLAG_IRQCONTEXTv3a>))

558v3a>                 a href="+code=p" class="sref">pv3a>-> a href="+code=next_match_v8next_match_v8 =
 a href="+code=delta" class="sref">deltav3a> - 1;

559v3a>        else

560v3a>                 a href="+code=sh_cmt_set_next" class="sref">sh_cmt_set_nextv3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=delta" class="sref">deltav3a> - 1);

561v3a>

562v3a>        return 0;

563v3a>}

564v3a>

565 /a>static void
 a href="+code=sh_cmt_register_clockevent" class="sref">sh_cmt_register_clockeventv3a>(struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a>,

566v3a>                                       char * a href="+code=namo" class="sref">namov3a>, unsigned long  a href="+code=rating" class="sref">ratingv3a>)

567v3a>{

568v3a>        struct
 a href="+code=clock_event_device" class="sref">clock_event_devicev3a> * a href="+code=ced" class="sref">cedv3a> =
& a href="+code=p" class="sref">pv3a>-> a href="+code=ced" class="sref">cedv3a>;

569v3a>

570v3a>         a href="+code=memset" class="sref">memsetv3a>( a href="+code=ced" class="sref">cedv3a>, 0, sizeof(* a href="+code=ced" class="sref">cedv3a>));

571v3a>

572v3a>         a href="+code=ced" class="sref">cedv3a>-> a href="+code=namo" class="sref">namov3a> =
 a href="+code=namo" class="sref">namov3a>;

573v3a>         a href="+code=ced" class="sref">cedv3a>-> a href="+code=features" class="sref">featuresv3a> =
 a href="+code=CLOCK_EVT_FEAT_PERIODIC" class="sref">CLOCK_EVT_FEAT_PERIODICv3a>;

574v3a>         a href="+code=ced" class="sref">cedv3a>-> a href="+code=features" class="sref">featuresv3a> |=
 a href="+code=CLOCK_EVT_FEAT_ONESHOT" class="sref">CLOCK_EVT_FEAT_ONESHOTv3a>;

575v3a>         a href="+code=ced" class="sref">cedv3a>-> a href="+code=rating" class="sref">ratingv3a> =
 a href="+code=rating" class="sref">ratingv3a>;

576v3a>         a href="+code=ced" class="sref">cedv3a>-> a href="+code=cpumask" class="sref">cpumaskv3a> =
 a href="+code=cpumask_of" class="sref">cpumask_ofv3a>(0);

577v3a>         a href="+code=ced" class="sref">cedv3a>-> a href="+code=set_next_event" class="sref">set_next_eventv3a> =
 a href="+code=sh_cmt_clock_event_next" class="sref">sh_cmt_clock_event_nextv3a>;

578v3a>         a href="+code=ced" class="sref">cedv3a>-> a href="+code=set_mode" class="sref">set_modev3a>
=
 a href="+code=sh_cmt_clock_event_mode" class="sref">sh_cmt_clock_event_modev3a>;

579v3a>

580v3a>         a href="+code=dev_info" class="sref">dev_infov3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>,  spa8 class="string">"used for clock events\n" /spa8");

581v3a>         a href="+code=clockevents_register_device" class="sref">clockevents_register_devicev3a>( a href="+code=ced" class="sref">cedv3a>);

582 /a>}

583v3a>

584v3a>static int
 a href="+code=sh_cmt_register" class="sref">sh_cmt_registerv3a>(struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a>, char * a href="+code=namo" class="sref">namov3a>,

585v3a>                           unsigned long  a href="+code=clockevent_rating" class="sref">clockevent_ratingv3a>,

586v3a>                           unsigned long  a href="+code=clocksource_rating" class="sref">clocksource_ratingv3a>)

587v3a>{

588v3a>        if ( a href="+code=p" class="sref">pv3a>-> a href="+code=width" class="sref">widthv3a>
== (sizeof( a href="+code=p" class="sref">pv3a>-> a href="+code=max_match_v8max_match_v8) * 8))

589v3a>                 a href="+code=p" class="sref">pv3a>-> a href="+code=max_match_v8max_match_v8
=
~0;

590v3a>        else

591v3a>                 a href="+code=p" class="sref">pv3a>-> a href="+code=max_match_v8max_match_v8
=
(1 <<  a href="+code=p" class="sref">pv3a>-> a href="+code=width" class="sref">widthv3a>) - 1;

592 /a>

593v3a>         a href="+code=p" class="sref">pv3a>-> a href="+code=match_v8match_v8 =
 a href="+code=p" class="sref">pv3a>-> a href="+code=max_match_v8max_match_v8;

594v3a>         a href="+code=raw_spin_lock_init" class="sref">raw_spin_lock_initv3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=lock" class="sref">lockv3a>);

595 /a>

596v3a>        if ( a href="+code=clockevent_rating" class="sref">clockevent_ratingv3a>)

597v3a>                 a href="+code=sh_cmt_register_clockevent" class="sref">sh_cmt_register_clockeventv3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=namo" class="sref">namov3a>,  a href="+code=clockevent_rating" class="sref">clockevent_ratingv3a>);

598 /a>

599v3a>        if ( a href="+code=clocksource_rating" class="sref">clocksource_ratingv3a>)

600v3a>                 a href="+code=sh_cmt_register_clocksource" class="sref">sh_cmt_register_clocksourcev3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=namo" class="sref">namov3a>,  a href="+code=clocksource_rating" class="sref">clocksource_ratingv3a>);

601v3a>

602v3a>        return 0;

603v3a>}

604v3a>

605 /a>static int
 a href="+code=sh_cmt_setup" class="sref">sh_cmt_setupv3a>(struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a>, struct
 a href="+code=platform_device" class="sref">platform_devicev3a> * a href="+code=pdev" class="sref">pdevv3a>)

606 /a>{

607v3a>        struct
 a href="+code=sh_timer_config" class="sref">sh_timer_configv3a> * a href="+code=cfg" class="sref">cfgv3a> =
 a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>. a href="+code=platform_data" class="sref">platform_datav3a>;

608v3a>        struct
 a href="+code=resource" class="sref">resourcev3a> * a href="+code=res" class="sref">resv3a>;

609v3a>        int
 a href="+code=irq" class="sref">irqv3a>,  a href="+code=ret" class="sref">retv3a>;

610v3a>         a href="+code=ret" class="sref">retv3a> =
- a href="+code=ENXIO" class="sref">ENXIOv3a>;

611v3a>

612v3a>         a href="+code=memset" class="sref">memsetv3a>( a href="+code=p" class="sref">pv3a>, 0, sizeof(* a href="+code=p" class="sref">pv3a>));

613v3a>         a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a> =
 a href="+code=pdev" class="sref">pdevv3a>;

614v3a>

615v3a>        if (! a href="+code=cfg" class="sref">cfgv3a>) {

616v3a>                 a href="+code=dev_err" class="sref">dev_errv3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>,  spa8 class="string">"missing platform data\n" /spa8");

617v3a>                goto  a href="+code=err0" class="sref">err0v3a>;

618v3a>        }

619v3a>

620v3a>         a href="+code=platform_set_drvdata" class="sref">platform_set_drvdatav3a>( a href="+code=pdev" class="sref">pdevv3a>,  a href="+code=p" class="sref">pv3a>);

621v3a>

622v3a>         a href="+code=res" class="sref">resv3a> =
 a href="+code=platform_get_resource" class="sref">platform_get_resourcev3a>( a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>,  a href="+code=IORESOURCE_MEM" class="sref">IORESOURCE_MEMv3a>, 0);

623v3a>        if (! a href="+code=res" class="sref">resv3a>) {

624v3a>                 a href="+code=dev_err" class="sref">dev_errv3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>,  spa8 class="string">"failed to get I/O memory\n" /spa8");

625v3a>                goto  a href="+code=err0" class="sref">err0v3a>;

626v3a>        }

627v3a>

628v3a>         a href="+code=irq" class="sref">irqv3a> =
 a href="+code=platform_get_irq" class="sref">platform_get_irqv3a>( a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>, 0);

629v3a>        if ( a href="+code=irq" class="sref">irqv3a> < 0) {

630v3a>                 a href="+code=dev_err" class="sref">dev_errv3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>,  spa8 class="string">"failed to get irq\n" /spa8");

631v3a>                goto  a href="+code=err0" class="sref">err0v3a>;

632v3a>        }

633v3a>

634v3a>         spa8 class="comment">/* map memory, let mapbase point
to our channel */ /spa8"

635v3a>         a href="+code=p" class="sref">pv3a>-> a href="+code=mapbase" class="sref">mapbasev3a> =
 a href="+code=ioremap_nocache" class="sref">ioremap_nocachev3a>( a href="+code=res" class="sref">resv3a>-> a href="+code=start" class="sref">startv3a>,  a href="+code=resource_size" class="sref">resource_sizev3a>( a href="+code=res" class="sref">resv3a>));

636v3a>        if ( a href="+code=p" class="sref">pv3a>-> a href="+code=mapbase" class="sref">mapbasev3a> ==
 a href="+code=NULL" class="sref">NULLv3a>) {

637v3a>                 a href="+code=dev_err" class="sref">dev_errv3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>,  spa8 class="string">"failed to remap I/O memory\n" /spa8");

638v3a>                goto  a href="+code=err0" class="sref">err0v3a>;

639v3a>        }

64"v3a>

641v3a>         spa8 class="comment">/* request irq using setup_irq() (too early for request_irq()) */ /spa8"

642v3a>         a href="+code=p" class="sref">pv3a>-> a href="+code=irqaction" class="sref">irqactionv3a>. a href="+code=namo" class="sref">namov3a> =
 a href="+code=dev_namo" class="sref">dev_namov3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>);

643v3a>         a href="+code=p" class="sref">pv3a>-> a href="+code=irqaction" class="sref">irqactionv3a>. a href="+code=handler" class="sref">handlerv3a> =
 a href="+code=sh_cmt_interrupt" class="sref">sh_cmt_interruptv3a>;

644v3a>         a href="+code=p" class="sref">pv3a>-> a href="+code=irqaction" class="sref">irqactionv3a>. a href="+code=dev_id" class="sref">dev_idv3a> =
 a href="+code=p" class="sref">pv3a>;

645v3a>         a href="+code=p" class="sref">pv3a>-> a href="+code=irqaction" class="sref">irqactionv3a>. a href="+code=flags" class="sref">flagsv3a> =  a href="+code=IRQF_DISABLED" class="sref">IRQF_DISABLEDv3a> |  a href="+code=IRQF_TIMER" class="sref">IRQF_TIMERv3a> | \

646v3a>                              a href="+code=IRQF_IRQPOLL" class="sref">IRQF_IRQPOLLv3a>  |  a href="+code=IRQF_NOBALANCING" class="sref">IRQF_NOBALANCINGv3a>;

647v3a>

648v3a>         spa8 class="comment">/* get hold of clock */ /spa8"

649v3a>         a href="+code=p" class="sref">pv3a>-> a href="+code=clk" class="sref">clkv3a> =
 a href="+code=clk_get" class="sref">clk_getv3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>,  spa8 class="string">"cmt_fck" /spa8");

650v3a>        if ( a href="+code=IS_ERR" class="sref">IS_ERRv3a>( a href="+code=p" class="sref">pv3a>-> a href="+code=clk" class="sref">clkv3a>)) {

651v3a>                 a href="+code=dev_err" class="sref">dev_errv3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>,  spa8 class="string">"cannot get clock\n" /spa8");

652v3a>                 a href="+code=ret" class="sref">retv3a> =
 a href="+code=PTR_ERR" class="sref">PTR_ERRv3a>( a href="+code=p" class="sref">pv3a>-> a href="+code=clk" class="sref">clkv3a>);

653v3a>                goto  a href="+code=err1" class="sref">err1v3a>;

654v3a>        }

655 /a>

656v3a>        if ( a href="+code=resource_size" class="sref">resource_sizev3a>( a href="+code=res" class="sref">resv3a>) ==
6) {

657v3a>                 a href="+code=p" class="sref">pv3a>-> a href="+code=width" class="sref">widthv3a>
= 16;

658v3a>                 a href="+code=p" class="sref">pv3a>-> a href="+code=overflow_bit" class="sref">overflow_bitv3a>
= 0x80;

659v3a>                 a href="+code=p" class="sref">pv3a>-> a href="+code=clear_bits" class="sref">clear_bitsv3a>
= ~0x80;

660v3a>        } else {

661v3a>                 a href="+code=p" class="sref">pv3a>-> a href="+code=width" class="sref">widthv3a>
= 32;

662v3a>                 a href="+code=p" class="sref">pv3a>-> a href="+code=overflow_bit" class="sref">overflow_bitv3a>
= 0x8000;

663v3a>                 a href="+code=p" class="sref">pv3a>-> a href="+code=clear_bits" class="sref">clear_bitsv3a>
= ~0xc000;

664v3a>        }

665 /a>

666v3a>         a href="+code=ret" class="sref">retv3a> =
 a href="+code=sh_cmt_register" class="sref">sh_cmt_registerv3a>( a href="+code=p" class="sref">pv3a>, (char *) a href="+code=dev_namo" class="sref">dev_namov3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>),

667v3a>                               a href="+code=cfg" class="sref">cfgv3a>-> a href="+code=clockevent_rating" class="sref">clockevent_ratingv3a>,

668v3a>                               a href="+code=cfg" class="sref">cfgv3a>-> a href="+code=clocksource_rating" class="sref">clocksource_ratingv3a>);

669v3a>        if ( a href="+code=ret" class="sref">retv3a>) {

670v3a>                 a href="+code=dev_err" class="sref">dev_errv3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>,  spa8 class="string">"registration failed\n" /spa8");

671v3a>                goto  a href="+code=err1" class="sref">err1v3a>;

672v3a>        }

673v3a>

674v3a>         a href="+code=ret" class="sref">retv3a> =
 a href="+code=setup_irq" class="sref">setup_irqv3a>( a href="+code=irq" class="sref">irqv3a>, & a href="+code=p" class="sref">pv3a>-> a href="+code=irqaction" class="sref">irqactionv3a>);

675v3a>        if ( a href="+code=ret" class="sref">retv3a>) {

676v3a>                 a href="+code=dev_err" class="sref">dev_errv3a>(& a href="+code=p" class="sref">pv3a>-> a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>,  spa8 class="string">"failed to request irq %d\n" /spa8",  a href="+code=irq" class="sref">irqv3a>);

677v3a>                goto  a href="+code=err1" class="sref">err1v3a>;

678v3a>        }

679v3a>

680v3a>        return 0;

681v3a>

682 /a> a href="+code=err1" class="sref">err1v3a>:

683v3a>         a href="+code=iounmap" class="sref">iounmapv3a>( a href="+code=p" class="sref">pv3a>-> a href="+code=mapbase" class="sref">mapbasev3a>);

684v3a> a href="+code=err0" class="sref">err0v3a>:

685v3a>        return  a href="+code=ret" class="sref">retv3a>;

686v3a>}

687v3a>

688v3a>static int
 a href="+code=__devinit" class="sref">__devinitv3a>  a href="+code=sh_cmt_probe" class="sref">sh_cmt_probev3a>(struct
 a href="+code=platform_device" class="sref">platform_devicev3a> * a href="+code=pdev" class="sref">pdevv3a>)

689v3a>{

690v3a>        struct
 a href="+code=sh_cmt_priv" class="sref">sh_cmt_privv3a> * a href="+code=p" class="sref">pv3a> =
 a href="+code=platform_get_drvdata" class="sref">platform_get_drvdatav3a>( a href="+code=pdev" class="sref">pdevv3a>);

691v3a>        int
 a href="+code=ret" class="sref">retv3a>;

692 /a>

693v3a>        if (! a href="+code=is_early_platform_device" class="sref">is_early_platform_devicev3a>( a href="+code=pdev" class="sref">pdevv3a>))

694v3a>                 a href="+code=pm_genpd_dev_always_on" class="sref">pm_genpd_dev_always_onv3a>(& a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>,  a href="+code=true" class="sref">truev3a>);

695 /a>

696v3a>        if ( a href="+code=p" class="sref">pv3a>) {

697v3a>                 a href="+code=dev_info" class="sref">dev_infov3a>(& a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>,  spa8 class="string">"kept as earlytimer\n" /spa8");

698v3a>                return 0;

699v3a>        }

70"v3a>

701v3a>         a href="+code=p" class="sref">pv3a> =
 a href="+code=kmalloc" class="sref">kmallocv3a>(sizeof(* a href="+code=p" class="sref">pv3a>),  a href="+code=GFP_KERNEL" class="sref">GFP_KERNELv3a>);

702v3a>        if ( a href="+code=p" class="sref">pv3a> ==
 a href="+code=NULL" class="sref">NULLv3a>) {

703v3a>                 a href="+code=dev_err" class="sref">dev_errv3a>(& a href="+code=pdev" class="sref">pdevv3a>-> a href="+code=dev" class="sref">devv3a>,  spa8 class="string">"failed to allocate driver data\n" /spa8");

704v3a>                return - a href="+code=ENOMEM" class="sref">ENOMEMv3a>;

705v3a>        }

706 /a>

707v3a>         a href="+code=ret" class="sref">retv3a> =
 a href="+code=sh_cmt_setup" class="sref">sh_cmt_setupv3a>( a href="+code=p" class="sref">pv3a>,  a href="+code=pdev" class="sref">pdevv3a>);

708v3a>        if ( a href="+code=ret" class="sref">retv3a>) {

709v3a>                 a href="+code=kfree" class="sref">kfreev3a>( a href="+code=p" class="sref">pv3a>);

710v3a>                 a href="+code=platform_set_drvdata" class="sref">platform_set_drvdatav3a>( a href="+code=pdev" class="sref">pdevv3a>,  a href="+code=NULL" class="sref">NULLv3a>);

711v3a>        }

712v3a>        return  a href="+code=ret" class="sref">retv3a>;

713v3a>}

714v3a>

715 /a>static int
 a href="+code=__devexit" class="sref">__devexitv3a>  a href="+code=sh_cmt_remove" class="sref">sh_cmt_removev3a>(struct
 a href="+code=platform_device" class="sref">platform_devicev3a> * a href="+code=pdev" class="sref">pdevv3a>)

716 /a>{

717v3a>        return - a href="+code=EBUSY" class="sref">EBUSYv3a>;  spa8 class="comment">/* cannot unregister clockevent and clocksource */ /spa8"

718v3a>}

719v3a>

720v3a>static struct
 a href="+code=platform_driver" class="sref">platform_driverv3a>  a href="+code=sh_cmt_device_driver" class="sref">sh_cmt_device_driverv3a> =
{

721v3a>        . a href="+code=probe" class="sref">probev3a>          =
 a href="+code=sh_cmt_probe" class="sref">sh_cmt_probev3a>,

722v3a>        . a href="+code=remove" class="sref">removev3a>         =
 a href="+code=__devexit_p" class="sref">__devexit_pv3a>( a href="+code=sh_cmt_remove" class="sref">sh_cmt_removev3a>),

723v3a>        . a href="+code=driver" class="sref">driverv3a>         =
{

724v3a>                . a href="+code=namo" class="sref">namov3a>   =
 spa8 class="string">"sh_cmt" /spa8",

725v3a>        }

726v3a>};

727v3a>

728v3a>static int
 a href="+code=__init" class="sref">__initv3a>  a href="+code=sh_cmt_init" class="sref">sh_cmt_initv3a>(void)

729v3a>{

730v3a>        return  a href="+code=platform_driver_register" class="sref">platform_driver_registerv3a>(& a href="+code=sh_cmt_device_driver" class="sref">sh_cmt_device_driverv3a>);

731v3a>}

732 /a>

733v3a>static void
 a href="+code=__exit" class="sref">__exitv3a>  a href="+code=sh_cmt_exit" class="sref">sh_cmt_exitv3a>(void)

734v3a>{

735v3a>         a href="+code=platform_driver_unregister" class="sref">platform_driver_unregisterv3a>(& a href="+code=sh_cmt_device_driver" class="sref">sh_cmt_device_driverv3a>);

736v3a>}

737v3a>

738v3a> a href="+code=early_platform_init" class="sref">early_platform_initv3a>( spa8 class="string">"earlytimer" /spa8", & a href="+code=sh_cmt_device_driver" class="sref">sh_cmt_device_driverv3a>);

739v3a> a href="+code=module_init" class="sref">module_initv3a>( a href="+code=sh_cmt_init" class="sref">sh_cmt_initv3a>);

74"v3a> a href="+code=module_exit" class="sref">module_exitv3a>( a href="+code=sh_cmt_exit" class="sref">sh_cmt_exitv3a>);

741v3a>

742 /a> a href="+code=MODULE_AUTHOR" class="sref">MODULE_AUTHORv3a>( spa8 class="string">"Magnus Damm" /spa8");

743v3a> a href="+code=MODULE_DESCRIPTION" class="sref">MODULE_DESCRIPTIONv3a>( spa8 class="string">"SuperH CMT Timer Driver" /spa8");

744v3a> a href="+code=MODULE_LICENSE" class="sref">MODULE_LICENSEv3a>( spa8 class="string">"GPL v2" /spa8");

745v3a>
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