linux/drivers/ide/cmd640.c
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   1/*
   2 *  Copyright (C) 1995-1996  Linus Torvalds & authors (see below)
   3 */
   4
   5/*
   6 *  Original authors:   abramov@cecmow.enet.dec.com (Igor Abramov)
   7 *                      mlord@pobox.com (Mark Lord)
   8 *
   9 *  See linux/MAINTAINERS for address of current maintainer.
  10 *
  11 *  This file provides support for the advanced features and bugs
  12 *  of IDE interfaces using the CMD Technologies 0640 IDE interface chip.
  13 *
  14 *  These chips are basically fucked by design, and getting this driver
  15 *  to work on every motherboard design that uses this screwed chip seems
  16 *  bloody well impossible.  However, we're still trying.
  17 *
  18 *  Version 0.97 worked for everybody.
  19 *
  20 *  User feedback is essential.  Many thanks to the beta test team:
  21 *
  22 *  A.Hartgers@stud.tue.nl, JZDQC@CUNYVM.CUNY.edu, abramov@cecmow.enet.dec.com,
  23 *  bardj@utopia.ppp.sn.no, bart@gaga.tue.nl, bbol001@cs.auckland.ac.nz,
  24 *  chrisc@dbass.demon.co.uk, dalecki@namu26.Num.Math.Uni-Goettingen.de,
  25 *  derekn@vw.ece.cmu.edu, florian@btp2x3.phy.uni-bayreuth.de,
  26 *  flynn@dei.unipd.it, gadio@netvision.net.il, godzilla@futuris.net,
  27 *  j@pobox.com, jkemp1@mises.uni-paderborn.de, jtoppe@hiwaay.net,
  28 *  kerouac@ssnet.com, meskes@informatik.rwth-aachen.de, hzoli@cs.elte.hu,
  29 *  peter@udgaard.isgtec.com, phil@tazenda.demon.co.uk, roadcapw@cfw.com,
  30 *  s0033las@sun10.vsz.bme.hu, schaffer@tam.cornell.edu, sjd@slip.net,
  31 *  steve@ei.org, ulrpeg@bigcomm.gun.de, ism@tardis.ed.ac.uk, mack@cray.com
  32 *  liug@mama.indstate.edu, and others.
  33 *
  34 *  Version 0.01        Initial version, hacked out of ide.c,
  35 *                      and #include'd rather than compiled separately.
  36 *                      This will get cleaned up in a subsequent release.
  37 *
  38 *  Version 0.02        Fixes for vlb initialization code, enable prefetch
  39 *                      for versions 'B' and 'C' of chip by default,
  40 *                      some code cleanup.
  41 *
  42 *  Version 0.03        Added reset of secondary interface,
  43 *                      and black list for devices which are not compatible
  44 *                      with prefetch mode. Separate function for setting
  45 *                      prefetch is added, possibly it will be called some
  46 *                      day from ioctl processing code.
  47 *
  48 *  Version 0.04        Now configs/compiles separate from ide.c
  49 *
  50 *  Version 0.05        Major rewrite of interface timing code.
  51 *                      Added new function cmd640_set_mode to set PIO mode
  52 *                      from ioctl call. New drives added to black list.
  53 *
  54 *  Version 0.06        More code cleanup. Prefetch is enabled only for
  55 *                      detected hard drives, not included in prefetch
  56 *                      black list.
  57 *
  58 *  Version 0.07        Changed to more conservative drive tuning policy.
  59 *                      Unknown drives, which report PIO < 4 are set to
  60 *                      (reported_PIO - 1) if it is supported, or to PIO0.
  61 *                      List of known drives extended by info provided by
  62 *                      CMD at their ftp site.
  63 *
  64 *  Version 0.08        Added autotune/noautotune support.
  65 *
  66 *  Version 0.09        Try to be smarter about 2nd port enabling.
  67 *  Version 0.10        Be nice and don't reset 2nd port.
  68 *  Version 0.11        Try to handle more weird situations.
  69 *
  70 *  Version 0.12        Lots of bug fixes from Laszlo Peter
  71 *                      irq unmasking disabled for reliability.
  72 *                      try to be even smarter about the second port.
  73 *                      tidy up source code formatting.
  74 *  Version 0.13        permit irq unmasking again.
  75 *  Version 0.90        massive code cleanup, some bugs fixed.
  76 *                      defaults all drives to PIO mode0, prefetch off.
  77 *                      autotune is OFF by default, with compile time flag.
  78 *                      prefetch can be turned OFF/ON using "hdparm -p8/-p9"
  79 *                       (requires hdparm-3.1 or newer)
  80 *  Version 0.91        first release to linux-kernel list.
  81 *  Version 0.92        move initial reg dump to separate callable function
  82 *                      change "readahead" to "prefetch" to avoid confusion
  83 *  Version 0.95        respect original BIOS timings unless autotuning.
  84 *                      tons of code cleanup and rearrangement.
  85 *                      added CONFIG_BLK_DEV_CMD640_ENHANCED option
  86 *                      prevent use of unmask when prefetch is on
  87 *  Version 0.96        prevent use of io_32bit when prefetch is off
  88 *  Version 0.97        fix VLB secondary interface for sjd@slip.net
  89 *                      other minor tune-ups:  0.96 was very good.
  90 *  Version 0.98        ignore PCI version when disabled by BIOS
  91 *  Version 0.99        display setup/active/recovery clocks with PIO mode
  92 *  Version 1.00        Mmm.. cannot depend on PCMD_ENA in all systems
  93 *  Version 1.01        slow/fast devsel can be selected with "hdparm -p6/-p7"
  94 *                       ("fast" is necessary for 32bit I/O in some systems)
  95 *  Version 1.02        fix bug that resulted in slow "setup times"
  96 *                       (patch courtesy of Zoltan Hidvegi)
  97 */
  98
  99#define CMD640_PREFETCH_MASKS 1
 100
 101/*#define CMD640_DUMP_REGS */
 102
 103#include <linux/types.h>
 104#include <linux/kernel.h>
 105#include <linux/delay.h>
 106#include <linux/ide.h>
 107#include <linux/init.h>
 108#include <linux/module.h>
 109
 110#include <asm/io.h>
 111
 112#define DRV_NAME "cmd640"
 113
 114static bool cmd640_vlb;
 115
 116/*
 117 * CMD640 specific registers definition.
 118 */
 119
 120#define VID             0x00
 121#define DID             0x02
 122#define PCMD            0x04
 123#define   PCMD_ENA      0x01
 124#define PSTTS           0x06
 125#define REVID           0x08
 126#define PROGIF          0x09
 127#define SUBCL           0x0a
 128#define BASCL           0x0b
 129#define BaseA0          0x10
 130#define BaseA1          0x14
 131#define BaseA2          0x18
 132#define BaseA3          0x1c
 133#define INTLINE         0x3c
 134#define INPINE          0x3d
 135
 136#define CFR             0x50
 137#define   CFR_DEVREV            0x03
 138#define   CFR_IDE01INTR         0x04
 139#define   CFR_DEVID             0x18
 140#define   CFR_AT_VESA_078h      0x20
 141#define   CFR_DSA1              0x40
 142#define   CFR_DSA0              0x80
 143
 144#define CNTRL           0x51
 145#define   CNTRL_DIS_RA0         0x40
 146#define   CNTRL_DIS_RA1         0x80
 147#define   CNTRL_ENA_2ND         0x08
 148
 149#define CMDTIM          0x52
 150#define ARTTIM0         0x53
 151#define DRWTIM0         0x54
 152#define ARTTIM1         0x55
 153#define DRWTIM1         0x56
 154#define ARTTIM23        0x57
 155#define   ARTTIM23_DIS_RA2      0x04
 156#define   ARTTIM23_DIS_RA3      0x08
 157#define   ARTTIM23_IDE23INTR    0x10
 158#define DRWTIM23        0x58
 159#define BRST            0x59
 160
 161/*
 162 * Registers and masks for easy access by drive index:
 163 */
 164static u8 prefetch_regs[4]  = {CNTRL, CNTRL, ARTTIM23, ARTTIM23};
 165static u8 prefetch_masks[4] = {CNTRL_DIS_RA0, CNTRL_DIS_RA1, ARTTIM23_DIS_RA2, ARTTIM23_DIS_RA3};
 166
 167#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
 168
 169static u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23};
 170static u8 drwtim_regs[4] = {DRWTIM0, DRWTIM1, DRWTIM23, DRWTIM23};
 171
 172/*
 173 * Current cmd640 timing values for each drive.
 174 * The defaults for each are the slowest possible timings.
 175 */
 176static u8 setup_counts[4]    = {4, 4, 4, 4};     /* Address setup count (in clocks) */
 177static u8 active_counts[4]   = {16, 16, 16, 16}; /* Active count   (encoded) */
 178static u8 recovery_counts[4] = {16, 16, 16, 16}; /* Recovery count (encoded) */
 179
 180#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
 181
 182static DEFINE_SPINLOCK(cmd640_lock);
 183
 184/*
 185 * Interface to access cmd640x registers
 186 */
 187static unsigned int cmd640_key;
 188static void (*__put_cmd640_reg)(u16 reg, u8 val);
 189static u8 (*__get_cmd640_reg)(u16 reg);
 190
 191/*
 192 * This is read from the CFR reg, and is used in several places.
 193 */
 194static unsigned int cmd640_chip_version;
 195
 196/*
 197 * The CMD640x chip does not support DWORD config write cycles, but some
 198 * of the BIOSes use them to implement the config services.
 199 * Therefore, we must use direct IO instead.
 200 */
 201
 202/* PCI method 1 access */
 203
 204static void put_cmd640_reg_pci1(u16 reg, u8 val)
 205{
 206        outl_p((reg & 0xfc) | cmd640_key, 0xcf8);
 207        outb_p(val, (reg & 3) | 0xcfc);
 208}
 209
 210static u8 get_cmd640_reg_pci1(u16 reg)
 211{
 212        outl_p((reg & 0xfc) | cmd640_key, 0xcf8);
 213        return inb_p((reg & 3) | 0xcfc);
 214}
 215
 216/* PCI method 2 access (from CMD datasheet) */
 217
 218static void put_cmd640_reg_pci2(u16 reg, u8 val)
 219{
 220        outb_p(0x10, 0xcf8);
 221        outb_p(val, cmd640_key + reg);
 222        outb_p(0, 0xcf8);
 223}
 224
 225static u8 get_cmd640_reg_pci2(u16 reg)
 226{
 227        u8 b;
 228
 229        outb_p(0x10, 0xcf8);
 230        b = inb_p(cmd640_key + reg);
 231        outb_p(0, 0xcf8);
 232        return b;
 233}
 234
 235/* VLB access */
 236
 237static void put_cmd640_reg_vlb(u16 reg, u8 val)
 238{
 239        outb_p(reg, cmd640_key);
 240        outb_p(val, cmd640_key + 4);
 241}
 242
 243static u8 get_cmd640_reg_vlb(u16 reg)
 244{
 245        outb_p(reg, cmd640_key);
 246        return inb_p(cmd640_key + 4);
 247}
 248
 249static u8 get_cmd640_reg(u16 reg)
 250{
 251        unsigned long flags;
 252        u8 b;
 253
 254        spin_lock_irqsave(&cmd640_lock, flags);
 255        b = __get_cmd640_reg(reg);
 256        spin_unlock_irqrestore(&cmd640_lock, flags);
 257        return b;
 258}
 259
 260static void put_cmd640_reg(u16 reg, u8 val)
 261{
 262        unsigned long flags;
 263
 264        spin_lock_irqsave(&cmd640_lock, flags);
 265        __put_cmd640_reg(reg, val);
 266        spin_unlock_irqrestore(&cmd640_lock, flags);
 267}
 268
 269static int __init match_pci_cmd640_device(void)
 270{
 271        const u8 ven_dev[4] = {0x95, 0x10, 0x40, 0x06};
 272        unsigned int i;
 273        for (i = 0; i < 4; i++) {
 274                if (get_cmd640_reg(i) != ven_dev[i])
 275                        return 0;
 276        }
 277#ifdef STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT
 278        if ((get_cmd640_reg(PCMD) & PCMD_ENA) == 0) {
 279                printk("ide: cmd640 on PCI disabled by BIOS\n");
 280                return 0;
 281        }
 282#endif /* STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT */
 283        return 1; /* success */
 284}
 285
 286/*
 287 * Probe for CMD640x -- pci method 1
 288 */
 289static int __init probe_for_cmd640_pci1(void)
 290{
 291        __get_cmd640_reg = get_cmd640_reg_pci1;
 292        __put_cmd640_reg = put_cmd640_reg_pci1;
 293        for (cmd640_key = 0x80000000;
 294             cmd640_key <= 0x8000f800;
 295             cmd640_key += 0x800) {
 296                if (match_pci_cmd640_device())
 297                        return 1; /* success */
 298        }
 299        return 0;
 300}
 301
 302/*
 303 * Probe for CMD640x -- pci method 2
 304 */
 305static int __init probe_for_cmd640_pci2(void)
 306{
 307        __get_cmd640_reg = get_cmd640_reg_pci2;
 308        __put_cmd640_reg = put_cmd640_reg_pci2;
 309        for (cmd640_key = 0xc000; cmd640_key <= 0xcf00; cmd640_key += 0x100) {
 310                if (match_pci_cmd640_device())
 311                        return 1; /* success */
 312        }
 313        return 0;
 314}
 315
 316/*
 317 * Probe for CMD640x -- vlb
 318 */
 319static int __init probe_for_cmd640_vlb(void)
 320{
 321        u8 b;
 322
 323        __get_cmd640_reg = get_cmd640_reg_vlb;
 324        __put_cmd640_reg = put_cmd640_reg_vlb;
 325        cmd640_key = 0x178;
 326        b = get_cmd640_reg(CFR);
 327        if (b == 0xff || b == 0x00 || (b & CFR_AT_VESA_078h)) {
 328                cmd640_key = 0x78;
 329                b = get_cmd640_reg(CFR);
 330                if (b == 0xff || b == 0x00 || !(b & CFR_AT_VESA_078h))
 331                        return 0;
 332        }
 333        return 1; /* success */
 334}
 335
 336/*
 337 *  Returns 1 if an IDE interface/drive exists at 0x170,
 338 *  Returns 0 otherwise.
 339 */
 340static int __init secondary_port_responding(void)
 341{
 342        unsigned long flags;
 343
 344        spin_lock_irqsave(&cmd640_lock, flags);
 345
 346        outb_p(0x0a, 0x176);    /* select drive0 */
 347        udelay(100);
 348        if ((inb_p(0x176) & 0x1f) != 0x0a) {
 349                outb_p(0x1a, 0x176); /* select drive1 */
 350                udelay(100);
 351                if ((inb_p(0x176) & 0x1f) != 0x1a) {
 352                        spin_unlock_irqrestore(&cmd640_lock, flags);
 353                        return 0; /* nothing responded */
 354                }
 355        }
 356        spin_unlock_irqrestore(&cmd640_lock, flags);
 357        return 1; /* success */
 358}
 359
 360#ifdef CMD640_DUMP_REGS
 361/*
 362 * Dump out all cmd640 registers.  May be called from ide.c
 363 */
 364static void cmd640_dump_regs(void)
 365{
 366        unsigned int reg = cmd640_vlb ? 0x50 : 0x00;
 367
 368        /* Dump current state of chip registers */
 369        printk("ide: cmd640 internal register dump:");
 370        for (; reg <= 0x59; reg++) {
 371                if (!(reg & 0x0f))
 372                        printk("\n%04x:", reg);
 373                printk(" %02x", get_cmd640_reg(reg));
 374        }
 375        printk("\n");
 376}
 377#endif
 378
 379static void __set_prefetch_mode(ide_drive_t *drive, int mode)
 380{
 381        if (mode) {     /* want prefetch on? */
 382#if CMD640_PREFETCH_MASKS
 383                drive->dev_flags |= IDE_DFLAG_NO_UNMASK;
 384                drive->dev_flags &= ~IDE_DFLAG_UNMASK;
 385#endif
 386                drive->dev_flags &= ~IDE_DFLAG_NO_IO_32BIT;
 387        } else {
 388                drive->dev_flags &= ~IDE_DFLAG_NO_UNMASK;
 389                drive->dev_flags |= IDE_DFLAG_NO_IO_32BIT;
 390                drive->io_32bit = 0;
 391        }
 392}
 393
 394#ifndef CONFIG_BLK_DEV_CMD640_ENHANCED
 395/*
 396 * Check whether prefetch is on for a drive,
 397 * and initialize the unmask flags for safe operation.
 398 */
 399static void __init check_prefetch(ide_drive_t *drive, unsigned int index)
 400{
 401        u8 b = get_cmd640_reg(prefetch_regs[index]);
 402
 403        __set_prefetch_mode(drive, (b & prefetch_masks[index]) ? 0 : 1);
 404}
 405#else
 406
 407/*
 408 * Sets prefetch mode for a drive.
 409 */
 410static void set_prefetch_mode(ide_drive_t *drive, unsigned int index, int mode)
 411{
 412        unsigned long flags;
 413        int reg = prefetch_regs[index];
 414        u8 b;
 415
 416        spin_lock_irqsave(&cmd640_lock, flags);
 417        b = __get_cmd640_reg(reg);
 418        __set_prefetch_mode(drive, mode);
 419        if (mode)
 420                b &= ~prefetch_masks[index];    /* enable prefetch */
 421        else
 422                b |= prefetch_masks[index];     /* disable prefetch */
 423        __put_cmd640_reg(reg, b);
 424        spin_unlock_irqrestore(&cmd640_lock, flags);
 425}
 426
 427/*
 428 * Dump out current drive clocks settings
 429 */
 430static void display_clocks(unsigned int index)
 431{
 432        u8 active_count, recovery_count;
 433
 434        active_count = active_counts[index];
 435        if (active_count == 1)
 436                ++active_count;
 437        recovery_count = recovery_counts[index];
 438        if (active_count > 3 && recovery_count == 1)
 439                ++recovery_count;
 440        if (cmd640_chip_version > 1)
 441                recovery_count += 1;  /* cmd640b uses (count + 1)*/
 442        printk(", clocks=%d/%d/%d\n", setup_counts[index], active_count, recovery_count);
 443}
 444
 445/*
 446 * Pack active and recovery counts into single byte representation
 447 * used by controller
 448 */
 449static inline u8 pack_nibbles(u8 upper, u8 lower)
 450{
 451        return ((upper & 0x0f) << 4) | (lower & 0x0f);
 452}
 453
 454/*
 455 * This routine writes the prepared setup/active/recovery counts
 456 * for a drive into the cmd640 chipset registers to active them.
 457 */
 458static void program_drive_counts(ide_drive_t *drive, unsigned int index)
 459{
 460        unsigned long flags;
 461        u8 setup_count    = setup_counts[index];
 462        u8 active_count   = active_counts[index];
 463        u8 recovery_count = recovery_counts[index];
 464
 465        /*
 466         * Set up address setup count and drive read/write timing registers.
 467         * Primary interface has individual count/timing registers for
 468         * each drive.  Secondary interface has one common set of registers,
 469         * so we merge the timings, using the slowest value for each timing.
 470         */
 471        if (index > 1) {
 472                ide_drive_t *peer = ide_get_pair_dev(drive);
 473                unsigned int mate = index ^ 1;
 474
 475                if (peer) {
 476                        if (setup_count < setup_counts[mate])
 477                                setup_count = setup_counts[mate];
 478                        if (active_count < active_counts[mate])
 479                                active_count = active_counts[mate];
 480                        if (recovery_count < recovery_counts[mate])
 481                                recovery_count = recovery_counts[mate];
 482                }
 483        }
 484
 485        /*
 486         * Convert setup_count to internal chipset representation
 487         */
 488        switch (setup_count) {
 489        case 4:  setup_count = 0x00; break;
 490        case 3:  setup_count = 0x80; break;
 491        case 1:
 492        case 2:  setup_count = 0x40; break;
 493        default: setup_count = 0xc0; /* case 5 */
 494        }
 495
 496        /*
 497         * Now that everything is ready, program the new timings
 498         */
 499        spin_lock_irqsave(&cmd640_lock, flags);
 500        /*
 501         * Program the address_setup clocks into ARTTIM reg,
 502         * and then the active/recovery counts into the DRWTIM reg
 503         * (this converts counts of 16 into counts of zero -- okay).
 504         */
 505        setup_count |= __get_cmd640_reg(arttim_regs[index]) & 0x3f;
 506        __put_cmd640_reg(arttim_regs[index], setup_count);
 507        __put_cmd640_reg(drwtim_regs[index], pack_nibbles(active_count, recovery_count));
 508        spin_unlock_irqrestore(&cmd640_lock, flags);
 509}
 510
 511/*
 512 * Set a specific pio_mode for a drive
 513 */
 514static void cmd640_set_mode(ide_drive_t *drive, unsigned int index,
 515                            u8 pio_mode, unsigned int cycle_time)
 516{
 517        struct ide_timing *t;
 518        int setup_time, active_time, recovery_time, clock_time;
 519        u8 setup_count, active_count, recovery_count, recovery_count2, cycle_count;
 520        int bus_speed;
 521
 522        if (cmd640_vlb)
 523                bus_speed = ide_vlb_clk ? ide_vlb_clk : 50;
 524        else
 525                bus_speed = ide_pci_clk ? ide_pci_clk : 33;
 526
 527        if (pio_mode > 5)
 528                pio_mode = 5;
 529
 530        t = ide_timing_find_mode(XFER_PIO_0 + pio_mode);
 531        setup_time  = t->setup;
 532        active_time = t->active;
 533
 534        recovery_time = cycle_time - (setup_time + active_time);
 535        clock_time = 1000 / bus_speed;
 536        cycle_count = DIV_ROUND_UP(cycle_time, clock_time);
 537
 538        setup_count = DIV_ROUND_UP(setup_time, clock_time);
 539
 540        active_count = DIV_ROUND_UP(active_time, clock_time);
 541        if (active_count < 2)
 542                active_count = 2; /* minimum allowed by cmd640 */
 543
 544        recovery_count = DIV_ROUND_UP(recovery_time, clock_time);
 545        recovery_count2 = cycle_count - (setup_count + active_count);
 546        if (recovery_count2 > recovery_count)
 547                recovery_count = recovery_count2;
 548        if (recovery_count < 2)
 549                recovery_count = 2; /* minimum allowed by cmd640 */
 550        if (recovery_count > 17) {
 551                active_count += recovery_count - 17;
 552                recovery_count = 17;
 553        }
 554        if (active_count > 16)
 555                active_count = 16; /* maximum allowed by cmd640 */
 556        if (cmd640_chip_version > 1)
 557                recovery_count -= 1;  /* cmd640b uses (count + 1)*/
 558        if (recovery_count > 16)
 559                recovery_count = 16; /* maximum allowed by cmd640 */
 560
 561        setup_counts[index]    = setup_count;
 562        active_counts[index]   = active_count;
 563        recovery_counts[index] = recovery_count;
 564
 565        /*
 566         * In a perfect world, we might set the drive pio mode here
 567         * (using WIN_SETFEATURE) before continuing.
 568         *
 569         * But we do not, because:
 570         *      1) this is the wrong place to do it (proper is do_special() in ide.c)
 571         *      2) in practice this is rarely, if ever, necessary
 572         */
 573        program_drive_counts(drive, index);
 574}
 575
 576static void cmd640_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
 577{
 578        unsigned int index = 0, cycle_time;
 579        const u8 pio = drive->pio_mode - XFER_PIO_0;
 580        u8 b;
 581
 582        switch (pio) {
 583        case 6: /* set fast-devsel off */
 584        case 7: /* set fast-devsel on */
 585                b = get_cmd640_reg(CNTRL) & ~0x27;
 586                if (pio & 1)
 587                        b |= 0x27;
 588                put_cmd640_reg(CNTRL, b);
 589                printk("%s: %sabled cmd640 fast host timing (devsel)\n",
 590                        drive->name, (pio & 1) ? "en" : "dis");
 591                return;
 592        case 8: /* set prefetch off */
 593        case 9: /* set prefetch on */
 594                set_prefetch_mode(drive, index, pio & 1);
 595                printk("%s: %sabled cmd640 prefetch\n",
 596                        drive->name, (pio & 1) ? "en" : "dis");
 597                return;
 598        }
 599
 600        cycle_time = ide_pio_cycle_time(drive, pio);
 601        cmd640_set_mode(drive, index, pio, cycle_time);
 602
 603        printk("%s: selected cmd640 PIO mode%d (%dns)",
 604                drive->name, pio, cycle_time);
 605
 606        display_clocks(index);
 607}
 608#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
 609
 610static void __init cmd640_init_dev(ide_drive_t *drive)
 611{
 612        unsigned int i = drive->hwif->channel * 2 + (drive->dn & 1);
 613
 614#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
 615        /*
 616         * Reset timing to the slowest speed and turn off prefetch.
 617         * This way, the drive identify code has a better chance.
 618         */
 619        setup_counts[i]    =  4;        /* max possible */
 620        active_counts[i]   = 16;        /* max possible */
 621        recovery_counts[i] = 16;        /* max possible */
 622        program_drive_counts(drive, i);
 623        set_prefetch_mode(drive, i, 0);
 624        printk(KERN_INFO DRV_NAME ": drive%d timings/prefetch cleared\n", i);
 625#else
 626        /*
 627         * Set the drive unmask flags to match the prefetch setting.
 628         */
 629        check_prefetch(drive, i);
 630        printk(KERN_INFO DRV_NAME ": drive%d timings/prefetch(%s) preserved\n",
 631                i, (drive->dev_flags & IDE_DFLAG_NO_IO_32BIT) ? "off" : "on");
 632#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
 633}
 634
 635static int cmd640_test_irq(ide_hwif_t *hwif)
 636{
 637        int irq_reg             = hwif->channel ? ARTTIM23 : CFR;
 638        u8  irq_mask            = hwif->channel ? ARTTIM23_IDE23INTR :
 639                                                  CFR_IDE01INTR;
 640        u8  irq_stat            = get_cmd640_reg(irq_reg);
 641
 642        return (irq_stat & irq_mask) ? 1 : 0;
 643}
 644
 645static const struct ide_port_ops cmd640_port_ops = {
 646        .init_dev               = cmd640_init_dev,
 647#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
 648        .set_pio_mode           = cmd640_set_pio_mode,
 649#endif
 650        .test_irq               = cmd640_test_irq,
 651};
 652
 653static int pci_conf1(void)
 654{
 655        unsigned long flags;
 656        u32 tmp;
 657
 658        spin_lock_irqsave(&cmd640_lock, flags);
 659        outb(0x01, 0xCFB);
 660        tmp = inl(0xCF8);
 661        outl(0x80000000, 0xCF8);
 662        if (inl(0xCF8) == 0x80000000) {
 663                outl(tmp, 0xCF8);
 664                spin_unlock_irqrestore(&cmd640_lock, flags);
 665                return 1;
 666        }
 667        outl(tmp, 0xCF8);
 668        spin_unlock_irqrestore(&cmd640_lock, flags);
 669        return 0;
 670}
 671
 672static int pci_conf2(void)
 673{
 674        unsigned long flags;
 675
 676        spin_lock_irqsave(&cmd640_lock, flags);
 677        outb(0x00, 0xCFB);
 678        outb(0x00, 0xCF8);
 679        outb(0x00, 0xCFA);
 680        if (inb(0xCF8) == 0x00 && inb(0xCF8) == 0x00) {
 681                spin_unlock_irqrestore(&cmd640_lock, flags);
 682                return 1;
 683        }
 684        spin_unlock_irqrestore(&cmd640_lock, flags);
 685        return 0;
 686}
 687
 688static const struct ide_port_info cmd640_port_info __initdata = {
 689        .chipset                = ide_cmd640,
 690        .host_flags             = IDE_HFLAG_SERIALIZE |
 691                                  IDE_HFLAG_NO_DMA |
 692                                  IDE_HFLAG_ABUSE_PREFETCH |
 693                                  IDE_HFLAG_ABUSE_FAST_DEVSEL,
 694        .port_ops               = &cmd640_port_ops,
 695        .pio_mask               = ATA_PIO5,
 696};
 697
 698static int cmd640x_init_one(unsigned long base, unsigned long ctl)
 699{
 700        if (!request_region(base, 8, DRV_NAME)) {
 701                printk(KERN_ERR "%s: I/O resource 0x%lX-0x%lX not free.\n",
 702                                DRV_NAME, base, base + 7);
 703                return -EBUSY;
 704        }
 705
 706        if (!request_region(ctl, 1, DRV_NAME)) {
 707                printk(KERN_ERR "%s: I/O resource 0x%lX not free.\n",
 708                                DRV_NAME, ctl);
 709                release_region(base, 8);
 710                return -EBUSY;
 711        }
 712
 713        return 0;
 714}
 715
 716/*
 717 * Probe for a cmd640 chipset, and initialize it if found.
 718 */
 719static int __init cmd640x_init(void)
 720{
 721        int second_port_cmd640 = 0, rc;
 722        const char *bus_type, *port2;
 723        u8 b, cfr;
 724        struct ide_hw hw[2], *hws[2];
 725
 726        if (cmd640_vlb && probe_for_cmd640_vlb()) {
 727                bus_type = "VLB";
 728        } else {
 729                cmd640_vlb = 0;
 730                /* Find out what kind of PCI probing is supported otherwise
 731                   Justin Gibbs will sulk.. */
 732                if (pci_conf1() && probe_for_cmd640_pci1())
 733                        bus_type = "PCI (type1)";
 734                else if (pci_conf2() && probe_for_cmd640_pci2())
 735                        bus_type = "PCI (type2)";
 736                else
 737                        return 0;
 738        }
 739        /*
 740         * Undocumented magic (there is no 0x5b reg in specs)
 741         */
 742        put_cmd640_reg(0x5b, 0xbd);
 743        if (get_cmd640_reg(0x5b) != 0xbd) {
 744                printk(KERN_ERR "ide: cmd640 init failed: wrong value in reg 0x5b\n");
 745                return 0;
 746        }
 747        put_cmd640_reg(0x5b, 0);
 748
 749#ifdef CMD640_DUMP_REGS
 750        cmd640_dump_regs();
 751#endif
 752
 753        /*
 754         * Documented magic begins here
 755         */
 756        cfr = get_cmd640_reg(CFR);
 757        cmd640_chip_version = cfr & CFR_DEVREV;
 758        if (cmd640_chip_version == 0) {
 759                printk("ide: bad cmd640 revision: %d\n", cmd640_chip_version);
 760                return 0;
 761        }
 762
 763        rc = cmd640x_init_one(0x1f0, 0x3f6);
 764        if (rc)
 765                return rc;
 766
 767        rc = cmd640x_init_one(0x170, 0x376);
 768        if (rc) {
 769                release_region(0x3f6, 1);
 770                release_region(0x1f0, 8);
 771                return rc;
 772        }
 773
 774        memset(&hw, 0, sizeof(hw));
 775
 776        ide_std_init_ports(&hw[0], 0x1f0, 0x3f6);
 777        hw[0].irq = 14;
 778
 779        ide_std_init_ports(&hw[1], 0x170, 0x376);
 780        hw[1].irq = 15;
 781
 782        printk(KERN_INFO "cmd640: buggy cmd640%c interface on %s, config=0x%02x"
 783                         "\n", 'a' + cmd640_chip_version - 1, bus_type, cfr);
 784
 785        /*
 786         * Initialize data for primary port
 787         */
 788        hws[0] = &hw[0];
 789
 790        /*
 791         * Ensure compatibility by always using the slowest timings
 792         * for access to the drive's command register block,
 793         * and reset the prefetch burstsize to default (512 bytes).
 794         *
 795         * Maybe we need a way to NOT do these on *some* systems?
 796         */
 797        put_cmd640_reg(CMDTIM, 0);
 798        put_cmd640_reg(BRST, 0x40);
 799
 800        b = get_cmd640_reg(CNTRL);
 801
 802        /*
 803         * Try to enable the secondary interface, if not already enabled
 804         */
 805        if (secondary_port_responding()) {
 806                if ((b & CNTRL_ENA_2ND)) {
 807                        second_port_cmd640 = 1;
 808                        port2 = "okay";
 809                } else if (cmd640_vlb) {
 810                        second_port_cmd640 = 1;
 811                        port2 = "alive";
 812                } else
 813                        port2 = "not cmd640";
 814        } else {
 815                put_cmd640_reg(CNTRL, b ^ CNTRL_ENA_2ND); /* toggle the bit */
 816                if (secondary_port_responding()) {
 817                        second_port_cmd640 = 1;
 818                        port2 = "enabled";
 819                } else {
 820                        put_cmd640_reg(CNTRL, b); /* restore original setting */
 821                        port2 = "not responding";
 822                }
 823        }
 824
 825        /*
 826         * Initialize data for secondary cmd640 port, if enabled
 827         */
 828        if (second_port_cmd640)
 829                hws[1] = &hw[1];
 830
 831        printk(KERN_INFO "cmd640: %sserialized, secondary interface %s\n",
 832                         second_port_cmd640 ? "" : "not ", port2);
 833
 834#ifdef CMD640_DUMP_REGS
 835        cmd640_dump_regs();
 836#endif
 837
 838        return ide_host_add(&cmd640_port_info, hws, second_port_cmd640 ? 2 : 1,
 839                            NULL);
 840}
 841
 842module_param_named(probe_vlb, cmd640_vlb, bool, 0);
 843MODULE_PARM_DESC(probe_vlb, "probe for VLB version of CMD640 chipset");
 844
 845module_init(cmd640x_init);
 846
 847MODULE_LICENSE("GPL");
 848
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