linux/drivers/bcma/sprom.c
<<
on> 0" /spa3.1 0" /form.1 0" a on> 0" href="../linux+v3opt2/drivers/bcma/sprom.c">on> 0" img src="../.static/gfx/right.png" alt=">>">on /spa3.1on spa3 class="lxr_search">on> on> 0" input typ13on> 0" input typ13on> 0" butt v3typ13Search 0" onclick="return ajax_prefs();">on> 0"Prefs1 0" /a>on /spa3.1> 0" " /div.1> 0" " form ac="v3="ajax+*" method="post" onsubmit="return false;">on input typ13o> 0" " /form.1o> 0" " div class="headingbott m"> 0" 0" 0" " div id3 0" " /div.1 div id31 div id3" "1 /a> spa3 class="comment">/* /spa3.1" "2 /a> spa3 class="comment"> * Broadcom specific AMBA /spa3.1" "3 /a> spa3 class="comment"> * SPROM reading /spa3.1" "4 /a> spa3 class="comment"> * /spa3.1" "5 /a> spa3 class="comment"> * Copyright 2011, 2012, Hauke Mehrtens <hauke@hauke-m.de> /spa3.1" "6 /a> spa3 class="comment"> * /spa3.1" "7 /a> spa3 class="comment"> * Licensed under the GNU/GPL. See COPYING for details. /spa3.1" "8 /a> spa3 class="comment"> */ /spa3.1" "9 /a>o" vlua>#include " a href="drivers/bcma/bcma_private.h" class="fref">bcma_private.hlua>"o" 11 /a>o" 12lua>#include < a href="include/linux/bcma/bcma.h" class="fref">linux/bcma/bcma.hlua>>o" 13lua>#include < a href="include/linux/bcma/bcma_regs.h" class="fref">linux/bcma/bcma_regs.hlua>>o" 14lua>#include < a href="include/linux/pci.h" class="fref">linux/pci.hlua>>o" 15lua>#include < a href="include/linux/io.h" class="fref">linux/io.hlua>>o" 16lua>#include < a href="include/linux/dma-mapping.h" class="fref">linux/dma-mapping.hlua>>o" 17lua>#include < a href="include/linux/slab.h" class="fref">linux/slab.hlua>>o" 18 /a>o" 19 /a>static int(* a href="+code=get_fallback_sprom" class="sref">get_fallback_sprom /a>)(struct a href="+code=bcma_bus" class="sref">bcma_bus /a> * a href="+code=dev" class="sref">dev /a>, struct a href="+code=ssb_sprom" class="sref">ssb_sprom /a> * a href="+code=out" class="sref">out /a>);o" 20 /a>o" 21 /a> spa3 class="comment">/** /spa3.1" 22 /a> spa3 class="comment"> * bcma_arch_register_fallback_sprom - Registers a method providing a /spa3.1" 23 /a> spa3 class="comment"> * fallback SPROM if no SPROM is found. /spa3.1" 24 /a> spa3 class="comment"> * /spa3.1" 25 /a> spa3 class="comment"> * @sprom_callback: The callback func="v3. /spa3.1" 26 /a> spa3 class="comment"> * /spa3.1" 27 /a> spa3 class="comment"> * With this func="v3 the architecture implementa="v3 may register a /spa3.1" 28 /a> spa3 class="comment"> * callback handler which fills the SPROM data structure. The fallback is /spa3.1" 29 /a> spa3 class="comment"> * used for PCI based BCMA devices, where no valid SPROM ca3 be found /spa3.1" 30 /a> spa3 class="comment"> * i3 the shadow registers and to provide the SPROM for SoCs where BCMA is /spa3.1" 31 /a> spa3 class="comment"> * to controll the system bus. /spa3.1" 32 /a> spa3 class="comment"> * /spa3.1" 33 /a> spa3 class="comment"> * This func="v3 is useful for weird architectures that have a half-assed /spa3.1" 34 /a> spa3 class="comment"> * BCMA device hardwired to their PCI bus. /spa3.1" 35 /a> spa3 class="comment"> * /spa3.1" 36 /a> spa3 class="comment"> * This func="v3 is available for architecture code, only. So it is not /spa3.1" 37 /a> spa3 class="comment"> * exported. /spa3.1" 38 /a> spa3 class="comment"> */ /spa3.1" 39 /a>int a href="+code=bcma_arch_register_fallback_sprom" class="sref">bcma_arch_register_fallback_sprom /a>(int (* a href="+code=sprom_callback" class="sref">sprom_callback /a>)(struct a href="+code=bcma_bus" class="sref">bcma_bus /a> * a href="+code=bus" class="sref">bus /a>,1" 40 /a> struct a href="+code=ssb_sprom" class="sref">ssb_sprom /a> * a href="+code=out" class="sref">out /a>))1" 41 /a>{1" 42 /a> if ( a href="+code=get_fallback_sprom" class="sref">get_fallback_sprom /a>)1" 43 /a> return - a href="+code=EEXIST" class="sref">EEXIST /a>;o" 44 /a> a href="+code=get_fallback_sprom" class="sref">get_fallback_sprom /a> = a href="+code=sprom_callback" class="sref">sprom_callback /a>;o" 45 /a>o" 46 /a> return 0;o" 47 /a>}o" 48 /a>o" 49 /a>static int a href="+code=bcma_fill_sprom_with_fallback" class="sref">bcma_fill_sprom_with_fallback /a>(struct a href="+code=bcma_bus" class="sref">bcma_bus /a> * a href="+code=bus" class="sref">bus /a>,1" 50 /a> struct a href="+code=ssb_sprom" class="sref">ssb_sprom /a> * a href="+code=out" class="sref">out /a>)1" 51 /a>{1" 52 /a> int a href="+code=err" class="sref">err /a>;o" 53 /a>o" 54 /a> if (! a href="+code=get_fallback_sprom" class="sref">get_fallback_sprom /a>) {1" 55 /a> a href="+code=err" class="sref">err /a> = - a href="+code=ENOENT" class="sref">ENOENT /a>;o" 56 /a> goto a href="+code=fail" class="sref">fail /a>;o" 57 /a> }o" 58 /a>o" 59 /a> a href="+code=err" class="sref">err /a> = a href="+code=get_fallback_sprom" class="sref">get_fallback_sprom /a>( a href="+code=bus" class="sref">bus /a>, a href="+code=out" class="sref">out /a>);o" 60 /a> if ( a href="+code=err" class="sref">err /a>)1" 61 /a> goto a href="+code=fail" class="sref">fail /a>;o" 62 /a>o" 63 /a> a href="+code=bcma_debug" class="sref">bcma_debug /a>( a href="+code=bus" class="sref">bus /a>, spa3 class="string">"Using SPROM revis"v3 %d provided by platform.\n" /spa3.,1" 64 /a> a href="+code=bus" class="sref">bus /a>-> a href="+code=sprom" class="sref">sprom /a>. a href="+code=revis"v3" class="sref">revis"v3 /a>);o" 65 /a> return 0;o" 66 /a> a href="+code=fail" class="sref">fail /a>:o" 67 /a> a href="+code=bcma_war3" class="sref">bcma_war3 /a>( a href="+code=bus" class="sref">bus /a>, spa3 class="string">"Using fallback SPROM failed (err %d)\n" /spa3., a href="+code=err" class="sref">err /a>);o" 68 /a> return a href="+code=err" class="sref">err /a>;o" 69 /a>}o" 70 /a>o" 71 /a> spa3 class="comment">/************************************************** /spa3.1" 72 /a> spa3 class="comment"> * R/W ops. /spa3.1" 73 /a> spa3 class="comment"> **************************************************/ /spa3.1" 74 /a>o" 75 /a>static void a href="+code=bcma_sprom_read" class="sref">bcma_sprom_read /a>(struct a href="+code=bcma_bus" class="sref">bcma_bus /a> * a href="+code=bus" class="sref">bus /a>, a href="+code=u16" class="sref">u16lua> a href="+code=offset" class="sref">offset /a>, a href="+code=u16" class="sref">u16lua> * a href="+code=sprom" class="sref">sprom /a>)1" 76 /a>{1" 77 /a> int a href="+code=i" class="sref">i /a>;o" 78 /a> for ( a href="+code=i" class="sref">i /a> = 0; a href="+code=i" class="sref">i /a> < a href="+code=SSB_SPROMSIZE_WORDS_R4" class="sref">SSB_SPROMSIZE_WORDS_R4 /a>; a href="+code=i" class="sref">i /a>++)1" 79 /a> a href="+code=sprom" class="sref">sprom /a>[ a href="+code=i" class="sref">i /a>] = a href="+code=bcma_read16" class="sref">bcma_read16 /a>( a href="+code=bus" class="sref">bus /a>-> a href="+code=drv_cc" class="sref">drv_cc /a>. a href="+code=core" class="sref">core /a>,1" 80 /a> a href="+code=offset" class="sref">offset /a> + ( a href="+code=i" class="sref">i /a> * 2));o" 81 /a>}o" 82 /a>o" 83 /a> spa3 class="comment">/************************************************** /spa3.1" 84 /a> spa3 class="comment"> * Valida="v3. /spa3.1" 85 /a> spa3 class="comment"> **************************************************/ /spa3.1" 86 /a>o" 87 /a>static a href="+code=inline" class="sref">inlinelua> a href="+code=u8" class="sref">u8lua> a href="+code=bcma_crc8" class="sref">bcma_crc8 /a>( a href="+code=u8" class="sref">u8lua> a href="+code=crc" class="sref">crc /a>, a href="+code=u8" class="sref">u8lua> a href="+code=data" class="sref">data /a>)1" 88 /a>{1" 89 /a> spa3 class="comment">/* Polynomial: x^8 + x^7 + x^6 + x^4 + x^2 + 1 */ /spa3.1" 90 /a> static const a href="+code=u8" class="sref">u8lua> a href="+code=t" class="sref">t /a>[] = {1" 91 /a> 0x00, 0xF7, 0xB9, 0x4E, 0x25, 0xD2, 0x9C, 0x6B,1" 92 /a> 0x4A, 0xBD, 0xF3, 0x04, 0x6F, 0x98, 0xD6, 0x21,1" 93 /a> 0x94, 0x63, 0x2D, 0xDA, 0xB1, 0x46, 0x08, 0xFF,1" 94 /a> 0xDE, 0x29, 0x67, 0x90, 0xFB, 0x0C, 0x42, 0xB5,1" 95 /a> 0x7F, 0x88, 0xC6, 0x31, 0x5A, 0xAD, 0xE3, 0x14,1" 96 /a> 0x35, 0xC2, 0x8C, 0x7B, 0x10, 0xE7, 0xA9, 0x5E,1" 97 /a> 0xEB, 0x1C, 0x52, 0xA5, 0xCE, 0x39, 0x77, 0x80,1" 98 /a> 0xA1, 0x56, 0x18, 0xEF, 0x84, 0x73, 0x3D, 0xCA,1" 99 /a> 0xFE, 0x09, 0x47, 0xB0, 0xDB, 0x2C, 0x62, 0x95,1"100 /a> 0xB4, 0x43, 0x0D, 0xFA, 0x91, 0x66, 0x28, 0xDF,1"101 /a> 0x6A, 0x9D, 0xD3, 0x24, 0x4F, 0xB8, 0xF6, 0x01,1"102 /a> 0x20, 0xD7, 0x99, 0x6E, 0x05, 0xF2, 0xBC, 0x4B,1"103 /a> 0x81, 0x76, 0x38, 0xCF, 0xA4, 0x53, 0x1D, 0xEA,1"104 /a> 0xCB, 0x3C, 0x72, 0x85, 0xEE, 0x19, 0x57, 0xA0,1"105 /a> 0x15, 0xE2, 0xAC, 0x5B, 0x30, 0xC7, 0x89, 0x7E,1"106 /a> 0x5F, 0xA8, 0xE6, 0x11, 0x7A, 0x8D, 0xC3, 0x34,1"107 /a> 0xAB, 0x5C, 0x12, 0xE5, 0x8E, 0x79, 0x37, 0xC0,1"108 /a> 0xE1, 0x16, 0x58, 0xAF, 0xC4, 0x33, 0x7D, 0x8A,1"109 /a> 0x3F, 0xC8, 0x86, 0x71, 0x1A, 0xED, 0xA3, 0x54,1"110 /a> 0x75, 0x82, 0xCC, 0x3B, 0x50, 0xA7, 0xE9, 0x1E,1"111 /a> 0xD4, 0x23, 0x6D, 0x9A, 0xF1, 0x06, 0x48, 0xBF,1"112 /a> 0x9E, 0x69, 0x27, 0xD0, 0xBB, 0x4C, 0x02, 0xF5,1"113 /a> 0x40, 0xB7, 0xF9, 0x0E, 0x65, 0x92, 0xDC, 0x2B,1"114 /a> 0x0A, 0xFD, 0xB3, 0x44, 0x2F, 0xD8, 0x96, 0x61,1"115 /a> 0x55, 0xA2, 0xEC, 0x1B, 0x70, 0x87, 0xC9, 0x3E,1"116 /a> 0x1F, 0xE8, 0xA6, 0x51, 0x3A, 0xCD, 0x83, 0x74,1"117 /a> 0xC1, 0x36, 0x78, 0x8F, 0xE4, 0x13, 0x5D, 0xAA,1"118 /a> 0x8B, 0x7C, 0x32, 0xC5, 0xAE, 0x59, 0x17, 0xE0,1"119 /a> 0x2A, 0xDD, 0x93, 0x64, 0x0F, 0xF8, 0xB6, 0x41,1"120 /a> 0x60, 0x97, 0xD9, 0x2E, 0x45, 0xB2, 0xFC, 0x0B,1"121 /a> 0xBE, 0x49, 0x07, 0xF0, 0x9B, 0x6C, 0x22, 0xD5,1"122 /a> 0xF4, 0x03, 0x4D, 0xBA, 0xD1, 0x26, 0x68, 0x9F,1"123 /a> };o"124 /a> return a href="+code=t" class="sref">t /a>[ a href="+code=crc" class="sref">crc /a> ^ a href="+code=data" class="sref">data /a>];o"125 /a>}o"126 /a>o"127 /a>static a href="+code=u8" class="sref">u8lua> a href="+code=bcma_sprom_crc" class="sref">bcma_sprom_crc /a>(const a href="+code=u16" class="sref">u16lua> * a href="+code=sprom" class="sref">sprom /a>)1"128 /a>{1"129 /a> int a href="+code=word" class="sref">word /a>;o"130 /a> a href="+code=u8" class="sref">u8lua> a href="+code=crc" class="sref">crc /a> = 0xFF;o"131 /a>o"132 /a> for ( a href="+code=word" class="sref">word /a> = 0; a href="+code=word" class="sref">word /a> < a href="+code=SSB_SPROMSIZE_WORDS_R4" class="sref">SSB_SPROMSIZE_WORDS_R4 /a> - 1; a href="+code=word" class="sref">word /a>++) {1"133 /a> a href="+code=crc" class="sref">crc /a> = a href="+code=bcma_crc8" class="sref">bcma_crc8 /a>( a href="+code=crc" class="sref">crc /a>, a href="+code=sprom" class="sref">sprom /a>[ a href="+code=word" class="sref">word /a>] & 0x00FF);o"134 /a> a href="+code=crc" class="sref">crc /a> = a href="+code=bcma_crc8" class="sref">bcma_crc8 /a>( a href="+code=crc" class="sref">crc /a>, ( a href="+code=sprom" class="sref">sprom /a>[ a href="+code=word" class="sref">word /a>] & 0xFF00) >> 8);o"135 /a> }o"136 /a> a href="+code=crc" class="sref">crc /a> = a href="+code=bcma_crc8" class="sref">bcma_crc8 /a>( a href="+code=crc" class="sref">crc /a>, a href="+code=sprom" class="sref">sprom /a>[ a href="+code=SSB_SPROMSIZE_WORDS_R4" class="sref">SSB_SPROMSIZE_WORDS_R4 /a> - 1] & 0x00FF);o"137 /a> a href="+code=crc" class="sref">crc /a> ^= 0xFF;o"138 /a>o"139 /a> return a href="+code=crc" class="sref">crc /a>;o"140 /a>}o"141 /a>o"142 /a>static int a href="+code=bcma_sprom_check_crc" class="sref">bcma_sprom_check_crc /a>(const a href="+code=u16" class="sref">u16lua> * a href="+code=sprom" class="sref">sprom /a>)1"143 /a>{1"144 /a> a href="+code=u8" class="sref">u8lua> a href="+code=crc" class="sref">crc /a>;o"145 /a> a href="+code=u8" class="sref">u8lua> a href="+code=expected_crc" class="sref">expected_crc /a>;o"146 /a> a href="+code=u16" class="sref">u16lua> a href="+code=tmp" class="sref">tmp /a>;o"147 /a>o"148 /a> a href="+code=crc" class="sref">crc /a> = a href="+code=bcma_sprom_crc" class="sref">bcma_sprom_crc /a>( a href="+code=sprom" class="sref">sprom /a>);o"149 /a> a href="+code=tmp" class="sref">tmp /a> = a href="+code=sprom" class="sref">sprom /a>[ a href="+code=SSB_SPROMSIZE_WORDS_R4" class="sref">SSB_SPROMSIZE_WORDS_R4 /a> - 1] & a href="+code=SSB_SPROM_REVISION_CRC" class="sref">SSB_SPROM_REVISION_CRC /a>;o"150 /a> a href="+code=expected_crc" class="sref">expected_crc /a> = a href="+code=tmp" class="sref">tmp /a> >> a href="+code=SSB_SPROM_REVISION_CRC_SHIFT" class="sref">SSB_SPROM_REVISION_CRC_SHIFT /a>;o"151 /a> if ( a href="+code=crc" class="sref">crc /a> != a href="+code=expected_crc" class="sref">expected_crc /a>)1"152 /a> return - a href="+code=EPROTO" class="sref">EPROTO /a>;o"153 /a>o"154 /a> return 0;o"155 /a>}o"156 /a>o"157 /a>static int a href="+code=bcma_sprom_valid" class="sref">bcma_sprom_valid /a>(const a href="+code=u16" class="sref">u16lua> * a href="+code=sprom" class="sref">sprom /a>)1"158 /a>{1"159 /a> a href="+code=u16" class="sref">u16lua> a href="+code=revis"v3" class="sref">revis"v3 /a>;o"160 /a> int a href="+code=err" class="sref">err /a>;o"161 /a>o"162 /a> a href="+code=err" class="sref">err /a> = a href="+code=bcma_sprom_check_crc" class="sref">bcma_sprom_check_crc /a>( a href="+code=sprom" class="sref">sprom /a>);o"163 /a> if ( a href="+code=err" class="sref">err /a>)1"164 /a> return a href="+code=err" class="sref">err /a>;o"165 /a>o"166 /a> a href="+code=revis"v3" class="sref">revis"v3 /a> = a href="+code=sprom" class="sref">sprom /a>[ a href="+code=SSB_SPROMSIZE_WORDS_R4" class="sref">SSB_SPROMSIZE_WORDS_R4 /a> - 1] & a href="+code=SSB_SPROM_REVISION_REV" class="sref">SSB_SPROM_REVISION_REV /a>;o"167 /a> if ( a href="+code=revis"v3" class="sref">revis"v3 /a> != 8 && a href="+code=revis"v3" class="sref">revis"v3 /a> != 9) {1"168 /a> a href="+code=pr_err" class="sref">pr_err /a>( spa3 class="string">"Unsupported SPROM revis"v3: %d\n" /spa3., a href="+code=revis"v3" class="sref">revis"v3 /a>);o"169 /a> return - a href="+code=ENOENT" class="sref">ENOENT /a>;o"170 /a> }o"171 /a>o"172 /a> return 0;o"173 /a>}o"174 /a>o"175 /a> spa3 class="comment">/************************************************** /spa3.1"176 /a> spa3 class="comment"> * SPROM extrac="v3. /spa3.1"177 /a> spa3 class="comment"> **************************************************/ /spa3.1"178 /a>o"179 /a>#define a href="+code=SPOFF" class="sref">SPOFF /a>( a href="+code=offset" class="sref">offset /a>) (( a href="+code=offset" class="sref">offset /a>) / sizeof( a href="+code=u16" class="sref">u16lua>))1"180 /a>o"181 /a>#define a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=_field" class="sref">_field /a>, a href="+code=_offset" class="sref">_offset /a>, a href="+code=_mask" class="sref">_mask /a>, a href="+code=_shift" class="sref">_shift /a>) \o"182 /a> a href="+code=bus" class="sref">bus /a>-> a href="+code=sprom" class="sref">sprom /a>. a href="+code=_field" class="sref">_field /a> = (( a href="+code=sprom" class="sref">sprom /a>[ a href="+code=SPOFF" class="sref">SPOFF /a>( a href="+code=_offset" class="sref">_offset /a>)] & ( a href="+code=_mask" class="sref">_mask /a>)) >> ( a href="+code=_shift" class="sref">_shift /a>))1"183 /a>o"184 /a>#define a href="+code=SPEX32" class="sref">SPEX32 /a>( a href="+code=_field" class="sref">_field /a>, a href="+code=_offset" class="sref">_offset /a>, a href="+code=_mask" class="sref">_mask /a>, a href="+code=_shift" class="sref">_shift /a>) \o"185 /a> a href="+code=bus" class="sref">bus /a>-> a href="+code=sprom" class="sref">sprom /a>. a href="+code=_field" class="sref">_field /a> = (((( a href="+code=u32" class="sref">u32 /a>) a href="+code=sprom" class="sref">sprom /a>[ a href="+code=SPOFF" class="sref">SPOFF /a>(( a href="+code=_offset" class="sref">_offset /a>)+2)] << 16 | \o"186 /a> a href="+code=sprom" class="sref">sprom /a>[ a href="+code=SPOFF" class="sref">SPOFF /a>( a href="+code=_offset" class="sref">_offset /a>)]) & ( a href="+code=_mask" class="sref">_mask /a>)) >> ( a href="+code=_shift" class="sref">_shift /a>))1"187 /a>o"188 /a>#define a href="+code=SPEX_ARRAY8" class="sref">SPEX_ARRAY8 /a>( a href="+code=_field" class="sref">_field /a>, a href="+code=_offset" class="sref">_offset /a>, a href="+code=_mask" class="sref">_mask /a>, a href="+code=_shift" class="sref">_shift /a>) \o"189 /a> do { \o"190 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=_field" class="sref">_field /a>[0], a href="+code=_offset" class="sref">_offset /a> + 0, a href="+code=_mask" class="sref">_mask /a>, a href="+code=_shift" class="sref">_shift /a>); \o"191 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=_field" class="sref">_field /a>[1], a href="+code=_offset" class="sref">_offset /a> + 2, a href="+code=_mask" class="sref">_mask /a>, a href="+code=_shift" class="sref">_shift /a>); \o"192 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=_field" class="sref">_field /a>[2], a href="+code=_offset" class="sref">_offset /a> + 4, a href="+code=_mask" class="sref">_mask /a>, a href="+code=_shift" class="sref">_shift /a>); \o"193 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=_field" class="sref">_field /a>[3], a href="+code=_offset" class="sref">_offset /a> + 6, a href="+code=_mask" class="sref">_mask /a>, a href="+code=_shift" class="sref">_shift /a>); \o"194 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=_field" class="sref">_field /a>[4], a href="+code=_offset" class="sref">_offset /a> + 8, a href="+code=_mask" class="sref">_mask /a>, a href="+code=_shift" class="sref">_shift /a>); \o"195 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=_field" class="sref">_field /a>[5], a href="+code=_offset" class="sref">_offset /a> + 10, a href="+code=_mask" class="sref">_mask /a>, a href="+code=_shift" class="sref">_shift /a>); \o"196 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=_field" class="sref">_field /a>[6], a href="+code=_offset" class="sref">_offset /a> + 12, a href="+code=_mask" class="sref">_mask /a>, a href="+code=_shift" class="sref">_shift /a>); \o"197 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=_field" class="sref">_field /a>[7], a href="+code=_offset" class="sref">_offset /a> + 14, a href="+code=_mask" class="sref">_mask /a>, a href="+code=_shift" class="sref">_shift /a>); \o"198 /a> } while (0)1"199 /a>o"200 /a>static void a href="+code=bcma_sprom_extrac=_r8" class="sref">bcma_sprom_extrac=_r8 /a>(struct a href="+code=bcma_bus" class="sref">bcma_bus /a> * a href="+code=bus" class="sref">bus /a>, const a href="+code=u16" class="sref">u16lua> * a href="+code=sprom" class="sref">sprom /a>)1"201 /a>{1"202 /a> a href="+code=u16" class="sref">u16lua> a href="+code=v" class="sref">v /a>, a href="+code=o" class="sref">o /a>;o"203 /a> int a href="+code=i" class="sref">i /a>;o"204 /a> a href="+code=u16" class="sref">u16lua> a href="+code=pwr_info_offset" class="sref">pwr_info_offset /a>[] = {1"205 /a> a href="+code=SSB_SROM8_PWR_INFO_CORE0" class="sref">SSB_SROM8_PWR_INFO_CORE0 /a>, a href="+code=SSB_SROM8_PWR_INFO_CORE1" class="sref">SSB_SROM8_PWR_INFO_CORE1 /a>,1"206 /a> a href="+code=SSB_SROM8_PWR_INFO_CORE2" class="sref">SSB_SROM8_PWR_INFO_CORE2 /a>, a href="+code=SSB_SROM8_PWR_INFO_CORE3" class="sref">SSB_SROM8_PWR_INFO_CORE3 /a>o"207 /a> };o"208 /a> a href="+code=BUILD_BUG_ON" class="sref">BUILD_BUG_ON /a>( a href="+code=ARRAY_SIZE" class="sref">ARRAY_SIZE /a>( a href="+code=pwr_info_offset" class="sref">pwr_info_offset /a>) !=o"209 /a> a href="+code=ARRAY_SIZE" class="sref">ARRAY_SIZE /a>( a href="+code=bus" class="sref">bus /a>-> a href="+code=sprom" class="sref">sprom /a>. a href="+code=core_pwr_info" class="sref">core_pwr_info /a>));o"210 /a>o"211 /a> a href="+code=bus" class="sref">bus /a>-> a href="+code=sprom" class="sref">sprom /a>. a href="+code=revis"v3" class="sref">revis"v3 /a> = a href="+code=sprom" class="sref">sprom /a>[ a href="+code=SSB_SPROMSIZE_WORDS_R4" class="sref">SSB_SPROMSIZE_WORDS_R4 /a> - 1] &o"212 /a> a href="+code=SSB_SPROM_REVISION_REV" class="sref">SSB_SPROM_REVISION_REV /a>;o"213 /a>o"214 /a> for ( a href="+code=i" class="sref">i /a> = 0; a href="+code=i" class="sref">i /a> < 3; a href="+code=i" class="sref">i /a>++) {1"215 /a> a href="+code=v" class="sref">v /a> = a href="+code=sprom" class="sref">sprom /a>[ a href="+code=SPOFF" class="sref">SPOFF /a>( a href="+code=SSB_SPROM8_IL0MAC" class="sref">SSB_SPROM8_IL0MAC /a>) + a href="+code=i" class="sref">i /a>];o"216 /a> *((( a href="+code=__be16" class="sref">__be16lua> *) a href="+code=bus" class="sref">bus /a>-> a href="+code=sprom" class="sref">sprom /a>. a href="+code=il0mac" class="sref">il0mac /a>) + a href="+code=i" class="sref">i /a>) = a href="+code=cpu_to_be16" class="sref">cpu_to_be16 /a>( a href="+code=v" class="sref">v /a>);o"217 /a> }o"218 /a>o"219 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=board_rev" class="sref">board_rev /a>, a href="+code=SSB_SPROM8_BOARDREV" class="sref">SSB_SPROM8_BOARDREV /a>, ~0, 0);o"220 /a>o"221 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=txpid2g" class="sref">txpid2g /a>[0], a href="+code=SSB_SPROM4_TXPID2G01" class="sref">SSB_SPROM4_TXPID2G01 /a>, a href="+code=SSB_SPROM4_TXPID2G0" class="sref">SSB_SPROM4_TXPID2G0 /a>,1"222 /a> a href="+code=SSB_SPROM4_TXPID2G0_SHIFT" class="sref">SSB_SPROM4_TXPID2G0_SHIFT /a>);o"223 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=txpid2g" class="sref">txpid2g /a>[1], a href="+code=SSB_SPROM4_TXPID2G01" class="sref">SSB_SPROM4_TXPID2G01 /a>, a href="+code=SSB_SPROM4_TXPID2G1" class="sref">SSB_SPROM4_TXPID2G1 /a>,1"224 /a> a href="+code=SSB_SPROM4_TXPID2G1_SHIFT" class="sref">SSB_SPROM4_TXPID2G1_SHIFT /a>);o"225 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=txpid2g" class="sref">txpid2g /a>[2], a href="+code=SSB_SPROM4_TXPID2G23" class="sref">SSB_SPROM4_TXPID2G23 /a>, a href="+code=SSB_SPROM4_TXPID2G2" class="sref">SSB_SPROM4_TXPID2G2 /a>,1"226 /a> a href="+code=SSB_SPROM4_TXPID2G2_SHIFT" class="sref">SSB_SPROM4_TXPID2G2_SHIFT /a>);o"227 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=txpid2g" class="sref">txpid2g /a>[3], a href="+code=SSB_SPROM4_TXPID2G23" class="sref">SSB_SPROM4_TXPID2G23 /a>, a href="+code=SSB_SPROM4_TXPID2G3" class="sref">SSB_SPROM4_TXPID2G3 /a>,1"228 /a> a href="+code=SSB_SPROM4_TXPID2G3_SHIFT" class="sref">SSB_SPROM4_TXPID2G3_SHIFT /a>);o"229 /a>o"230 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=txpid5gl" class="sref">txpid5gl /a>[0], a href="+code=SSB_SPROM4_TXPID5GL01" class="sref">SSB_SPROM4_TXPID5GL01 /a>, a href="+code=SSB_SPROM4_TXPID5GL0" class="sref">SSB_SPROM4_TXPID5GL0 /a>,1"231 /a> a href="+code=SSB_SPROM4_TXPID5GL0_SHIFT" class="sref">SSB_SPROM4_TXPID5GL0_SHIFT /a>);o"232 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=txpid5gl" class="sref">txpid5gl /a>[1], a href="+code=SSB_SPROM4_TXPID5GL01" class="sref">SSB_SPROM4_TXPID5GL01 /a>, a href="+code=SSB_SPROM4_TXPID5GL1" class="sref">SSB_SPROM4_TXPID5GL1 /a>,1"233 /a> a href="+code=SSB_SPROM4_TXPID5GL1_SHIFT" class="sref">SSB_SPROM4_TXPID5GL1_SHIFT /a>);o"234 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=txpid5gl" class="sref">txpid5gl /a>[2], a href="+code=SSB_SPROM4_TXPID5GL23" class="sref">SSB_SPROM4_TXPID5GL23 /a>, a href="+code=SSB_SPROM4_TXPID5GL2" class="sref">SSB_SPROM4_TXPID5GL2 /a>,1"235 /a> a href="+code=SSB_SPROM4_TXPID5GL2_SHIFT" class="sref">SSB_SPROM4_TXPID5GL2_SHIFT /a>);o"236 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=txpid5gl" class="sref">txpid5gl /a>[3], a href="+code=SSB_SPROM4_TXPID5GL23" class="sref">SSB_SPROM4_TXPID5GL23 /a>, a href="+code=SSB_SPROM4_TXPID5GL3" class="sref">SSB_SPROM4_TXPID5GL3 /a>,1"237 /a> a href="+code=SSB_SPROM4_TXPID5GL3_SHIFT" class="sref">SSB_SPROM4_TXPID5GL3_SHIFT /a>);o"238 /a>o"239 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=txpid5g" class="sref">txpid5g /a>[0], a href="+code=SSB_SPROM4_TXPID5G01" class="sref">SSB_SPROM4_TXPID5G01 /a>, a href="+code=SSB_SPROM4_TXPID5G0" class="sref">SSB_SPROM4_TXPID5G0 /a>,1"240 /a> a href="+code=SSB_SPROM4_TXPID5G0_SHIFT" class="sref">SSB_SPROM4_TXPID5G0_SHIFT /a>);o"241 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=txpid5g" class="sref">txpid5g /a>[1], a href="+code=SSB_SPROM4_TXPID5G01" class="sref">SSB_SPROM4_TXPID5G01 /a>, a href="+code=SSB_SPROM4_TXPID5G1" class="sref">SSB_SPROM4_TXPID5G1 /a>,1"242 /a> a href="+code=SSB_SPROM4_TXPID5G1_SHIFT" class="sref">SSB_SPROM4_TXPID5G1_SHIFT /a>);o"243 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=txpid5g" class="sref">txpid5g /a>[2], a href="+code=SSB_SPROM4_TXPID5G23" class="sref">SSB_SPROM4_TXPID5G23 /a>, a href="+code=SSB_SPROM4_TXPID5G2" class="sref">SSB_SPROM4_TXPID5G2 /a>,1"244 /a> a href="+code=SSB_SPROM4_TXPID5G2_SHIFT" class="sref">SSB_SPROM4_TXPID5G2_SHIFT /a>);o"245 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=txpid5g" class="sref">txpid5g /a>[3], a href="+code=SSB_SPROM4_TXPID5G23" class="sref">SSB_SPROM4_TXPID5G23 /a>, a href="+code=SSB_SPROM4_TXPID5G3" class="sref">SSB_SPROM4_TXPID5G3 /a>,1"246 /a> a href="+code=SSB_SPROM4_TXPID5G3_SHIFT" class="sref">SSB_SPROM4_TXPID5G3_SHIFT /a>);o"247 /a>o"248 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=txpid5gh" class="sref">txpid5gh /a>[0], a href="+code=SSB_SPROM4_TXPID5GH01" class="sref">SSB_SPROM4_TXPID5GH01 /a>, a href="+code=SSB_SPROM4_TXPID5GH0" class="sref">SSB_SPROM4_TXPID5GH0 /a>,1"249 /a> a href="+code=SSB_SPROM4_TXPID5GH0_SHIFT" class="sref">SSB_SPROM4_TXPID5GH0_SHIFT /a>);o"250 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=txpid5gh" class="sref">txpid5gh /a>[1], a href="+code=SSB_SPROM4_TXPID5GH01" class="sref">SSB_SPROM4_TXPID5GH01 /a>, a href="+code=SSB_SPROM4_TXPID5GH1" class="sref">SSB_SPROM4_TXPID5GH1 /a>,1"251 /a> a href="+code=SSB_SPROM4_TXPID5GH1_SHIFT" class="sref">SSB_SPROM4_TXPID5GH1_SHIFT /a>);o"252 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=txpid5gh" class="sref">txpid5gh /a>[2], a href="+code=SSB_SPROM4_TXPID5GH23" class="sref">SSB_SPROM4_TXPID5GH23 /a>, a href="+code=SSB_SPROM4_TXPID5GH2" class="sref">SSB_SPROM4_TXPID5GH2 /a>,1"253 /a> a href="+code=SSB_SPROM4_TXPID5GH2_SHIFT" class="sref">SSB_SPROM4_TXPID5GH2_SHIFT /a>);o"254 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=txpid5gh" class="sref">txpid5gh /a>[3], a href="+code=SSB_SPROM4_TXPID5GH23" class="sref">SSB_SPROM4_TXPID5GH23 /a>, a href="+code=SSB_SPROM4_TXPID5GH3" class="sref">SSB_SPROM4_TXPID5GH3 /a>,1"255 /a> a href="+code=SSB_SPROM4_TXPID5GH3_SHIFT" class="sref">SSB_SPROM4_TXPID5GH3_SHIFT /a>);o"256 /a>o"257 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=boardflags_lo" class="sref">boardflags_lo /a>, a href="+code=SSB_SPROM8_BFLLO" class="sref">SSB_SPROM8_BFLLO /a>, ~0, 0);o"258 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=boardflags_hi" class="sref">boardflags_hi /a>, a href="+code=SSB_SPROM8_BFLHI" class="sref">SSB_SPROM8_BFLHI /a>, ~0, 0);o"259 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=boardflags2_lo" class="sref">boardflags2_lo /a>, a href="+code=SSB_SPROM8_BFL2LO" class="sref">SSB_SPROM8_BFL2LO /a>, ~0, 0);o"260 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=boardflags2_hi" class="sref">boardflags2_hi /a>, a href="+code=SSB_SPROM8_BFL2HI" class="sref">SSB_SPROM8_BFL2HI /a>, ~0, 0);o"261 /a>o"262 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=alpha2" class="sref">alpha2 /a>[0], a href="+code=SSB_SPROM8_CCODE" class="sref">SSB_SPROM8_CCODE /a>, 0xff00, 8);o"263 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=alpha2" class="sref">alpha2 /a>[1], a href="+code=SSB_SPROM8_CCODE" class="sref">SSB_SPROM8_CCODE /a>, 0x00ff, 0);o"264 /a>o"265 /a> spa3 class="comment">/* Extrac= cores power info info */ /spa3.1"266 /a> for ( a href="+code=i" class="sref">i /a> = 0; a href="+code=i" class="sref">i /a> < a href="+code=ARRAY_SIZE" class="sref">ARRAY_SIZE /a>( a href="+code=pwr_info_offset" class="sref">pwr_info_offset /a>); a href="+code=i" class="sref">i /a>++) {1"267 /a> a href="+code=o" class="sref">o /a> = a href="+code=pwr_info_offset" class="sref">pwr_info_offset /a>[ a href="+code=i" class="sref">i /a>];o"268 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=core_pwr_info" class="sref">core_pwr_info /a>[ a href="+code=i" class="sref">i /a>]. a href="+code=itssi_2g" class="sref">itssi_2g /a>, a href="+code=o" class="sref">o /a> + a href="+code=SSB_SROM8_2G_MAXP_ITSSI" class="sref">SSB_SROM8_2G_MAXP_ITSSI /a>,1"269 /a> a href="+code=SSB_SPROM8_2G_ITSSI" class="sref">SSB_SPROM8_2G_ITSSI /a>, a href="+code=SSB_SPROM8_2G_ITSSI_SHIFT" class="sref">SSB_SPROM8_2G_ITSSI_SHIFT /a>);o"270 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=core_pwr_info" class="sref">core_pwr_info /a>[ a href="+code=i" class="sref">i /a>]. a href="+code=maxpwr_2g" class="sref">maxpwr_2g /a>, a href="+code=o" class="sref">o /a> + a href="+code=SSB_SROM8_2G_MAXP_ITSSI" class="sref">SSB_SROM8_2G_MAXP_ITSSI /a>,1"271 /a> a href="+code=SSB_SPROM8_2G_MAXP" class="sref">SSB_SPROM8_2G_MAXP /a>, 0);o"272 /a>o"273 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=core_pwr_info" class="sref">core_pwr_info /a>[ a href="+code=i" class="sref">i /a>]. a href="+code=pa_2g" class="sref">pa_2g /a>[0], a href="+code=o" class="sref">o /a> + a href="+code=SSB_SROM8_2G_PA_0" class="sref">SSB_SROM8_2G_PA_0 /a>, ~0, 0);o"274 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=core_pwr_info" class="sref">core_pwr_info /a>[ a href="+code=i" class="sref">i /a>]. a href="+code=pa_2g" class="sref">pa_2g /a>[1], a href="+code=o" class="sref">o /a> + a href="+code=SSB_SROM8_2G_PA_1" class="sref">SSB_SROM8_2G_PA_1 /a>, ~0, 0);o"275 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=core_pwr_info" class="sref">core_pwr_info /a>[ a href="+code=i" class="sref">i /a>]. a href="+code=pa_2g" class="sref">pa_2g /a>[2], a href="+code=o" class="sref">o /a> + a href="+code=SSB_SROM8_2G_PA_2" class="sref">SSB_SROM8_2G_PA_2 /a>, ~0, 0);o"276 /a>o"277 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=core_pwr_info" class="sref">core_pwr_info /a>[ a href="+code=i" class="sref">i /a>]. a href="+code=itssi_5g" class="sref">itssi_5g /a>, a href="+code=o" class="sref">o /a> + a href="+code=SSB_SROM8_5G_MAXP_ITSSI" class="sref">SSB_SROM8_5G_MAXP_ITSSI /a>,1"278 /a> a href="+code=SSB_SPROM8_5G_ITSSI" class="sref">SSB_SPROM8_5G_ITSSI /a>, a href="+code=SSB_SPROM8_5G_ITSSI_SHIFT" class="sref">SSB_SPROM8_5G_ITSSI_SHIFT /a>);o"279 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=core_pwr_info" class="sref">core_pwr_info /a>[ a href="+code=i" class="sref">i /a>]. a href="+code=maxpwr_5g" class="sref">maxpwr_5g /a>, a href="+code=o" class="sref">o /a> + a href="+code=SSB_SROM8_5G_MAXP_ITSSI" class="sref">SSB_SROM8_5G_MAXP_ITSSI /a>,1"280 /a> a href="+code=SSB_SPROM8_5G_MAXP" class="sref">SSB_SPROM8_5G_MAXP /a>, 0);o"281 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=core_pwr_info" class="sref">core_pwr_info /a>[ a href="+code=i" class="sref">i /a>]. a href="+code=maxpwr_5gh" class="sref">maxpwr_5gh /a>, a href="+code=o" class="sref">o /a> + a href="+code=SSB_SPROM8_5GHL_MAXP" class="sref">SSB_SPROM8_5GHL_MAXP /a>,1"282 /a> a href="+code=SSB_SPROM8_5GH_MAXP" class="sref">SSB_SPROM8_5GH_MAXP /a>, 0);o"283 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=core_pwr_info" class="sref">core_pwr_info /a>[ a href="+code=i" class="sref">i /a>]. a href="+code=maxpwr_5gl" class="sref">maxpwr_5gl /a>, a href="+code=o" class="sref">o /a> + a href="+code=SSB_SPROM8_5GHL_MAXP" class="sref">SSB_SPROM8_5GHL_MAXP /a>,1"284 /a> a href="+code=SSB_SPROM8_5GL_MAXP" class="sref">SSB_SPROM8_5GL_MAXP /a>, a href="+code=SSB_SPROM8_5GL_MAXP_SHIFT" class="sref">SSB_SPROM8_5GL_MAXP_SHIFT /a>);o"285 /a>o"286 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=core_pwr_info" class="sref">core_pwr_info /a>[ a href="+code=i" class="sref">i /a>]. a href="+code=pa_5gl" class="sref">pa_5gl /a>[0], a href="+code=o" class="sref">o /a> + a href="+code=SSB_SROM8_5GL_PA_0" class="sref">SSB_SROM8_5GL_PA_0 /a>, ~0, 0);o"287 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=core_pwr_info" class="sref">core_pwr_info /a>[ a href="+code=i" class="sref">i /a>]. a href="+code=pa_5gl" class="sref">pa_5gl /a>[1], a href="+code=o" class="sref">o /a> + a href="+code=SSB_SROM8_5GL_PA_1" class="sref">SSB_SROM8_5GL_PA_1 /a>, ~0, 0);o"288 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=core_pwr_info" class="sref">core_pwr_info /a>[ a href="+code=i" class="sref">i /a>]. a href="+code=pa_5gl" class="sref">pa_5gl /a>[2], a href="+code=o" class="sref">o /a> + a href="+code=SSB_SROM8_5GL_PA_2" class="sref">SSB_SROM8_5GL_PA_2 /a>, ~0, 0);o"289 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=core_pwr_info" class="sref">core_pwr_info /a>[ a href="+code=i" class="sref">i /a>]. a href="+code=pa_5g" class="sref">pa_5g /a>[0], a href="+code=o" class="sref">o /a> + a href="+code=SSB_SROM8_5G_PA_0" class="sref">SSB_SROM8_5G_PA_0 /a>, ~0, 0);o"290 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=core_pwr_info" class="sref">core_pwr_info /a>[ a href="+code=i" class="sref">i /a>]. a href="+code=pa_5g" class="sref">pa_5g /a>[1], a href="+code=o" class="sref">o /a> + a href="+code=SSB_SROM8_5G_PA_1" class="sref">SSB_SROM8_5G_PA_1 /a>, ~0, 0);o"291 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=core_pwr_info" class="sref">core_pwr_info /a>[ a href="+code=i" class="sref">i /a>]. a href="+code=pa_5g" class="sref">pa_5g /a>[2], a href="+code=o" class="sref">o /a> + a href="+code=SSB_SROM8_5G_PA_2" class="sref">SSB_SROM8_5G_PA_2 /a>, ~0, 0);o"292 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=core_pwr_info" class="sref">core_pwr_info /a>[ a href="+code=i" class="sref">i /a>]. a href="+code=pa_5gh" class="sref">pa_5gh /a>[0], a href="+code=o" class="sref">o /a> + a href="+code=SSB_SROM8_5GH_PA_0" class="sref">SSB_SROM8_5GH_PA_0 /a>, ~0, 0);o"293 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=core_pwr_info" class="sref">core_pwr_info /a>[ a href="+code=i" class="sref">i /a>]. a href="+code=pa_5gh" class="sref">pa_5gh /a>[1], a href="+code=o" class="sref">o /a> + a href="+code=SSB_SROM8_5GH_PA_1" class="sref">SSB_SROM8_5GH_PA_1 /a>, ~0, 0);o"294 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=core_pwr_info" class="sref">core_pwr_info /a>[ a href="+code=i" class="sref">i /a>]. a href="+code=pa_5gh" class="sref">pa_5gh /a>[2], a href="+code=o" class="sref">o /a> + a href="+code=SSB_SROM8_5GH_PA_2" class="sref">SSB_SROM8_5GH_PA_2 /a>, ~0, 0);o"295 /a> }o"296 /a>o"297 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=fem" class="sref">fem /a>. a href="+code=ghz2" class="sref">ghz2 /a>. a href="+code=tssipos" class="sref">tssipos /a>, a href="+code=SSB_SPROM8_FEM2G" class="sref">SSB_SPROM8_FEM2G /a>, a href="+code=SSB_SROM8_FEM_TSSIPOS" class="sref">SSB_SROM8_FEM_TSSIPOS /a>,1"298 /a> a href="+code=SSB_SROM8_FEM_TSSIPOS_SHIFT" class="sref">SSB_SROM8_FEM_TSSIPOS_SHIFT /a>);o"299 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=fem" class="sref">fem /a>. a href="+code=ghz2" class="sref">ghz2 /a>. a href="+code=extpa_gai3" class="sref">extpa_gai3 /a>, a href="+code=SSB_SPROM8_FEM2G" class="sref">SSB_SPROM8_FEM2G /a>, a href="+code=SSB_SROM8_FEM_EXTPA_GAIN" class="sref">SSB_SROM8_FEM_EXTPA_GAIN /a>,1"300 /a> a href="+code=SSB_SROM8_FEM_EXTPA_GAIN_SHIFT" class="sref">SSB_SROM8_FEM_EXTPA_GAIN_SHIFT /a>);o"301 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=fem" class="sref">fem /a>. a href="+code=ghz2" class="sref">ghz2 /a>. a href="+code=pdet_range" class="sref">pdet_range /a>, a href="+code=SSB_SPROM8_FEM2G" class="sref">SSB_SPROM8_FEM2G /a>, a href="+code=SSB_SROM8_FEM_PDET_RANGE" class="sref">SSB_SROM8_FEM_PDET_RANGE /a>,1"302 /a> a href="+code=SSB_SROM8_FEM_PDET_RANGE_SHIFT" class="sref">SSB_SROM8_FEM_PDET_RANGE_SHIFT /a>);o"303 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=fem" class="sref">fem /a>. a href="+code=ghz2" class="sref">ghz2 /a>. a href="+code=tr_iso" class="sref">tr_iso /a>, a href="+code=SSB_SPROM8_FEM2G" class="sref">SSB_SPROM8_FEM2G /a>, a href="+code=SSB_SROM8_FEM_TR_ISO" class="sref">SSB_SROM8_FEM_TR_ISO /a>,1"304 /a> a href="+code=SSB_SROM8_FEM_TR_ISO_SHIFT" class="sref">SSB_SROM8_FEM_TR_ISO_SHIFT /a>);o"305 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=fem" class="sref">fem /a>. a href="+code=ghz2" class="sref">ghz2 /a>. a href="+code=antswlut" class="sref">antswlut /a>, a href="+code=SSB_SPROM8_FEM2G" class="sref">SSB_SPROM8_FEM2G /a>, a href="+code=SSB_SROM8_FEM_ANTSWLUT" class="sref">SSB_SROM8_FEM_ANTSWLUT /a>,1"306 /a> a href="+code=SSB_SROM8_FEM_ANTSWLUT_SHIFT" class="sref">SSB_SROM8_FEM_ANTSWLUT_SHIFT /a>);o"307 /a>o"308 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=fem" class="sref">fem /a>. a href="+code=ghz5" class="sref">ghz5 /a>. a href="+code=tssipos" class="sref">tssipos /a>, a href="+code=SSB_SPROM8_FEM5G" class="sref">SSB_SPROM8_FEM5G /a>, a href="+code=SSB_SROM8_FEM_TSSIPOS" class="sref">SSB_SROM8_FEM_TSSIPOS /a>,1"309 /a> a href="+code=SSB_SROM8_FEM_TSSIPOS_SHIFT" class="sref">SSB_SROM8_FEM_TSSIPOS_SHIFT /a>);o"310 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=fem" class="sref">fem /a>. a href="+code=ghz5" class="sref">ghz5 /a>. a href="+code=extpa_gai3" class="sref">extpa_gai3 /a>, a href="+code=SSB_SPROM8_FEM5G" class="sref">SSB_SPROM8_FEM5G /a>, a href="+code=SSB_SROM8_FEM_EXTPA_GAIN" class="sref">SSB_SROM8_FEM_EXTPA_GAIN /a>,1"311 /a> a href="+code=SSB_SROM8_FEM_EXTPA_GAIN_SHIFT" class="sref">SSB_SROM8_FEM_EXTPA_GAIN_SHIFT /a>);o"312 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=fem" class="sref">fem /a>. a href="+code=ghz5" class="sref">ghz5 /a>. a href="+code=pdet_range" class="sref">pdet_range /a>, a href="+code=SSB_SPROM8_FEM5G" class="sref">SSB_SPROM8_FEM5G /a>, a href="+code=SSB_SROM8_FEM_PDET_RANGE" class="sref">SSB_SROM8_FEM_PDET_RANGE /a>,1"313 /a> a href="+code=SSB_SROM8_FEM_PDET_RANGE_SHIFT" class="sref">SSB_SROM8_FEM_PDET_RANGE_SHIFT /a>);o"314 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=fem" class="sref">fem /a>. a href="+code=ghz5" class="sref">ghz5 /a>. a href="+code=tr_iso" class="sref">tr_iso /a>, a href="+code=SSB_SPROM8_FEM5G" class="sref">SSB_SPROM8_FEM5G /a>, a href="+code=SSB_SROM8_FEM_TR_ISO" class="sref">SSB_SROM8_FEM_TR_ISO /a>,1"315 /a> a href="+code=SSB_SROM8_FEM_TR_ISO_SHIFT" class="sref">SSB_SROM8_FEM_TR_ISO_SHIFT /a>);o"316 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=fem" class="sref">fem /a>. a href="+code=ghz5" class="sref">ghz5 /a>. a href="+code=antswlut" class="sref">antswlut /a>, a href="+code=SSB_SPROM8_FEM5G" class="sref">SSB_SPROM8_FEM5G /a>, a href="+code=SSB_SROM8_FEM_ANTSWLUT" class="sref">SSB_SROM8_FEM_ANTSWLUT /a>,1"317 /a> a href="+code=SSB_SROM8_FEM_ANTSWLUT_SHIFT" class="sref">SSB_SROM8_FEM_ANTSWLUT_SHIFT /a>);o"318 /a>o"319 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=ant_available_a" class="sref">ant_available_a /a>, a href="+code=SSB_SPROM8_ANTAVAIL" class="sref">SSB_SPROM8_ANTAVAIL /a>, a href="+code=SSB_SPROM8_ANTAVAIL_A" class="sref">SSB_SPROM8_ANTAVAIL_A /a>,1"320 /a> a href="+code=SSB_SPROM8_ANTAVAIL_A_SHIFT" class="sref">SSB_SPROM8_ANTAVAIL_A_SHIFT /a>);o"321 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=ant_available_bg" class="sref">ant_available_bg /a>, a href="+code=SSB_SPROM8_ANTAVAIL" class="sref">SSB_SPROM8_ANTAVAIL /a>, a href="+code=SSB_SPROM8_ANTAVAIL_BG" class="sref">SSB_SPROM8_ANTAVAIL_BG /a>,1"322 /a> a href="+code=SSB_SPROM8_ANTAVAIL_BG_SHIFT" class="sref">SSB_SPROM8_ANTAVAIL_BG_SHIFT /a>);o"323 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=maxpwr_bg" class="sref">maxpwr_bg /a>, a href="+code=SSB_SPROM8_MAXP_BG" class="sref">SSB_SPROM8_MAXP_BG /a>, a href="+code=SSB_SPROM8_MAXP_BG_MASK" class="sref">SSB_SPROM8_MAXP_BG_MASK /a>, 0);o"324 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=itssi_bg" class="sref">itssi_bg /a>, a href="+code=SSB_SPROM8_MAXP_BG" class="sref">SSB_SPROM8_MAXP_BG /a>, a href="+code=SSB_SPROM8_ITSSI_BG" class="sref">SSB_SPROM8_ITSSI_BG /a>,1"325 /a> a href="+code=SSB_SPROM8_ITSSI_BG_SHIFT" class="sref">SSB_SPROM8_ITSSI_BG_SHIFT /a>);o"326 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=maxpwr_a" class="sref">maxpwr_a /a>, a href="+code=SSB_SPROM8_MAXP_A" class="sref">SSB_SPROM8_MAXP_A /a>, a href="+code=SSB_SPROM8_MAXP_A_MASK" class="sref">SSB_SPROM8_MAXP_A_MASK /a>, 0);o"327 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=itssi_a" class="sref">itssi_a /a>, a href="+code=SSB_SPROM8_MAXP_A" class="sref">SSB_SPROM8_MAXP_A /a>, a href="+code=SSB_SPROM8_ITSSI_A" class="sref">SSB_SPROM8_ITSSI_A /a>,1"328 /a> a href="+code=SSB_SPROM8_ITSSI_A_SHIFT" class="sref">SSB_SPROM8_ITSSI_A_SHIFT /a>);o"329 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=maxpwr_ah" class="sref">maxpwr_ah /a>, a href="+code=SSB_SPROM8_MAXP_AHL" class="sref">SSB_SPROM8_MAXP_AHL /a>, a href="+code=SSB_SPROM8_MAXP_AH_MASK" class="sref">SSB_SPROM8_MAXP_AH_MASK /a>, 0);o"330 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=maxpwr_al" class="sref">maxpwr_al /a>, a href="+code=SSB_SPROM8_MAXP_AHL" class="sref">SSB_SPROM8_MAXP_AHL /a>, a href="+code=SSB_SPROM8_MAXP_AL_MASK" class="sref">SSB_SPROM8_MAXP_AL_MASK /a>,o"331 /a> a href="+code=SSB_SPROM8_MAXP_AL_SHIFT" class="sref">SSB_SPROM8_MAXP_AL_SHIFT /a>);o"332 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=gpio0" class="sref">gpio0 /a>, a href="+code=SSB_SPROM8_GPIOA" class="sref">SSB_SPROM8_GPIOA /a>, a href="+code=SSB_SPROM8_GPIOA_P0" class="sref">SSB_SPROM8_GPIOA_P0 /a>, 0);o"333 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=gpio1" class="sref">gpio1 /a>, a href="+code=SSB_SPROM8_GPIOA" class="sref">SSB_SPROM8_GPIOA /a>, a href="+code=SSB_SPROM8_GPIOA_P1" class="sref">SSB_SPROM8_GPIOA_P1 /a>,o"334 /a> a href="+code=SSB_SPROM8_GPIOA_P1_SHIFT" class="sref">SSB_SPROM8_GPIOA_P1_SHIFT /a>);o"335 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=gpio2" class="sref">gpio2 /a>, a href="+code=SSB_SPROM8_GPIOB" class="sref">SSB_SPROM8_GPIOB /a>, a href="+code=SSB_SPROM8_GPIOB_P2" class="sref">SSB_SPROM8_GPIOB_P2 /a>, 0);o"336 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=gpio3" class="sref">gpio3 /a>, a href="+code=SSB_SPROM8_GPIOB" class="sref">SSB_SPROM8_GPIOB /a>, a href="+code=SSB_SPROM8_GPIOB_P3" class="sref">SSB_SPROM8_GPIOB_P3 /a>,o"337 /a> a href="+code=SSB_SPROM8_GPIOB_P3_SHIFT" class="sref">SSB_SPROM8_GPIOB_P3_SHIFT /a>);o"338 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=tri2g" class="sref">tri2g /a>, a href="+code=SSB_SPROM8_TRI25G" class="sref">SSB_SPROM8_TRI25G /a>, a href="+code=SSB_SPROM8_TRI2G" class="sref">SSB_SPROM8_TRI2G /a>, 0);o"339 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=tri5g" class="sref">tri5g /a>, a href="+code=SSB_SPROM8_TRI25G" class="sref">SSB_SPROM8_TRI25G /a>, a href="+code=SSB_SPROM8_TRI5G" class="sref">SSB_SPROM8_TRI5G /a>,1"340 /a> a href="+code=SSB_SPROM8_TRI5G_SHIFT" class="sref">SSB_SPROM8_TRI5G_SHIFT /a>);o"341 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=tri5gl" class="sref">tri5gl /a>, a href="+code=SSB_SPROM8_TRI5GHL" class="sref">SSB_SPROM8_TRI5GHL /a>, a href="+code=SSB_SPROM8_TRI5GL" class="sref">SSB_SPROM8_TRI5GL /a>, 0);o"342 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=tri5gh" class="sref">tri5gh /a>, a href="+code=SSB_SPROM8_TRI5GHL" class="sref">SSB_SPROM8_TRI5GHL /a>, a href="+code=SSB_SPROM8_TRI5GH" class="sref">SSB_SPROM8_TRI5GH /a>,1"343 /a> a href="+code=SSB_SPROM8_TRI5GH_SHIFT" class="sref">SSB_SPROM8_TRI5GH_SHIFT /a>);o"344 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=rxpo2g" class="sref">rxpo2g /a>, a href="+code=SSB_SPROM8_RXPO" class="sref">SSB_SPROM8_RXPO /a>, a href="+code=SSB_SPROM8_RXPO2G" class="sref">SSB_SPROM8_RXPO2G /a>,1"345 /a> a href="+code=SSB_SPROM8_RXPO2G_SHIFT" class="sref">SSB_SPROM8_RXPO2G_SHIFT /a>);o"346 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=rxpo5g" class="sref">rxpo5g /a>, a href="+code=SSB_SPROM8_RXPO" class="sref">SSB_SPROM8_RXPO /a>, a href="+code=SSB_SPROM8_RXPO5G" class="sref">SSB_SPROM8_RXPO5G /a>,1"347 /a> a href="+code=SSB_SPROM8_RXPO5G_SHIFT" class="sref">SSB_SPROM8_RXPO5G_SHIFT /a>);o"348 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=rssismf2g" class="sref">rssismf2g /a>, a href="+code=SSB_SPROM8_RSSIPARM2G" class="sref">SSB_SPROM8_RSSIPARM2G /a>, a href="+code=SSB_SPROM8_RSSISMF2G" class="sref">SSB_SPROM8_RSSISMF2G /a>, 0);o"349 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=rssismc2g" class="sref">rssismc2g /a>, a href="+code=SSB_SPROM8_RSSIPARM2G" class="sref">SSB_SPROM8_RSSIPARM2G /a>, a href="+code=SSB_SPROM8_RSSISMC2G" class="sref">SSB_SPROM8_RSSISMC2G /a>,1"350 /a> a href="+code=SSB_SPROM8_RSSISMC2G_SHIFT" class="sref">SSB_SPROM8_RSSISMC2G_SHIFT /a>);o"351 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=rssisav2g" class="sref">rssisav2g /a>, a href="+code=SSB_SPROM8_RSSIPARM2G" class="sref">SSB_SPROM8_RSSIPARM2G /a>, a href="+code=SSB_SPROM8_RSSISAV2G" class="sref">SSB_SPROM8_RSSISAV2G /a>,1"352 /a> a href="+code=SSB_SPROM8_RSSISAV2G_SHIFT" class="sref">SSB_SPROM8_RSSISAV2G_SHIFT /a>);o"353 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=bxa2g" class="sref">bxa2g /a>, a href="+code=SSB_SPROM8_RSSIPARM2G" class="sref">SSB_SPROM8_RSSIPARM2G /a>, a href="+code=SSB_SPROM8_BXA2G" class="sref">SSB_SPROM8_BXA2G /a>,1"354 /a> a href="+code=SSB_SPROM8_BXA2G_SHIFT" class="sref">SSB_SPROM8_BXA2G_SHIFT /a>);o"355 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=rssismf5g" class="sref">rssismf5g /a>, a href="+code=SSB_SPROM8_RSSIPARM5G" class="sref">SSB_SPROM8_RSSIPARM5G /a>, a href="+code=SSB_SPROM8_RSSISMF5G" class="sref">SSB_SPROM8_RSSISMF5G /a>, 0);o"356 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=rssismc5g" class="sref">rssismc5g /a>, a href="+code=SSB_SPROM8_RSSIPARM5G" class="sref">SSB_SPROM8_RSSIPARM5G /a>, a href="+code=SSB_SPROM8_RSSISMC5G" class="sref">SSB_SPROM8_RSSISMC5G /a>,1"357 /a> a href="+code=SSB_SPROM8_RSSISMC5G_SHIFT" class="sref">SSB_SPROM8_RSSISMC5G_SHIFT /a>);o"358 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=rssisav5g" class="sref">rssisav5g /a>, a href="+code=SSB_SPROM8_RSSIPARM5G" class="sref">SSB_SPROM8_RSSIPARM5G /a>, a href="+code=SSB_SPROM8_RSSISAV5G" class="sref">SSB_SPROM8_RSSISAV5G /a>,1"359 /a> a href="+code=SSB_SPROM8_RSSISAV5G_SHIFT" class="sref">SSB_SPROM8_RSSISAV5G_SHIFT /a>);o"360 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=bxa5g" class="sref">bxa5g /a>, a href="+code=SSB_SPROM8_RSSIPARM5G" class="sref">SSB_SPROM8_RSSIPARM5G /a>, a href="+code=SSB_SPROM8_BXA5G" class="sref">SSB_SPROM8_BXA5G /a>,1"361 /a> a href="+code=SSB_SPROM8_BXA5G_SHIFT" class="sref">SSB_SPROM8_BXA5G_SHIFT /a>);o"362 /a>o"363 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=pa0b0" class="sref">pa0b0 /a>, a href="+code=SSB_SPROM8_PA0B0" class="sref">SSB_SPROM8_PA0B0 /a>, ~0, 0);o"364 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=pa0b1" class="sref">pa0b1 /a>, a href="+code=SSB_SPROM8_PA0B1" class="sref">SSB_SPROM8_PA0B1 /a>, ~0, 0);o"365 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=pa0b2" class="sref">pa0b2 /a>, a href="+code=SSB_SPROM8_PA0B2" class="sref">SSB_SPROM8_PA0B2 /a>, ~0, 0);o"366 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=pa1b0" class="sref">pa1b0 /a>, a href="+code=SSB_SPROM8_PA1B0" class="sref">SSB_SPROM8_PA1B0 /a>, ~0, 0);o"367 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=pa1b1" class="sref">pa1b1 /a>, a href="+code=SSB_SPROM8_PA1B1" class="sref">SSB_SPROM8_PA1B1 /a>, ~0, 0);o"368 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=pa1b2" class="sref">pa1b2 /a>, a href="+code=SSB_SPROM8_PA1B2" class="sref">SSB_SPROM8_PA1B2 /a>, ~0, 0);o"369 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=pa1lob0" class="sref">pa1lob0 /a>, a href="+code=SSB_SPROM8_PA1LOB0" class="sref">SSB_SPROM8_PA1LOB0 /a>, ~0, 0);o"370 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=pa1lob1" class="sref">pa1lob1 /a>, a href="+code=SSB_SPROM8_PA1LOB1" class="sref">SSB_SPROM8_PA1LOB1 /a>, ~0, 0);o"371 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=pa1lob2" class="sref">pa1lob2 /a>, a href="+code=SSB_SPROM8_PA1LOB2" class="sref">SSB_SPROM8_PA1LOB2 /a>, ~0, 0);o"372 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=pa1hib0" class="sref">pa1hib0 /a>, a href="+code=SSB_SPROM8_PA1HIB0" class="sref">SSB_SPROM8_PA1HIB0 /a>, ~0, 0);o"373 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=pa1hib1" class="sref">pa1hib1 /a>, a href="+code=SSB_SPROM8_PA1HIB1" class="sref">SSB_SPROM8_PA1HIB1 /a>, ~0, 0);o"374 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=pa1hib2" class="sref">pa1hib2 /a>, a href="+code=SSB_SPROM8_PA1HIB2" class="sref">SSB_SPROM8_PA1HIB2 /a>, ~0, 0);o"375 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=cck2gpo" class="sref">cck2gpo /a>, a href="+code=SSB_SPROM8_CCK2GPO" class="sref">SSB_SPROM8_CCK2GPO /a>, ~0, 0);o"376 /a> a href="+code=SPEX32" class="sref">SPEX32 /a>( a href="+code=ofdm2gpo" class="sref">ofdm2gpo /a>, a href="+code=SSB_SPROM8_OFDM2GPO" class="sref">SSB_SPROM8_OFDM2GPO /a>, ~0, 0);o"377 /a> a href="+code=SPEX32" class="sref">SPEX32 /a>( a href="+code=ofdm5glpo" class="sref">ofdm5glpo /a>, a href="+code=SSB_SPROM8_OFDM5GLPO" class="sref">SSB_SPROM8_OFDM5GLPO /a>, ~0, 0);o"378 /a> a href="+code=SPEX32" class="sref">SPEX32 /a>( a href="+code=ofdm5gpo" class="sref">ofdm5gpo /a>, a href="+code=SSB_SPROM8_OFDM5GPO" class="sref">SSB_SPROM8_OFDM5GPO /a>, ~0, 0);o"379 /a> a href="+code=SPEX32" class="sref">SPEX32 /a>( a href="+code=ofdm5ghpo" class="sref">ofdm5ghpo /a>, a href="+code=SSB_SPROM8_OFDM5GHPO" class="sref">SSB_SPROM8_OFDM5GHPO /a>, ~0, 0);o"380 /a>o"381 /a> spa3 class="comment">/* Extrac= the antenna gai3 values. */ /spa3.1"382 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=antenna_gai3" class="sref">antenna_gai3 /a>. a href="+code=a0" class="sref">a0 /a>, a href="+code=SSB_SPROM8_AGAIN01" class="sref">SSB_SPROM8_AGAIN01 /a>,1"383 /a> a href="+code=SSB_SPROM8_AGAIN0" class="sref">SSB_SPROM8_AGAIN0 /a>, a href="+code=SSB_SPROM8_AGAIN0_SHIFT" class="sref">SSB_SPROM8_AGAIN0_SHIFT /a>);o"384 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=antenna_gai3" class="sref">antenna_gai3 /a>. a href="+code=a1" class="sref">a1 /a>, a href="+code=SSB_SPROM8_AGAIN01" class="sref">SSB_SPROM8_AGAIN01 /a>,1"385 /a> a href="+code=SSB_SPROM8_AGAIN1" class="sref">SSB_SPROM8_AGAIN1 /a>, a href="+code=SSB_SPROM8_AGAIN1_SHIFT" class="sref">SSB_SPROM8_AGAIN1_SHIFT /a>);o"386 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=antenna_gai3" class="sref">antenna_gai3 /a>. a href="+code=a2" class="sref">a2 /a>, a href="+code=SSB_SPROM8_AGAIN23" class="sref">SSB_SPROM8_AGAIN23 /a>,1"387 /a> a href="+code=SSB_SPROM8_AGAIN2" class="sref">SSB_SPROM8_AGAIN2 /a>, a href="+code=SSB_SPROM8_AGAIN2_SHIFT" class="sref">SSB_SPROM8_AGAIN2_SHIFT /a>);o"388 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=antenna_gai3" class="sref">antenna_gai3 /a>. a href="+code=a3" class="sref">a3 /a>, a href="+code=SSB_SPROM8_AGAIN23" class="sref">SSB_SPROM8_AGAIN23 /a>,1"389 /a> a href="+code=SSB_SPROM8_AGAIN3" class="sref">SSB_SPROM8_AGAIN3 /a>, a href="+code=SSB_SPROM8_AGAIN3_SHIFT" class="sref">SSB_SPROM8_AGAIN3_SHIFT /a>);o"390 /a>o"391 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=leddc_on_time" class="sref">leddc_on_time /a>, a href="+code=SSB_SPROM8_LEDDC" class="sref">SSB_SPROM8_LEDDC /a>, a href="+code=SSB_SPROM8_LEDDC_ON" class="sref">SSB_SPROM8_LEDDC_ON /a>,1"392 /a> a href="+code=SSB_SPROM8_LEDDC_ON_SHIFT" class="sref">SSB_SPROM8_LEDDC_ON_SHIFT /a>);o"393 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=leddc_off_time" class="sref">leddc_off_time /a>, a href="+code=SSB_SPROM8_LEDDC" class="sref">SSB_SPROM8_LEDDC /a>, a href="+code=SSB_SPROM8_LEDDC_OFF" class="sref">SSB_SPROM8_LEDDC_OFF /a>,1"394 /a> a href="+code=SSB_SPROM8_LEDDC_OFF_SHIFT" class="sref">SSB_SPROM8_LEDDC_OFF_SHIFT /a>);o"395 /a>o"396 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=txchai3" class="sref">txchai3 /a>, a href="+code=SSB_SPROM8_TXRXC" class="sref">SSB_SPROM8_TXRXC /a>, a href="+code=SSB_SPROM8_TXRXC_TXCHAIN" class="sref">SSB_SPROM8_TXRXC_TXCHAIN /a>,1"397 /a> a href="+code=SSB_SPROM8_TXRXC_TXCHAIN_SHIFT" class="sref">SSB_SPROM8_TXRXC_TXCHAIN_SHIFT /a>);o"398 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=rxchai3" class="sref">rxchai3 /a>, a href="+code=SSB_SPROM8_TXRXC" class="sref">SSB_SPROM8_TXRXC /a>, a href="+code=SSB_SPROM8_TXRXC_RXCHAIN" class="sref">SSB_SPROM8_TXRXC_RXCHAIN /a>,1"399 /a> a href="+code=SSB_SPROM8_TXRXC_RXCHAIN_SHIFT" class="sref">SSB_SPROM8_TXRXC_RXCHAIN_SHIFT /a>);o"400 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=antswitch" class="sref">antswitch /a>, a href="+code=SSB_SPROM8_TXRXC" class="sref">SSB_SPROM8_TXRXC /a>, a href="+code=SSB_SPROM8_TXRXC_SWITCH" class="sref">SSB_SPROM8_TXRXC_SWITCH /a>,1"401 /a> a href="+code=SSB_SPROM8_TXRXC_SWITCH_SHIFT" class="sref">SSB_SPROM8_TXRXC_SWITCH_SHIFT /a>);o"402 /a>o"403 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=opo" class="sref">opo /a>, a href="+code=SSB_SPROM8_OFDM2GPO" class="sref">SSB_SPROM8_OFDM2GPO /a>, 0x00ff, 0);o"404 /a>o"405 /a> a href="+code=SPEX_ARRAY8" class="sref">SPEX_ARRAY8 /a>( a href="+code=mcs2gpo" class="sref">mcs2gpo /a>, a href="+code=SSB_SPROM8_2G_MCSPO" class="sref">SSB_SPROM8_2G_MCSPO /a>, ~0, 0);o"406 /a> a href="+code=SPEX_ARRAY8" class="sref">SPEX_ARRAY8 /a>( a href="+code=mcs5gpo" class="sref">mcs5gpo /a>, a href="+code=SSB_SPROM8_5G_MCSPO" class="sref">SSB_SPROM8_5G_MCSPO /a>, ~0, 0);o"407 /a> a href="+code=SPEX_ARRAY8" class="sref">SPEX_ARRAY8 /a>( a href="+code=mcs5glpo" class="sref">mcs5glpo /a>, a href="+code=SSB_SPROM8_5GL_MCSPO" class="sref">SSB_SPROM8_5GL_MCSPO /a>, ~0, 0);o"408 /a> a href="+code=SPEX_ARRAY8" class="sref">SPEX_ARRAY8 /a>( a href="+code=mcs5ghpo" class="sref">mcs5ghpo /a>, a href="+code=SSB_SPROM8_5GH_MCSPO" class="sref">SSB_SPROM8_5GH_MCSPO /a>, ~0, 0);o"409 /a>o"410 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=rawtempsense" class="sref">rawtempsense /a>, a href="+code=SSB_SPROM8_RAWTS" class="sref">SSB_SPROM8_RAWTS /a>, a href="+code=SSB_SPROM8_RAWTS_RAWTEMP" class="sref">SSB_SPROM8_RAWTS_RAWTEMP /a>,1"411 /a> a href="+code=SSB_SPROM8_RAWTS_RAWTEMP_SHIFT" class="sref">SSB_SPROM8_RAWTS_RAWTEMP_SHIFT /a>);o"412 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=measpower" class="sref">measpower /a>, a href="+code=SSB_SPROM8_RAWTS" class="sref">SSB_SPROM8_RAWTS /a>, a href="+code=SSB_SPROM8_RAWTS_MEASPOWER" class="sref">SSB_SPROM8_RAWTS_MEASPOWER /a>,1"413 /a> a href="+code=SSB_SPROM8_RAWTS_MEASPOWER_SHIFT" class="sref">SSB_SPROM8_RAWTS_MEASPOWER_SHIFT /a>);o"414 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=tempsense_slope" class="sref">tempsense_slope /a>, a href="+code=SSB_SPROM8_OPT_CORRX" class="sref">SSB_SPROM8_OPT_CORRX /a>,1"415 /a> a href="+code=SSB_SPROM8_OPT_CORRX_TEMP_SLOPE" class="sref">SSB_SPROM8_OPT_CORRX_TEMP_SLOPE /a>,1"416 /a> a href="+code=SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT" class="sref">SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT /a>);o"417 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=tempcorrx" class="sref">tempcorrx /a>, a href="+code=SSB_SPROM8_OPT_CORRX" class="sref">SSB_SPROM8_OPT_CORRX /a>, a href="+code=SSB_SPROM8_OPT_CORRX_TEMPCORRX" class="sref">SSB_SPROM8_OPT_CORRX_TEMPCORRX /a>,1"418 /a> a href="+code=SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT" class="sref">SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT /a>);o"419 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=tempsense_optio3" class="sref">tempsense_optio3 /a>, a href="+code=SSB_SPROM8_OPT_CORRX" class="sref">SSB_SPROM8_OPT_CORRX /a>,1"420 /a> a href="+code=SSB_SPROM8_OPT_CORRX_TEMP_OPTION" class="sref">SSB_SPROM8_OPT_CORRX_TEMP_OPTION /a>,1"421 /a> a href="+code=SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT" class="sref">SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT /a>);o"422 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=freqoffset_corr" class="sref">freqoffset_corr /a>, a href="+code=SSB_SPROM8_HWIQ_IQSWP" class="sref">SSB_SPROM8_HWIQ_IQSWP /a>,1"423 /a> a href="+code=SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR" class="sref">SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR /a>,1"424 /a> a href="+code=SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT" class="sref">SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT /a>);o"425 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=iqcal_swp_dis" class="sref">iqcal_swp_dis /a>, a href="+code=SSB_SPROM8_HWIQ_IQSWP" class="sref">SSB_SPROM8_HWIQ_IQSWP /a>,1"426 /a> a href="+code=SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP" class="sref">SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP /a>,1"427 /a> a href="+code=SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT" class="sref">SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT /a>);o"428 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=hw_iqcal_e3" class="sref">hw_iqcal_e3 /a>, a href="+code=SSB_SPROM8_HWIQ_IQSWP" class="sref">SSB_SPROM8_HWIQ_IQSWP /a>, a href="+code=SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL" class="sref">SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL /a>,1"429 /a> a href="+code=SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT" class="sref">SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT /a>);o"430 /a>o"431 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=bw40po" class="sref">bw40po /a>, a href="+code=SSB_SPROM8_BW40PO" class="sref">SSB_SPROM8_BW40PO /a>, ~0, 0);o"432 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=cddpo" class="sref">cddpo /a>, a href="+code=SSB_SPROM8_CDDPO" class="sref">SSB_SPROM8_CDDPO /a>, ~0, 0);o"433 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=stbcpo" class="sref">stbcpo /a>, a href="+code=SSB_SPROM8_STBCPO" class="sref">SSB_SPROM8_STBCPO /a>, ~0, 0);o"434 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=bwduppo" class="sref">bwduppo /a>, a href="+code=SSB_SPROM8_BWDUPPO" class="sref">SSB_SPROM8_BWDUPPO /a>, ~0, 0);o"435 /a>o"436 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=tempthresh" class="sref">tempthresh /a>, a href="+code=SSB_SPROM8_THERMAL" class="sref">SSB_SPROM8_THERMAL /a>, a href="+code=SSB_SPROM8_THERMAL_TRESH" class="sref">SSB_SPROM8_THERMAL_TRESH /a>,1"437 /a> a href="+code=SSB_SPROM8_THERMAL_TRESH_SHIFT" class="sref">SSB_SPROM8_THERMAL_TRESH_SHIFT /a>);o"438 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=tempoffset" class="sref">tempoffset /a>, a href="+code=SSB_SPROM8_THERMAL" class="sref">SSB_SPROM8_THERMAL /a>, a href="+code=SSB_SPROM8_THERMAL_OFFSET" class="sref">SSB_SPROM8_THERMAL_OFFSET /a>,1"439 /a> a href="+code=SSB_SPROM8_THERMAL_OFFSET_SHIFT" class="sref">SSB_SPROM8_THERMAL_OFFSET_SHIFT /a>);o"440 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=phycal_tempdelta" class="sref">phycal_tempdelta /a>, a href="+code=SSB_SPROM8_TEMPDELTA" class="sref">SSB_SPROM8_TEMPDELTA /a>,1"441 /a> a href="+code=SSB_SPROM8_TEMPDELTA_PHYCAL" class="sref">SSB_SPROM8_TEMPDELTA_PHYCAL /a>,1"442 /a> a href="+code=SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT" class="sref">SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT /a>);o"443 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=temps_period" class="sref">temps_period /a>, a href="+code=SSB_SPROM8_TEMPDELTA" class="sref">SSB_SPROM8_TEMPDELTA /a>, a href="+code=SSB_SPROM8_TEMPDELTA_PERIOD" class="sref">SSB_SPROM8_TEMPDELTA_PERIOD /a>,1"444 /a> a href="+code=SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT" class="sref">SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT /a>);o"445 /a> a href="+code=SPEX" class="sref">SPEX /a>( a href="+code=temps_hysteresis" class="sref">temps_hysteresis /a>, a href="+code=SSB_SPROM8_TEMPDELTA" class="sref">SSB_SPROM8_TEMPDELTA /a>,1"446 /a> a href="+code=SSB_SPROM8_TEMPDELTA_HYSTERESIS" class="sref">SSB_SPROM8_TEMPDELTA_HYSTERESIS /a>,1"447 /a> a href="+code=SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT" class="sref">SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT /a>);o"448 /a>}o"449 /a>o"450 /a> spa3 class="comment">/* /spa3.1"451 /a> spa3 class="comment"> * Indicates the presence of external SPROM. /spa3.1"452 /a> spa3 class="comment"> */ /spa3.1"453 /a>static a href="+code=bool" class="sref">bool /a> a href="+code=bcma_sprom_ext_available" class="sref">bcma_sprom_ext_available /a>(struct a href="+code=bcma_bus" class="sref">bcma_bus /a> * a href="+code=bus" class="sref">bus /a>)1"454 /a>{1"455 /a> a href="+code=u32" class="sref">u32 /a> a href="+code=chip_status" class="sref">chip_status /a>;o"456 /a> a href="+code=u32" class="sref">u32 /a> a href="+code=srom_control" class="sref">srom_control /a>;o"457 /a> a href="+code=u32" class="sref">u32 /a> a href="+code=present_mask" class="sref">present_mask /a>;o"458 /a>o"459 /a> if ( a href="+code=bus" class="sref">bus /a>-> a href="+code=drv_cc" class="sref">drv_cc /a>. a href="+code=core" class="sref">core /a>-> a href="+code=id" class="sref">id /a>. a href="+code=rev" class="sref">rev /a> >= 31) {1"460 /a> if (!( a href="+code=bus" class="sref">bus /a>-> a href="+code=drv_cc" class="sref">drv_cc /a>. a href="+code=capabilities" class="sref">capabilities /a> & a href="+code=BCMA_CC_CAP_SPROM" class="sref">BCMA_CC_CAP_SPROM /a>))1"461 /a> return a href="+code=false" class="sref">false /a>;o"462 /a>o"463 /a> a href="+code=srom_control" class="sref">srom_control /a> = a href="+code=bcma_read32" class="sref">bcma_read32 /a>( a href="+code=bus" class="sref">bus /a>-> a href="+code=drv_cc" class="sref">drv_cc /a>. a href="+code=core" class="sref">core /a>,1"464 /a> a href="+code=BCMA_CC_SROM_CONTROL" class="sref">BCMA_CC_SROM_CONTROL /a>);o"465 /a> return a href="+code=srom_control" class="sref">srom_control /a> & a href="+code=BCMA_CC_SROM_CONTROL_PRESENT" class="sref">BCMA_CC_SROM_CONTROL_PRESENT /a>;o"466 /a> }o"467 /a>o"468 /a> spa3 class="comment">/* older chipcommon revisions use chip status register */ /spa3.1"469 /a> a href="+code=chip_status" class="sref">chip_status /a> = a href="+code=bcma_read32" class="sref">bcma_read32 /a>( a href="+code=bus" class="sref">bus /a>-> a href="+code=drv_cc" class="sref">drv_cc /a>. a href="+code=core" class="sref">core /a>, a href="+code=BCMA_CC_CHIPSTAT" class="sref">BCMA_CC_CHIPSTAT /a>);o"470 /a> switch ( a href="+code=bus" class="sref">bus /a>-> a href="+code=chipinfo" class="sref">chipinfo /a>. a href="+code=id" class="sref">id /a>) {1"471 /a> case a href="+code=BCMA_CHIP_ID_BCM4313" class="sref">BCMA_CHIP_ID_BCM4313 /a>:1"472 /a> a href="+code=present_mask" class="sref">present_mask /a> = a href="+code=BCMA_CC_CHIPST_4313_SPROM_PRESENT" class="sref">BCMA_CC_CHIPST_4313_SPROM_PRESENT /a>;o"473 /a> break;o"474 /a>o"475 /a> case a href="+code=BCMA_CHIP_ID_BCM4331" class="sref">BCMA_CHIP_ID_BCM4331 /a>:1"476 /a> a href="+code=present_mask" class="sref">present_mask /a> = a href="+code=BCMA_CC_CHIPST_4331_SPROM_PRESENT" class="sref">BCMA_CC_CHIPST_4331_SPROM_PRESENT /a>;o"477 /a> break;o"478 /a>o"479 /a> default:1"480 /a> return a href="+code=true" class="sref">true /a>;o"481 /a> }o"482 /a>o"483 /a> return a href="+code=chip_status" class="sref">chip_status /a> & a href="+code=present_mask" class="sref">present_mask /a>;o"484 /a>}o"485 /a>o"486 /a> spa3 class="comment">/* /spa3.1"487 /a> spa3 class="comment"> * Indicates that on-chip OTP memory is present and enabled. /spa3.1"488 /a> spa3 class="comment"> */ /spa3.1"489 /a>static a href="+code=bool" class="sref">bool /a> a href="+code=bcma_sprom_onchip_available" class="sref">bcma_sprom_onchip_available /a>(struct a href="+code=bcma_bus" class="sref">bcma_bus /a> * a href="+code=bus" class="sref">bus /a>)1"490 /a>{1"491 /a> a href="+code=u32" class="sref">u32 /a> a href="+code=chip_status" class="sref">chip_status /a>;o"492 /a> a href="+code=u32" class="sref">u32 /a> a href="+code=otpsize" class="sref">otpsize /a> = 0;o"493 /a> a href="+code=bool" class="sref">bool /a> a href="+code=present" class="sref">present /a>;o"494 /a>o"495 /a> a href="+code=chip_status" class="sref">chip_status /a> = a href="+code=bcma_read32" class="sref">bcma_read32 /a>( a href="+code=bus" class="sref">bus /a>-> a href="+code=drv_cc" class="sref">drv_cc /a>. a href="+code=core" class="sref">core /a>, a href="+code=BCMA_CC_CHIPSTAT" class="sref">BCMA_CC_CHIPSTAT /a>);o"496 /a> switch ( a href="+code=bus" class="sref">bus /a>-> a href="+code=chipinfo" class="sref">chipinfo /a>. a href="+code=id" class="sref">id /a>) {1"497 /a> case a href="+code=BCMA_CHIP_ID_BCM4313" class="sref">BCMA_CHIP_ID_BCM4313 /a>:1"498 /a> a href="+code=present" class="sref">present /a> = a href="+code=chip_status" class="sref">chip_status /a> & a href="+code=BCMA_CC_CHIPST_4313_OTP_PRESENT" class="sref">BCMA_CC_CHIPST_4313_OTP_PRESENT /a>;o"499 /a> break;o"500 /a>o"501 /a> case a href="+code=BCMA_CHIP_ID_BCM4331" class="sref">BCMA_CHIP_ID_BCM4331 /a>:1"502 /a> a href="+code=present" class="sref">present /a> = a href="+code=chip_status" class="sref">chip_status /a> & a href="+code=BCMA_CC_CHIPST_4331_OTP_PRESENT" class="sref">BCMA_CC_CHIPST_4331_OTP_PRESENT /a>;o"503 /a> break;o"504 /a>o"505 /a> case a href="+code=BCMA_CHIP_ID_BCM43224" class="sref">BCMA_CHIP_ID_BCM43224 /a>:1"506 /a> case a href="+code=BCMA_CHIP_ID_BCM43225" class="sref">BCMA_CHIP_ID_BCM43225 /a>:1"507 /a> spa3 class="comment">/* for these chips OTP is always available */ /spa3.1"508 /a> a href="+code=present" class="sref">present /a> = a href="+code=true" class="sref">true /a>;o"509 /a> break;o"510 /a> case a href="+code=BCMA_CHIP_ID_BCM43228" class="sref">BCMA_CHIP_ID_BCM43228 /a>:1"511 /a> a href="+code=present" class="sref">present /a> = a href="+code=chip_status" class="sref">chip_status /a> & a href="+code=BCMA_CC_CHIPST_43228_OTP_PRESENT" class="sref">BCMA_CC_CHIPST_43228_OTP_PRESENT /a>;o"512 /a> break;o"513 /a> default:1"514 /a> a href="+code=present" class="sref">present /a> = a href="+code=false" class="sref">false /a>;o"515 /a> break;o"516 /a> }o"517 /a>o"518 /a> if ( a href="+code=present" class="sref">present /a>) {1"519 /a> a href="+code=otpsize" class="sref">otpsize /a> = a href="+code=bus" class="sref">bus /a>-> a href="+code=drv_cc" class="sref">drv_cc /a>. a href="+code=capabilities" class="sref">capabilities /a> & a href="+code=BCMA_CC_CAP_OTPS" class="sref">BCMA_CC_CAP_OTPS /a>;o"520 /a> a href="+code=otpsize" class="sref">otpsize /a> >>= a href="+code=BCMA_CC_CAP_OTPS_SHIFT" class="sref">BCMA_CC_CAP_OTPS_SHIFT /a>;o"521 /a> }o"522 /a>o"523 /a> return a href="+code=otpsize" class="sref">otpsize /a> != 0;o"524 /a>}o"525 /a>o"526 /a> spa3 class="comment">/* /spa3.1"527 /a> spa3 class="comment"> * Verify OTP is filled and determine the byte /spa3.1"528 /a> spa3 class="comment"> * offset where SPROM data is located. /spa3.1"529 /a> spa3 class="comment"> * /spa3.1"530 /a> spa3 class="comment"> * On error, returns 0; byte offset otherwise. /spa3.1"531 /a> spa3 class="comment"> */ /spa3.1"532 /a>static int a href="+code=bcma_sprom_onchip_offset" class="sref">bcma_sprom_onchip_offset /a>(struct a href="+code=bcma_bus" class="sref">bcma_bus /a> * a href="+code=bus" class="sref">bus /a>)1"533 /a>{1"534 /a> struct a href="+code=bcma_device" class="sref">bcma_device /a> * a href="+code=cc" class="sref">cc /a> = a href="+code=bus" class="sref">bus /a>-> a href="+code=drv_cc" class="sref">drv_cc /a>. a href="+code=core" class="sref">core /a>;o"535 /a> a href="+code=u32" class="sref">u32 /a> a href="+code=offset" class="sref">offset /a>;o"536 /a>o"537 /a> spa3 class="comment">/* verify OTP status */ /spa3.1"538 /a> if (( a href="+code=bcma_read32" class="sref">bcma_read32 /a>( a href="+code=cc" class="sref">cc /a>, a href="+code=BCMA_CC_OTPS" class="sref">BCMA_CC_OTPS /a>) & a href="+code=BCMA_CC_OTPS_GU_PROG_HW" class="sref">BCMA_CC_OTPS_GU_PROG_HW /a>) == 0)1"539 /a> return 0;o"540 /a>o"541 /a> spa3 class="comment">/* obtai3 bit offset from otplayout register */ /spa3.1"542 /a> a href="+code=offset" class="sref">offset /a> = ( a href="+code=bcma_read32" class="sref">bcma_read32 /a>( a href="+code=cc" class="sref">cc /a>, a href="+code=BCMA_CC_OTPL" class="sref">BCMA_CC_OTPL /a>) & a href="+code=BCMA_CC_OTPL_GURGN_OFFSET" class="sref">BCMA_CC_OTPL_GURGN_OFFSET /a>);o"543 /a> return a href="+code=BCMA_CC_SPROM" class="sref">BCMA_CC_SPROM /a> + ( a href="+code=offset" class="sref">offset /a> >> 3);o"544 /a>}o"545 /a>o"546 /a>int a href="+code=bcma_sprom_get" class="sref">bcma_sprom_get /a>(struct a href="+code=bcma_bus" class="sref">bcma_bus /a> * a href="+code=bus" class="sref">bus /a>)1"547 /a>{1"548 /a> a href="+code=u16" class="sref">u16 /a> a href="+code=offset" class="sref">offset /a> = a href="+code=BCMA_CC_SPROM" class="sref">BCMA_CC_SPROM /a>;o"549 /a> a href="+code=u16" class="sref">u16 /a> * a href="+code=sprom" class="sref">sprom /a>;o"550 /a> int a href="+code=err" class="sref">err /a> = 0;o"551 /a>o"552 /a> if (! a href="+code=bus" class="sref">bus /a>-> a href="+code=drv_cc" class="sref">drv_cc /a>. a href="+code=core" class="sref">core /a>)1"553 /a> return - a href="+code=EOPNOTSUPP" class="sref">EOPNOTSUPP /a>;o"554 /a>o"555 /a> if (! a href="+code=bcma_sprom_ext_available" class="sref">bcma_sprom_ext_available /a>( a href="+code=bus" class="sref">bus /a>)) {1"556 /a> a href="+code=bool" class="sref">bool /a> a href="+code=sprom_onchip" class="sref">sprom_onchip /a>;o"557 /a>o"558 /a> spa3 class="comment">/* /spa3.1"559 /a> spa3 class="comment"> * External SPROM takes precedence so check /spa3.1"560 /a> spa3 class="comment"> * on-chip OTP only when no external SPROM /spa3.1"561 /a> spa3 class="comment"> * is present. /spa3.1"562 /a> spa3 class="comment"> */ /spa3.1"563 /a> a href="+code=sprom_onchip" class="sref">sprom_onchip /a> = a href="+code=bcma_sprom_onchip_available" class="sref">bcma_sprom_onchip_available /a>( a href="+code=bus" class="sref">bus /a>);o"564 /a> if ( a href="+code=sprom_onchip" class="sref">sprom_onchip /a>) {1"565 /a> spa3 class="comment">/* determine offset */ /spa3.1"566 /a> a href="+code=offset" class="sref">offset /a> = a href="+code=bcma_sprom_onchip_offset" class="sref">bcma_sprom_onchip_offset /a>( a href="+code=bus" class="sref">bus /a>);o"567 /a> }o"568 /a> if (! a href="+code=offset" class="sref">offset /a> || ! a href="+code=sprom_onchip" class="sref">sprom_onchip /a>) {1"569 /a> spa3 class="comment">/* /spa3.1"570 /a> spa3 class="comment"> * Maybe there is no SPROM on the device? /spa3.1"571 /a> spa3 class="comment"> * Now we ask the arch code if there is some sprom /spa3.1"572 /a> spa3 class="comment"> * available for this device in some other storage. /spa3.1"573 /a> spa3 class="comment"> */ /spa3.1"574 /a> a href="+code=err" class="sref">err /a> = a href="+code=bcma_fill_sprom_with_fallback" class="sref">bcma_fill_sprom_with_fallback /a>( a href="+code=bus" class="sref">bus /a>, & a href="+code=bus" class="sref">bus /a>-> a href="+code=sprom" class="sref">sprom /a>);o"575 /a> return a href="+code=err" class="sref">err /a>;o"576 /a> }o"577 /a> }o"578 /a>o"579 /a> a href="+code=sprom" class="sref">sprom /a> = a href="+code=kcalloc" class="sref">kcalloc /a>( a href="+code=SSB_SPROMSIZE_WORDS_R4" class="sref">SSB_SPROMSIZE_WORDS_R4 /a>, sizeof( a href="+code=u16" class="sref">u16 /a>),1"580 /a> a href="+code=GFP_KERNEL" class="sref">GFP_KERNEL /a>);o"581 /a> if (! a href="+code=sprom" class="sref">sprom /a>)o"582 /a> return - a href="+code=ENOMEM" class="sref">ENOMEM /a>;o"583 /a>o"584 /a> if ( a href="+code=bus" class="sref">bus /a>-> a href="+code=chipinfo" class="sref">chipinfo /a>. a href="+code=id" class="sref">id /a> == a href="+code=BCMA_CHIP_ID_BCM4331" class="sref">BCMA_CHIP_ID_BCM4331 /a> ||o"585 /a> a href="+code=bus" class="sref">bus /a>-> a href="+code=chipinfo" class="sref">chipinfo /a>. a href="+code=id" class="sref">id /a> == a href="+code=BCMA_CHIP_ID_BCM43431" class="sref">BCMA_CHIP_ID_BCM43431 /a>)o"586 /a> a href="+code=bcma_chipco_bcm4331_ext_pa_lines_ctl" class="sref">bcma_chipco_bcm4331_ext_pa_lines_ctl /a>(& a href="+code=bus" class="sref">bus /a>-> a href="+code=drv_cc" class="sref">drv_cc /a>, a href="+code=false" class="sref">false /a>);o"587 /a>o"588 /a> a href="+code=bcma_debug" class="sref">bcma_debug /a>( a href="+code=bus" class="sref">bus /a>, spa3 class="string">"SPROM offset 0x%x\n" /spa3., a href="+code=offset" class="sref">offset /a>);o"589 /a> a href="+code=bcma_sprom_read" class="sref">bcma_sprom_read /a>( a href="+code=bus" class="sref">bus /a>, a href="+code=offset" class="sref">offset /a>, a href="+code=sprom" class="sref">sprom /a>);o"590 /a>o"591 /a> if ( a href="+code=bus" class="sref">bus /a>-> a href="+code=chipinfo" class="sref">chipinfo /a>. a href="+code=id" class="sref">id /a> == a href="+code=BCMA_CHIP_ID_BCM4331" class="sref">BCMA_CHIP_ID_BCM4331 /a> ||o"592 /a> a href="+code=bus" class="sref">bus /a>-> a href="+code=chipinfo" class="sref">chipinfo /a>. a href="+code=id" class="sref">id /a> == a href="+code=BCMA_CHIP_ID_BCM43431" class="sref">BCMA_CHIP_ID_BCM43431 /a>)o"593 /a> a href="+code=bcma_chipco_bcm4331_ext_pa_lines_ctl" class="sref">bcma_chipco_bcm4331_ext_pa_lines_ctl /a>(& a href="+code=bus" class="sref">bus /a>-> a href="+code=drv_cc" class="sref">drv_cc /a>, a href="+code=true" class="sref">true /a>);o"594 /a>o"595 /a> a href="+code=err" class="sref">err /a> = a href="+code=bcma_sprom_valid" class="sref">bcma_sprom_valid /a>( a href="+code=sprom" class="sref">sprom /a>);o"596 /a> if ( a href="+code=err" class="sref">err /a>)o"597 /a> goto a href="+code=out" class="sref">out /a>;o"598 /a>o"599 /a> a href="+code=bcma_sprom_extract_r8" class="sref">bcma_sprom_extract_r8 /a>( a href="+code=bus" class="sref">bus /a>, a href="+code=sprom" class="sref">sprom /a>);o"600 /a>o"601 /a> a href="+code=out" class="sref">out /a>:1"602 /a> a href="+code=kfree" class="sref">kfree /a>( a href="+code=sprom" class="sref">sprom /a>);o"603 /a> return a href="+code=err" class="sref">err /a>;o"604 /a>}o"605 /a>
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