LXR linux/drivers/pci/pci.h

   1#ifndef DRIVERS_PCI_H
   2#define DRIVERS_PCI_H
   3
   4#include <linux/workqueue.h>
   5
   6#define PCI_CFG_SPACE_SIZE      256
   7#define PCI_CFG_SPACE_EXP_SIZE  4096
   8
   9/* Functions internal to the PCI core code */
  10
  11extern int pci_uevent(struct device *dev, struct kobj_uevent_env *env);
  12extern int pci_create_sysfs_dev_files(struct pci_dev *pdev);
  13extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
  14#if !defined(CONFIG_DMI) && !defined(CONFIG_ACPI)
  15static inline void pci_create_firmware_label_files(struct pci_dev *pdev)
  16{ return; }
  17static inline void pci_remove_firmware_label_files(struct pci_dev *pdev)
  18{ return; }
  19#else
  20extern void pci_create_firmware_label_files(struct pci_dev *pdev);
  21extern void pci_remove_firmware_label_files(struct pci_dev *pdev);
  22#endif
  23extern void pci_cleanup_rom(struct pci_dev *dev);
  24#ifdef HAVE_PCI_MMAP
  25enum pci_mmap_api {
  26        PCI_MMAP_SYSFS, /* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */
  27        PCI_MMAP_PROCFS /* mmap on /proc/bus/pci/<BDF> */
  28};
  29extern int pci_mmap_fits(struct pci_dev *pdev, int resno,
  30                         struct vm_area_struct *vmai,
  31                         enum pci_mmap_api mmap_api);
  32#endif
  33int pci_probe_reset_function(struct pci_dev *dev);
  34
  35/**
  36 * struct pci_platform_pm_ops - Firmware PM callbacks
  37 *
  38 * @is_manageable: returns 'true' if given device is power manageable by the
  39 *                 platform firmware
  40 *
  41 * @set_state: invokes the platform firmware to set the device's power state
  42 *
  43 * @choose_state: returns PCI power state of given device preferred by the
  44 *                platform; to be used during system-wide transitions from a
  45 *                sleeping state to the working state and vice versa
  46 *
  47 * @can_wakeup: returns 'true' if given device is capable of waking up the
  48 *              system from a sleeping state
  49 *
  50 * @sleep_wake: enables/disables the system wake up capability of given device
  51 *
  52 * @run_wake: enables/disables the platform to generate run-time wake-up events
  53 *              for given device (the device's wake-up capability has to be
  54 *              enabled by @sleep_wake for this feature to work)
  55 *
  56 * If given platform is generally capable of power managing PCI devices, all of
  57 * these callbacks are mandatory.
  58 */
  59struct pci_platform_pm_ops {
  60        bool (*is_manageable)(struct pci_dev *dev);
  61        int (*set_state)(struct pci_dev *dev, pci_power_t state);
  62        pci_power_t (*choose_state)(struct pci_dev *dev);
  63        bool (*can_wakeup)(struct pci_dev *dev);
  64        int (*sleep_wake)(struct pci_dev *dev, bool enable);
  65        int (*run_wake)(struct pci_dev *dev, bool enable);
  66};
  67
  68extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops);
  69extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state);
  70extern void pci_disable_enabled_device(struct pci_dev *dev);
  71extern int pci_finish_runtime_suspend(struct pci_dev *dev);
  72extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign);
  73extern void pci_pm_init(struct pci_dev *dev);
  74extern void platform_pci_wakeup_init(struct pci_dev *dev);
  75extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);
  76
  77static inline void pci_wakeup_event(struct pci_dev *dev)
  78{
  79        /* Wait 100 ms before the system can be put into a sleep state. */
  80        pm_wakeup_event(&dev->dev, 100);
  81}
  82
  83static inline bool pci_is_bridge(struct pci_dev *pci_dev)
  84{
  85        return !!(pci_dev->subordinate);
  86}
  87
  88extern int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
  89extern int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);
  90extern int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val);
  91extern int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val);
  92extern int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val);
  93extern int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val);
  94
  95struct pci_vpd_ops {
  96        ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
  97        ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
  98        void (*release)(struct pci_dev *dev);
  99};
 100
 101struct pci_vpd {
 102        unsigned int len;
 103        const struct pci_vpd_ops *ops;
 104        struct bin_attribute *attr; /* descriptor for sysfs VPD entry */
 105};
 106
 107extern int pci_vpd_pci22_init(struct pci_dev *dev);
 108static inline void pci_vpd_release(struct pci_dev *dev)
 109{
 110        if (dev->vpd)
 111                dev->vpd->ops->release(dev);
 112}
 113
 114/* PCI /proc functions */
 115#ifdef CONFIG_PROC_FS
 116extern int pci_proc_attach_device(struct pci_dev *dev);
 117extern int pci_proc_detach_device(struct pci_dev *dev);
 118extern int pci_proc_detach_bus(struct pci_bus *bus);
 119#else
 120static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }
 121static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }
 122static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }
 123#endif
 124
 125/* Functions for PCI Hotplug drivers to use */
 126extern unsigned int pci_do_scan_bus(struct pci_bus *bus);
 127
 128#ifdef HAVE_PCI_LEGACY
 129extern void pci_create_legacy_files(struct pci_bus *bus);
 130extern void pci_remove_legacy_files(struct pci_bus *bus);
 131#else
 132static inline void pci_create_legacy_files(struct pci_bus *bus) { return; }
 133static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; }
 134#endif
 135
 136/* Lock for read/write access to pci device and bus lists */
 137extern struct rw_semaphore pci_bus_sem;
 138
 139extern raw_spinlock_t pci_lock;
 140
 141extern unsigned int pci_pm_d3_delay;
 142
 143#ifdef CONFIG_PCI_MSI
 144void pci_no_msi(void);
 145extern void pci_msi_init_pci_dev(struct pci_dev *dev);
 146#else
 147static inline void pci_no_msi(void) { }
 148static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
 149#endif
 150
 151extern void pci_realloc(void);
 152
 153static inline int pci_no_d1d2(struct pci_dev *dev)
 154{
 155        unsigned int parent_dstates = 0;
 156
 157        if (dev->bus->self)
 158                parent_dstates = dev->bus->self->no_d1d2;
 159        return (dev->no_d1d2 || parent_dstates);
 160
 161}
 162extern struct device_attribute pci_dev_attrs[];
 163extern struct device_attribute pcibus_dev_attrs[];
 164#ifdef CONFIG_HOTPLUG
 165extern struct bus_attribute pci_bus_attrs[];
 166#else
 167#define pci_bus_attrs   NULL
 168#endif
 169
 170
 171/**
 172 * pci_match_one_device - Tell if a PCI device structure has a matching
 173 *                        PCI device id structure
 174 * @id: single PCI device id structure to match
 175 * @dev: the PCI device structure to match against
 176 *
 177 * Returns the matching pci_device_id structure or %NULL if there is no match.
 178 */
 179static inline const struct pci_device_id *
 180pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev)
 181{
 182        if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) &&
 183            (id->device == PCI_ANY_ID || id->device == dev->device) &&
 184            (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) &&
 185            (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) &&
 186            !((id->class ^ dev->class) & id->class_mask))
 187                return id;
 188        return NULL;
 189}
 190
 191/* PCI slot sysfs helper code */
 192#define to_pci_slot(s) container_of(s, struct pci_slot, kobj)
 193
 194extern struct kset *pci_slots_kset;
 195
 196struct pci_slot_attribute {
 197        struct attribute attr;
 198        ssize_t (*show)(struct pci_slot *, char *);
 199        ssize_t (*store)(struct pci_slot *, const char *, size_t);
 200};
 201#define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
 202
 203enum pci_bar_type {
 204        pci_bar_unknown,        /* Standard PCI BAR probe */
 205        pci_bar_io,             /* An io port BAR */
 206        pci_bar_mem32,          /* A 32-bit memory BAR */
 207        pci_bar_mem64,          /* A 64-bit memory BAR */
 208};
 209
 210extern int pci_setup_device(struct pci_dev *dev);
 211extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
 212                                struct resource *res, unsigned int reg);
 213extern int pci_resource_bar(struct pci_dev *dev, int resno,
 214                            enum pci_bar_type *type);
 215extern int pci_bus_add_child(struct pci_bus *bus);
 216extern void pci_enable_ari(struct pci_dev *dev);
 217/**
 218 * pci_ari_enabled - query ARI forwarding status
 219 * @bus: the PCI bus
 220 *
 221 * Returns 1 if ARI forwarding is enabled, or 0 if not enabled;
 222 */
 223static inline int pci_ari_enabled(struct pci_bus *bus)
 224{
 225        return bus->self && bus->self->ari_enabled;
 226}
 227
 228#ifdef CONFIG_PCI_QUIRKS
 229extern int pci_is_reassigndev(struct pci_dev *dev);
 230resource_size_t pci_specified_resource_alignment(struct pci_dev *dev);
 231extern void pci_disable_bridge_window(struct pci_dev *dev);
 232#endif
 233
 234/* Single Root I/O Virtualization */
 235struct pci_sriov {
 236        int pos;                /* capability position */
 237        int nres;               /* number of resources */
 238        u32 cap;                /* SR-IOV Capabilities */
 239        u16 ctrl;               /* SR-IOV Control */
 240        u16 total;              /* total VFs associated with the PF */
 241        u16 initial;            /* initial VFs associated with the PF */
 242        u16 nr_virtfn;          /* number of VFs available */
 243        u16 offset;             /* first VF Routing ID offset */
 244        u16 stride;             /* following VF stride */
 245        u32 pgsz;               /* page size for BAR alignment */
 246        u8 link;                /* Function Dependency Link */
 247        struct pci_dev *dev;    /* lowest numbered PF */
 248        struct pci_dev *self;   /* this PF */
 249        struct mutex lock;      /* lock for VF bus */
 250        struct work_struct mtask; /* VF Migration task */
 251        u8 __iomem *mstate;     /* VF Migration State Array */
 252};
 253
 254#ifdef CONFIG_PCI_ATS
 255extern void pci_restore_ats_state(struct pci_dev *dev);
 256#else
 257static inline void pci_restore_ats_state(struct pci_dev *dev)
 258{
 259}
 260#endif /* CONFIG_PCI_ATS */
 261
 262#ifdef CONFIG_PCI_IOV
 263extern int pci_iov_init(struct pci_dev *dev);
 264extern void pci_iov_release(struct pci_dev *dev);
 265extern int pci_iov_resource_bar(struct pci_dev *dev, int resno,
 266                                enum pci_bar_type *type);
 267extern resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev,
 268                                                    int resno);
 269extern void pci_restore_iov_state(struct pci_dev *dev);
 270extern int pci_iov_bus_range(struct pci_bus *bus);
 271
 272#else
 273static inline int pci_iov_init(struct pci_dev *dev)
 274{
 275        return -ENODEV;
 276}
 277static inline void pci_iov_release(struct pci_dev *dev)
 278
 279{
 280}
 281static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno,
 282                                       enum pci_bar_type *type)
 283{
 284        return 0;
 285}
 286static inline void pci_restore_iov_state(struct pci_dev *dev)
 287{
 288}
 289static inline int pci_iov_bus_range(struct pci_bus *bus)
 290{
 291        return 0;
 292}
 293
 294#endif /* CONFIG_PCI_IOV */
 295
 296extern unsigned long pci_cardbus_resource_alignment(struct resource *);
 297
 298static inline resource_size_t pci_resource_alignment(struct pci_dev *dev,
 299                                         struct resource *res)
 300{
 301#ifdef CONFIG_PCI_IOV
 302        int resno = res - dev->resource;
 303
 304        if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END)
 305                return pci_sriov_resource_alignment(dev, resno);
 306#endif
 307        if (dev->class >> 8  == PCI_CLASS_BRIDGE_CARDBUS)
 308                return pci_cardbus_resource_alignment(res);
 309        return resource_alignment(res);
 310}
 311
 312extern void pci_enable_acs(struct pci_dev *dev);
 313
 314struct pci_dev_reset_methods {
 315        u16 vendor;
 316        u16 device;
 317        int (*reset)(struct pci_dev *dev, int probe);
 318};
 319
 320#ifdef CONFIG_PCI_QUIRKS
 321extern int pci_dev_specific_reset(struct pci_dev *dev, int probe);
 322#else
 323static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe)
 324{
 325        return -ENOTTY;
 326}
 327#endif
 328
 329#endif /* DRIVERS_PCI_H */
 330