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14
15#undef DEBUG
16
17#include <linux/kernel.h>
18#include <linux/interrupt.h>
19#include <linux/irq.h>
20#include <linux/io.h>
21#include <asm/prom.h>
22
23static struct device_node *cpld_pic_node;
24static struct irq_host *cpld_pic_host;
25
26
27
28
29
30
31#define MISC_IGNORE 0x12
32
33
34
35
36#define PCI_IGNORE 0x00
37
38struct cpld_pic {
39 u8 pci_mask;
40 u8 pci_status;
41 u8 route;
42 u8 misc_mask;
43 u8 misc_status;
44 u8 misc_control;
45};
46
47static struct cpld_pic __iomem *cpld_regs;
48
49static void __iomem *
50irq_to_pic_mask(unsigned int irq)
51{
52 return irq <= 7 ? &cpld_regs->pci_mask : &cpld_regs->misc_mask;
53}
54
55static unsigned int
56irq_to_pic_bit(unsigned int irq)
57{
58 return 1 << (irq & 0x7);
59}
60
61static void
62cpld_mask_irq(struct irq_data *d)
63{
64 unsigned int cpld_irq = (unsigned int)irqd_to_hwirq(d);
65 void __iomem *pic_mask = irq_to_pic_mask(cpld_irq);
66
67 out_8(pic_mask,
68 in_8(pic_mask) | irq_to_pic_bit(cpld_irq));
69}
70
71static void
72cpld_unmask_irq(struct irq_data *d)
73{
74 unsigned int cpld_irq = (unsigned int)irqd_to_hwirq(d);
75 void __iomem *pic_mask = irq_to_pic_mask(cpld_irq);
76
77 out_8(pic_mask,
78 in_8(pic_mask) & ~irq_to_pic_bit(cpld_irq));
79}
80
81static struct irq_chip cpld_pic = {
82 .name = "CPLD PIC",
83 .irq_mask = cpld_mask_irq,
84 .irq_ack = cpld_mask_irq,
85 .irq_unmask = cpld_unmask_irq,
86};
87
88static int
89cpld_pic_get_irq(int offset, u8 ignore, u8 __iomem *statusp,
90 u8 __iomem *maskp)
91{
92 int cpld_irq;
93 u8 status = in_8(statusp);
94 u8 mask = in_8(maskp);
95
96
97 status |= (ignore | mask);
98
99 if (status == 0xff)
100 return NO_IRQ;
101
102 cpld_irq = ffz(status) + offset;
103
104 return irq_linear_revmap(cpld_pic_host, cpld_irq);
105}
106
107static void
108cpld_pic_cascade(unsigned int irq, struct irq_desc *desc)
109{
110 irq = cpld_pic_get_irq(0, PCI_IGNORE, &cpld_regs->pci_status,
111 &cpld_regs->pci_mask);
112 if (irq != NO_IRQ) {
113 generic_handle_irq(irq);
114 return;
115 }
116
117 irq = cpld_pic_get_irq(8, MISC_IGNORE, &cpld_regs->misc_status,
118 &cpld_regs->misc_mask);
119 if (irq != NO_IRQ) {
120 generic_handle_irq(irq);
121 return;
122 }
123}
124
125static int
126cpld_pic_host_match(struct irq_host *h, struct device_node *node)
127{
128 return cpld_pic_node == node;
129}
130
131static int
132cpld_pic_host_map(struct irq_host *h, unsigned int virq,
133 irq_hw_number_t hw)
134{
135 irq_set_status_flags(virq, IRQ_LEVEL);
136 irq_set_chip_and_handler(virq, &cpld_pic, handle_level_irq);
137 return 0;
138}
139
140static struct
141irq_host_ops cpld_pic_host_ops = {
142 .match = cpld_pic_host_match,
143 .map = cpld_pic_host_map,
144};
145
146void __init
147mpc5121_ads_cpld_map(void)
148{
149 struct device_node *np = NULL;
150
151 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld-pic");
152 if (!np) {
153 printk(KERN_ERR "CPLD PIC init: can not find cpld-pic node\n");
154 return;
155 }
156
157 cpld_regs = of_iomap(np, 0);
158 of_node_put(np);
159}
160
161void __init
162mpc5121_ads_cpld_pic_init(void)
163{
164 unsigned int cascade_irq;
165 struct device_node *np = NULL;
166
167 pr_debug("cpld_ic_init\n");
168
169 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld-pic");
170 if (!np) {
171 printk(KERN_ERR "CPLD PIC init: can not find cpld-pic node\n");
172 return;
173 }
174
175 if (!cpld_regs)
176 goto end;
177
178 cascade_irq = irq_of_parse_and_map(np, 0);
179 if (cascade_irq == NO_IRQ)
180 goto end;
181
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186
187 out_8(&cpld_regs->route, 0xfd);
188 out_8(&cpld_regs->pci_mask, 0xff);
189
190 out_8(&cpld_regs->misc_mask, ~(MISC_IGNORE));
191
192 cpld_pic_node = of_node_get(np);
193
194 cpld_pic_host =
195 irq_alloc_host(np, IRQ_HOST_MAP_LINEAR, 16, &cpld_pic_host_ops, 16);
196 if (!cpld_pic_host) {
197 printk(KERN_ERR "CPLD PIC: failed to allocate irq host!\n");
198 goto end;
199 }
200
201 irq_set_chained_handler(cascade_irq, cpld_pic_cascade);
202end:
203 of_node_put(np);
204}
205