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22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
27#include <linux/i2c.h>
28#include <linux/platform_device.h>
29#include <linux/i2c/twl.h>
30#include <linux/slab.h>
31#include <sound/core.h>
32#include <sound/pcm.h>
33#include <sound/pcm_params.h>
34#include <sound/soc.h>
35#include <sound/initval.h>
36#include <sound/tlv.h>
37
38
39#include <linux/mfd/twl4030-audio.h>
40
41
42#define TWL4030_REG_SW_SHADOW 0x4A
43#define TWL4030_CACHEREGNUM (TWL4030_REG_SW_SHADOW + 1)
44
45
46#define TWL4030_HFL_EN 0x01
47#define TWL4030_HFR_EN 0x02
48
49
50
51
52static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
53 0x00,
54 0x00,
55 0x00,
56 0x00,
57 0x00,
58 0x00,
59 0x00,
60 0x00,
61 0x00,
62 0x00,
63 0x0f,
64 0x0f,
65 0x0f,
66 0x0f,
67 0x00,
68 0x00,
69 0x3f,
70 0x3f,
71 0x3f,
72 0x3f,
73 0x25,
74 0x00,
75 0x00,
76 0x00,
77 0x00,
78 0x32,
79 0x32,
80 0x32,
81 0x32,
82 0x00,
83 0x00,
84 0x55,
85 0x00,
86 0x00,
87 0x00,
88 0x00,
89 0x00,
90 0x00,
91 0x00,
92 0x00,
93 0x00,
94 0x00,
95 0x00,
96 0x05,
97 0x00,
98 0x00,
99 0x00,
100 0x00,
101 0x13,
102 0x00,
103 0x00,
104 0x00,
105 0x00,
106 0x79,
107 0x11,
108 0x00,
109 0x00,
110 0x00,
111 0x06,
112 0x00,
113 0x44,
114 0x69,
115 0x00,
116 0x00,
117 0x00,
118 0x00,
119 0x00,
120 0x00,
121 0x32,
122 0x00,
123 0x00,
124 0x00,
125 0x00,
126 0x00,
127 0x00,
128};
129
130
131struct twl4030_priv {
132 struct snd_soc_codec codec;
133
134 unsigned int codec_powered;
135
136
137 unsigned int apll_enabled;
138
139 struct snd_pcm_substream *master_substream;
140 struct snd_pcm_substream *slave_substream;
141
142 unsigned int configured;
143 unsigned int rate;
144 unsigned int sample_bits;
145 unsigned int channels;
146
147 unsigned int sysclk;
148
149
150 u8 hsl_enabled, hsr_enabled;
151 u8 earpiece_enabled;
152 u8 predrivel_enabled, predriver_enabled;
153 u8 carkitl_enabled, carkitr_enabled;
154
155
156 unsigned int digimic_delay;
157};
158
159
160
161
162static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec,
163 unsigned int reg)
164{
165 u8 *cache = codec->reg_cache;
166
167 if (reg >= TWL4030_CACHEREGNUM)
168 return -EIO;
169
170 return cache[reg];
171}
172
173
174
175
176static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec,
177 u8 reg, u8 value)
178{
179 u8 *cache = codec->reg_cache;
180
181 if (reg >= TWL4030_CACHEREGNUM)
182 return;
183 cache[reg] = value;
184}
185
186
187
188
189static int twl4030_write(struct snd_soc_codec *codec,
190 unsigned int reg, unsigned int value)
191{
192 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
193 int write_to_reg = 0;
194
195 twl4030_write_reg_cache(codec, reg, value);
196 if (likely(reg < TWL4030_REG_SW_SHADOW)) {
197
198 switch (reg) {
199 case TWL4030_REG_EAR_CTL:
200 if (twl4030->earpiece_enabled)
201 write_to_reg = 1;
202 break;
203 case TWL4030_REG_PREDL_CTL:
204 if (twl4030->predrivel_enabled)
205 write_to_reg = 1;
206 break;
207 case TWL4030_REG_PREDR_CTL:
208 if (twl4030->predriver_enabled)
209 write_to_reg = 1;
210 break;
211 case TWL4030_REG_PRECKL_CTL:
212 if (twl4030->carkitl_enabled)
213 write_to_reg = 1;
214 break;
215 case TWL4030_REG_PRECKR_CTL:
216 if (twl4030->carkitr_enabled)
217 write_to_reg = 1;
218 break;
219 case TWL4030_REG_HS_GAIN_SET:
220 if (twl4030->hsl_enabled || twl4030->hsr_enabled)
221 write_to_reg = 1;
222 break;
223 default:
224
225 write_to_reg = 1;
226 break;
227 }
228 if (write_to_reg)
229 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
230 value, reg);
231 }
232 return 0;
233}
234
235static inline void twl4030_wait_ms(int time)
236{
237 if (time < 60) {
238 time *= 1000;
239 usleep_range(time, time + 500);
240 } else {
241 msleep(time);
242 }
243}
244
245static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
246{
247 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
248 int mode;
249
250 if (enable == twl4030->codec_powered)
251 return;
252
253 if (enable)
254 mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER);
255 else
256 mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER);
257
258 if (mode >= 0) {
259 twl4030_write_reg_cache(codec, TWL4030_REG_CODEC_MODE, mode);
260 twl4030->codec_powered = enable;
261 }
262
263
264
265 udelay(10);
266}
267
268static inline void twl4030_check_defaults(struct snd_soc_codec *codec)
269{
270 int i, difference = 0;
271 u8 val;
272
273 dev_dbg(codec->dev, "Checking TWL audio default configuration\n");
274 for (i = 1; i <= TWL4030_REG_MISC_SET_2; i++) {
275 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &val, i);
276 if (val != twl4030_reg[i]) {
277 difference++;
278 dev_dbg(codec->dev,
279 "Reg 0x%02x: chip: 0x%02x driver: 0x%02x\n",
280 i, val, twl4030_reg[i]);
281 }
282 }
283 dev_dbg(codec->dev, "Found %d non-matching registers. %s\n",
284 difference, difference ? "Not OK" : "OK");
285}
286
287static inline void twl4030_reset_registers(struct snd_soc_codec *codec)
288{
289 int i;
290
291
292 for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++)
293 if (i != TWL4030_REG_APLL_CTL)
294 twl4030_write(codec, i, twl4030_reg[i]);
295
296}
297
298static void twl4030_init_chip(struct snd_soc_codec *codec)
299{
300 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
301 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
302 u8 reg, byte;
303 int i = 0;
304
305
306 if (pdata && pdata->check_defaults)
307 twl4030_check_defaults(codec);
308
309
310 if (!pdata || (pdata && pdata->reset_registers))
311 twl4030_reset_registers(codec);
312
313
314 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
315 TWL4030_REG_APLL_CTL);
316 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, byte);
317
318
319 reg = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
320 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
321 reg | TWL4030_SMOOTH_ANAVOL_EN);
322
323 twl4030_write(codec, TWL4030_REG_OPTION,
324 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
325 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
326
327
328 twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
329
330
331 if (!pdata)
332 return;
333
334 twl4030->digimic_delay = pdata->digimic_delay;
335
336 reg = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
337 reg &= ~TWL4030_RAMP_DELAY;
338 reg |= (pdata->ramp_delay_value << 2);
339 twl4030_write_reg_cache(codec, TWL4030_REG_HS_POPN_SET, reg);
340
341
342 twl4030_codec_enable(codec, 1);
343
344 reg = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
345 reg &= ~TWL4030_OFFSET_CNCL_SEL;
346 reg |= pdata->offset_cncl_path;
347 twl4030_write(codec, TWL4030_REG_ANAMICL,
348 reg | TWL4030_CNCL_OFFSET_START);
349
350
351
352
353
354
355 msleep(20);
356 do {
357 usleep_range(1000, 2000);
358 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
359 TWL4030_REG_ANAMICL);
360 } while ((i++ < 100) &&
361 ((byte & TWL4030_CNCL_OFFSET_START) ==
362 TWL4030_CNCL_OFFSET_START));
363
364
365 twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
366
367 twl4030_codec_enable(codec, 0);
368}
369
370static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
371{
372 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
373 int status = -1;
374
375 if (enable) {
376 twl4030->apll_enabled++;
377 if (twl4030->apll_enabled == 1)
378 status = twl4030_audio_enable_resource(
379 TWL4030_AUDIO_RES_APLL);
380 } else {
381 twl4030->apll_enabled--;
382 if (!twl4030->apll_enabled)
383 status = twl4030_audio_disable_resource(
384 TWL4030_AUDIO_RES_APLL);
385 }
386
387 if (status >= 0)
388 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, status);
389}
390
391
392static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
393 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
394 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
395 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
396 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
397};
398
399
400static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
401 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
402 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
403 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
404 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
405};
406
407
408static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
409 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
410 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
411 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
412 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
413};
414
415
416static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
417 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
418 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
419 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
420};
421
422
423static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
424 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
425 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
426 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
427};
428
429
430static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
431 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
432 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
433 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
434};
435
436
437static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
438 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
439 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
440 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
441};
442
443
444static const char *twl4030_handsfreel_texts[] =
445 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
446
447static const struct soc_enum twl4030_handsfreel_enum =
448 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
449 ARRAY_SIZE(twl4030_handsfreel_texts),
450 twl4030_handsfreel_texts);
451
452static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
453SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
454
455
456static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
457 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 0, 1, 0);
458
459
460static const char *twl4030_handsfreer_texts[] =
461 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
462
463static const struct soc_enum twl4030_handsfreer_enum =
464 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
465 ARRAY_SIZE(twl4030_handsfreer_texts),
466 twl4030_handsfreer_texts);
467
468static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
469SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
470
471
472static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
473 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 1, 1, 0);
474
475
476
477static const char *twl4030_vibra_texts[] =
478 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
479
480static const struct soc_enum twl4030_vibra_enum =
481 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2,
482 ARRAY_SIZE(twl4030_vibra_texts),
483 twl4030_vibra_texts);
484
485static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
486SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
487
488
489static const char *twl4030_vibrapath_texts[] =
490 {"Local vibrator", "Audio"};
491
492static const struct soc_enum twl4030_vibrapath_enum =
493 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4,
494 ARRAY_SIZE(twl4030_vibrapath_texts),
495 twl4030_vibrapath_texts);
496
497static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
498SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
499
500
501static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
502 SOC_DAPM_SINGLE("Main Mic Capture Switch",
503 TWL4030_REG_ANAMICL, 0, 1, 0),
504 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
505 TWL4030_REG_ANAMICL, 1, 1, 0),
506 SOC_DAPM_SINGLE("AUXL Capture Switch",
507 TWL4030_REG_ANAMICL, 2, 1, 0),
508 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
509 TWL4030_REG_ANAMICL, 3, 1, 0),
510};
511
512
513static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
514 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
515 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
516};
517
518
519static const char *twl4030_micpathtx1_texts[] =
520 {"Analog", "Digimic0"};
521
522static const struct soc_enum twl4030_micpathtx1_enum =
523 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
524 ARRAY_SIZE(twl4030_micpathtx1_texts),
525 twl4030_micpathtx1_texts);
526
527static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
528SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
529
530
531static const char *twl4030_micpathtx2_texts[] =
532 {"Analog", "Digimic1"};
533
534static const struct soc_enum twl4030_micpathtx2_enum =
535 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
536 ARRAY_SIZE(twl4030_micpathtx2_texts),
537 twl4030_micpathtx2_texts);
538
539static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
540SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
541
542
543static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
544 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
545
546
547static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
548 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
549
550
551static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
552 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
553
554
555static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
556 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
557
558
559static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
560 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
561
562
563static const unsigned int twl4030_dapm_dbypass_tlv[] = {
564 TLV_DB_RANGE_HEAD(3),
565 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
566 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
567 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
568};
569
570
571static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
572 SOC_DAPM_SINGLE_TLV("Volume",
573 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
574 twl4030_dapm_dbypass_tlv);
575
576
577static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
578 SOC_DAPM_SINGLE_TLV("Volume",
579 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
580 twl4030_dapm_dbypass_tlv);
581
582
583
584
585
586static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
587
588
589static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
590 SOC_DAPM_SINGLE_TLV("Volume",
591 TWL4030_REG_VSTPGA, 0, 0x29, 0,
592 twl4030_dapm_dbypassv_tlv);
593
594
595
596
597
598
599
600
601
602#define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
603static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
604 struct snd_kcontrol *kcontrol, int event) \
605{ \
606 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
607 \
608 switch (event) { \
609 case SND_SOC_DAPM_POST_PMU: \
610 twl4030->pin_name##_enabled = 1; \
611 twl4030_write(w->codec, reg, \
612 twl4030_read_reg_cache(w->codec, reg)); \
613 break; \
614 case SND_SOC_DAPM_POST_PMD: \
615 twl4030->pin_name##_enabled = 0; \
616 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, \
617 0, reg); \
618 break; \
619 } \
620 return 0; \
621}
622
623TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
624TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
625TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
626TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
627TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
628
629static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
630{
631 unsigned char hs_ctl;
632
633 hs_ctl = twl4030_read_reg_cache(codec, reg);
634
635 if (ramp) {
636
637 hs_ctl |= TWL4030_HF_CTL_REF_EN;
638 twl4030_write(codec, reg, hs_ctl);
639 udelay(10);
640 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
641 twl4030_write(codec, reg, hs_ctl);
642 udelay(40);
643 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
644 hs_ctl |= TWL4030_HF_CTL_HB_EN;
645 twl4030_write(codec, reg, hs_ctl);
646 } else {
647
648 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
649 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
650 twl4030_write(codec, reg, hs_ctl);
651 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
652 twl4030_write(codec, reg, hs_ctl);
653 udelay(40);
654 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
655 twl4030_write(codec, reg, hs_ctl);
656 }
657}
658
659static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
660 struct snd_kcontrol *kcontrol, int event)
661{
662 switch (event) {
663 case SND_SOC_DAPM_POST_PMU:
664 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
665 break;
666 case SND_SOC_DAPM_POST_PMD:
667 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
668 break;
669 }
670 return 0;
671}
672
673static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
674 struct snd_kcontrol *kcontrol, int event)
675{
676 switch (event) {
677 case SND_SOC_DAPM_POST_PMU:
678 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
679 break;
680 case SND_SOC_DAPM_POST_PMD:
681 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
682 break;
683 }
684 return 0;
685}
686
687static int vibramux_event(struct snd_soc_dapm_widget *w,
688 struct snd_kcontrol *kcontrol, int event)
689{
690 twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
691 return 0;
692}
693
694static int apll_event(struct snd_soc_dapm_widget *w,
695 struct snd_kcontrol *kcontrol, int event)
696{
697 switch (event) {
698 case SND_SOC_DAPM_PRE_PMU:
699 twl4030_apll_enable(w->codec, 1);
700 break;
701 case SND_SOC_DAPM_POST_PMD:
702 twl4030_apll_enable(w->codec, 0);
703 break;
704 }
705 return 0;
706}
707
708static int aif_event(struct snd_soc_dapm_widget *w,
709 struct snd_kcontrol *kcontrol, int event)
710{
711 u8 audio_if;
712
713 audio_if = twl4030_read_reg_cache(w->codec, TWL4030_REG_AUDIO_IF);
714 switch (event) {
715 case SND_SOC_DAPM_PRE_PMU:
716
717
718 twl4030_apll_enable(w->codec, 1);
719
720 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
721 audio_if | TWL4030_AIF_EN);
722 break;
723 case SND_SOC_DAPM_POST_PMD:
724
725 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
726 audio_if & ~TWL4030_AIF_EN);
727 twl4030_apll_enable(w->codec, 0);
728 break;
729 }
730 return 0;
731}
732
733static void headset_ramp(struct snd_soc_codec *codec, int ramp)
734{
735 struct twl4030_codec_data *pdata = codec->dev->platform_data;
736 unsigned char hs_gain, hs_pop;
737 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
738
739 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
740 8388608, 16777216, 33554432, 67108864};
741 unsigned int delay;
742
743 hs_gain = twl4030_read_reg_cache(codec, TWL4030_REG_HS_GAIN_SET);
744 hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
745 delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
746 twl4030->sysclk) + 1;
747
748
749
750 if (pdata && pdata->hs_extmute) {
751 if (pdata->set_hs_extmute) {
752 pdata->set_hs_extmute(1);
753 } else {
754 hs_pop |= TWL4030_EXTMUTE;
755 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
756 }
757 }
758
759 if (ramp) {
760
761 hs_pop |= TWL4030_VMID_EN;
762 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
763
764 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
765 hs_gain,
766 TWL4030_REG_HS_GAIN_SET);
767 hs_pop |= TWL4030_RAMP_EN;
768 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
769
770 twl4030_wait_ms(delay);
771 } else {
772
773
774 hs_pop &= ~TWL4030_RAMP_EN;
775 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
776
777 twl4030_wait_ms(delay);
778
779 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
780 hs_gain & (~0x0f),
781 TWL4030_REG_HS_GAIN_SET);
782
783 hs_pop &= ~TWL4030_VMID_EN;
784 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
785 }
786
787
788 if (pdata && pdata->hs_extmute) {
789 if (pdata->set_hs_extmute) {
790 pdata->set_hs_extmute(0);
791 } else {
792 hs_pop &= ~TWL4030_EXTMUTE;
793 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
794 }
795 }
796}
797
798static int headsetlpga_event(struct snd_soc_dapm_widget *w,
799 struct snd_kcontrol *kcontrol, int event)
800{
801 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
802
803 switch (event) {
804 case SND_SOC_DAPM_POST_PMU:
805
806 if (!twl4030->hsr_enabled)
807 headset_ramp(w->codec, 1);
808
809 twl4030->hsl_enabled = 1;
810 break;
811 case SND_SOC_DAPM_POST_PMD:
812
813 if (!twl4030->hsr_enabled)
814 headset_ramp(w->codec, 0);
815
816 twl4030->hsl_enabled = 0;
817 break;
818 }
819 return 0;
820}
821
822static int headsetrpga_event(struct snd_soc_dapm_widget *w,
823 struct snd_kcontrol *kcontrol, int event)
824{
825 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
826
827 switch (event) {
828 case SND_SOC_DAPM_POST_PMU:
829
830 if (!twl4030->hsl_enabled)
831 headset_ramp(w->codec, 1);
832
833 twl4030->hsr_enabled = 1;
834 break;
835 case SND_SOC_DAPM_POST_PMD:
836
837 if (!twl4030->hsl_enabled)
838 headset_ramp(w->codec, 0);
839
840 twl4030->hsr_enabled = 0;
841 break;
842 }
843 return 0;
844}
845
846static int digimic_event(struct snd_soc_dapm_widget *w,
847 struct snd_kcontrol *kcontrol, int event)
848{
849 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
850
851 if (twl4030->digimic_delay)
852 twl4030_wait_ms(twl4030->digimic_delay);
853 return 0;
854}
855
856
857
858
859
860
861
862
863
864
865
866static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
867 struct snd_ctl_elem_value *ucontrol)
868{
869 struct soc_mixer_control *mc =
870 (struct soc_mixer_control *)kcontrol->private_value;
871 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
872 unsigned int reg = mc->reg;
873 unsigned int shift = mc->shift;
874 unsigned int rshift = mc->rshift;
875 int max = mc->max;
876 int mask = (1 << fls(max)) - 1;
877
878 ucontrol->value.integer.value[0] =
879 (snd_soc_read(codec, reg) >> shift) & mask;
880 if (ucontrol->value.integer.value[0])
881 ucontrol->value.integer.value[0] =
882 max + 1 - ucontrol->value.integer.value[0];
883
884 if (shift != rshift) {
885 ucontrol->value.integer.value[1] =
886 (snd_soc_read(codec, reg) >> rshift) & mask;
887 if (ucontrol->value.integer.value[1])
888 ucontrol->value.integer.value[1] =
889 max + 1 - ucontrol->value.integer.value[1];
890 }
891
892 return 0;
893}
894
895static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
896 struct snd_ctl_elem_value *ucontrol)
897{
898 struct soc_mixer_control *mc =
899 (struct soc_mixer_control *)kcontrol->private_value;
900 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
901 unsigned int reg = mc->reg;
902 unsigned int shift = mc->shift;
903 unsigned int rshift = mc->rshift;
904 int max = mc->max;
905 int mask = (1 << fls(max)) - 1;
906 unsigned short val, val2, val_mask;
907
908 val = (ucontrol->value.integer.value[0] & mask);
909
910 val_mask = mask << shift;
911 if (val)
912 val = max + 1 - val;
913 val = val << shift;
914 if (shift != rshift) {
915 val2 = (ucontrol->value.integer.value[1] & mask);
916 val_mask |= mask << rshift;
917 if (val2)
918 val2 = max + 1 - val2;
919 val |= val2 << rshift;
920 }
921 return snd_soc_update_bits(codec, reg, val_mask, val);
922}
923
924static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
925 struct snd_ctl_elem_value *ucontrol)
926{
927 struct soc_mixer_control *mc =
928 (struct soc_mixer_control *)kcontrol->private_value;
929 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
930 unsigned int reg = mc->reg;
931 unsigned int reg2 = mc->rreg;
932 unsigned int shift = mc->shift;
933 int max = mc->max;
934 int mask = (1<<fls(max))-1;
935
936 ucontrol->value.integer.value[0] =
937 (snd_soc_read(codec, reg) >> shift) & mask;
938 ucontrol->value.integer.value[1] =
939 (snd_soc_read(codec, reg2) >> shift) & mask;
940
941 if (ucontrol->value.integer.value[0])
942 ucontrol->value.integer.value[0] =
943 max + 1 - ucontrol->value.integer.value[0];
944 if (ucontrol->value.integer.value[1])
945 ucontrol->value.integer.value[1] =
946 max + 1 - ucontrol->value.integer.value[1];
947
948 return 0;
949}
950
951static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
952 struct snd_ctl_elem_value *ucontrol)
953{
954 struct soc_mixer_control *mc =
955 (struct soc_mixer_control *)kcontrol->private_value;
956 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
957 unsigned int reg = mc->reg;
958 unsigned int reg2 = mc->rreg;
959 unsigned int shift = mc->shift;
960 int max = mc->max;
961 int mask = (1 << fls(max)) - 1;
962 int err;
963 unsigned short val, val2, val_mask;
964
965 val_mask = mask << shift;
966 val = (ucontrol->value.integer.value[0] & mask);
967 val2 = (ucontrol->value.integer.value[1] & mask);
968
969 if (val)
970 val = max + 1 - val;
971 if (val2)
972 val2 = max + 1 - val2;
973
974 val = val << shift;
975 val2 = val2 << shift;
976
977 err = snd_soc_update_bits(codec, reg, val_mask, val);
978 if (err < 0)
979 return err;
980
981 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
982 return err;
983}
984
985
986static const char *twl4030_op_modes_texts[] = {
987 "Option 2 (voice/audio)", "Option 1 (audio)"
988};
989
990static const struct soc_enum twl4030_op_modes_enum =
991 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0,
992 ARRAY_SIZE(twl4030_op_modes_texts),
993 twl4030_op_modes_texts);
994
995static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
996 struct snd_ctl_elem_value *ucontrol)
997{
998 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
999 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1000 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
1001 unsigned short val;
1002 unsigned short mask, bitmask;
1003
1004 if (twl4030->configured) {
1005 printk(KERN_ERR "twl4030 operation mode cannot be "
1006 "changed on-the-fly\n");
1007 return -EBUSY;
1008 }
1009
1010 for (bitmask = 1; bitmask < e->max; bitmask <<= 1)
1011 ;
1012 if (ucontrol->value.enumerated.item[0] > e->max - 1)
1013 return -EINVAL;
1014
1015 val = ucontrol->value.enumerated.item[0] << e->shift_l;
1016 mask = (bitmask - 1) << e->shift_l;
1017 if (e->shift_l != e->shift_r) {
1018 if (ucontrol->value.enumerated.item[1] > e->max - 1)
1019 return -EINVAL;
1020 val |= ucontrol->value.enumerated.item[1] << e->shift_r;
1021 mask |= (bitmask - 1) << e->shift_r;
1022 }
1023
1024 return snd_soc_update_bits(codec, e->reg, mask, val);
1025}
1026
1027
1028
1029
1030
1031static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
1032
1033
1034
1035
1036
1037
1038static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
1039
1040
1041
1042
1043
1044static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
1045
1046
1047
1048
1049
1050static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
1051
1052
1053
1054
1055
1056static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1057
1058
1059
1060
1061
1062static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1063
1064
1065
1066
1067
1068static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1069
1070
1071
1072
1073
1074static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1075
1076
1077static const char *twl4030_avadc_clk_priority_texts[] = {
1078 "Voice high priority", "HiFi high priority"
1079};
1080
1081static const struct soc_enum twl4030_avadc_clk_priority_enum =
1082 SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL, 2,
1083 ARRAY_SIZE(twl4030_avadc_clk_priority_texts),
1084 twl4030_avadc_clk_priority_texts);
1085
1086static const char *twl4030_rampdelay_texts[] = {
1087 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1088 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1089 "3495/2581/1748 ms"
1090};
1091
1092static const struct soc_enum twl4030_rampdelay_enum =
1093 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
1094 ARRAY_SIZE(twl4030_rampdelay_texts),
1095 twl4030_rampdelay_texts);
1096
1097
1098static const char *twl4030_vibradirmode_texts[] = {
1099 "Vibra H-bridge direction", "Audio data MSB",
1100};
1101
1102static const struct soc_enum twl4030_vibradirmode_enum =
1103 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5,
1104 ARRAY_SIZE(twl4030_vibradirmode_texts),
1105 twl4030_vibradirmode_texts);
1106
1107
1108static const char *twl4030_vibradir_texts[] = {
1109 "Positive polarity", "Negative polarity",
1110};
1111
1112static const struct soc_enum twl4030_vibradir_enum =
1113 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1,
1114 ARRAY_SIZE(twl4030_vibradir_texts),
1115 twl4030_vibradir_texts);
1116
1117
1118static const char *twl4030_digimicswap_texts[] = {
1119 "Not swapped", "Swapped",
1120};
1121
1122static const struct soc_enum twl4030_digimicswap_enum =
1123 SOC_ENUM_SINGLE(TWL4030_REG_MISC_SET_1, 0,
1124 ARRAY_SIZE(twl4030_digimicswap_texts),
1125 twl4030_digimicswap_texts);
1126
1127static const struct snd_kcontrol_new twl4030_snd_controls[] = {
1128
1129 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1130 snd_soc_get_enum_double,
1131 snd_soc_put_twl4030_opmode_enum_double),
1132
1133
1134 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1135 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1136 0, 0x3f, 0, digital_fine_tlv),
1137 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1138 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1139 0, 0x3f, 0, digital_fine_tlv),
1140
1141 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1142 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1143 6, 0x2, 0, digital_coarse_tlv),
1144 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1145 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1146 6, 0x2, 0, digital_coarse_tlv),
1147
1148 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1149 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1150 3, 0x12, 1, analog_tlv),
1151 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1152 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1153 3, 0x12, 1, analog_tlv),
1154 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1155 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1156 1, 1, 0),
1157 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1158 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1159 1, 1, 0),
1160
1161
1162 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1163 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1164
1165 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1166 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1167
1168 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1169 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1170
1171
1172 SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume",
1173 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
1174 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1175 snd_soc_put_volsw_r2_twl4030, output_tvl),
1176
1177 SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
1178 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030,
1179 snd_soc_put_volsw_twl4030, output_tvl),
1180
1181 SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume",
1182 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
1183 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1184 snd_soc_put_volsw_r2_twl4030, output_tvl),
1185
1186 SOC_SINGLE_EXT_TLV("Earpiece Playback Volume",
1187 TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030,
1188 snd_soc_put_volsw_twl4030, output_ear_tvl),
1189
1190
1191 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
1192 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1193 0, 0x1f, 0, digital_capture_tlv),
1194 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1195 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1196 0, 0x1f, 0, digital_capture_tlv),
1197
1198 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
1199 0, 3, 5, 0, input_gain_tlv),
1200
1201 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1202
1203 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
1204
1205 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1206 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
1207
1208 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
1209};
1210
1211static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
1212
1213 SND_SOC_DAPM_INPUT("MAINMIC"),
1214 SND_SOC_DAPM_INPUT("HSMIC"),
1215 SND_SOC_DAPM_INPUT("AUXL"),
1216 SND_SOC_DAPM_INPUT("CARKITMIC"),
1217
1218 SND_SOC_DAPM_INPUT("SUBMIC"),
1219 SND_SOC_DAPM_INPUT("AUXR"),
1220
1221 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1222 SND_SOC_DAPM_INPUT("DIGIMIC1"),
1223
1224
1225 SND_SOC_DAPM_OUTPUT("EARPIECE"),
1226 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1227 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
1228 SND_SOC_DAPM_OUTPUT("HSOL"),
1229 SND_SOC_DAPM_OUTPUT("HSOR"),
1230 SND_SOC_DAPM_OUTPUT("CARKITL"),
1231 SND_SOC_DAPM_OUTPUT("CARKITR"),
1232 SND_SOC_DAPM_OUTPUT("HFL"),
1233 SND_SOC_DAPM_OUTPUT("HFR"),
1234 SND_SOC_DAPM_OUTPUT("VIBRA"),
1235
1236
1237 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1238 SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1239 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1240
1241
1242 SND_SOC_DAPM_DAC("DAC Right1", "Right Front HiFi Playback",
1243 SND_SOC_NOPM, 0, 0),
1244 SND_SOC_DAPM_DAC("DAC Left1", "Left Front HiFi Playback",
1245 SND_SOC_NOPM, 0, 0),
1246 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear HiFi Playback",
1247 SND_SOC_NOPM, 0, 0),
1248 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear HiFi Playback",
1249 SND_SOC_NOPM, 0, 0),
1250 SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
1251 SND_SOC_NOPM, 0, 0),
1252
1253
1254 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1255 &twl4030_dapm_abypassr1_control),
1256 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1257 &twl4030_dapm_abypassl1_control),
1258 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1259 &twl4030_dapm_abypassr2_control),
1260 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1261 &twl4030_dapm_abypassl2_control),
1262 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1263 &twl4030_dapm_abypassv_control),
1264
1265
1266 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1267 NULL, 0),
1268
1269
1270 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1271 &twl4030_dapm_dbypassl_control),
1272 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1273 &twl4030_dapm_dbypassr_control),
1274 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1275 &twl4030_dapm_dbypassv_control),
1276
1277
1278 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1279 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1280 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1281 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1282 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1283 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1284 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1285 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1286 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1287 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1288
1289
1290 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1291 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1292 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1293 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1294 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1295 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1296 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1297 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1298 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1299 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
1300
1301 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1302 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1303
1304 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1305 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1306
1307
1308
1309 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1310 &twl4030_dapm_earpiece_controls[0],
1311 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
1312 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1313 0, 0, NULL, 0, earpiecepga_event,
1314 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1315
1316 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1317 &twl4030_dapm_predrivel_controls[0],
1318 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
1319 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1320 0, 0, NULL, 0, predrivelpga_event,
1321 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1322 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1323 &twl4030_dapm_predriver_controls[0],
1324 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
1325 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1326 0, 0, NULL, 0, predriverpga_event,
1327 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1328
1329 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
1330 &twl4030_dapm_hsol_controls[0],
1331 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1332 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1333 0, 0, NULL, 0, headsetlpga_event,
1334 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1335 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1336 &twl4030_dapm_hsor_controls[0],
1337 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
1338 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1339 0, 0, NULL, 0, headsetrpga_event,
1340 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1341
1342 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1343 &twl4030_dapm_carkitl_controls[0],
1344 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
1345 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1346 0, 0, NULL, 0, carkitlpga_event,
1347 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1348 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1349 &twl4030_dapm_carkitr_controls[0],
1350 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
1351 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1352 0, 0, NULL, 0, carkitrpga_event,
1353 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1354
1355
1356
1357 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1358 &twl4030_dapm_handsfreel_control),
1359 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
1360 &twl4030_dapm_handsfreelmute_control),
1361 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1362 0, 0, NULL, 0, handsfreelpga_event,
1363 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1364 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1365 &twl4030_dapm_handsfreer_control),
1366 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
1367 &twl4030_dapm_handsfreermute_control),
1368 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1369 0, 0, NULL, 0, handsfreerpga_event,
1370 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1371
1372 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1373 &twl4030_dapm_vibra_control, vibramux_event,
1374 SND_SOC_DAPM_PRE_PMU),
1375 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1376 &twl4030_dapm_vibrapath_control),
1377
1378
1379
1380 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
1381 SND_SOC_NOPM, 0, 0),
1382 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
1383 SND_SOC_NOPM, 0, 0),
1384 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
1385 SND_SOC_NOPM, 0, 0),
1386 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
1387 SND_SOC_NOPM, 0, 0),
1388
1389
1390
1391
1392 SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1393 &twl4030_dapm_micpathtx1_control),
1394 SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1395 &twl4030_dapm_micpathtx2_control),
1396
1397
1398 SND_SOC_DAPM_MIXER("Analog Left",
1399 TWL4030_REG_ANAMICL, 4, 0,
1400 &twl4030_dapm_analoglmic_controls[0],
1401 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
1402 SND_SOC_DAPM_MIXER("Analog Right",
1403 TWL4030_REG_ANAMICR, 4, 0,
1404 &twl4030_dapm_analogrmic_controls[0],
1405 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
1406
1407 SND_SOC_DAPM_PGA("ADC Physical Left",
1408 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1409 SND_SOC_DAPM_PGA("ADC Physical Right",
1410 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
1411
1412 SND_SOC_DAPM_PGA_E("Digimic0 Enable",
1413 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0,
1414 digimic_event, SND_SOC_DAPM_POST_PMU),
1415 SND_SOC_DAPM_PGA_E("Digimic1 Enable",
1416 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0,
1417 digimic_event, SND_SOC_DAPM_POST_PMU),
1418
1419 SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0,
1420 NULL, 0),
1421 SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0,
1422 NULL, 0),
1423
1424 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL, 0, 0),
1425 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL, 1, 0),
1426 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL, 2, 0),
1427
1428};
1429
1430static const struct snd_soc_dapm_route intercon[] = {
1431 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1432 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1433 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1434 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1435 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
1436
1437
1438 {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1439
1440 {"DAC Left1", NULL, "AIF Enable"},
1441 {"DAC Right1", NULL, "AIF Enable"},
1442 {"DAC Left2", NULL, "AIF Enable"},
1443 {"DAC Right1", NULL, "AIF Enable"},
1444
1445 {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1446 {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1447
1448 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1449 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1450 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1451 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1452 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
1453
1454
1455
1456 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1457 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1458 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1459 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1460 {"Earpiece PGA", NULL, "Earpiece Mixer"},
1461
1462 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1463 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1464 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1465 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1466 {"PredriveL PGA", NULL, "PredriveL Mixer"},
1467
1468 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1469 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1470 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1471 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1472 {"PredriveR PGA", NULL, "PredriveR Mixer"},
1473
1474 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1475 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1476 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1477 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
1478
1479 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1480 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1481 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1482 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
1483
1484 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1485 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1486 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1487 {"CarkitL PGA", NULL, "CarkitL Mixer"},
1488
1489 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1490 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1491 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1492 {"CarkitR PGA", NULL, "CarkitR Mixer"},
1493
1494 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1495 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1496 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1497 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
1498 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1499 {"HandsfreeL PGA", NULL, "HandsfreeL"},
1500
1501 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1502 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1503 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1504 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
1505 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1506 {"HandsfreeR PGA", NULL, "HandsfreeR"},
1507
1508 {"Vibra Mux", "AudioL1", "DAC Left1"},
1509 {"Vibra Mux", "AudioR1", "DAC Right1"},
1510 {"Vibra Mux", "AudioL2", "DAC Left2"},
1511 {"Vibra Mux", "AudioR2", "DAC Right2"},
1512
1513
1514
1515 {"Virtual HiFi OUT", NULL, "DAC Left1"},
1516 {"Virtual HiFi OUT", NULL, "DAC Right1"},
1517 {"Virtual HiFi OUT", NULL, "DAC Left2"},
1518 {"Virtual HiFi OUT", NULL, "DAC Right2"},
1519
1520 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1521
1522 {"EARPIECE", NULL, "Earpiece PGA"},
1523 {"PREDRIVEL", NULL, "PredriveL PGA"},
1524 {"PREDRIVER", NULL, "PredriveR PGA"},
1525 {"HSOL", NULL, "HeadsetL PGA"},
1526 {"HSOR", NULL, "HeadsetR PGA"},
1527 {"CARKITL", NULL, "CarkitL PGA"},
1528 {"CARKITR", NULL, "CarkitR PGA"},
1529 {"HFL", NULL, "HandsfreeL PGA"},
1530 {"HFR", NULL, "HandsfreeR PGA"},
1531 {"Vibra Route", "Audio", "Vibra Mux"},
1532 {"VIBRA", NULL, "Vibra Route"},
1533
1534
1535
1536 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1537 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1538 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1539 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1540
1541 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1542 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1543 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1544 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
1545
1546 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1547 {"Analog Right", "AUXR Capture Switch", "AUXR"},
1548
1549 {"ADC Physical Left", NULL, "Analog Left"},
1550 {"ADC Physical Right", NULL, "Analog Right"},
1551
1552 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1553 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1554
1555 {"DIGIMIC0", NULL, "micbias1 select"},
1556 {"DIGIMIC1", NULL, "micbias2 select"},
1557
1558
1559 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
1560 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1561
1562 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
1563 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1564
1565 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
1566 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1567
1568 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
1569 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1570
1571 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1572 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1573 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1574 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1575
1576 {"ADC Virtual Left1", NULL, "AIF Enable"},
1577 {"ADC Virtual Right1", NULL, "AIF Enable"},
1578 {"ADC Virtual Left2", NULL, "AIF Enable"},
1579 {"ADC Virtual Right2", NULL, "AIF Enable"},
1580
1581
1582 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1583 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1584 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1585 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1586 {"Voice Analog Loopback", "Switch", "Analog Left"},
1587
1588
1589 {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1590 {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1591 {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1592 {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1593 {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1594
1595 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1596 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1597 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1598 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
1599 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
1600
1601
1602 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1603 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
1604 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
1605
1606 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1607 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1608 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
1609
1610};
1611
1612static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1613 enum snd_soc_bias_level level)
1614{
1615 switch (level) {
1616 case SND_SOC_BIAS_ON:
1617 break;
1618 case SND_SOC_BIAS_PREPARE:
1619 break;
1620 case SND_SOC_BIAS_STANDBY:
1621 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
1622 twl4030_codec_enable(codec, 1);
1623 break;
1624 case SND_SOC_BIAS_OFF:
1625 twl4030_codec_enable(codec, 0);
1626 break;
1627 }
1628 codec->dapm.bias_level = level;
1629
1630 return 0;
1631}
1632
1633static void twl4030_constraints(struct twl4030_priv *twl4030,
1634 struct snd_pcm_substream *mst_substream)
1635{
1636 struct snd_pcm_substream *slv_substream;
1637
1638
1639 if (mst_substream == twl4030->master_substream)
1640 slv_substream = twl4030->slave_substream;
1641 else if (mst_substream == twl4030->slave_substream)
1642 slv_substream = twl4030->master_substream;
1643 else
1644 return;
1645
1646
1647 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1648 SNDRV_PCM_HW_PARAM_RATE,
1649 twl4030->rate,
1650 twl4030->rate);
1651
1652 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1653 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1654 twl4030->sample_bits,
1655 twl4030->sample_bits);
1656
1657 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1658 SNDRV_PCM_HW_PARAM_CHANNELS,
1659 twl4030->channels,
1660 twl4030->channels);
1661}
1662
1663
1664
1665static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
1666 int enable)
1667{
1668 u8 reg, mask;
1669
1670 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1671
1672 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1673 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1674 else
1675 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1676
1677 if (enable)
1678 reg |= mask;
1679 else
1680 reg &= ~mask;
1681
1682 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1683}
1684
1685static int twl4030_startup(struct snd_pcm_substream *substream,
1686 struct snd_soc_dai *dai)
1687{
1688 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1689 struct snd_soc_codec *codec = rtd->codec;
1690 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1691
1692 snd_pcm_hw_constraint_msbits(substream->runtime, 0, 32, 24);
1693 if (twl4030->master_substream) {
1694 twl4030->slave_substream = substream;
1695
1696
1697
1698 if (twl4030->configured)
1699 twl4030_constraints(twl4030, twl4030->master_substream);
1700 } else {
1701 if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) &
1702 TWL4030_OPTION_1)) {
1703
1704
1705
1706 snd_pcm_hw_constraint_minmax(substream->runtime,
1707 SNDRV_PCM_HW_PARAM_CHANNELS,
1708 2, 2);
1709 }
1710 twl4030->master_substream = substream;
1711 }
1712
1713 return 0;
1714}
1715
1716static void twl4030_shutdown(struct snd_pcm_substream *substream,
1717 struct snd_soc_dai *dai)
1718{
1719 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1720 struct snd_soc_codec *codec = rtd->codec;
1721 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1722
1723 if (twl4030->master_substream == substream)
1724 twl4030->master_substream = twl4030->slave_substream;
1725
1726 twl4030->slave_substream = NULL;
1727
1728
1729
1730 if (!twl4030->master_substream)
1731 twl4030->configured = 0;
1732 else if (!twl4030->master_substream->runtime->channels)
1733 twl4030->configured = 0;
1734
1735
1736 if (substream->runtime->channels == 4)
1737 twl4030_tdm_enable(codec, substream->stream, 0);
1738}
1739
1740static int twl4030_hw_params(struct snd_pcm_substream *substream,
1741 struct snd_pcm_hw_params *params,
1742 struct snd_soc_dai *dai)
1743{
1744 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1745 struct snd_soc_codec *codec = rtd->codec;
1746 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1747 u8 mode, old_mode, format, old_format;
1748
1749
1750 if (params_channels(params) == 4) {
1751 format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1752 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
1753
1754
1755
1756 if ((mode & TWL4030_OPTION_1) &&
1757 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
1758 twl4030_tdm_enable(codec, substream->stream, 1);
1759 else
1760 return -EINVAL;
1761 }
1762
1763 if (twl4030->configured)
1764
1765 return 0;
1766
1767
1768 old_mode = twl4030_read_reg_cache(codec,
1769 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1770 mode = old_mode & ~TWL4030_APLL_RATE;
1771
1772 switch (params_rate(params)) {
1773 case 8000:
1774 mode |= TWL4030_APLL_RATE_8000;
1775 break;
1776 case 11025:
1777 mode |= TWL4030_APLL_RATE_11025;
1778 break;
1779 case 12000:
1780 mode |= TWL4030_APLL_RATE_12000;
1781 break;
1782 case 16000:
1783 mode |= TWL4030_APLL_RATE_16000;
1784 break;
1785 case 22050:
1786 mode |= TWL4030_APLL_RATE_22050;
1787 break;
1788 case 24000:
1789 mode |= TWL4030_APLL_RATE_24000;
1790 break;
1791 case 32000:
1792 mode |= TWL4030_APLL_RATE_32000;
1793 break;
1794 case 44100:
1795 mode |= TWL4030_APLL_RATE_44100;
1796 break;
1797 case 48000:
1798 mode |= TWL4030_APLL_RATE_48000;
1799 break;
1800 case 96000:
1801 mode |= TWL4030_APLL_RATE_96000;
1802 break;
1803 default:
1804 printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n",
1805 params_rate(params));
1806 return -EINVAL;
1807 }
1808
1809
1810 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1811 format = old_format;
1812 format &= ~TWL4030_DATA_WIDTH;
1813 switch (params_format(params)) {
1814 case SNDRV_PCM_FORMAT_S16_LE:
1815 format |= TWL4030_DATA_WIDTH_16S_16W;
1816 break;
1817 case SNDRV_PCM_FORMAT_S32_LE:
1818 format |= TWL4030_DATA_WIDTH_32S_24W;
1819 break;
1820 default:
1821 printk(KERN_ERR "TWL4030 hw params: unknown format %d\n",
1822 params_format(params));
1823 return -EINVAL;
1824 }
1825
1826 if (format != old_format || mode != old_mode) {
1827 if (twl4030->codec_powered) {
1828
1829
1830
1831
1832 twl4030_codec_enable(codec, 0);
1833 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1834 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1835 twl4030_codec_enable(codec, 1);
1836 } else {
1837 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1838 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1839 }
1840 }
1841
1842
1843
1844 twl4030->configured = 1;
1845 twl4030->rate = params_rate(params);
1846 twl4030->sample_bits = hw_param_interval(params,
1847 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1848 twl4030->channels = params_channels(params);
1849
1850
1851
1852
1853 if (twl4030->slave_substream)
1854 twl4030_constraints(twl4030, substream);
1855
1856 return 0;
1857}
1858
1859static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1860 int clk_id, unsigned int freq, int dir)
1861{
1862 struct snd_soc_codec *codec = codec_dai->codec;
1863 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1864
1865 switch (freq) {
1866 case 19200000:
1867 case 26000000:
1868 case 38400000:
1869 break;
1870 default:
1871 dev_err(codec->dev, "Unsupported APLL mclk: %u\n", freq);
1872 return -EINVAL;
1873 }
1874
1875 if ((freq / 1000) != twl4030->sysclk) {
1876 dev_err(codec->dev,
1877 "Mismatch in APLL mclk: %u (configured: %u)\n",
1878 freq, twl4030->sysclk * 1000);
1879 return -EINVAL;
1880 }
1881
1882 return 0;
1883}
1884
1885static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
1886 unsigned int fmt)
1887{
1888 struct snd_soc_codec *codec = codec_dai->codec;
1889 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1890 u8 old_format, format;
1891
1892
1893 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1894 format = old_format;
1895
1896
1897 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1898 case SND_SOC_DAIFMT_CBM_CFM:
1899 format &= ~(TWL4030_AIF_SLAVE_EN);
1900 format &= ~(TWL4030_CLK256FS_EN);
1901 break;
1902 case SND_SOC_DAIFMT_CBS_CFS:
1903 format |= TWL4030_AIF_SLAVE_EN;
1904 format |= TWL4030_CLK256FS_EN;
1905 break;
1906 default:
1907 return -EINVAL;
1908 }
1909
1910
1911 format &= ~TWL4030_AIF_FORMAT;
1912 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1913 case SND_SOC_DAIFMT_I2S:
1914 format |= TWL4030_AIF_FORMAT_CODEC;
1915 break;
1916 case SND_SOC_DAIFMT_DSP_A:
1917 format |= TWL4030_AIF_FORMAT_TDM;
1918 break;
1919 default:
1920 return -EINVAL;
1921 }
1922
1923 if (format != old_format) {
1924 if (twl4030->codec_powered) {
1925
1926
1927
1928
1929 twl4030_codec_enable(codec, 0);
1930 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1931 twl4030_codec_enable(codec, 1);
1932 } else {
1933 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1934 }
1935 }
1936
1937 return 0;
1938}
1939
1940static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1941{
1942 struct snd_soc_codec *codec = dai->codec;
1943 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1944
1945 if (tristate)
1946 reg |= TWL4030_AIF_TRI_EN;
1947 else
1948 reg &= ~TWL4030_AIF_TRI_EN;
1949
1950 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1951}
1952
1953
1954
1955static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
1956 int enable)
1957{
1958 u8 reg, mask;
1959
1960 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1961
1962 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1963 mask = TWL4030_ARXL1_VRX_EN;
1964 else
1965 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1966
1967 if (enable)
1968 reg |= mask;
1969 else
1970 reg &= ~mask;
1971
1972 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1973}
1974
1975static int twl4030_voice_startup(struct snd_pcm_substream *substream,
1976 struct snd_soc_dai *dai)
1977{
1978 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1979 struct snd_soc_codec *codec = rtd->codec;
1980 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1981 u8 mode;
1982
1983
1984
1985
1986 if (twl4030->sysclk != 26000) {
1987 dev_err(codec->dev, "The board is configured for %u Hz, while"
1988 "the Voice interface needs 26MHz APLL mclk\n",
1989 twl4030->sysclk * 1000);
1990 return -EINVAL;
1991 }
1992
1993
1994
1995
1996 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
1997 & TWL4030_OPT_MODE;
1998
1999 if (mode != TWL4030_OPTION_2) {
2000 printk(KERN_ERR "TWL4030 voice startup: "
2001 "the codec mode is not option2\n");
2002 return -EINVAL;
2003 }
2004
2005 return 0;
2006}
2007
2008static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
2009 struct snd_soc_dai *dai)
2010{
2011 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2012 struct snd_soc_codec *codec = rtd->codec;
2013
2014
2015 twl4030_voice_enable(codec, substream->stream, 0);
2016}
2017
2018static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
2019 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2020{
2021 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2022 struct snd_soc_codec *codec = rtd->codec;
2023 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2024 u8 old_mode, mode;
2025
2026
2027 twl4030_voice_enable(codec, substream->stream, 1);
2028
2029
2030 old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
2031 & ~(TWL4030_CODECPDZ);
2032 mode = old_mode;
2033
2034 switch (params_rate(params)) {
2035 case 8000:
2036 mode &= ~(TWL4030_SEL_16K);
2037 break;
2038 case 16000:
2039 mode |= TWL4030_SEL_16K;
2040 break;
2041 default:
2042 printk(KERN_ERR "TWL4030 voice hw params: unknown rate %d\n",
2043 params_rate(params));
2044 return -EINVAL;
2045 }
2046
2047 if (mode != old_mode) {
2048 if (twl4030->codec_powered) {
2049
2050
2051
2052
2053 twl4030_codec_enable(codec, 0);
2054 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2055 twl4030_codec_enable(codec, 1);
2056 } else {
2057 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2058 }
2059 }
2060
2061 return 0;
2062}
2063
2064static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
2065 int clk_id, unsigned int freq, int dir)
2066{
2067 struct snd_soc_codec *codec = codec_dai->codec;
2068 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2069
2070 if (freq != 26000000) {
2071 dev_err(codec->dev, "Unsupported APLL mclk: %u, the Voice"
2072 "interface needs 26MHz APLL mclk\n", freq);
2073 return -EINVAL;
2074 }
2075 if ((freq / 1000) != twl4030->sysclk) {
2076 dev_err(codec->dev,
2077 "Mismatch in APLL mclk: %u (configured: %u)\n",
2078 freq, twl4030->sysclk * 1000);
2079 return -EINVAL;
2080 }
2081 return 0;
2082}
2083
2084static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
2085 unsigned int fmt)
2086{
2087 struct snd_soc_codec *codec = codec_dai->codec;
2088 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2089 u8 old_format, format;
2090
2091
2092 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2093 format = old_format;
2094
2095
2096 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2097 case SND_SOC_DAIFMT_CBM_CFM:
2098 format &= ~(TWL4030_VIF_SLAVE_EN);
2099 break;
2100 case SND_SOC_DAIFMT_CBS_CFS:
2101 format |= TWL4030_VIF_SLAVE_EN;
2102 break;
2103 default:
2104 return -EINVAL;
2105 }
2106
2107
2108 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2109 case SND_SOC_DAIFMT_IB_NF:
2110 format &= ~(TWL4030_VIF_FORMAT);
2111 break;
2112 case SND_SOC_DAIFMT_NB_IF:
2113 format |= TWL4030_VIF_FORMAT;
2114 break;
2115 default:
2116 return -EINVAL;
2117 }
2118
2119 if (format != old_format) {
2120 if (twl4030->codec_powered) {
2121
2122
2123
2124
2125 twl4030_codec_enable(codec, 0);
2126 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2127 twl4030_codec_enable(codec, 1);
2128 } else {
2129 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2130 }
2131 }
2132
2133 return 0;
2134}
2135
2136static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2137{
2138 struct snd_soc_codec *codec = dai->codec;
2139 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2140
2141 if (tristate)
2142 reg |= TWL4030_VIF_TRI_EN;
2143 else
2144 reg &= ~TWL4030_VIF_TRI_EN;
2145
2146 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2147}
2148
2149#define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
2150#define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2151
2152static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = {
2153 .startup = twl4030_startup,
2154 .shutdown = twl4030_shutdown,
2155 .hw_params = twl4030_hw_params,
2156 .set_sysclk = twl4030_set_dai_sysclk,
2157 .set_fmt = twl4030_set_dai_fmt,
2158 .set_tristate = twl4030_set_tristate,
2159};
2160
2161static const struct snd_soc_dai_ops twl4030_dai_voice_ops = {
2162 .startup = twl4030_voice_startup,
2163 .shutdown = twl4030_voice_shutdown,
2164 .hw_params = twl4030_voice_hw_params,
2165 .set_sysclk = twl4030_voice_set_dai_sysclk,
2166 .set_fmt = twl4030_voice_set_dai_fmt,
2167 .set_tristate = twl4030_voice_set_tristate,
2168};
2169
2170static struct snd_soc_dai_driver twl4030_dai[] = {
2171{
2172 .name = "twl4030-hifi",
2173 .playback = {
2174 .stream_name = "HiFi Playback",
2175 .channels_min = 2,
2176 .channels_max = 4,
2177 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
2178 .formats = TWL4030_FORMATS,},
2179 .capture = {
2180 .stream_name = "Capture",
2181 .channels_min = 2,
2182 .channels_max = 4,
2183 .rates = TWL4030_RATES,
2184 .formats = TWL4030_FORMATS,},
2185 .ops = &twl4030_dai_hifi_ops,
2186},
2187{
2188 .name = "twl4030-voice",
2189 .playback = {
2190 .stream_name = "Voice Playback",
2191 .channels_min = 1,
2192 .channels_max = 1,
2193 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2194 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2195 .capture = {
2196 .stream_name = "Capture",
2197 .channels_min = 1,
2198 .channels_max = 2,
2199 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2200 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2201 .ops = &twl4030_dai_voice_ops,
2202},
2203};
2204
2205static int twl4030_soc_suspend(struct snd_soc_codec *codec)
2206{
2207 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2208 return 0;
2209}
2210
2211static int twl4030_soc_resume(struct snd_soc_codec *codec)
2212{
2213 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2214 return 0;
2215}
2216
2217static int twl4030_soc_probe(struct snd_soc_codec *codec)
2218{
2219 struct twl4030_priv *twl4030;
2220
2221 twl4030 = kzalloc(sizeof(struct twl4030_priv), GFP_KERNEL);
2222 if (twl4030 == NULL) {
2223 printk("Can not allocate memroy\n");
2224 return -ENOMEM;
2225 }
2226 snd_soc_codec_set_drvdata(codec, twl4030);
2227
2228 twl4030->sysclk = twl4030_audio_get_mclk() / 1000;
2229 codec->dapm.idle_bias_off = 1;
2230
2231 twl4030_init_chip(codec);
2232
2233 return 0;
2234}
2235
2236static int twl4030_soc_remove(struct snd_soc_codec *codec)
2237{
2238 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2239
2240
2241 twl4030_reset_registers(codec);
2242 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2243 kfree(twl4030);
2244 return 0;
2245}
2246
2247static struct snd_soc_codec_driver soc_codec_dev_twl4030 = {
2248 .probe = twl4030_soc_probe,
2249 .remove = twl4030_soc_remove,
2250 .suspend = twl4030_soc_suspend,
2251 .resume = twl4030_soc_resume,
2252 .read = twl4030_read_reg_cache,
2253 .write = twl4030_write,
2254 .set_bias_level = twl4030_set_bias_level,
2255 .reg_cache_size = sizeof(twl4030_reg),
2256 .reg_word_size = sizeof(u8),
2257 .reg_cache_default = twl4030_reg,
2258
2259 .controls = twl4030_snd_controls,
2260 .num_controls = ARRAY_SIZE(twl4030_snd_controls),
2261 .dapm_widgets = twl4030_dapm_widgets,
2262 .num_dapm_widgets = ARRAY_SIZE(twl4030_dapm_widgets),
2263 .dapm_routes = intercon,
2264 .num_dapm_routes = ARRAY_SIZE(intercon),
2265};
2266
2267static int __devinit twl4030_codec_probe(struct platform_device *pdev)
2268{
2269 struct twl4030_codec_data *pdata = pdev->dev.platform_data;
2270
2271 if (!pdata) {
2272 dev_err(&pdev->dev, "platform_data is missing\n");
2273 return -EINVAL;
2274 }
2275
2276 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030,
2277 twl4030_dai, ARRAY_SIZE(twl4030_dai));
2278}
2279
2280static int __devexit twl4030_codec_remove(struct platform_device *pdev)
2281{
2282 snd_soc_unregister_codec(&pdev->dev);
2283 return 0;
2284}
2285
2286MODULE_ALIAS("platform:twl4030-codec");
2287
2288static struct platform_driver twl4030_codec_driver = {
2289 .probe = twl4030_codec_probe,
2290 .remove = __devexit_p(twl4030_codec_remove),
2291 .driver = {
2292 .name = "twl4030-codec",
2293 .owner = THIS_MODULE,
2294 },
2295};
2296
2297module_platform_driver(twl4030_codec_driver);
2298
2299MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2300MODULE_AUTHOR("Steve Sakoman");
2301MODULE_LICENSE("GPL");
2302