linux/drivers/char/mwave/tp3780i.c
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   1/*
   2*
   3* tp3780i.c -- board driver for 3780i on ThinkPads
   4*
   5*
   6* Written By: Mike Sullivan IBM Corporation
   7*
   8* Copyright (C) 1999 IBM Corporation
   9*
  10* This program is free software; yoe17an class="comment">* This poedpstrian>e it and/panmodify/char/mwave/tp3780i.c#L10" id="L10" class="line"name="L1"">   1/*
   2*
   3* tp3780i.c -- board drive(at>* Tr       4*
   5*
   6* Written By: Mike Sullivaan> WITHOUT ANY WARRANTY; witurn> even/the implied menranty of/char/mwave/tp3780i.c#L5" id="L5" class="line" 1name="L71">   7*
   8* Copyright (C) 1999 IBM CGNU General Pub);" License fpanmont details./char/mwave/tp3780i.c#L10" id="L10" class="line"name="L91">   9*
  10* This program is free sofNO WARRANTY/char/mwave/tp3780i.c#L10" id="L10" class="line2name="L12">   1/*
   2*
   3* tp3780i.c -- board driveLIMITATION, ANY WARRANTIES OR/CONDITIONS OF TITLE,fNON-INFRINGEMENT,/char/mwave/tp3780i.c#L5" id="L5" class="line" 2name="L42">   4*
   5*
   6* Written By: Mike Sullivadpstrian>div/the P yoe17aand arsumes all risks arsociated witu>it /char/mwave/tp3780i.c#L5" id="L5" class="line" 2name="L72">   7*
   8* Copyright (C) 1999 IBM Cthe risks and costs of/; yoe17aerrors, damage to or loss of/diva,/char/mwave/tp3780i.c#L5" id="L5" class="line" 2name="L92">   9*
  10* This program is free so/char/mwave/tp3780i.c#L10" id="L10" class="line3name="L13">   1/*
   2*
   3* tp3780i.c -- board driveDIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR/CONSEQUENTIAL/char/mwave/tp3780i.c#L10" id="L10" class="line3name="L43">   4*
   5*
   6* Written By: Mike SullivaTORT (INCLUDING NEGLIGENCE OR/OTHERWISE) ARISING IN ANY WAY OUT OF THE/char/mwave/tp3780i.c#L10" id="L10" class="line3name="L73">   7*
   8* Copyright (C) 1999 IBM CHEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES/char/mwave/tp3780i.c#L10" id="L10" class="line3name="L93">   9*
  10* This program is free sofYou surnld h10"poece.c#d a copy of/the GNU General Pub);" License/char/mwave/tp3780i.c#L10" id="L10" class="line4name="L14">   1/*
   2*
   3* tp3780i.c -- board driv/char/mwave/tp3780i.c#L10" id="L10" class="line4name="L4"">   4*
   5*
   6* Written By: Mike SullivaaaaaaaFirstpoelease to the ;ub);c/char/mwave/tp3780i.c#L10" id="L10" class="line4name="L74">   7*
   8* wave/tp3780i.c#L10" id="L10" class="line4name="L94">   9*<#inclu/e <ave/tp378inclu/ear/mwa/interru >.h>   9ftp3">r/mwa/interru >.h">*  10*<#inclu/e <ave/tp378inclu/ear/mwa/kernel.h>   9ftp3">r/mwa/kernel.h">*   1*<#inclu/e <ave/tp378inclu/ear/mwa/ptrace.h>   9ftp3">r/mwa/ptrace.h">*   2*<#inclu/e <ave/tp378inclu/ear/mwa/iopor>.h>   9ftp3">r/mwa/iopor>.h">*   3*<#inclu/e <ave/tp378+ambig=inclu/eaasm-alpha/io.h|inclu/eaasm-arm/io.h|inclu/eaasm-avr32/io.h|inclu/eaasm-blackfin/io.h|inclu/eaasm-cris/io.h|inclu/eaasm-frv/io.h|inclu/eaasm-generic/io.h|inclu/eaasm-h8300/io.h|inclu/eaasm-i386/io.h|inclu/eaasm-ia64/io.h|inclu/eaasm-m32r/io.h|inclu/eaasm-m68k/io.h|inclu/eaasm-m68kn="du/io.h|inclu/eaasm-mips/io.h|inclu/eaasm-mips64/io.h|inclu/eaasm-parisc/io.h|inclu/eaasm-powerpc/io.h|inclu/eaasm-ppc/io.h|inclu/eaasm-s390/io.h|inclu/eaasm-sh/io.h|inclu/eaasm-sh64/io.h|inclu/eaasm-harrc/io.h|inclu/eaasm-sarrc64/io.h|inclu/eaasm-um/io.h|inclu/eaasm-v850/io.h|inclu/eaasm-x86/io.h|inclu/eaasm-x86_64/io.h|inclu/eaasm-xtensa/io.h>   9falverasm/io.h">*   4*<#inclu/e "ave/tp3780i.c#L5" id="L5" clsmapi.h>   9ftp3">smapi.h">*   5*<#inclu/e "ave/tp3780i.c#L5" id="L5" clL5" cdd.h>   9ftp3">L5" cdd.h">*   6*<#inclu/e "ave/tp3780i.c#L5" id="L5" class="linh>   9ftp3">ass="linh">*   7*<#inclu/e "ave/tp3780i.c#L5" id="L5" cls="linh>   9ftp3">s="linh">*   8*<#inclu/e "ave/tp3780i.c#L5" id="L5" clL5" c;ub.h>   9ftp3">L5" c;ub.h">*   9* wave/tp3780i.c#L10" id="L10" class="line6 name="L60">  10*
     tp3">s_aus="dripadIrqToField">*<[16] =wave/tp3780i.c#L10" id="L10" class="line6name="L16">   1*   2*   3*
     tp3">s_aus="dripadDmaToField">*<[8] =wave/tp3780i.c#L10" id="L10" class="line6name="L46">   4*   5*
     tp3">s_numIrqs">*
     tp3">s_numDmas">*   6* wave/tp3780i.c#L10" id="L10" class="line6name="L76">   7* wave/tp3780i.c#L10" id="L10" class="line6name="L86">   8*
     tp3">EnableSRAM">*<(rivers/chacode=THINKPAD_BD_DATA
	 >
     tp3">THINKPAD_BD_DATA">*
     tp3">pBDData">*<)wave/tp3780i.c#L10" id="L10" class="line6name="L96">   9* {wave/tp3780i.c#L7" id="L7" class="line" n name="L70">  10*
     tp3">DSP_s="lI_CONFIG_SETTINGS">*divs
	 >
     tp3">pSet>divs">*
     tp3">pBDData">*<-pan rivers/chacode=rDspSet>divs
	 >
     tp3">rDspSet>divs">*<;wave/tp3780i.c#L5" id="L5" class="line" 7name="L17">   1*
     tp3">usDspBaseIO">*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspBaseIO
	 >
     tp3">usDspBaseIO">*<;wave/tp3780i.c#L5" id="L5" class="line" 7name="L27">   2*
     tp3">DSP_GPIO_OUTPUT_DATA_15_8">*
     tp3">rGpioOutputData">*<;wave/tp3780i.c#L5" id="L5" class="line" 7name="L37">   3*
     tp3">DSP_GPIO_DRIVER_ENABLE_15_8">*
     tp3">rGpioDi.c#LEnable">*<;wave/tp3780i.c#L5" id="L5" class="line" 7name="L47">   4*
     tp3">DSP_GPIO_MODE_15_8">*
     tp3">rGpioMode">*<;wave/tp3780i.c#L5" id="L5" class="line" 7name="L57">   5* wave/tp3780i.c#L10" id="L10" class="line7name="L67">   6*
     tp3">PRINTK_1">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<, rspan>
   7* wave/tp3780i.c#L10" id="L10" class="line7name="L87">   8*
     tp3">MKWORD">*<(rivers/chacode=rGpioMode
	 >
     tp3">rGpioMode">*<)a= rivers/chacode=ReadMsaCfg
	 >
     tp3">ReadMsaCfg">*<(rivers/chacode=DSP_GpioModeControl_15_8
	 >
     tp3">DSP_GpioModeControl_15_8">*<);wave/tp3780i.c#L5" id="L5" class="line" 7name="L97">   9*
     tp3">rGpioMode">*<.rivers/chacode=GpioMode10">  10GpioMode10">*  10*
     tp3">n IBeMsaCfg">*<(rivers/chacode=DSP_GpioModeControl_15_8
	 >
     tp3">DSP_GpioModeControl_15_8">*<, rivers/chacode=MKWORD
	 >
     tp3">MKWORD">*<(rivers/chacode=rGpioMode
	 >
     tp3">rGpioMode">*<));wave/tp3780i.c#L5" id="L5" class="line" 8name="L18">   1* wave/tp3780i.c#L10" id="L10" class="line8name="L28">   2*
     tp3">MKWORD">*<(rivers/chacode=rGpioDi.c#LEnable
	 >
     tp3">rGpioDi.c#LEnable">*<)a= 0;wave/tp3780i.c#L5" id="L5" class="line" 8name="L38">   3*
     tp3">rGpioDi.c#LEnable">*<.rivers/chacode=Enable10">  10Enable10">*
     tp3">TRUE">*<;wave/tp3780i.c#L5" id="L5" class="line" 8name="L48">   4*
     tp3">rGpioDi.c#LEnable">*<.rivers/chacode=Mask10">  10Mask10">*
     tp3">TRUE">*<;wave/tp3780i.c#L5" id="L5" class="line" 8name="L58">   5*
     tp3">n IBeMsaCfg">*<(rivers/chacode=DSP_GpioDi.c#LEnable_15_8
	 >
     tp3">DSP_GpioDi.c#LEnable_15_8">*<, rivers/chacode=MKWORD
	 >
     tp3">MKWORD">*<(rivers/chacode=rGpioDi.c#LEnable
	 >
     tp3">rGpioDi.c#LEnable">*<));wave/tp3780i.c#L5" id="L5" class="line" 8name="L68">   6* wave/tp3780i.c#L10" id="L10" class="line8name="L78">   7*
     tp3">MKWORD">*<(rivers/chacode=rGpioOutputData
	 >
     tp3">rGpioOutputData">*<)a= 0;wave/tp3780i.c#L5" id="L5" class="line" 8name="L8"">   8*
     tp3">rGpioOutputData">*<.rivers/chacode=Latch10">  10Latch10">*   9*
     tp3">rGpioOutputData">*<.rivers/chacode=Mask10">  10Mask10">*
     tp3">TRUE">*<;wave/tp3780i.c#L5" id="L5" class="line" 9 name="L90">  10*
     tp3">n IBeMsaCfg">*<(rivers/chacode=DSP_GpioOutputData_15_8
	 >
     tp3">DSP_GpioOutputData_15_8">*<, rivers/chacode=MKWORD
	 >
     tp3">MKWORD">*<(rivers/chacode=rGpioOutputData
	 >
     tp3">rGpioOutputData">*<));wave/tp3780i.c#L5" id="L5" class="line" 9name="L19">   1* wave/tp3780i.c#L10" id="L10" class="line9name="L29">   2*
     tp3">PRINTK_1">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<, rspan>
   3*<}wave/tp3780i.c#L5" id="L5" class="line" 9name="L49">   4* wave/tp3780i.c#L10" id="L10" class="line9name="L59">   5* wave/tp3780i.c#L10" id="L10" class="line9name="L69">   6*
     tp3">irqtype="_t">*
	 >
     tp3">UartInterru >">*<(intdrivers/chacode=irq
	 >
     tp3">irq">*<, void *rivers/chacode=dev_id
	 >
     tp3">dev_id">*<)wave/tp3780i.c#L10" id="L10" class="line9name="L79">   7* {wave/tp3780i.c#L7" id="L7" class="line" 9name="L89">   8*
     tp3">PRINTK_3">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<,wave/tp3780i.c#L7" id="L7" class="line" 9name="L9"">   9*
irq">*<, rivers/chacode=dev_id
	 >
     tp3">dev_id">*<);wave/tp3780i.c#L5" id="L5" class="line" 10 name="L100">  10*IRQ_HANDLED">*<;wave/tp3780i.c#L5" id="L5" class="line" 10name="L1"0">   1*<}wave/tp3780i.c#L5" id="L5" class="line" 10name="L210">   2* wave/tp3780i.c#L10" id="L10" class="line10name="L310">   3*
     tp3">irqtype="_t">*
	 >
     tp3">DspInterru >">*<(intdrivers/chacode=irq
	 >
     tp3">irq">*<, void *rivers/chacode=dev_id
	 >
     tp3">dev_id">*<)wave/tp3780i.c#L10" id="L10" class="line10name="L410">   4* {wave/tp3780i.c#L7" id="L7" class="line" 10name="L510">   5*
     tp3">pMWAVE_DEVICE_DATA">*
     tp3">pDrvData">*
     tp3">L7" c_s_mdd">*<;wave/tp3780i.c#L5" id="L5" class="line" 10name="L610">   6*
     tp3">DSP_s="lI_CONFIG_SETTINGS">*divs
	 >
     tp3">pSet>divs">*
     tp3">pDrvData">*<-pan rivers/chacode=rBDData
	 >
     tp3">rBDData">*<.rivers/chacode=rDspSet>divs
	 >
     tp3">rDspSet>divs">*<;wave/tp3780i.c#L5" id="L5" class="line" 10name="L710">   7*
     tp3">usDspBaseIO">*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspBaseIO
	 >
     tp3">usDspBaseIO">*<;wave/tp3780i.c#L5" id="L5" class="line" 10name="L810">   8*
     tp3">usIPCSource">*
     tp3">usIsoliversMask">*<, rivers/chacode=usPCNum
	 >
     tp3">usPCNum">*<;wave/tp3780i.c#L5" id="L5" class="line" 10name="L910">   9* wave/tp3780i.c#L10" id="L10" class="line1" name="L110">  10*
     tp3">PRINTK_3">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<,wave/tp3780i.c#L7" id="L7" class="line" 1"name="L1""">   1*
irq">*<, rivers/chacode=dev_id
	 >
     tp3">dev_id">*<);wave/tp3780i.c#L5" id="L5" class="line" 1"name="L211">   2* wave/tp3780i.c#L10" id="L10" class="line1"name="L311">   3*
     tp3">dsps="lI_GetIPCSource">*<(rivers/chacode=usDspBaseIO
	 >
     tp3">usDspBaseIO">*<, &rivers/chacode=usIPCSource
	 >
     tp3">usIPCSource">*<) == 0) {wave/tp3780i.c#L7" id="L7" class="line" 1"name="L411">   4*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<,wave/tp3780i.c#L7" id="L7" class="line" 1"name="L511">   5*
   6*
     tp3">usIPCSource">*<);wave/tp3780i.c#L5" id="L5" class="line" 1"name="L711">   7*
     tp3">usIsoliversMask">*   8*
     tp3">usPCNum">*
     tp3">usPCNum">*< <= 16; rivers/chacode=usPCNum
	 >
     tp3">usPCNum">*<++) {wave/tp3780i.c#L7" id="L7" class="line" 1"name="L911">   9*
     tp3">usIPCSource">*
     tp3">usIsoliversMask">*<) {wave/tp3780i.c#L7" id="L7" class="line" 12 name="L120">  10*
     tp3">usIPCSource">*
     tp3">usIsoliversMask">*<;wave/tp3780i.c#L5" id="L5" class="line" 12name="L112">   1*
     tp3">PRINTK_3">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<,wave/tp3780i.c#L7" id="L7" class="line" 12name="L21"">   2*
   3*
     tp3">usPCNum">*<, rivers/chacode=usIPCSource
	 >
     tp3">usIPCSource">*<);wave/tp3780i.c#L5" id="L5" class="line" 12name="L412">   4*
     tp3">pDrvData">*<-pan rivers/chacode=IPCs
	 >
     tp3">IPCs">*<[rivers/chacode=usPCNum
	 >
     tp3">usPCNum">*< - 1].rivers/chacode=usIntCoun>
	 >
     tp3">usIntCoun>">*   5*
     tp3">pDrvData">*<-pan rivers/chacode=IPCs
	 >
     tp3">IPCs">*<[rivers/chacode=usPCNum
	 >
     tp3">usPCNum">*< - 1].rivers/chacode=usIntCoun>
	 >
     tp3">usIntCoun>">*   6*   7*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<,wave/tp3780i.c#L7" id="L7" class="line" 12name="L812">   8*
   9*
     tp3">pDrvData">*<-pan rivers/chacode=IPCs
	 >
     tp3">IPCs">*<[rivers/chacode=usPCNum
	 >
     tp3">usPCNum">*< - 1].rivers/chacode=usIntCoun>
	 >
     tp3">usIntCoun>">*<);wave/tp3780i.c#L5" id="L5" class="line" 13 name="L130">  10*
     tp3">pDrvData">*<-pan rivers/chacode=IPCs
	 >
     tp3">IPCs">*<[rivers/chacode=usPCNum
	 >
     tp3">usPCNum">*< - 1].rivers/chacode=bIsEnabled
	 >
     tp3">bIsEnabled">*
     tp3">TRUE">*<) {wave/tp3780i.c#L7" id="L7" class="line" 13name="L113">   1*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<,wave/tp3780i.c#L7" id="L7" class="line" 13name="L213">   2*
   3*
     tp3">usPCNum">*< - 1);wave/tp3780i.c#L5" id="L5" class="line" 13name="L413">   4*
ble
	 >
     tp3">wake_up_interru >
ble">*<(&rivers/chacode=pDrvData
	 >
     tp3">pDrvData">*<-pan rivers/chacode=IPCs
	 >
     tp3">IPCs">*<[rivers/chacode=usPCNum
	 >
     tp3">usPCNum">*< - 1].rivers/chacode=ipc_wait_queue
	 >
     tp3">ipc_wait_queue">*<);wave/tp3780i.c#L5" id="L5" class="line" 13name="L513">   5*   6*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<,wave/tp3780i.c#L7" id="L7" class="line" 13name="L713">   7*
   8*
     tp3">usPCNum">*< - 1);wave/tp3780i.c#L5" id="L5" class="line" 13name="L913">   9*  10*   1*
     tp3">usIPCSource">*   2*   3*
   4*
     tp3">usIsoliversMask">*
     tp3">usIsoliversMask">*   5*   6*   7*
     tp3">PRINTK_1">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<,wave/tp3780i.c#L7" id="L7" class="line" 14name="L814">   8*
   9*  10*
     tp3">PRINTK_1">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<, rspan>
   1*IRQ_HANDLED">*<;wave/tp3780i.c#L5" id="L5" class="line" 1nname="L215">   2*<}wave/tp3780i.c#L5" id="L5" class="line" 1nname="L315">   3*   4* wave/tp3780i.c#L10" id="L10" class="line1nname="L51"">   5*
     tp3">tps="lI_InitdalizeB ThiData">*<(rivers/chacode=THINKPAD_BD_DATA
	 >
     tp3">THINKPAD_BD_DATA">*
     tp3">pBDData">*<)wave/tp3780i.c#L10" id="L10" class="line1nname="L615">   6*<{wave/tp3780i.c#L7" id="L7" class="line" 1nname="L715">   7*
     tp3">rypval">*   8*
     tp3">DSP_s="lI_CONFIG_SETTINGS">*divs
	 >
     tp3">pSet>divs">*
     tp3">pBDData">*<-pan rivers/chacode=rDspSet>divs
	 >
     tp3">rDspSet>divs">*<;wave/tp3780i.c#L5" id="L5" class="line" 1nname="L915">   9* wave/tp3780i.c#L10" id="L10" class="line16 name="L160">  10*   1*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<, rspan>

     tp3">pBDData">*<);wave/tp3780i.c#L5" id="L5" class="line" 16name="L216">   2* wave/tp3780i.c#L10" id="L10" class="line16name="L316">   3ReadMsaCfg">*<(rivers/cBDData
	 >
     tp3">pBDData">*<-pan rivers/chacode=rbDSPEnabled
	 >
     tp3">bDSPEnabled">*
     tp3">FALSE">*<;wave/tp3780i.c#L5" id="L5" class="line" 16name="L416">   4*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bInterru >Claimed
	 >
     tp3">bInterru >Claimed">*
     tp3">FALSE">*<;wave/tp3780i.c#L5" id="L5" class="line" 16name="L516">   5* wave/tp3780i.c#L10" id="L10" class="line16name="L61"">   6*
     tp3">rypval">*
     tp3">smapi_init">*<();wave/tp3780i.c#L5" id="L5" class="line" 16name="L716">   7*
     tp3">rypval">*<) {wave/tp3780i.c#L7" id="L7" class="line" 16name="L816">   8*
     tp3">PRINTK_ERROR">*<(rivers/chacode=KERN_ERR_MWAVE
	 >
     tp3">KERN_ERR_MWAVE">*
   9*  10*L7" c_s="li_irq">*L7" c_s="li_io">*
     tp3">L7" c_uart_irq">*
     tp3">L7" c_uart_io">*<) {wave/tp3780i.c#L7" id="L7" class="line" 17name="L117">   1*
     tp3">rypval">*
     tp3">smapi_set_DSP_cfg">*<();wave/tp3780i.c#L5" id="L5" class="line" 17name="L217">   2*   3*   4* wave/tp3780i.c#L10" id="L10" class="line17name="L517">   5*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<, rspan>

     tp3">rypval">*<);wave/tp3780i.c#L5" id="L5" class="line" 17name="L617">   6* wave/tp3780i.c#L10" id="L10" class="line17name="L71"">   7*rypval">*<;wave/tp3780i.c#L5" id="L5" class="line" 17name="L817">   8*<}wave/tp3780i.c#L5" id="L5" class="line" 17name="L917">   9* wave/tp3780i.c#L10" id="L10" class="line18 name="L180">  10*
     tp3">tps="lI_Cleanup">*<(rivers/chacode=THINKPAD_BD_DATA
	 >
     tp3">THINKPAD_BD_DATA">*
     tp3">pBDData">*<)wave/tp3780i.c#L10" id="L10" class="line18name="L118">   1* {wave/tp3780i.c#L7" id="L7" class="line" 18name="L218">   2*
     tp3">rypval">*   3*   4*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<,wave/tp3780i.c#L7" id="L7" class="line" 18name="L518">   5*

     tp3">pBDData">*<);wave/tp3780i.c#L5" id="L5" class="line" 18name="L618">   6* wave/tp3780i.c#L10" id="L10" class="line18name="L718">   7*rypval">*<;wave/tp3780i.c#L5" id="L5" class="line" 18name="L81"">   8*<}wave/tp3780i.c#L5" id="L5" class="line" 18name="L918">   9* wave/tp3780i.c#L10" id="L10" class="line19 name="L190">  10*
     tp3">tps="lI_CalcResources">*<(rivers/chacode=THINKPAD_BD_DATA
	 >
     tp3">THINKPAD_BD_DATA">*
     tp3">pBDData">*<)wave/tp3780i.c#L10" id="L10" class="line19name="L119">   1* {wave/tp3780i.c#L7" id="L7" class="line" 19name="L219">   2*
     tp3">SMAPI_DSP_SETTINGS">*
     tp3">tSmapiInfo">*<;wave/tp3780i.c#L5" id="L5" class="line" 19name="L319">   3*
     tp3">DSP_s="lI_CONFIG_SETTINGS">*divs
	 >
     tp3">pSet>divs">*
     tp3">pBDData">*<-pan rivers/chacode=rDspSet>divs
	 >
     tp3">rDspSet>divs">*<;wave/tp3780i.c#L5" id="L5" class="line" 19name="L419">   4* wave/tp3780i.c#L10" id="L10" class="line19name="L519">   5*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<,wave/tp3780i.c#L10" id="L10" class="line19name="L619">   6*

     tp3">pBDData">*<);wave/tp3780i.c#L5" id="L5" class="line" 19name="L719">   7* wave/tp3780i.c#L10" id="L10" class="line19name="L819">   8*
     tp3">smapi_query_DSP_cfg">*<(&rivers/chacode=tSmapiInfo
	 >
     tp3">tSmapiInfo">*<)) {wave/tp3780i.c#L7" id="L7" class="line" 19name="L91"">   9*
     tp3">PRINTK_ERROR">*<(rivers/chacode=KERN_ERR_MWAVE
	 >
     tp3">KERN_ERR_MWAVE">*
div.\n"achar/m);wave/tp3780i.c#L5" id="L5" class="line" 20 name="L200">  10*EIO">*<;wave/tp3780i.c#L5" id="L5" class="line" 20name="L120">   1*   2* wave/tp3780i.c#L10" id="L10" class="line20name="L320">   3*
   4*   5*
     tp3">tSmapiInfo">*<.rivers/chacode=usDspIRQ
	 >
     tp3">usDspIRQ">*   6*
     tp3">tSmapiInfo">*<.rivers/chacode=usDspBaseIO
	 >
     tp3">usDspBaseIO">*   7*
     tp3">tSmapiInfo">*<.rivers/chacode=usUartIRQ
	 >
     tp3">usUartIRQ">*   8*
     tp3">tSmapiInfo">*<.rivers/chacode=usUartBaseIO
	 >
     tp3">usUartBaseIO">*   9*  10*
     tp3">PRINTK_ERROR">*<(rivers/chacode=KERN_ERR_MWAVE
	 >
     tp3">KERN_ERR_MWAVE">*
div. Abor>div.\n"achar/m);wave/tp3780i.c#L5" id="L5" class="line" 2"name="L12"">   1*EIO">*<;wave/tp3780i.c#L5" id="L5" class="line" 2"name="L221">   2*   3*   4*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bDSPEnabled
	 >
     tp3">bDSPEnabled">*
     tp3">tSmapiInfo">*<.rivers/chacode=bDSPEnabled
	 >
     tp3">bDSPEnabled">*
     tp3">tSmapiInfo">*<.rivers/chacode=bDSPPtysen>
	 >
     tp3">bDSPPtysen>">*<);wave/tp3780i.c#L5" id="L5" class="line" 2"name="L521">   5*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bModemEnabled
	 >
     tp3">bModemEnabled">*
     tp3">tSmapiInfo">*<.rivers/chacode=bModemEnabled
	 >
     tp3">bModemEnabled">*<;wave/tp3780i.c#L5" id="L5" class="line" 2"name="L621">   6*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspIrq
	 >
     tp3">usDspIrq">*
     tp3">tSmapiInfo">*<.rivers/chacode=usDspIRQ
	 >
     tp3">usDspIRQ">*<;wave/tp3780i.c#L5" id="L5" class="line" 2"7ame="L621">   7*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspDma
	 >
     tp3">usDspDma">*
     tp3">tSmapiInfo">*<.rivers/chacode=usDspDMA
	 >
     tp3">usDspDMA">*<;wave/tp3780i.c#L5" id="L5" class="line" 2"8ame="L621">   8*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspBaseIO
	 >
     tp3">usDspBaseIO">*
     tp3">tSmapiInfo">*<.rivers/chacode=usDspBaseIO
	 >
     tp3">usDspBaseIO">*<;wave/tp3780i.c#L5" id="L5" class="line" 2"name="L921">   9*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usUartIrq
	 >
     tp3">usUartIrq">*
     tp3">tSmapiInfo">*<.rivers/chacode=usUartIRQ
	 >
     tp3">usUartIRQ">*<;wave/tp3780i.c#L5" id="L5" class="line" 22 name="L220">  10*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usUartBaseIO
	 >
     tp3">usUartBaseIO">*
     tp3">tSmapiInfo">*<.rivers/chacode=usUartBaseIO
	 >
     tp3">usUartBaseIO">*<;wave/tp3780i.c#L5" id="L5" class="line" 22name="L122">   1* wave/tp3780i.c#L10" id="L10" class="line22name="L22"">   2*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=uDStoreSize
	 >
     tp3">uDStoreSize">*
     tp3">TP_ABILITIES_DATA_SIZE">*<;wave/tp3780i.c#L5" id="L5" class="line" 22name="L322">   3ReadMsaCfg">*<(rivers/cBSet>divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=uIStoreSize
	 >
     tp3">uIStoreSize">*
     tp3">TP_ABILITIES_INST_SIZE">*<;wave/tp3780i.c#L5" id="L5" class="line" 22name="L422">   4*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=uIps
	 >
     tp3">uIps">*
     tp3">TP_ABILITIES_INTS_PER_SEC">*<;wave/tp3780i.c#L5" id="L5" class="line" 22name="L522">   5* wave/tp3780i.c#L10" id="L10" class="line22name="L622">   6*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bDSPEnabled
	 >
     tp3">bDSPEnabled">*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bModemEnabled
	 >
     tp3">bModemEnabled">*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspIrq
	 >
     tp3">usDspIrq">*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usUartIrq
	 >
     tp3">usUartIrq">*<) {wave/tp3780i.c#L7" id="L7" class="line" 22name="L722">   7*
     tp3">pBDData">*<-pan rivers/chacode=bSid=eDspIrq
	 >
     tp3">bSid=eDspIrq">*
     tp3">pBDData">*<-pan rivers/chacode=bSid=eUartIrq
	 >
     tp3">bSid=eUartIrq">*   8*   9*
     tp3">pBDData">*<-pan rivers/chacode=bSid=eDspIrq
	 >
     tp3">bSid=eDspIrq">*
     tp3">pBDData">*<-pan rivers/chacode=bSid=eUartIrq
	 >
     tp3">bSid=eUartIrq">*  10*   1* wave/tp3780i.c#L10" id="L10" class="line23name="L223">   2*
     tp3">PRINTK_1">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<, rspan>
   3*   4*   5*<}wave/tp3780i.c#L5" id="L5" class="line" 23name="L623">   6* wave/tp3780i.c#L10" id="L10" class="line23name="L723">   7* wave/tp3780i.c#L10" id="L10" class="line23name="L823">   8*
     tp3">tps="lI_ClaimResources">*<(rivers/chacode=THINKPAD_BD_DATA
	 >
     tp3">THINKPAD_BD_DATA">*
     tp3">pBDData">*<)wave/tp3780i.c#L10" id="L10" class="line23name="L923">   9*<{wave/tp3780i.c#L7" id="L7" class="line" 24 name="L240">  10*
     tp3">rypval">*   1*
     tp3">DSP_s="lI_CONFIG_SETTINGS">*divs
	 >
     tp3">pSet>divs">*
     tp3">pBDData">*<-pan rivers/chacode=rDspSet>divs
	 >
     tp3">rDspSet>divs">*<;wave/tp3780i.c#L5" id="L5" class="line" 24name="L224">   2*
     tp3">tysource">*
     tp3">pres">*<;wave/tp3780i.c#L5" id="L5" class="line" 24name="L324">   3*   4*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<,wave/tp3780i.c#L7" id="L7" class="line" 24name="L524">   5*

     tp3">pBDData">*<);wave/tp3780i.c#L5" id="L5" class="line" 24name="L624">   6* wave/tp3780i.c#L10" id="L10" class="line24name="L724">   7*
     tp3">pres">*
     tp3">tyquest_region">*<(rivers/chacode=pSet>divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspBaseIO
	 >
     tp3">usDspBaseIO">*<, 16, rspan>
   8*
     tp3">pres">*
     tp3">NULL">*
     tp3">rypval">*
     tp3">EIO">*<;wave/tp3780i.c#L5" id="L5" class="line" 24name="L924">   9* wave/tp3780i.c#L10" id="L10" class="line2n name="L250">  10*
     tp3">rypval">*<) {wave/tp3780i.c#L7" id="L7" class="line" 2nname="L125">   1*
     tp3">PRINTK_ERROR">*<(rivers/chacode=KERN_ERR_MWAVE
	 >
     tp3">KERN_ERR_MWAVE">*
div a> %x\n"achar/m, rivers/chacode=pSet>divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspBaseIO
	 >
     tp3">usDspBaseIO">*<);wave/tp3780i.c#L5" id="L5" class="line" 2nname="L225">   2*
     tp3">rypval">*
     tp3">EIO">*<;wave/tp3780i.c#L5" id="L5" class="line" 2nname="L325">   3*   4* wave/tp3780i.c#L10" id="L10" class="line2nname="L52"">   5*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<, rspan>

     tp3">rypval">*<);wave/tp3780i.c#L5" id="L5" class="line" 2nname="L625">   6* wave/tp3780i.c#L10" id="L10" class="line2nname="L725">   7*rypval">*<;wave/tp3780i.c#L5" id="L5" class="line" 2nname="L825">   8*<}wave/tp3780i.c#L5" id="L5" class="line" 2nname="L925">   9* wave/tp3780i.c#L10" id="L10" class="line26 name="L260">  10*
     tp3">tps="lI_ReleaseResources">*<(rivers/chacode=THINKPAD_BD_DATA
	 >
     tp3">THINKPAD_BD_DATA">*
     tp3">pBDData">*<)wave/tp3780i.c#L10" id="L10" class="line26name="L126">   1* {wave/tp3780i.c#L7" id="L7" class="line" 26name="L226">   2*
     tp3">rypval">*   3ReadMsaCfg">*<(rivers/cDSP_s="lI_CONFIG_SETTINGS
	 >
     tp3">DSP_s="lI_CONFIG_SETTINGS">*divs
	 >
     tp3">pSet>divs">*
     tp3">pBDData">*<-pan rivers/chacode=rDspSet>divs
	 >
     tp3">rDspSet>divs">*<;wave/tp3780i.c#L5" id="L5" class="line" 26name="L426">   4* wave/tp3780i.c#L10" id="L10" class="line26name="L526">   5*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<,wave/tp3780i.c#L10" id="L10" class="line26name="L62"">   6*

     tp3">pBDData">*<);wave/tp3780i.c#L5" id="L5" class="line" 26name="L726">   7* wave/tp3780i.c#L10" id="L10" class="line26name="L826">   8*
     tp3">tylease_region">*<(rivers/chacode=pSet>divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspBaseIO
	 >
     tp3">usDspBaseIO">*   9* wave/tp3780i.c#L10" id="L10" class="line2n name="L270">  10*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bInterru >Claimed
	 >
     tp3">bInterru >Claimed">*<) {wave/tp3780i.c#L7" id="L7" class="line" 27name="L127">   1*
     tp3">free_irq">*<(rivers/chacode=pSet>divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspIrq
	 >
     tp3">usDspIrq">*<, rivers/chacode=NULL
	 >
     tp3">NULL">*<);wave/tp3780i.c#L5" id="L5" class="line" 27name="L227">   2*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bInterru >Claimed
	 >
     tp3">bInterru >Claimed">*
     tp3">FALSE">*<;wave/tp3780i.c#L5" id="L5" class="line" 27name="L327">   3*   4* wave/tp3780i.c#L10" id="L10" class="line27name="L527">   5*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<,wave/tp3780i.c#L10" id="L10" class="line27name="L627">   6*

     tp3">rypval">*<);wave/tp3780i.c#L5" id="L5" class="line" 27name="L72"">   7* wave/tp3780i.c#L10" id="L10" class="line27name="L827">   8*rypval">*<;wave/tp3780i.c#L5" id="L5" class="line" 27name="L927">   9* }wave/tp3780i.c#L5" id="L5" class="line" 28 name="L280">  10*   1* wave/tp3780i.c#L10" id="L10" class="line28name="L228">   2* wave/tp3780i.c#L10" id="L10" class="line28name="L328">   3*
     tp3">tps="lI_EnableDSP">*<(rivers/chacode=THINKPAD_BD_DATA
	 >
     tp3">THINKPAD_BD_DATA">*
     tp3">pBDData">*<)wave/tp3780i.c#L10" id="L10" class="line28name="L428">   4*<{wave/tp3780i.c#L7" id="L7" class="line" 28name="L528">   5*
     tp3">DSP_s="lI_CONFIG_SETTINGS">*divs
	 >
     tp3">pSet>divs">*
     tp3">pBDData">*<-pan rivers/chacode=rDspSet>divs
	 >
     tp3">rDspSet>divs">*<;wave/tp3780i.c#L7" id="L7" class="line" 28name="L628">   6*
     tp3">BOOLEAN">*
     tp3">bDSPPoweredUp">*
     tp3">FALSE">*<, rivers/chacode=bInterru >Allocated
	 >
     tp3">bInterru >Allocated">*
     tp3">FALSE">*<;wave/tp3780i.c#L5" id="L5" class="line" 28name="L728">   7* wave/tp3780i.c#L10" id="L10" class="line28name="L82"">   8*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<, rspan>

     tp3">pBDData">*<);wave/tp3780i.c#L5" id="L5" class="line" 28name="L928">   9* wave/tp3780i.c#L10" id="L10" class="line29 name="L290">  10*
     tp3">pBDData">*<-pan rivers/chacode=rbDSPEnabled
	 >
     tp3">bDSPEnabled">*<) {wave/tp3780i.c#L7" id="L7" class="line" 29name="L129">   1*
     tp3">PRINTK_ERROR">*<(rivers/chacode=KERN_ERR_MWAVE
	 >
     tp3">KERN_ERR_MWAVE">*
   2*
     tp3">exit_cleanup">*<;wave/tp3780i.c#L5" id="L5" class="line" 29name="L329">   3*   4* wave/tp3780i.c#L10" id="L10" class="line29name="L529">   5*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bDSPEnabled
	 >
     tp3">bDSPEnabled">*<) {wave/tp3780i.c#L7" id="L7" class="line" 29name="L629">   6*
     tp3">PRINTK_ERROR">*<(rivers/chacode=KERN_ERR_MWAVE
	 >
     tp3">KERN_ERR_MWAVE">*
divs-pan bDSPEnabled not set\n"achar/m);wave/tp3780i.c#L5" id="L5" class="line" 29name="L729">   7*
     tp3">exit_cleanup">*<;wave/tp3780i.c#L5" id="L5" class="line" 29name="L829">   8*   9* wave/tp3780i.c#L10" id="L10" class="line30 name="L300">  10*   1*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspIrq
	 >
     tp3">usDspIrq">*< pan = rivers/chacode=s_numIrqs
	 >
     tp3">s_numIrqs">*<)wave/tp3780i.c#L10" id="L10" class="line30name="L230">   2*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspDma
	 >
     tp3">usDspDma">*
     tp3">s_numDmas">*<)wave/tp3780i.c#L10" id="L10" class="line303ame="L230">   3*
     tp3">s_ausThinkpadIrqToField">*<[rivers/chacode=pSet>divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspIrq
	 >
     tp3">usDspIrq">*<]a== 0xFFFF)wave/tp3780i.c#L10" id="L10" class="line304ame="L230">   4*
     tp3">s_ausThinkpadDmaToField">*<[rivers/chacode=pSet>divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspDma
	 >
     tp3">usDspDma">*<]a== 0xFFFF)wave/tp3780i.c#L10" id="L10" class="line305ame="L230">   5*   6*
     tp3">PRINTK_ERROR">*<(rivers/chacode=KERN_ERR_MWAVE
	 >
     tp3">KERN_ERR_MWAVE">*
divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspIrq
	 >
     tp3">usDspIrq">*<);wave/tp3780i.c#L5" id="L5" class="line" 307ame="L630">   7*
     tp3">exit_cleanup">*<;wave/tp3780i.c#L5" id="L5" class="line" 308ame="L630">   8*   9* wave/tp3780i.c#L10" id="L10" class="line3" name="L310">  10*   1*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspBaseIO
	 >
     tp3">usDspBaseIO">*   2*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspBaseIO
	 >
     tp3">usDspBaseIO">*   3*   4*
     tp3">PRINTK_ERROR">*<(rivers/chacode=KERN_ERR_MWAVE
	 >
     tp3">KERN_ERR_MWAVE">*
divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspBaseIO
	 >
     tp3">usDspBaseIO">*<);wave/tp3780i.c#L5" id="L5" class="line" 3"name="L531">   5*
     tp3">exit_cleanup">*<;wave/tp3780i.c#L5" id="L5" class="line" 3"name="L631">   6*   7* wave/tp3780i.c#L10" id="L10" class="line3"8ame="L631">   8*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bModemEnabled
	 >
     tp3">bModemEnabled">*<) {wave/tp3780i.c#L7" id="L7" class="line" 3"9ame="L631">   9*  10*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usUartIrq
	 >
     tp3">usUartIrq">*
     tp3">s_numIrqs">*   1*
     tp3">s_ausThinkpadIrqToField">*<[rivers/chacode=pSet>divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usUartIrq
	 >
     tp3">usUartIrq">*<]a== 0xFFFFwave/tp3780i.c#L10" id="L10" class="line32name="L23"">   2*   3*
     tp3">PRINTK_ERROR">*<(rivers/chacode=KERN_ERR_MWAVE
	 >
     tp3">KERN_ERR_MWAVE">*
divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usUartIrq
	 >
     tp3">usUartIrq">*<);wave/tp3780i.c#L5" id="L5" class="line" 32name="L432">   4*
     tp3">exit_cleanup">*<;wave/tp3780i.c#L5" id="L5" class="line" 32name="L532">   5*   6*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usUartBaseIO
	 >
     tp3">usUartBaseIO">*<) {wave/tp3780i.c#L7" id="L7" class="line" 327ame="L632">   7*   8*   9*  10*   1*   2* wave/tp3780i.c#L10" id="L10" class="line33name="L33"">   3*   4*
     tp3">PRINTK_ERROR">*<(rspan>
divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usUartBaseIO
	 >
     tp3">usUartBaseIO">*<);wave/tp3780i.c#L5" id="L5" class="line" 33name="L533">   5*
     tp3">exit_cleanup">*<;wave/tp3780i.c#L5" id="L5" class="line" 33name="L633">   6*   7*   8*   9*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bDspIrqAct.c#Low
	 >
     tp3">bDspIrqAct.c#Low">*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bDspIrqPulse
	 >
     tp3">bDspIrqPulse">*
     tp3">TRUE">*<;wave/tp3780i.c#L5" id="L5" class="line" 34 name="L340">  10*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bUartIrqAct.c#Low
	 >
     tp3">bUartIrqAct.c#Low">*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bUartIrqPulse
	 >
     tp3">bUartIrqPulse">*
     tp3">TRUE">*<;wave/tp3780i.c#L5" id="L5" class="line" 34name="L134">   1* wave/tp3780i.c#L10" id="L10" class="line34name="L234">   2*
     tp3">pBDData">*<-pan rivers/chacode=rbSid=eDspIrq
	 >
     tp3">bSid=eDspIrq">*<) {wave/tp3780i.c#L7" id="L7" class="line" 34name="L334">   3*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bDspIrqAct.c#Low
	 >
     tp3">bDspIrqAct.c#Low">*
     tp3">FALSE">*<;wave/tp3780i.c#L5" id="L5" class="line" 34name="L43"">   4*   5*
     tp3">pBDData">*<-pan rivers/chacode=rbSid=eUartIrq
	 >
     tp3">bSid=eUartIrq">*<) {wave/tp3780i.c#L7" id="L7" class="line" 34name="L634">   6*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bUartIrqAct.c#Low
	 >
     tp3">bUartIrqAct.c#Low">*
     tp3">FALSE">*<;wave/tp3780i.c#L5" id="L5" class="line" 34name="L734">   7*   8*   9*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usNumTransf#L5
	 >
     tp3">usNumTransf#L5">*
     tp3">TP_CFG_NumTransf#L5">*<;wave/tp3780i.c#L5" id="L5" class="line" 3n name="L350">  10*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usReRyquest
	 >
     tp3">usReRyquest">*
     tp3">TP_CFG_RetyquestTimer">*<;wave/tp3780i.c#L5" id="L5" class="line" 3nname="L135">   1*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bEnableMEMCS1">   6 tp3">bEnableMEMCS1"">*   6 tp3">TP_CFG_MEMCS1"">*<;wave/tp3780i.c#L5" id="L5" class="line" 3nname="L235">   2*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usIsaMemCmdWidth
	 >
     tp3">usIsaMemCmdWidth">*
     tp3">TP_CFG_IsaMemCmdWidth">*<;wave/tp3780i.c#L5" id="L5" class="line" 3nname="L335">   3*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bGateIOCHRDY>   6 tp3">bGateIOCHRDY">*   6 tp3">TP_CFG_GateIOCHRDY">*<;wave/tp3780i.c#L5" id="L5" class="line" 3nname="L435">   4*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bEnablePwrMgm>
	 >
     tp3">bEnablePwrMgm>">*
	 >
     tp3">TP_CFG_EnablePwrMgm>">*<;wave/tp3780i.c#L5" id="L5" class="line" 3nname="L53"">   5*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usHBusTimerLoadValue
	 >
     tp3">usHBusTimerLoadValue">*
     tp3">TP_CFG_HBusTimerValue">*<;wave/tp3780i.c#L5" id="L5" class="line" 3nname="L635">   6*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bDisableLBusTimeou>
	 >
     tp3">bDisableLBusTimeou>">*
	 >
     tp3">TP_CFG_DisableLBusTimeou>">*<;wave/tp3780i.c#L5" id="L5" class="line" 3nname="L735">   7*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usN_Divisor
	 >
     tp3">usN_Divisor">*
     tp3">TP_CFG_N_Divisor">*<;wave/tp3780i.c#L5" id="L5" class="line" 3nname="L835">   8*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usM_Multiplier
	 >
     tp3">usM_Multiplier">*
     tp3">TP_CFG_M_Multiplier">*<;wave/tp3780i.c#L5" id="L5" class="line" 3nname="L935">   9*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bPllByp
  
	 >
     tp3">bPllByp
  ">*
     tp3">TP_CFG_PllByp
  ">*<;wave/tp3780i.c#L5" id="L5" class="line" 36 name="L360">  10*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usChipletEnable
	 >
     tp3">usChipletEnable">*
     tp3">TP_CFG_ChipletEnable">*<;wave/tp3780i.c#L5" id="L5" class="line" 36name="L136">   1* wave/tp3780i.c#L10" id="L10" class="line36name="L236">   2*
     tp3">tyquest_irq">*<(rivers/chacode=pSet>divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usUartIrq
	 >
     tp3">usUartIrq">*<, &rivers/chacode=UartInterru >
	 >
     tp3">UartInterru >">*<, 0, rspan>

     tp3">NULL">*<)) {wave/tp3780i.c#L7" id="L7" class="line" 36name="L336">   3*
     tp3">PRINTK_ERROR">*<(rivers/chacode=KERN_ERR_MWAVE
	 >
     tp3">KERN_ERR_MWAVE">*
divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usUartIrq
	 >
     tp3">usUartIrq">*<);wave/tp3780i.c#L5" id="L5" class="line" 36name="L436">   4*
     tp3">exit_cleanup">*<;wave/tp3780i.c#L5" id="L5" class="line" 36name="L536">   5*

>/* no conflict justpoelease */achar/mwave/tp3780i.c#L5" id="L5" class="line" 36name="L63"">   6*
     tp3">free_irq">*<(rivers/chacode=pSet>divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usUartIrq
	 >
     tp3">usUartIrq">*<, rivers/chacode=NULL
	 >
     tp3">NULL">*<);wave/tp3780i.c#L5" id="L5" class="line" 36name="L736">   7*   8*   9*
     tp3">tyquest_irq">*<(rivers/chacode=pSet>divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspIrq
	 >
     tp3">usDspIrq">*<, &rivers/chacode=DspInterru >
	 >
     tp3">DspInterru >">*<, 0, rspan>
NULL">*<)) {wave/tp3780i.c#L7" id="L7" class="line" 3n name="L370">  10*
     tp3">PRINTK_ERROR">*<(rspan>
pSet>divs">*<-pan rivers/chacode=usDspIrq
	 >
     tp3">usDspIrq">*<);wave/tp3780i.c#L5" id="L5" class="line" 37name="L137">   1*
     tp3">exit_cleanup">*<;wave/tp3780i.c#L5" id="L5" class="line" 37name="L237">   2*   3*
     tp3">PRINTK_3">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<,wave/tp3780i.c#L10" id="L10" class="line37name="L437">   4*
 %x bSid=eDspIrq %x\n"achar/m,wave/tp3780i.c#L10" id="L10" class="line37name="L537">   5*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspIrq
	 >
     tp3">usDspIrq">*<, rivers/chacode=pDData
	 >
     tp3">pBDData">*<-pan rivers/chacode=rbSid=eDspIrq
	 >
     tp3">bSid=eDspIrq">*<);wave/tp3780i.c#L5" id="L5" class="line" 37name="L637">   6*Allocated
	 >
     tp3">bInterru >Allocated">*
     tp3">TRUE">*<;wave/tp3780i.c#L5" id="L5" class="line" 37name="L73"">   7*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bInterru >Claimed
	 >
     tp3">bInterru >Claimed">*
     tp3">TRUE">*<;wave/tp3780i.c#L5" id="L5" class="line" 37name="L837">   8*   9* wave/tp3780i.c#L10" id="L10" class="line38 name="L380">  10*
     tp3">smapi_set_DSP_power_state">*<(rivers/chacode=FALSE
	 >
     tp3">FALSE">*<);wave/tp3780i.c#L5" id="L5" class="line" 38name="L138">   1*
     tp3">smapi_set_DSP_power_state">*<(rivers/chacode=TRUE
	 >
     tp3">TRUE">*<)) {wave/tp3780i.c#L7" id="L7" class="line" 38name="L238">   2*
     tp3">PRINTK_ERROR">*<(rivers/chacode=KERN_ERR_MWAVE
	 >
     tp3">KERN_ERR_MWAVE">*
   3*
     tp3">exit_cleanup">*<;wave/tp3780i.c#L5" id="L5" class="line" 38name="L438">   4*   5*
     tp3">bDSPPoweredUp">*
     tp3">TRUE">*<;wave/tp3780i.c#L5" id="L5" class="line" 38name="L638">   6*   7* wave/tp3780i.c#L10" id="L10" class="line38name="L83"">   8*
     tp3">dsps="lI_EnableDSP">*<(rivers/chacode=pSet>divs
	 >
     tp3">pSet>divs">*<, rivers/chacode=s_ausThinkpadIrqToField
	 >
     tp3">s_ausThinkpadIrqToField">*<, rivers/chacode=s_ausThinkpadDmaToField
	 >
     tp3">s_ausThinkpadDmaToField">*<)) {wave/tp3780i.c#L7" id="L7" class="line" 38name="L938">   9*
     tp3">PRINTK_ERROR">*<(rspan>
  10*
     tp3">exit_cleanup">*<;wave/tp3780i.c#L5" id="L5" class="line" 39name="L139">   1*   2* wave/tp3780i.c#L10" id="L10" class="line39name="L339">   3*
     tp3">EnableSRAM">*<(rivers/chacode=pBDData
	 >
     tp3">pBDData">*<);wave/tp3780i.c#L5" id="L5" class="line" 39name="L439">   4* wave/tp3780i.c#L10" id="L10" class="line39name="L539">   5*
     tp3">pBDData">*<-pan rivers/chacode=rbDSPEnabled
	 >
     tp3">bDSPEnabled">*
     tp3">TRUE">*<;wave/tp3780i.c#L5" id="L5" class="line" 39name="L639">   6* wave/tp3780i.c#L10" id="L10" class="line39name="L739">   7*
     tp3">PRINTK_1">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<, rspan>
   8*   9*  10*   1*
     tp3">exit_cleanup">*<:wave/tp3780i.c#L7" id="L7" class="line" 40name="L240">   2*
     tp3">PRINTK_ERROR">*<(rspan>
   3*
     tp3">bDSPPoweredUp">*<)wave/tp3780i.c#L5" id="L5" class="line" 404ame="L240">   4*
     tp3">smapi_set_DSP_power_state">*<(rivers/chacode=FALSE
	 >
     tp3">FALSE">*<);wave/tp3780i.c#L5" id="L5" class="line" 405ame="L240">   5*Allocated
	 >
     tp3">bInterru >Allocated">*<) {wave/tp3780i.c#L7" id="L7" class="line" 40name="L640">   6*
     tp3">free_irq">*<(rivers/chacode=pSet>divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspIrq
	 >
     tp3">usDspIrq">*<, rivers/chacode=NULL
	 >
     tp3">NULL">*<);wave/tp3780i.c#L5" id="L5" class="line" 407ame="L640">   7*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bInterru >Claimed
	 >
     tp3">bInterru >Claimed">*
     tp3">FALSE">*<;wave/tp3780i.c#L5" id="L5" class="line" 408ame="L640">   8*   9*EIO">*<;wave/tp3780i.c#L5" id="L5" class="line" 4" name="L410">  10*<}wave/tp3780i.c#L5" id="L5" class="line" 4"name="L14"">   1* wave/tp3780i.c#L10" id="L10" class="line4"name="L241">   2* wave/tp3780i.c#L10" id="L10" class="line4"3ame="L241">   3*
     tp3">tps="lI_DisableDSP">*<(rivers/chacode=THINKPAD_BD_DATA
	 >
     tp3">THINKPAD_BD_DATA">*
     tp3">pBDData">*<)wave/tp3780i.c#L10" id="L10" class="line4"name="L441">   4*<{wave/tp3780i.c#L7" id="L7" class="line" 4"name="L541">   5*
     tp3">rypval">*   6*
     tp3">DSP_s="lI_CONFIG_SETTINGS">*divs
	 >
     tp3">pSet>divs">*
     tp3">pBDData">*<-pan rivers/chacode=rDspSet>divs
	 >
     tp3">rDspSet>divs">*<;wave/tp3780i.c#L5" id="L5" class="line" 4"7ame="L641">   7* wave/tp3780i.c#L10" id="L10" class="line4"8ame="L641">   8*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<, rspan>

     tp3">pBDData">*<);wave/tp3780i.c#L5" id="L5" class="line" 4"9ame="L641">   9* wave/tp3780i.c#L10" id="L10" class="line42 name="L420">  10*
     tp3">pBDData">*<-pan rivers/chacode=rbDSPEnabled
	 >
     tp3">bDSPEnabled">*<) {wave/tp3780i.c#L7" id="L7" class="line" 42name="L142">   1*
     tp3">dsps="lI_DisableDSP">*<(&rivers/chacode=pBDData
	 >
     tp3">pBDData">*<-pan rivers/chacode=rDspSet>divs
	 >
     tp3">rDspSet>divs">*<);wave/tp3780i.c#L5" id="L5" class="line" 42name="L24"">   2*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bInterru >Claimed
	 >
     tp3">bInterru >Claimed">*<) {wave/tp3780i.c#L7" id="L7" class="line" 42name="L342">   3*
     tp3">free_irq">*<(rivers/chacode=pSet>divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspIrq
	 >
     tp3">usDspIrq">*<, rivers/chacode=NULL
	 >
     tp3">NULL">*<);wave/tp3780i.c#L5" id="L5" class="line" 42name="L442">   4*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=bInterru >Claimed
	 >
     tp3">bInterru >Claimed">*
     tp3">FALSE">*<;wave/tp3780i.c#L5" id="L5" class="line" 42name="L542">   5*   6*
     tp3">smapi_set_DSP_power_state">*<(rivers/chacode=FALSE
	 >
     tp3">FALSE">*<);wave/tp3780i.c#L5" id="L5" class="line" 427ame="L642">   7*
     tp3">pBDData">*<-pan rivers/chacode=rbDSPEnabled
	 >
     tp3">bDSPEnabled">*
     tp3">FALSE">*<;wave/tp3780i.c#L5" id="L5" class="line" 428ame="L642">   8*   9* wave/tp3780i.c#L10" id="L10" class="line43 name="L430">  10*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<, rspan>

     tp3">rypval">*<);wave/tp3780i.c#L5" id="L5" class="line" 43name="L143">   1* wave/tp3780i.c#L10" id="L10" class="line43name="L243">   2*rypval">*<;wave/tp3780i.c#L5" id="L5" class="line" 43name="L34"">   3*<}wave/tp3780i.c#L5" id="L5" class="line" 43name="L443">   4* wave/tp3780i.c#L10" id="L10" class="line43name="L543">   5*   6*
     tp3">tps="lI_ResetDSP">*<(rivers/chacode=THINKPAD_BD_DATA
	 >
     tp3">THINKPAD_BD_DATA">*
     tp3">pBDData">*<)wave/tp3780i.c#L10" id="L10" class="line43name="L743">   7*<{wave/tp3780i.c#L7" id="L7" class="line" 438ame="L643">   8*
     tp3">rypval">*   9*
     tp3">DSP_s="lI_CONFIG_SETTINGS">*divs
	 >
     tp3">pSet>divs">*
     tp3">pBDData">*<-pan rivers/chacode=rDspSet>divs
	 >
     tp3">rDspSet>divs">*<;wave/tp3780i.c#L5" id="L5" class="line" 44 name="L440">  10*   1*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<, rspan>
   2*
     tp3">pBDData">*<);wave/tp3780i.c#L5" id="L5" class="line" 44name="L344">   3*   4*
     tp3">dsps="lI_Reset">*<(rivers/chacode=pSet>divs
	 >
     tp3">pSet>divs">*<)a== 0) {wave/tp3780i.c#L7" id="L7" class="line" 44name="L544">   5*
     tp3">EnableSRAM">*<(rivers/chacode=pBDData
	 >
     tp3">pBDData">*<);wave/tp3780i.c#L5" id="L5" class="line" 44name="L644">   6*   7*
     tp3">rypval">*
     tp3">EIO">*<;wave/tp3780i.c#L5" id="L5" class="line" 44name="L844">   8*   9* wave/tp3780i.c#L10" id="L10" class="line4n name="L450">  10*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<, rspan>

     tp3">rypval">*<);wave/tp3780i.c#L5" id="L5" class="line" 4nname="L145">   1* wave/tp3780i.c#L10" id="L10" class="line4nname="L245">   2*rypval">*<;wave/tp3780i.c#L5" id="L5" class="line" 4nname="L345">   3*<}wave/tp3780i.c#L5" id="L5" class="line" 4nname="L445">   4* wave/tp3780i.c#L10" id="L10" class="line4nname="L54"">   5*   6*
     tp3">tps="lI_StartDSP">*<(rivers/chacode=THINKPAD_BD_DATA
	 >
     tp3">THINKPAD_BD_DATA">*
     tp3">pBDData">*<)wave/tp3780i.c#L10" id="L10" class="line4nname="L745">   7*<{wave/tp3780i.c#L7" id="L7" class="line" 4nname="L845">   8*
     tp3">rypval">*   9*
     tp3">DSP_s="lI_CONFIG_SETTINGS">*divs
	 >
     tp3">pSet>divs">*
     tp3">pBDData">*<-pan rivers/chacode=rDspSet>divs
	 >
     tp3">rDspSet>divs">*<;wave/tp3780i.c#L5" id="L5" class="line" 46 name="L460">  10*   1*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<, rspan>

     tp3">pBDData">*<);wave/tp3780i.c#L5" id="L5" class="line" 46name="L246">   2* wave/tp3780i.c#L10" id="L10" class="line46name="L346">   3*
     tp3">dsps="lI_Run">*<(rivers/chacode=pSet>divs
	 >
     tp3">pSet>divs">*<)a== 0) {wave/tp3780i.c#L7" id="L7" class="line" 46name="L446">   4*

>// @BUG @TBD EnableSRAM(pBDData);achar/mwave/tp3780i.c#L5" id="L5" class="line" 46name="L546">   5*   6*
     tp3">rypval">*
     tp3">EIO">*<;wave/tp3780i.c#L5" id="L5" class="line" 46name="L746">   7*   8*   9*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<, rspan>

     tp3">rypval">*<);wave/tp3780i.c#L5" id="L5" class="line" 4n name="L470">  10*   1*rypval">*<;wave/tp3780i.c#L5" id="L5" class="line" 47name="L247">   2*<}wave/tp3780i.c#L5" id="L5" class="line" 47name="L347">   3*   4* wave/tp3780i.c#L10" id="L10" class="line47name="L547">   5*
     tp3">tps="lI_QueryAbilities">*<(rivers/chacode=THINKPAD_BD_DATA
	 >
     tp3">THINKPAD_BD_DATA">*
     tp3">pBDData">*<, rivers/chacode=MW_ABILITIES
	 >
     tp3">MW_ABILITIES">*
     tp3">pAbilities">*<)wave/tp3780i.c#L10" id="L10" class="line47name="L647">   6*<{wave/tp3780i.c#L5" id="L5" class="line" 47name="L74"">   7*
     tp3">rypval">*   8*   9*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<,wave/tp3780i.c#L5" id="L5" class="line" 48 name="L480">  10*

     tp3">pBDData">*<);wave/tp3780i.c#L5" id="L5" class="line" 48name="L148">   1* wave/tp3780i.c#L10" id="L10" class="line48name="L248">   2*

>/* fill out standard constant fields */achar/mwave/tp3780i.c#L5" id="L5" class="line" 48name="L348">   3*
     tp3">pAbilities">*<-pan rivers/chacode=instr_per_sec
	 >
     tp3">instr_per_sec">*
     tp3">pBDData">*<-pan rivers/chacode=rDspSet>divs
	 >
     tp3">rDspSet>divs">*<.rivers/chacode=uIp5
	 >
     tp3">uIp5">*<;wave/tp3780i.c#L5" id="L5" class="line" 48name="L448">   4*
     tp3">pAbilities">*<-pan rivers/chacode=data_size
	 >
     tp3">data_size">*
     tp3">pBDData">*<-pan rivers/chacode=rDspSet>divs
	 >
     tp3">rDspSet>divs">*<.rivers/chacode=uDStoreSize
	 >
     tp3">uDStoreSize">*<;wave/tp3780i.c#L5" id="L5" class="line" 48name="L548">   5*
     tp3">pAbilities">*<-pan rivers/chacode=inst_size
	 >
     tp3">inst_size">*
     tp3">pBDData">*<-pan rivers/chacode=rDspSet>divs
	 >
     tp3">rDspSet>divs">*<.rivers/chacode=uIStoreSize
	 >
     tp3">uIStoreSize">*<;wave/tp3780i.c#L5" id="L5" class="line" 48name="L648">   6*
     tp3">pAbilities">*<-pan rivers/chacode=bus_dma_bw
	 >
     tp3">bus_dma_bw">*
     tp3">pBDData">*<-pan rivers/chacode=rDspSet>divs
	 >
     tp3">rDspSet>divs">*<.rivers/chacode=uDmaBandwidth
	 >
     tp3">uDmaBandwidth">*<;wave/tp3780i.c#L5" id="L5" class="line" 48name="L748">   7* wave/tp3780i.c#L10" id="L10" class="line48name="L84"">   8*

>/* fill out dyclaically determspad fields */achar/mwave/tp3780i.c#L5" id="L5" class="line" 48name="L948">   9*
     tp3">pAbilities">*<-pan rivers/chacode=componen>_list
	 >
     tp3">componen>_list">*<[0]a= 0x00010000 | rivers/chacode=MW_ADC_MASK
	 >
     tp3">MW_ADC_MASK">*<;wave/tp3780i.c#L5" id="L5" class="line" 49 name="L490">  10*
     tp3">pAbilities">*<-pan rivers/chacode=componen>_list
	 >
     tp3">componen>_list">*<[1]a= 0x00010000 | rivers/chacode=MW_ACI_MASK
	 >
     tp3">MW_ACI_MASK">*<;wave/tp3780i.c#L5" id="L5" class="line" 49name="L149">   1*
     tp3">pAbilities">*<-pan rivers/chacode=componen>_list
	 >
     tp3">componen>_list">*<[2]a= 0x00010000 | rivers/chacode=MW_AIC1_MASK
	 >
     tp3">MW_AIC1_MASK">*<;wave/tp3780i.c#L5" id="L5" class="line" 49name="L249">   2*
     tp3">pAbilities">*<-pan rivers/chacode=componen>_list
	 >
     tp3">componen>_list">*<[3]a= 0x00010000 | rivers/chacode=MW_AIC2_MASK
	 >
     tp3">MW_AIC2_MASK">*<;wave/tp3780i.c#L5" id="L5" class="line" 49name="L349">   3*
     tp3">pAbilities">*<-pan rivers/chacode=componen>_list
	 >
     tp3">componen>_list">*<[4]a= 0x00010000 | rivers/chacode=MW_CDDAC_MASK
	 >
     tp3">MW_CDDAC_MASK">*<;wave/tp3780i.c#L5" id="L5" class="line" 49name="L449">   4*
     tp3">pAbilities">*<-pan rivers/chacode=componen>_list
	 >
     tp3">componen>_list">*<[5]a= 0x00010000 | rivers/chacode=MW_MIDI_MASK
	 >
     tp3">MW_MIDI_MASK">*<;wave/tp3780i.c#L5" id="L5" class="line" 49name="L549">   5*
     tp3">pAbilities">*<-pan rivers/chacode=componen>_list
	 >
     tp3">componen>_list">*<[6]a= 0x00010000 | rivers/chacode=MW_UART_MASK
	 >
     tp3">MW_UART_MASK">*<;wave/tp3780i.c#L5" id="L5" class="line" 49name="L649">   6*
     tp3">pAbilities">*<-pan rivers/chacode=componen>_count
	 >
     tp3">componen>_count">*   7* wave/tp3780i.c#L10" id="L10" class="line49name="L849">   8*

>/* Fill out ML10" OS and BIOS task class */achar/mwave/tp3780i.c#L5" id="L5" class="line" 49name="L94"">   9* wave/tp3780i.c#L10" id="L10" class="line50 name="L500">  10*
     tp3">memcpy">*<(rivers/chacode=pAbilities
	 >
     tp3">pAbilities">*<-pan rivers/chacode="L10"_os_ cla
	 >
     tp3">mL10"_os_ cla">*<, rivers/chacode=TP_ABILITIES_MWAVEOS_NAME
	 >
     tp3">TP_ABILITIES_MWAVEOS_NAME">*<,wave/tp3780i.c#L5" id="L5" class="line" 501name="L50">   1*
     tp3">TP_ABILITIES_MWAVEOS_NAME">*<));wave/tp3780i.c#L5" id="L5" class="line" 50name="L250">   2*
     tp3">memcpy">*<(rivers/chacode=pAbilities
	 >
     tp3">pAbilities">*<-pan rivers/chacode=bios_task_ cla
	 >
     tp3">bios_task_ cla">*<, rivers/chacode=TP_ABILITIES_BIOSTASK_NAME
	 >
     tp3">TP_ABILITIES_BIOSTASK_NAME">*<,wave/tp3780i.c#L5" id="L5" class="line" 503ame="L250">   3*
     tp3">TP_ABILITIES_BIOSTASK_NAME">*<));wave/tp3780i.c#L5" id="L5" class="line" 504ame="L250">   4* wave/tp3780i.c#L10" id="L10" class="line505ame="L250">   5*
     tp3">PRINTK_1">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<,wave/tp3780i.c#L10" id="L10" class="line506ame="L250">   6*
   7* wave/tp3780i.c#L10" id="L10" class="line508ame="L650">   8*rypval">*<;wave/tp3780i.c#L5" id="L5" class="line" 509ame="L650">   9*<}wave/tp3780i.c#L5" id="L5" class="line" 5" name="L510">  10*   1* intdrivers/chacode=tps="lI_ReadWriteDspDStore
	 >
     tp3">tps="lI_ReadWriteDspDStore">*<(rivers/chacode=THINKPAD_BD_DATA
	 >
     tp3">THINKPAD_BD_DATA">*
     tp3">pBDData">*<, unsigpad intdrivers/chacode=uOpcode
	 >
     tp3">uOpcode">*<,wave/tp3780i.c#L10" id="L10" class="line5"name="L251">   2*
     tp3">__user">*
     tp3">pvBuffer">*<, unsigpad intdrivers/chacode=uCount
	 >
     tp3">uCount">*<,wave/tp3780i.c#L10" id="L10" class="line5"3ame="L251">   3*
     tp3">ulDSPAddr">*<)wave/tp3780i.c#L10" id="L10" class="line5"name="L451">   4*<{wave/tp3780i.c#L7" id="L7" class="line" 5"name="L551">   5*
     tp3">rypval">*   6*
     tp3">DSP_s="lI_CONFIG_SETTINGS">*divs
	 >
     tp3">pSet>divs">*
     tp3">pBDData">*<-pan rivers/chacode=rDspSet>divs
	 >
     tp3">rDspSet>divs">*<;wave/tp3780i.c#L5" id="L5" class="line" 5"7ame="L651">   7*
     tp3">usDspBaseIO">*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspBaseIO
	 >
     tp3">usDspBaseIO">*<;wave/tp3780i.c#L5" id="L5" class="line" 5"8ame="L651">   8*
     tp3">BOOLEAN">*
     tp3">bRC">*   9* wave/tp3780i.c#L10" id="L10" class="line52 name="L520">  10*
     tp3">PRINTK_6">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<,wave/tp3780i.c#L10" id="L10" class="line52name="L152">   1*
   2*
     tp3">pBDData">*<, rivers/chacode=uOpcode
	 >
     tp3">uOpcode">*<, rivers/chacode=pvBuffer
	 >
     tp3">pvBuffer">*<, rivers/chacode=uCount
	 >
     tp3">uCount">*<,drivers/chacode=ulDSPAddr
	 >
     tp3">ulDSPAddr">*<);wave/tp3780i.c#L5" id="L5" class="line" 52name="L352">   3*   4*
     tp3">pBDData">*<-pan rivers/chacode=rbDSPEnabled
	 >
     tp3">bDSPEnabled">*<) {wave/tp3780i.c#L7" id="L7" class="line" 52name="L552">   5*
     tp3">uOpcode">*<) {wave/tp3780i.c#L7" id="L7" class="line" 52name="L652">   6*
     tp3">IOCTL_MW_READ_DATA">*<:wave/tp3780i.c#L7" id="L7" class="line" 527ame="L652">   7*
     tp3">bRC">*
     tp3">dsps="lI_ReadDStore">*<(rivers/chacode=usDspBaseIO
	 >
     tp3">usDspBaseIO">*<, rivers/chacode=pvBuffer
	 >
     tp3">pvBuffer">*<, rivers/chacode=uCount
	 >
     tp3">uCount">*<,drivers/chacode=ulDSPAddr
	 >
     tp3">ulDSPAddr">*<);wave/tp3780i.c#L5" id="L5" class="line" 528ame="L652">   8*   9* wave/tp3780i.c#L10" id="L10" class="line53 name="L530">  10*
     tp3">IOCTL_MW_READCLEAR_DATA">*<:wave/tp3780i.c#L7" id="L7" class="line" 53name="L153">   1*
     tp3">bRC">*
     tp3">dsps="lI_ReadAndClearDStore">*<(rivers/chacode=usDspBaseIO
	 >
     tp3">usDspBaseIO">*<, rivers/chacode=pvBuffer
	 >
     tp3">pvBuffer">*<, rivers/chacode=uCount
	 >
     tp3">uCount">*<,drivers/chacode=ulDSPAddr
	 >
     tp3">ulDSPAddr">*<);wave/tp3780i.c#L5" id="L5" class="line" 53name="L253">   2*   3*   4*
     tp3">IOCTL_MW_WRITE_DATA">*<:wave/tp3780i.c#L7" id="L7" class="line" 53name="L553">   5*
     tp3">bRC">*
     tp3">dsps="lI_WriteDStore">*<(rivers/chacode=usDspBaseIO
	 >
     tp3">usDspBaseIO">*<, rivers/chacode=pvBuffer
	 >
     tp3">pvBuffer">*<, rivers/chacode=uCount
	 >
     tp3">uCount">*<,drivers/chacode=ulDSPAddr
	 >
     tp3">ulDSPAddr">*<);wave/tp3780i.c#L5" id="L5" class="line" 53name="L653">   6*   7*   8*   9* wave/tp3780i.c#L10" id="L10" class="line54 name="L540">  10*
     tp3">rypval">*
     tp3">bRC">*<) ? -rivers/chacode=EIO
	 >
     tp3">EIO">*< : 0;wave/tp3780i.c#L5" id="L5" class="line" 54name="L154">   1*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<, rspan>

     tp3">rypval">*<);wave/tp3780i.c#L5" id="L5" class="line" 54name="L254">   2* wave/tp3780i.c#L10" id="L10" class="line54name="L354">   3*rypval">*<;wave/tp3780i.c#L5" id="L5" class="line" 54name="L45"">   4*<}wave/tp3780i.c#L5" id="L5" class="line" 54name="L554">   5*   6* wave/tp3780i.c#L10" id="L10" class="line54name="L754">   7*
     tp3">tps="lI_ReadWriteDspIStore">*<(rivers/chacode=THINKPAD_BD_DATA
	 >
     tp3">THINKPAD_BD_DATA">*
     tp3">pBDData">*<, unsigpad intdrivers/chacode=uOpcode
	 >
     tp3">uOpcode">*<,wave/tp3780i.c#L10" id="L10" class="line54name="L854">   8*
     tp3">__user">*
     tp3">pvBuffer">*<, unsigpad intdrivers/chacode=uCount
	 >
     tp3">uCount">*<,wave/tp3780i.c#L10" id="L10" class="line54name="L954">   9*
     tp3">ulDSPAddr">*<)wave/tp3780i.c#L10" id="L10" class="line5n name="L550">  10*<{wave/tp3780i.c#L7" id="L7" class="line" 5nname="L155">   1*
     tp3">rypval">*   2*
     tp3">DSP_s="lI_CONFIG_SETTINGS">*divs
	 >
     tp3">pSet>divs">*
     tp3">pBDData">*<-pan rivers/chacode=rDspSet>divs
	 >
     tp3">rDspSet>divs">*<;wave/tp3780i.c#L5" id="L5" class="line" 5nname="L355">   3*
     tp3">usDspBaseIO">*divs
	 >
     tp3">pSet>divs">*<-pan rivers/chacode=usDspBaseIO
	 >
     tp3">usDspBaseIO">*<;wave/tp3780i.c#L5" id="L5" class="line" 5nname="L455">   4*
     tp3">BOOLEAN">*
     tp3">bRC">*   5*   6*
     tp3">PRINTK_6">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<,wave/tp3780i.c#L10" id="L10" class="line5nname="L755">   7*
   8*
     tp3">pBDData">*<, rivers/chacode=uOpcode
	 >
     tp3">uOpcode">*<, rivers/chacode=pvBuffer
	 >
     tp3">pvBuffer">*<, rivers/chacode=uCount
	 >
     tp3">uCount">*<,drivers/chacode=ulDSPAddr
	 >
     tp3">ulDSPAddr">*<);wave/tp3780i.c#L10" id="L10" class="line5nname="L955">   9* wave/tp3780i.c#L10" id="L10" class="line56 name="L560">  10*
     tp3">pBDData">*<-pan rivers/chacode=rbDSPEnabled
	 >
     tp3">bDSPEnabled">*<) {wave/tp3780i.c#L7" id="L7" class="line" 56name="L156">   1*
     tp3">uOpcode">*<) {wave/tp3780i.c#L7" id="L7" class="line" 56name="L256">   2*
     tp3">IOCTL_MW_READ_INST">*<:wave/tp3780i.c#L7" id="L7" class="line" 56name="L356">   3*
     tp3">bRC">*
     tp3">dsps="lI_ReadIStore">*<(rivers/chacode=usDspBaseIO
	 >
     tp3">usDspBaseIO">*<, rivers/chacode=pvBuffer
	 >
     tp3">pvBuffer">*<, rivers/chacode=uCount
	 >
     tp3">uCount">*<,drivers/chacode=ulDSPAddr
	 >
     tp3">ulDSPAddr">*<);wave/tp3780i.c#L5" id="L5" class="line" 56name="L456">   4*   5*   6*
     tp3">IOCTL_MW_WRITE_INST">*<:wave/tp3780i.c#L7" id="L7" class="line" 56name="L756">   7*
     tp3">bRC">*
     tp3">dsps="lI_WriteIStore">*<(rivers/chacode=usDspBaseIO
	 >
     tp3">usDspBaseIO">*<, rivers/chacode=pvBuffer
	 >
     tp3">pvBuffer">*<, rivers/chacode=uCount
	 >
     tp3">uCount">*<,drivers/chacode=ulDSPAddr
	 >
     tp3">ulDSPAddr">*<);wave/tp3780i.c#L5" id="L5" class="line" 56name="L856">   8*   9*  10*   1* wave/tp3780i.c#L10" id="L10" class="line57name="L257">   2*
     tp3">rypval">*
     tp3">bRC">*<) ? -rivers/chacode=EIO
	 >
     tp3">EIO">*< : 0;wave/tp3780i.c#L5" id="L5" class="line" 57name="L357">   3*   4*
     tp3">PRINTK_2">*<(rivers/chacode=TRACE_TPs="lI
	 >
     tp3">TRACE_TPs="lI">*<,wave/tp3780i.c#L5" id="L5" class="line" 57name="L557">   5*

     tp3">rypval">*<);wave/tp3780i.c#L5" id="L5" class="line" 57name="L657">   6* wave/tp3780i.c#L10" id="L10" class="line57name="L75"">   7*rypval">*<;wave/tp3780i.c#L5" id="L5" class="line" 57name="L857">   8*<}wave/tp3780i.c#L5" id="L5" class="line" 5nname="L957">   9* wave/tp3780i.c#L10" id="L10" class="line58 name="L580">  10*<


10 The original LXR software by the rivers/chhttp://sourceforge.net/projects/lxr >LXR community">*<,dthis experimen>al c#L1ion by rivers/chmailto:lxr@>lxr@>*<.
10 lxr.>Redpill L*<,dprovider of Ldiv and operations services since 1995.