LXR linux/arch/s390/include/asm/qdio.h

   1/*
   2 * linux/include/asm-s390/qdio.h
   3 *
   4 * Copyright 2000,2008 IBM Corp.
   5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
   6 *            Jan Glauber <jang@linux.vnet.ibm.com>
   7 *
   8 */
   9#ifndef __QDIO_H__
  10#define __QDIO_H__
  11
  12#include <linux/interrupt.h>
  13#include <asm/cio.h>
  14#include <asm/ccwdev.h>
  15
  16/* only use 4 queues to save some cachelines */
  17#define QDIO_MAX_QUEUES_PER_IRQ         4
  18#define QDIO_MAX_BUFFERS_PER_Q          128
  19#define QDIO_MAX_BUFFERS_MASK           (QDIO_MAX_BUFFERS_PER_Q - 1)
  20#define QDIO_MAX_ELEMENTS_PER_BUFFER    16
  21#define QDIO_SBAL_SIZE                  256
  22
  23#define QDIO_QETH_QFMT                  0
  24#define QDIO_ZFCP_QFMT                  1
  25#define QDIO_IQDIO_QFMT                 2
  26
  27/**
  28 * struct qdesfmt0 - queue descriptor, format 0
  29 * @sliba: storage list information block address
  30 * @sla: storage list address
  31 * @slsba: storage list state block address
  32 * @akey: access key for DLIB
  33 * @bkey: access key for SL
  34 * @ckey: access key for SBALs
  35 * @dkey: access key for SLSB
  36 */
  37struct qdesfmt0 {
  38        u64 sliba;
  39        u64 sla;
  40        u64 slsba;
  41        u32      : 32;
  42        u32 akey : 4;
  43        u32 bkey : 4;
  44        u32 ckey : 4;
  45        u32 dkey : 4;
  46        u32      : 16;
  47} __attribute__ ((packed));
  48
  49#define QDR_AC_MULTI_BUFFER_ENABLE 0x01
  50
  51/**
  52 * struct qdr - queue description record (QDR)
  53 * @qfmt: queue format
  54 * @pfmt: implementation dependent parameter format
  55 * @ac: adapter characteristics
  56 * @iqdcnt: input queue descriptor count
  57 * @oqdcnt: output queue descriptor count
  58 * @iqdsz: inpout queue descriptor size
  59 * @oqdsz: output queue descriptor size
  60 * @qiba: queue information block address
  61 * @qkey: queue information block key
  62 * @qdf0: queue descriptions
  63 */
  64struct qdr {
  65        u32 qfmt   : 8;
  66        u32 pfmt   : 8;
  67        u32        : 8;
  68        u32 ac     : 8;
  69        u32        : 8;
  70        u32 iqdcnt : 8;
  71        u32        : 8;
  72        u32 oqdcnt : 8;
  73        u32        : 8;
  74        u32 iqdsz  : 8;
  75        u32        : 8;
  76        u32 oqdsz  : 8;
  77        /* private: */
  78        u32 res[9];
  79        /* public: */
  80        u64 qiba;
  81        u32        : 32;
  82        u32 qkey   : 4;
  83        u32        : 28;
  84        struct qdesfmt0 qdf0[126];
  85} __attribute__ ((packed, aligned(4096)));
  86
  87#define QIB_AC_OUTBOUND_PCI_SUPPORTED   0x40
  88#define QIB_RFLAGS_ENABLE_QEBSM         0x80
  89#define QIB_RFLAGS_ENABLE_DATA_DIV      0x02
  90
  91/**
  92 * struct qib - queue information block (QIB)
  93 * @qfmt: queue format
  94 * @pfmt: implementation dependent parameter format
  95 * @rflags: QEBSM
  96 * @ac: adapter characteristics
  97 * @isliba: absolute address of first input SLIB
  98 * @osliba: absolute address of first output SLIB
  99 * @ebcnam: adapter identifier in EBCDIC
 100 * @parm: implementation dependent parameters
 101 */
 102struct qib {
 103        u32 qfmt   : 8;
 104        u32 pfmt   : 8;
 105        u32 rflags : 8;
 106        u32 ac     : 8;
 107        u32        : 32;
 108        u64 isliba;
 109        u64 osliba;
 110        u32        : 32;
 111        u32        : 32;
 112        u8 ebcnam[8];
 113        /* private: */
 114        u8 res[88];
 115        /* public: */
 116        u8 parm[QDIO_MAX_BUFFERS_PER_Q];
 117} __attribute__ ((packed, aligned(256)));
 118
 119/**
 120 * struct slibe - storage list information block element (SLIBE)
 121 * @parms: implementation dependent parameters
 122 */
 123struct slibe {
 124        u64 parms;
 125};
 126
 127/**
 128 * struct qaob - queue asynchronous operation block
 129 * @res0: reserved parameters
 130 * @res1: reserved parameter
 131 * @res2: reserved parameter
 132 * @res3: reserved parameter
 133 * @aorc: asynchronous operation return code
 134 * @flags: internal flags
 135 * @cbtbs: control block type
 136 * @sb_count: number of storage blocks
 137 * @sba: storage block element addresses
 138 * @dcount: size of storage block elements
 139 * @user0: user defineable value
 140 * @res4: reserved paramater
 141 * @user1: user defineable value
 142 * @user2: user defineable value
 143 */
 144struct qaob {
 145        u64 res0[6];
 146        u8 res1;
 147        u8 res2;
 148        u8 res3;
 149        u8 aorc;
 150        u8 flags;
 151        u16 cbtbs;
 152        u8 sb_count;
 153        u64 sba[QDIO_MAX_ELEMENTS_PER_BUFFER];
 154        u16 dcount[QDIO_MAX_ELEMENTS_PER_BUFFER];
 155        u64 user0;
 156        u64 res4[2];
 157        u64 user1;
 158        u64 user2;
 159} __attribute__ ((packed, aligned(256)));
 160
 161/**
 162 * struct slib - storage list information block (SLIB)
 163 * @nsliba: next SLIB address (if any)
 164 * @sla: SL address
 165 * @slsba: SLSB address
 166 * @slibe: SLIB elements
 167 */
 168struct slib {
 169        u64 nsliba;
 170        u64 sla;
 171        u64 slsba;
 172        /* private: */
 173        u8 res[1000];
 174        /* public: */
 175        struct slibe slibe[QDIO_MAX_BUFFERS_PER_Q];
 176} __attribute__ ((packed, aligned(2048)));
 177
 178#define SBAL_EFLAGS_LAST_ENTRY          0x40
 179#define SBAL_EFLAGS_CONTIGUOUS          0x20
 180#define SBAL_EFLAGS_FIRST_FRAG          0x04
 181#define SBAL_EFLAGS_MIDDLE_FRAG         0x08
 182#define SBAL_EFLAGS_LAST_FRAG           0x0c
 183#define SBAL_EFLAGS_MASK                0x6f
 184
 185#define SBAL_SFLAGS0_PCI_REQ            0x40
 186#define SBAL_SFLAGS0_DATA_CONTINUATION  0x20
 187
 188/* Awesome OpenFCP extensions */
 189#define SBAL_SFLAGS0_TYPE_STATUS        0x00
 190#define SBAL_SFLAGS0_TYPE_WRITE         0x08
 191#define SBAL_SFLAGS0_TYPE_READ          0x10
 192#define SBAL_SFLAGS0_TYPE_WRITE_READ    0x18
 193#define SBAL_SFLAGS0_MORE_SBALS         0x04
 194#define SBAL_SFLAGS0_COMMAND            0x02
 195#define SBAL_SFLAGS0_LAST_SBAL          0x00
 196#define SBAL_SFLAGS0_ONLY_SBAL          SBAL_SFLAGS0_COMMAND
 197#define SBAL_SFLAGS0_MIDDLE_SBAL        SBAL_SFLAGS0_MORE_SBALS
 198#define SBAL_SFLAGS0_FIRST_SBAL (SBAL_SFLAGS0_MORE_SBALS | SBAL_SFLAGS0_COMMAND)
 199
 200/**
 201 * struct qdio_buffer_element - SBAL entry
 202 * @eflags: SBAL entry flags
 203 * @scount: SBAL count
 204 * @sflags: whole SBAL flags
 205 * @length: length
 206 * @addr: address
 207*/
 208struct qdio_buffer_element {
 209        u8 eflags;
 210        /* private: */
 211        u8 res1;
 212        /* public: */
 213        u8 scount;
 214        u8 sflags;
 215        u32 length;
 216#ifdef CONFIG_32BIT
 217        /* private: */
 218        void *res2;
 219        /* public: */
 220#endif
 221        void *addr;
 222} __attribute__ ((packed, aligned(16)));
 223
 224/**
 225 * struct qdio_buffer - storage block address list (SBAL)
 226 * @element: SBAL entries
 227 */
 228struct qdio_buffer {
 229        struct qdio_buffer_element element[QDIO_MAX_ELEMENTS_PER_BUFFER];
 230} __attribute__ ((packed, aligned(256)));
 231
 232/**
 233 * struct sl_element - storage list entry
 234 * @sbal: absolute SBAL address
 235 */
 236struct sl_element {
 237#ifdef CONFIG_32BIT
 238        /* private: */
 239        unsigned long reserved;
 240        /* public: */
 241#endif
 242        unsigned long sbal;
 243} __attribute__ ((packed));
 244
 245/**
 246 * struct sl - storage list (SL)
 247 * @element: SL entries
 248 */
 249struct sl {
 250        struct sl_element element[QDIO_MAX_BUFFERS_PER_Q];
 251} __attribute__ ((packed, aligned(1024)));
 252
 253/**
 254 * struct slsb - storage list state block (SLSB)
 255 * @val: state per buffer
 256 */
 257struct slsb {
 258        u8 val[QDIO_MAX_BUFFERS_PER_Q];
 259} __attribute__ ((packed, aligned(256)));
 260
 261#define CHSC_AC2_MULTI_BUFFER_AVAILABLE 0x0080
 262#define CHSC_AC2_MULTI_BUFFER_ENABLED   0x0040
 263#define CHSC_AC2_DATA_DIV_AVAILABLE     0x0010
 264#define CHSC_AC2_DATA_DIV_ENABLED       0x0002
 265
 266/**
 267 * struct qdio_outbuf_state - SBAL related asynchronous operation information
 268 *   (for communication with upper layer programs)
 269 *   (only required for use with completion queues)
 270 * @flags: flags indicating state of buffer
 271 * @aob: pointer to QAOB used for the particular SBAL
 272 * @user: pointer to upper layer program's state information related to SBAL
 273 *        (stored in user1 data of QAOB)
 274 */
 275struct qdio_outbuf_state {
 276        u8 flags;
 277        struct qaob *aob;
 278        void *user;
 279};
 280
 281#define QDIO_OUTBUF_STATE_FLAG_NONE     0x00
 282#define QDIO_OUTBUF_STATE_FLAG_PENDING  0x01
 283
 284#define CHSC_AC1_INITIATE_INPUTQ        0x80
 285
 286
 287/* qdio adapter-characteristics-1 flag */
 288#define AC1_SIGA_INPUT_NEEDED           0x40    /* process input queues */
 289#define AC1_SIGA_OUTPUT_NEEDED          0x20    /* process output queues */
 290#define AC1_SIGA_SYNC_NEEDED            0x10    /* ask hypervisor to sync */
 291#define AC1_AUTOMATIC_SYNC_ON_THININT   0x08    /* set by hypervisor */
 292#define AC1_AUTOMATIC_SYNC_ON_OUT_PCI   0x04    /* set by hypervisor */
 293#define AC1_SC_QEBSM_AVAILABLE          0x02    /* available for subchannel */
 294#define AC1_SC_QEBSM_ENABLED            0x01    /* enabled for subchannel */
 295
 296#define CHSC_AC2_DATA_DIV_AVAILABLE     0x0010
 297#define CHSC_AC2_DATA_DIV_ENABLED       0x0002
 298
 299#define CHSC_AC3_FORMAT2_CQ_AVAILABLE   0x8000
 300
 301struct qdio_ssqd_desc {
 302        u8 flags;
 303        u8:8;
 304        u16 sch;
 305        u8 qfmt;
 306        u8 parm;
 307        u8 qdioac1;
 308        u8 sch_class;
 309        u8 pcnt;
 310        u8 icnt;
 311        u8:8;
 312        u8 ocnt;
 313        u8:8;
 314        u8 mbccnt;
 315        u16 qdioac2;
 316        u64 sch_token;
 317        u8 mro;
 318        u8 mri;
 319        u16 qdioac3;
 320        u16:16;
 321        u8:8;
 322        u8 mmwc;
 323} __attribute__ ((packed));
 324
 325/* params are: ccw_device, qdio_error, queue_number,
 326   first element processed, number of elements processed, int_parm */
 327typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,
 328                            int, int, unsigned long);
 329
 330/* qdio errors reported to the upper-layer program */
 331#define QDIO_ERROR_SIGA_TARGET                  0x02
 332#define QDIO_ERROR_SIGA_ACCESS_EXCEPTION        0x10
 333#define QDIO_ERROR_SIGA_BUSY                    0x20
 334#define QDIO_ERROR_ACTIVATE_CHECK_CONDITION     0x40
 335#define QDIO_ERROR_SLSB_STATE                   0x80
 336
 337/* for qdio_cleanup */
 338#define QDIO_FLAG_CLEANUP_USING_CLEAR           0x01
 339#define QDIO_FLAG_CLEANUP_USING_HALT            0x02
 340
 341/**
 342 * struct qdio_initialize - qdio initalization data
 343 * @cdev: associated ccw device
 344 * @q_format: queue format
 345 * @adapter_name: name for the adapter
 346 * @qib_param_field_format: format for qib_parm_field
 347 * @qib_param_field: pointer to 128 bytes or NULL, if no param field
 348 * @qib_rflags: rflags to set
 349 * @input_slib_elements: pointer to no_input_qs * 128 words of data or NULL
 350 * @output_slib_elements: pointer to no_output_qs * 128 words of data or NULL
 351 * @no_input_qs: number of input queues
 352 * @no_output_qs: number of output queues
 353 * @input_handler: handler to be called for input queues
 354 * @output_handler: handler to be called for output queues
 355 * @queue_start_poll: polling handlers (one per input queue or NULL)
 356 * @int_parm: interruption parameter
 357 * @input_sbal_addr_array:  address of no_input_qs * 128 pointers
 358 * @output_sbal_addr_array: address of no_output_qs * 128 pointers
 359 * @output_sbal_state_array: no_output_qs * 128 state info (for CQ or NULL)
 360 */
 361struct qdio_initialize {
 362        struct ccw_device *cdev;
 363        unsigned char q_format;
 364        unsigned char qdr_ac;
 365        unsigned char adapter_name[8];
 366        unsigned int qib_param_field_format;
 367        unsigned char *qib_param_field;
 368        unsigned char qib_rflags;
 369        unsigned long *input_slib_elements;
 370        unsigned long *output_slib_elements;
 371        unsigned int no_input_qs;
 372        unsigned int no_output_qs;
 373        qdio_handler_t *input_handler;
 374        qdio_handler_t *output_handler;
 375        void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
 376        int scan_threshold;
 377        unsigned long int_parm;
 378        void **input_sbal_addr_array;
 379        void **output_sbal_addr_array;
 380        struct qdio_outbuf_state *output_sbal_state_array;
 381};
 382
 383#define QDIO_STATE_INACTIVE             0x00000002 /* after qdio_cleanup */
 384#define QDIO_STATE_ESTABLISHED          0x00000004 /* after qdio_establish */
 385#define QDIO_STATE_ACTIVE               0x00000008 /* after qdio_activate */
 386#define QDIO_STATE_STOPPED              0x00000010 /* after queues went down */
 387
 388#define QDIO_FLAG_SYNC_INPUT            0x01
 389#define QDIO_FLAG_SYNC_OUTPUT           0x02
 390#define QDIO_FLAG_PCI_OUT               0x10
 391
 392extern int qdio_allocate(struct qdio_initialize *);
 393extern int qdio_establish(struct qdio_initialize *);
 394extern int qdio_activate(struct ccw_device *);
 395extern void qdio_release_aob(struct qaob *);
 396extern int do_QDIO(struct ccw_device *, unsigned int, int, unsigned int,
 397                   unsigned int);
 398extern int qdio_start_irq(struct ccw_device *, int);
 399extern int qdio_stop_irq(struct ccw_device *, int);
 400extern int qdio_get_next_buffers(struct ccw_device *, int, int *, int *);
 401extern int qdio_shutdown(struct ccw_device *, int);
 402extern int qdio_free(struct ccw_device *);
 403extern int qdio_get_ssqd_desc(struct ccw_device *, struct qdio_ssqd_desc *);
 404
 405#endif /* __QDIO_H__ */
 406