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41#include <linux/sched.h>
42#include <linux/highmem.h>
43#include <linux/debugfs.h>
44#include <linux/bug.h>
45#include <linux/vmalloc.h>
46#include <linux/module.h>
47#include <linux/gfp.h>
48#include <linux/memblock.h>
49#include <linux/seq_file.h>
50
51#include <trace/events/xen.h>
52
53#include <asm/pgtable.h>
54#include <asm/tlbflush.h>
55#include <asm/fixmap.h>
56#include <asm/mmu_context.h>
57#include <asm/setup.h>
58#include <asm/paravirt.h>
59#include <asm/e820.h>
60#include <asm/linkage.h>
61#include <asm/page.h>
62#include <asm/init.h>
63#include <asm/pat.h>
64#include <asm/smp.h>
65
66#include <asm/xen/hypercall.h>
67#include <asm/xen/hypervisor.h>
68
69#include <xen/xen.h>
70#include <xen/page.h>
71#include <xen/interface/xen.h>
72#include <xen/interface/hvm/hvm_op.h>
73#include <xen/interface/version.h>
74#include <xen/interface/memory.h>
75#include <xen/hvc-console.h>
76
77#include "multicalls.h"
78#include "mmu.h"
79#include "debugfs.h"
80
81
82
83
84
85DEFINE_SPINLOCK(xen_reservation_lock);
86
87
88
89
90
91
92#define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4)
93static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES);
94
95#ifdef CONFIG_X86_64
96
97static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
98#endif
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114DEFINE_PER_CPU(unsigned long, xen_cr3);
115DEFINE_PER_CPU(unsigned long, xen_current_cr3);
116
117
118
119
120
121
122#define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
123
124unsigned long arbitrary_virt_to_mfn(void *vaddr)
125{
126 xmaddr_t maddr = arbitrary_virt_to_machine(vaddr);
127
128 return PFN_DOWN(maddr.maddr);
129}
130
131xmaddr_t arbitrary_virt_to_machine(void *vaddr)
132{
133 unsigned long address = (unsigned long)vaddr;
134 unsigned int level;
135 pte_t *pte;
136 unsigned offset;
137
138
139
140
141
142 if (virt_addr_valid(vaddr))
143 return virt_to_machine(vaddr);
144
145
146
147 pte = lookup_address(address, &level);
148 BUG_ON(pte == NULL);
149 offset = address & ~PAGE_MASK;
150 return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
151}
152EXPORT_SYMBOL_GPL(arbitrary_virt_to_machine);
153
154void make_lowmem_page_readonly(void *vaddr)
155{
156 pte_t *pte, ptev;
157 unsigned long address = (unsigned long)vaddr;
158 unsigned int level;
159
160 pte = lookup_address(address, &level);
161 if (pte == NULL)
162 return;
163
164 ptev = pte_wrprotect(*pte);
165
166 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
167 BUG();
168}
169
170void make_lowmem_page_readwrite(void *vaddr)
171{
172 pte_t *pte, ptev;
173 unsigned long address = (unsigned long)vaddr;
174 unsigned int level;
175
176 pte = lookup_address(address, &level);
177 if (pte == NULL)
178 return;
179
180 ptev = pte_mkwrite(*pte);
181
182 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
183 BUG();
184}
185
186
187static bool xen_page_pinned(void *ptr)
188{
189 struct page *page = virt_to_page(ptr);
190
191 return PagePinned(page);
192}
193
194void xen_set_domain_pte(pte_t *ptep, pte_t pteval, unsigned domid)
195{
196 struct multicall_space mcs;
197 struct mmu_update *u;
198
199 trace_xen_mmu_set_domain_pte(ptep, pteval, domid);
200
201 mcs = xen_mc_entry(sizeof(*u));
202 u = mcs.args;
203
204
205 u->ptr = virt_to_machine(ptep).maddr;
206 u->val = pte_val_ma(pteval);
207
208 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, domid);
209
210 xen_mc_issue(PARAVIRT_LAZY_MMU);
211}
212EXPORT_SYMBOL_GPL(xen_set_domain_pte);
213
214static void xen_extend_mmu_update(const struct mmu_update *update)
215{
216 struct multicall_space mcs;
217 struct mmu_update *u;
218
219 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
220
221 if (mcs.mc != NULL) {
222 mcs.mc->args[1]++;
223 } else {
224 mcs = __xen_mc_entry(sizeof(*u));
225 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
226 }
227
228 u = mcs.args;
229 *u = *update;
230}
231
232static void xen_extend_mmuext_op(const struct mmuext_op *op)
233{
234 struct multicall_space mcs;
235 struct mmuext_op *u;
236
237 mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u));
238
239 if (mcs.mc != NULL) {
240 mcs.mc->args[1]++;
241 } else {
242 mcs = __xen_mc_entry(sizeof(*u));
243 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
244 }
245
246 u = mcs.args;
247 *u = *op;
248}
249
250static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
251{
252 struct mmu_update u;
253
254 preempt_disable();
255
256 xen_mc_batch();
257
258
259 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
260 u.val = pmd_val_ma(val);
261 xen_extend_mmu_update(&u);
262
263 xen_mc_issue(PARAVIRT_LAZY_MMU);
264
265 preempt_enable();
266}
267
268static void xen_set_pmd(pmd_t *ptr, pmd_t val)
269{
270 trace_xen_mmu_set_pmd(ptr, val);
271
272
273
274 if (!xen_page_pinned(ptr)) {
275 *ptr = val;
276 return;
277 }
278
279 xen_set_pmd_hyper(ptr, val);
280}
281
282
283
284
285
286void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
287{
288 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
289}
290
291static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
292{
293 struct mmu_update u;
294
295 if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU)
296 return false;
297
298 xen_mc_batch();
299
300 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
301 u.val = pte_val_ma(pteval);
302 xen_extend_mmu_update(&u);
303
304 xen_mc_issue(PARAVIRT_LAZY_MMU);
305
306 return true;
307}
308
309static inline void __xen_set_pte(pte_t *ptep, pte_t pteval)
310{
311 if (!xen_batched_set_pte(ptep, pteval))
312 native_set_pte(ptep, pteval);
313}
314
315static void xen_set_pte(pte_t *ptep, pte_t pteval)
316{
317 trace_xen_mmu_set_pte(ptep, pteval);
318 __xen_set_pte(ptep, pteval);
319}
320
321static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
322 pte_t *ptep, pte_t pteval)
323{
324 trace_xen_mmu_set_pte_at(mm, addr, ptep, pteval);
325 __xen_set_pte(ptep, pteval);
326}
327
328pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
329 unsigned long addr, pte_t *ptep)
330{
331
332 trace_xen_mmu_ptep_modify_prot_start(mm, addr, ptep, *ptep);
333 return *ptep;
334}
335
336void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
337 pte_t *ptep, pte_t pte)
338{
339 struct mmu_update u;
340
341 trace_xen_mmu_ptep_modify_prot_commit(mm, addr, ptep, pte);
342 xen_mc_batch();
343
344 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
345 u.val = pte_val_ma(pte);
346 xen_extend_mmu_update(&u);
347
348 xen_mc_issue(PARAVIRT_LAZY_MMU);
349}
350
351
352static pteval_t pte_mfn_to_pfn(pteval_t val)
353{
354 if (val & _PAGE_PRESENT) {
355 unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
356 pteval_t flags = val & PTE_FLAGS_MASK;
357 val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags;
358 }
359
360 return val;
361}
362
363static pteval_t pte_pfn_to_mfn(pteval_t val)
364{
365 if (val & _PAGE_PRESENT) {
366 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
367 pteval_t flags = val & PTE_FLAGS_MASK;
368 unsigned long mfn;
369
370 if (!xen_feature(XENFEAT_auto_translated_physmap))
371 mfn = get_phys_to_machine(pfn);
372 else
373 mfn = pfn;
374
375
376
377
378
379
380 if (unlikely(mfn == INVALID_P2M_ENTRY)) {
381 mfn = 0;
382 flags = 0;
383 } else {
384
385
386
387
388
389 mfn &= ~FOREIGN_FRAME_BIT;
390 if (mfn & IDENTITY_FRAME_BIT) {
391 mfn &= ~IDENTITY_FRAME_BIT;
392 flags |= _PAGE_IOMAP;
393 }
394 }
395 val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
396 }
397
398 return val;
399}
400
401static pteval_t iomap_pte(pteval_t val)
402{
403 if (val & _PAGE_PRESENT) {
404 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
405 pteval_t flags = val & PTE_FLAGS_MASK;
406
407
408
409 val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
410 }
411
412 return val;
413}
414
415static pteval_t xen_pte_val(pte_t pte)
416{
417 pteval_t pteval = pte.pte;
418
419
420 if ((pteval & (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)) == _PAGE_PAT) {
421 WARN_ON(!pat_enabled);
422 pteval = (pteval & ~_PAGE_PAT) | _PAGE_PWT;
423 }
424
425 if (xen_initial_domain() && (pteval & _PAGE_IOMAP))
426 return pteval;
427
428 return pte_mfn_to_pfn(pteval);
429}
430PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
431
432static pgdval_t xen_pgd_val(pgd_t pgd)
433{
434 return pte_mfn_to_pfn(pgd.pgd);
435}
436PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
437
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455
456void xen_set_pat(u64 pat)
457{
458
459
460 WARN_ON(pat != 0x0007010600070106ull);
461}
462
463static pte_t xen_make_pte(pteval_t pte)
464{
465 phys_addr_t addr = (pte & PTE_PFN_MASK);
466
467
468
469
470
471
472
473
474
475 if (pat_enabled && !WARN_ON(pte & _PAGE_PAT)) {
476 if ((pte & (_PAGE_PCD | _PAGE_PWT)) == _PAGE_PWT)
477 pte = (pte & ~(_PAGE_PCD | _PAGE_PWT)) | _PAGE_PAT;
478 }
479
480
481
482
483
484
485
486 if (unlikely(pte & _PAGE_IOMAP) &&
487 (xen_initial_domain() || addr >= ISA_END_ADDRESS)) {
488 pte = iomap_pte(pte);
489 } else {
490 pte &= ~_PAGE_IOMAP;
491 pte = pte_pfn_to_mfn(pte);
492 }
493
494 return native_make_pte(pte);
495}
496PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
497
498static pgd_t xen_make_pgd(pgdval_t pgd)
499{
500 pgd = pte_pfn_to_mfn(pgd);
501 return native_make_pgd(pgd);
502}
503PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
504
505static pmdval_t xen_pmd_val(pmd_t pmd)
506{
507 return pte_mfn_to_pfn(pmd.pmd);
508}
509PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
510
511static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
512{
513 struct mmu_update u;
514
515 preempt_disable();
516
517 xen_mc_batch();
518
519
520 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
521 u.val = pud_val_ma(val);
522 xen_extend_mmu_update(&u);
523
524 xen_mc_issue(PARAVIRT_LAZY_MMU);
525
526 preempt_enable();
527}
528
529static void xen_set_pud(pud_t *ptr, pud_t val)
530{
531 trace_xen_mmu_set_pud(ptr, val);
532
533
534
535 if (!xen_page_pinned(ptr)) {
536 *ptr = val;
537 return;
538 }
539
540 xen_set_pud_hyper(ptr, val);
541}
542
543#ifdef CONFIG_X86_PAE
544static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
545{
546 trace_xen_mmu_set_pte_atomic(ptep, pte);
547 set_64bit((u64 *)ptep, native_pte_val(pte));
548}
549
550static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
551{
552 trace_xen_mmu_pte_clear(mm, addr, ptep);
553 if (!xen_batched_set_pte(ptep, native_make_pte(0)))
554 native_pte_clear(mm, addr, ptep);
555}
556
557static void xen_pmd_clear(pmd_t *pmdp)
558{
559 trace_xen_mmu_pmd_clear(pmdp);
560 set_pmd(pmdp, __pmd(0));
561}
562#endif
563
564static pmd_t xen_make_pmd(pmdval_t pmd)
565{
566 pmd = pte_pfn_to_mfn(pmd);
567 return native_make_pmd(pmd);
568}
569PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
570
571#if PAGETABLE_LEVELS == 4
572static pudval_t xen_pud_val(pud_t pud)
573{
574 return pte_mfn_to_pfn(pud.pud);
575}
576PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
577
578static pud_t xen_make_pud(pudval_t pud)
579{
580 pud = pte_pfn_to_mfn(pud);
581
582 return native_make_pud(pud);
583}
584PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
585
586static pgd_t *xen_get_user_pgd(pgd_t *pgd)
587{
588 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
589 unsigned offset = pgd - pgd_page;
590 pgd_t *user_ptr = NULL;
591
592 if (offset < pgd_index(USER_LIMIT)) {
593 struct page *page = virt_to_page(pgd_page);
594 user_ptr = (pgd_t *)page->private;
595 if (user_ptr)
596 user_ptr += offset;
597 }
598
599 return user_ptr;
600}
601
602static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
603{
604 struct mmu_update u;
605
606 u.ptr = virt_to_machine(ptr).maddr;
607 u.val = pgd_val_ma(val);
608 xen_extend_mmu_update(&u);
609}
610
611
612
613
614
615
616
617
618static void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
619{
620 preempt_disable();
621
622 xen_mc_batch();
623
624 __xen_set_pgd_hyper(ptr, val);
625
626 xen_mc_issue(PARAVIRT_LAZY_MMU);
627
628 preempt_enable();
629}
630
631static void xen_set_pgd(pgd_t *ptr, pgd_t val)
632{
633 pgd_t *user_ptr = xen_get_user_pgd(ptr);
634
635 trace_xen_mmu_set_pgd(ptr, user_ptr, val);
636
637
638
639 if (!xen_page_pinned(ptr)) {
640 *ptr = val;
641 if (user_ptr) {
642 WARN_ON(xen_page_pinned(user_ptr));
643 *user_ptr = val;
644 }
645 return;
646 }
647
648
649
650 xen_mc_batch();
651
652 __xen_set_pgd_hyper(ptr, val);
653 if (user_ptr)
654 __xen_set_pgd_hyper(user_ptr, val);
655
656 xen_mc_issue(PARAVIRT_LAZY_MMU);
657}
658#endif
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
676 int (*func)(struct mm_struct *mm, struct page *,
677 enum pt_level),
678 unsigned long limit)
679{
680 int flush = 0;
681 unsigned hole_low, hole_high;
682 unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
683 unsigned pgdidx, pudidx, pmdidx;
684
685
686 limit--;
687 BUG_ON(limit >= FIXADDR_TOP);
688
689 if (xen_feature(XENFEAT_auto_translated_physmap))
690 return 0;
691
692
693
694
695
696
697 hole_low = pgd_index(USER_LIMIT);
698 hole_high = pgd_index(PAGE_OFFSET);
699
700 pgdidx_limit = pgd_index(limit);
701#if PTRS_PER_PUD > 1
702 pudidx_limit = pud_index(limit);
703#else
704 pudidx_limit = 0;
705#endif
706#if PTRS_PER_PMD > 1
707 pmdidx_limit = pmd_index(limit);
708#else
709 pmdidx_limit = 0;
710#endif
711
712 for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
713 pud_t *pud;
714
715 if (pgdidx >= hole_low && pgdidx < hole_high)
716 continue;
717
718 if (!pgd_val(pgd[pgdidx]))
719 continue;
720
721 pud = pud_offset(&pgd[pgdidx], 0);
722
723 if (PTRS_PER_PUD > 1)
724 flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
725
726 for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
727 pmd_t *pmd;
728
729 if (pgdidx == pgdidx_limit &&
730 pudidx > pudidx_limit)
731 goto out;
732
733 if (pud_none(pud[pudidx]))
734 continue;
735
736 pmd = pmd_offset(&pud[pudidx], 0);
737
738 if (PTRS_PER_PMD > 1)
739 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
740
741 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
742 struct page *pte;
743
744 if (pgdidx == pgdidx_limit &&
745 pudidx == pudidx_limit &&
746 pmdidx > pmdidx_limit)
747 goto out;
748
749 if (pmd_none(pmd[pmdidx]))
750 continue;
751
752 pte = pmd_page(pmd[pmdidx]);
753 flush |= (*func)(mm, pte, PT_PTE);
754 }
755 }
756 }
757
758out:
759
760
761 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
762
763 return flush;
764}
765
766static int xen_pgd_walk(struct mm_struct *mm,
767 int (*func)(struct mm_struct *mm, struct page *,
768 enum pt_level),
769 unsigned long limit)
770{
771 return __xen_pgd_walk(mm, mm->pgd, func, limit);
772}
773
774
775
776static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
777{
778 spinlock_t *ptl = NULL;
779
780#if USE_SPLIT_PTLOCKS
781 ptl = __pte_lockptr(page);
782 spin_lock_nest_lock(ptl, &mm->page_table_lock);
783#endif
784
785 return ptl;
786}
787
788static void xen_pte_unlock(void *v)
789{
790 spinlock_t *ptl = v;
791 spin_unlock(ptl);
792}
793
794static void xen_do_pin(unsigned level, unsigned long pfn)
795{
796 struct mmuext_op op;
797
798 op.cmd = level;
799 op.arg1.mfn = pfn_to_mfn(pfn);
800
801 xen_extend_mmuext_op(&op);
802}
803
804static int xen_pin_page(struct mm_struct *mm, struct page *page,
805 enum pt_level level)
806{
807 unsigned pgfl = TestSetPagePinned(page);
808 int flush;
809
810 if (pgfl)
811 flush = 0;
812 else if (PageHighMem(page))
813
814
815 flush = 1;
816 else {
817 void *pt = lowmem_page_address(page);
818 unsigned long pfn = page_to_pfn(page);
819 struct multicall_space mcs = __xen_mc_entry(0);
820 spinlock_t *ptl;
821
822 flush = 0;
823
824
825
826
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831
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843
844 ptl = NULL;
845 if (level == PT_PTE)
846 ptl = xen_pte_lock(page, mm);
847
848 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
849 pfn_pte(pfn, PAGE_KERNEL_RO),
850 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
851
852 if (ptl) {
853 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
854
855
856
857 xen_mc_callback(xen_pte_unlock, ptl);
858 }
859 }
860
861 return flush;
862}
863
864
865
866
867static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
868{
869 trace_xen_mmu_pgd_pin(mm, pgd);
870
871 xen_mc_batch();
872
873 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
874
875 xen_mc_issue(0);
876
877 kmap_flush_unused();
878
879 xen_mc_batch();
880 }
881
882#ifdef CONFIG_X86_64
883 {
884 pgd_t *user_pgd = xen_get_user_pgd(pgd);
885
886 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
887
888 if (user_pgd) {
889 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
890 xen_do_pin(MMUEXT_PIN_L4_TABLE,
891 PFN_DOWN(__pa(user_pgd)));
892 }
893 }
894#else
895#ifdef CONFIG_X86_PAE
896
897 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
898 PT_PMD);
899#endif
900 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
901#endif
902 xen_mc_issue(0);
903}
904
905static void xen_pgd_pin(struct mm_struct *mm)
906{
907 __xen_pgd_pin(mm, mm->pgd);
908}
909
910
911
912
913
914
915
916
917
918
919
920void xen_mm_pin_all(void)
921{
922 struct page *page;
923
924 spin_lock(&pgd_lock);
925
926 list_for_each_entry(page, &pgd_list, lru) {
927 if (!PagePinned(page)) {
928 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
929 SetPageSavePinned(page);
930 }
931 }
932
933 spin_unlock(&pgd_lock);
934}
935
936
937
938
939
940
941static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
942 enum pt_level level)
943{
944 SetPagePinned(page);
945 return 0;
946}
947
948static void __init xen_mark_init_mm_pinned(void)
949{
950 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
951}
952
953static int xen_unpin_page(struct mm_struct *mm, struct page *page,
954 enum pt_level level)
955{
956 unsigned pgfl = TestClearPagePinned(page);
957
958 if (pgfl && !PageHighMem(page)) {
959 void *pt = lowmem_page_address(page);
960 unsigned long pfn = page_to_pfn(page);
961 spinlock_t *ptl = NULL;
962 struct multicall_space mcs;
963
964
965
966
967
968
969
970
971 if (level == PT_PTE) {
972 ptl = xen_pte_lock(page, mm);
973
974 if (ptl)
975 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
976 }
977
978 mcs = __xen_mc_entry(0);
979
980 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
981 pfn_pte(pfn, PAGE_KERNEL),
982 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
983
984 if (ptl) {
985
986 xen_mc_callback(xen_pte_unlock, ptl);
987 }
988 }
989
990 return 0;
991}
992
993
994static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
995{
996 trace_xen_mmu_pgd_unpin(mm, pgd);
997
998 xen_mc_batch();
999
1000 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1001
1002#ifdef CONFIG_X86_64
1003 {
1004 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1005
1006 if (user_pgd) {
1007 xen_do_pin(MMUEXT_UNPIN_TABLE,
1008 PFN_DOWN(__pa(user_pgd)));
1009 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
1010 }
1011 }
1012#endif
1013
1014#ifdef CONFIG_X86_PAE
1015
1016 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
1017 PT_PMD);
1018#endif
1019
1020 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
1021
1022 xen_mc_issue(0);
1023}
1024
1025static void xen_pgd_unpin(struct mm_struct *mm)
1026{
1027 __xen_pgd_unpin(mm, mm->pgd);
1028}
1029
1030
1031
1032
1033
1034void xen_mm_unpin_all(void)
1035{
1036 struct page *page;
1037
1038 spin_lock(&pgd_lock);
1039
1040 list_for_each_entry(page, &pgd_list, lru) {
1041 if (PageSavePinned(page)) {
1042 BUG_ON(!PagePinned(page));
1043 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
1044 ClearPageSavePinned(page);
1045 }
1046 }
1047
1048 spin_unlock(&pgd_lock);
1049}
1050
1051static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
1052{
1053 spin_lock(&next->page_table_lock);
1054 xen_pgd_pin(next);
1055 spin_unlock(&next->page_table_lock);
1056}
1057
1058static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
1059{
1060 spin_lock(&mm->page_table_lock);
1061 xen_pgd_pin(mm);
1062 spin_unlock(&mm->page_table_lock);
1063}
1064
1065
1066#ifdef CONFIG_SMP
1067
1068
1069static void drop_other_mm_ref(void *info)
1070{
1071 struct mm_struct *mm = info;
1072 struct mm_struct *active_mm;
1073
1074 active_mm = percpu_read(cpu_tlbstate.active_mm);
1075
1076 if (active_mm == mm && percpu_read(cpu_tlbstate.state) != TLBSTATE_OK)
1077 leave_mm(smp_processor_id());
1078
1079
1080
1081 if (percpu_read(xen_current_cr3) == __pa(mm->pgd))
1082 load_cr3(swapper_pg_dir);
1083}
1084
1085static void xen_drop_mm_ref(struct mm_struct *mm)
1086{
1087 cpumask_var_t mask;
1088 unsigned cpu;
1089
1090 if (current->active_mm == mm) {
1091 if (current->mm == mm)
1092 load_cr3(swapper_pg_dir);
1093 else
1094 leave_mm(smp_processor_id());
1095 }
1096
1097
1098 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1099 for_each_online_cpu(cpu) {
1100 if (!cpumask_test_cpu(cpu, mm_cpumask(mm))
1101 && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
1102 continue;
1103 smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
1104 }
1105 return;
1106 }
1107 cpumask_copy(mask, mm_cpumask(mm));
1108
1109
1110
1111
1112
1113
1114 for_each_online_cpu(cpu) {
1115 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
1116 cpumask_set_cpu(cpu, mask);
1117 }
1118
1119 if (!cpumask_empty(mask))
1120 smp_call_function_many(mask, drop_other_mm_ref, mm, 1);
1121 free_cpumask_var(mask);
1122}
1123#else
1124static void xen_drop_mm_ref(struct mm_struct *mm)
1125{
1126 if (current->active_mm == mm)
1127 load_cr3(swapper_pg_dir);
1128}
1129#endif
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145static void xen_exit_mmap(struct mm_struct *mm)
1146{
1147 get_cpu();
1148 xen_drop_mm_ref(mm);
1149 put_cpu();
1150
1151 spin_lock(&mm->page_table_lock);
1152
1153
1154 if (xen_page_pinned(mm->pgd))
1155 xen_pgd_unpin(mm);
1156
1157 spin_unlock(&mm->page_table_lock);
1158}
1159
1160static void __init xen_pagetable_setup_start(pgd_t *base)
1161{
1162}
1163
1164static __init void xen_mapping_pagetable_reserve(u64 start, u64 end)
1165{
1166
1167 native_pagetable_reserve(start, end);
1168
1169
1170 printk(KERN_DEBUG "xen: setting RW the range %llx - %llx\n", end,
1171 PFN_PHYS(pgt_buf_top));
1172 while (end < PFN_PHYS(pgt_buf_top)) {
1173 make_lowmem_page_readwrite(__va(end));
1174 end += PAGE_SIZE;
1175 }
1176}
1177
1178static void xen_post_allocator_init(void);
1179
1180static void __init xen_pagetable_setup_done(pgd_t *base)
1181{
1182 xen_setup_shared_info();
1183 xen_post_allocator_init();
1184}
1185
1186static void xen_write_cr2(unsigned long cr2)
1187{
1188 percpu_read(xen_vcpu)->arch.cr2 = cr2;
1189}
1190
1191static unsigned long xen_read_cr2(void)
1192{
1193 return percpu_read(xen_vcpu)->arch.cr2;
1194}
1195
1196unsigned long xen_read_cr2_direct(void)
1197{
1198 return percpu_read(xen_vcpu_info.arch.cr2);
1199}
1200
1201static void xen_flush_tlb(void)
1202{
1203 struct mmuext_op *op;
1204 struct multicall_space mcs;
1205
1206 trace_xen_mmu_flush_tlb(0);
1207
1208 preempt_disable();
1209
1210 mcs = xen_mc_entry(sizeof(*op));
1211
1212 op = mcs.args;
1213 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1214 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1215
1216 xen_mc_issue(PARAVIRT_LAZY_MMU);
1217
1218 preempt_enable();
1219}
1220
1221static void xen_flush_tlb_single(unsigned long addr)
1222{
1223 struct mmuext_op *op;
1224 struct multicall_space mcs;
1225
1226 trace_xen_mmu_flush_tlb_single(addr);
1227
1228 preempt_disable();
1229
1230 mcs = xen_mc_entry(sizeof(*op));
1231 op = mcs.args;
1232 op->cmd = MMUEXT_INVLPG_LOCAL;
1233 op->arg1.linear_addr = addr & PAGE_MASK;
1234 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1235
1236 xen_mc_issue(PARAVIRT_LAZY_MMU);
1237
1238 preempt_enable();
1239}
1240
1241static void xen_flush_tlb_others(const struct cpumask *cpus,
1242 struct mm_struct *mm, unsigned long va)
1243{
1244 struct {
1245 struct mmuext_op op;
1246#ifdef CONFIG_SMP
1247 DECLARE_BITMAP(mask, num_processors);
1248#else
1249 DECLARE_BITMAP(mask, NR_CPUS);
1250#endif
1251 } *args;
1252 struct multicall_space mcs;
1253
1254 trace_xen_mmu_flush_tlb_others(cpus, mm, va);
1255
1256 if (cpumask_empty(cpus))
1257 return;
1258
1259 mcs = xen_mc_entry(sizeof(*args));
1260 args = mcs.args;
1261 args->op.arg2.vcpumask = to_cpumask(args->mask);
1262
1263
1264 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1265 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
1266
1267 if (va == TLB_FLUSH_ALL) {
1268 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1269 } else {
1270 args->op.cmd = MMUEXT_INVLPG_MULTI;
1271 args->op.arg1.linear_addr = va;
1272 }
1273
1274 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1275
1276 xen_mc_issue(PARAVIRT_LAZY_MMU);
1277}
1278
1279static unsigned long xen_read_cr3(void)
1280{
1281 return percpu_read(xen_cr3);
1282}
1283
1284static void set_current_cr3(void *v)
1285{
1286 percpu_write(xen_current_cr3, (unsigned long)v);
1287}
1288
1289static void __xen_write_cr3(bool kernel, unsigned long cr3)
1290{
1291 struct mmuext_op op;
1292 unsigned long mfn;
1293
1294 trace_xen_mmu_write_cr3(kernel, cr3);
1295
1296 if (cr3)
1297 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1298 else
1299 mfn = 0;
1300
1301 WARN_ON(mfn == 0 && kernel);
1302
1303 op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1304 op.arg1.mfn = mfn;
1305
1306 xen_extend_mmuext_op(&op);
1307
1308 if (kernel) {
1309 percpu_write(xen_cr3, cr3);
1310
1311
1312
1313 xen_mc_callback(set_current_cr3, (void *)cr3);
1314 }
1315}
1316
1317static void xen_write_cr3(unsigned long cr3)
1318{
1319 BUG_ON(preemptible());
1320
1321 xen_mc_batch();
1322
1323
1324
1325 percpu_write(xen_cr3, cr3);
1326
1327 __xen_write_cr3(true, cr3);
1328
1329#ifdef CONFIG_X86_64
1330 {
1331 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1332 if (user_pgd)
1333 __xen_write_cr3(false, __pa(user_pgd));
1334 else
1335 __xen_write_cr3(false, 0);
1336 }
1337#endif
1338
1339 xen_mc_issue(PARAVIRT_LAZY_CPU);
1340}
1341
1342static int xen_pgd_alloc(struct mm_struct *mm)
1343{
1344 pgd_t *pgd = mm->pgd;
1345 int ret = 0;
1346
1347 BUG_ON(PagePinned(virt_to_page(pgd)));
1348
1349#ifdef CONFIG_X86_64
1350 {
1351 struct page *page = virt_to_page(pgd);
1352 pgd_t *user_pgd;
1353
1354 BUG_ON(page->private != 0);
1355
1356 ret = -ENOMEM;
1357
1358 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1359 page->private = (unsigned long)user_pgd;
1360
1361 if (user_pgd != NULL) {
1362 user_pgd[pgd_index(VSYSCALL_START)] =
1363 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1364 ret = 0;
1365 }
1366
1367 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1368 }
1369#endif
1370
1371 return ret;
1372}
1373
1374static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1375{
1376#ifdef CONFIG_X86_64
1377 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1378
1379 if (user_pgd)
1380 free_page((unsigned long)user_pgd);
1381#endif
1382}
1383
1384#ifdef CONFIG_X86_32
1385static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte)
1386{
1387
1388 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
1389 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1390 pte_val_ma(pte));
1391
1392 return pte;
1393}
1394#else
1395static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte)
1396{
1397 unsigned long pfn = pte_pfn(pte);
1398
1399
1400
1401
1402
1403
1404
1405 if (((!is_early_ioremap_ptep(ptep) &&
1406 pfn >= pgt_buf_start && pfn < pgt_buf_top)) ||
1407 (is_early_ioremap_ptep(ptep) && pfn != (pgt_buf_end - 1)))
1408 pte = pte_wrprotect(pte);
1409
1410 return pte;
1411}
1412#endif
1413
1414
1415
1416static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
1417{
1418 pte = mask_rw_pte(ptep, pte);
1419
1420 xen_set_pte(ptep, pte);
1421}
1422
1423static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1424{
1425 struct mmuext_op op;
1426 op.cmd = cmd;
1427 op.arg1.mfn = pfn_to_mfn(pfn);
1428 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1429 BUG();
1430}
1431
1432
1433
1434static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1435{
1436#ifdef CONFIG_FLATMEM
1437 BUG_ON(mem_map);
1438#endif
1439 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1440 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1441}
1442
1443
1444static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
1445{
1446#ifdef CONFIG_FLATMEM
1447 BUG_ON(mem_map);
1448#endif
1449 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1450}
1451
1452
1453
1454static void __init xen_release_pte_init(unsigned long pfn)
1455{
1456 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1457 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1458}
1459
1460static void __init xen_release_pmd_init(unsigned long pfn)
1461{
1462 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1463}
1464
1465static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1466{
1467 struct multicall_space mcs;
1468 struct mmuext_op *op;
1469
1470 mcs = __xen_mc_entry(sizeof(*op));
1471 op = mcs.args;
1472 op->cmd = cmd;
1473 op->arg1.mfn = pfn_to_mfn(pfn);
1474
1475 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
1476}
1477
1478static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot)
1479{
1480 struct multicall_space mcs;
1481 unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT);
1482
1483 mcs = __xen_mc_entry(0);
1484 MULTI_update_va_mapping(mcs.mc, (unsigned long)addr,
1485 pfn_pte(pfn, prot), 0);
1486}
1487
1488
1489
1490static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn,
1491 unsigned level)
1492{
1493 bool pinned = PagePinned(virt_to_page(mm->pgd));
1494
1495 trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned);
1496
1497 if (pinned) {
1498 struct page *page = pfn_to_page(pfn);
1499
1500 SetPagePinned(page);
1501
1502 if (!PageHighMem(page)) {
1503 xen_mc_batch();
1504
1505 __set_pfn_prot(pfn, PAGE_KERNEL_RO);
1506
1507 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1508 __pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1509
1510 xen_mc_issue(PARAVIRT_LAZY_MMU);
1511 } else {
1512
1513
1514 kmap_flush_unused();
1515 }
1516 }
1517}
1518
1519static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1520{
1521 xen_alloc_ptpage(mm, pfn, PT_PTE);
1522}
1523
1524static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1525{
1526 xen_alloc_ptpage(mm, pfn, PT_PMD);
1527}
1528
1529
1530static inline void xen_release_ptpage(unsigned long pfn, unsigned level)
1531{
1532 struct page *page = pfn_to_page(pfn);
1533 bool pinned = PagePinned(page);
1534
1535 trace_xen_mmu_release_ptpage(pfn, level, pinned);
1536
1537 if (pinned) {
1538 if (!PageHighMem(page)) {
1539 xen_mc_batch();
1540
1541 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1542 __pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1543
1544 __set_pfn_prot(pfn, PAGE_KERNEL);
1545
1546 xen_mc_issue(PARAVIRT_LAZY_MMU);
1547 }
1548 ClearPagePinned(page);
1549 }
1550}
1551
1552static void xen_release_pte(unsigned long pfn)
1553{
1554 xen_release_ptpage(pfn, PT_PTE);
1555}
1556
1557static void xen_release_pmd(unsigned long pfn)
1558{
1559 xen_release_ptpage(pfn, PT_PMD);
1560}
1561
1562#if PAGETABLE_LEVELS == 4
1563static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1564{
1565 xen_alloc_ptpage(mm, pfn, PT_PUD);
1566}
1567
1568static void xen_release_pud(unsigned long pfn)
1569{
1570 xen_release_ptpage(pfn, PT_PUD);
1571}
1572#endif
1573
1574void __init xen_reserve_top(void)
1575{
1576#ifdef CONFIG_X86_32
1577 unsigned long top = HYPERVISOR_VIRT_START;
1578 struct xen_platform_parameters pp;
1579
1580 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1581 top = pp.virt_start;
1582
1583 reserve_top_address(-top);
1584#endif
1585}
1586
1587
1588
1589
1590
1591static void *__ka(phys_addr_t paddr)
1592{
1593#ifdef CONFIG_X86_64
1594 return (void *)(paddr + __START_KERNEL_map);
1595#else
1596 return __va(paddr);
1597#endif
1598}
1599
1600
1601static unsigned long m2p(phys_addr_t maddr)
1602{
1603 phys_addr_t paddr;
1604
1605 maddr &= PTE_PFN_MASK;
1606 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1607
1608 return paddr;
1609}
1610
1611
1612static void *m2v(phys_addr_t maddr)
1613{
1614 return __ka(m2p(maddr));
1615}
1616
1617
1618static void set_page_prot(void *addr, pgprot_t prot)
1619{
1620 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1621 pte_t pte = pfn_pte(pfn, prot);
1622
1623 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1624 BUG();
1625}
1626
1627static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1628{
1629 unsigned pmdidx, pteidx;
1630 unsigned ident_pte;
1631 unsigned long pfn;
1632
1633 level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES,
1634 PAGE_SIZE);
1635
1636 ident_pte = 0;
1637 pfn = 0;
1638 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1639 pte_t *pte_page;
1640
1641
1642 if (pmd_present(pmd[pmdidx]))
1643 pte_page = m2v(pmd[pmdidx].pmd);
1644 else {
1645
1646 if (ident_pte == LEVEL1_IDENT_ENTRIES)
1647 break;
1648
1649 pte_page = &level1_ident_pgt[ident_pte];
1650 ident_pte += PTRS_PER_PTE;
1651
1652 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1653 }
1654
1655
1656 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1657 pte_t pte;
1658
1659#ifdef CONFIG_X86_32
1660 if (pfn > max_pfn_mapped)
1661 max_pfn_mapped = pfn;
1662#endif
1663
1664 if (!pte_none(pte_page[pteidx]))
1665 continue;
1666
1667 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1668 pte_page[pteidx] = pte;
1669 }
1670 }
1671
1672 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1673 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1674
1675 set_page_prot(pmd, PAGE_KERNEL_RO);
1676}
1677
1678void __init xen_setup_machphys_mapping(void)
1679{
1680 struct xen_machphys_mapping mapping;
1681
1682 if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
1683 machine_to_phys_mapping = (unsigned long *)mapping.v_start;
1684 machine_to_phys_nr = mapping.max_mfn + 1;
1685 } else {
1686 machine_to_phys_nr = MACH2PHYS_NR_ENTRIES;
1687 }
1688#ifdef CONFIG_X86_32
1689 WARN_ON((machine_to_phys_mapping + (machine_to_phys_nr - 1))
1690 < machine_to_phys_mapping);
1691#endif
1692}
1693
1694#ifdef CONFIG_X86_64
1695static void convert_pfn_mfn(void *v)
1696{
1697 pte_t *pte = v;
1698 int i;
1699
1700
1701
1702 for (i = 0; i < PTRS_PER_PTE; i++)
1703 pte[i] = xen_make_pte(pte[i].pte);
1704}
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717pgd_t * __init xen_setup_kernel_pagetable(pgd_t *pgd,
1718 unsigned long max_pfn)
1719{
1720 pud_t *l3;
1721 pmd_t *l2;
1722
1723
1724
1725
1726
1727 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
1728
1729
1730 init_level4_pgt[0] = __pgd(0);
1731
1732
1733 convert_pfn_mfn(init_level4_pgt);
1734 convert_pfn_mfn(level3_ident_pgt);
1735 convert_pfn_mfn(level3_kernel_pgt);
1736
1737 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1738 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1739
1740 memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1741 memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1742
1743 l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1744 l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1745 memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1746
1747
1748 xen_map_identity_early(level2_ident_pgt, max_pfn);
1749
1750
1751 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1752 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1753 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1754 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1755 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1756 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1757
1758
1759 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1760 PFN_DOWN(__pa_symbol(init_level4_pgt)));
1761
1762
1763 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1764
1765
1766 pgd = init_level4_pgt;
1767
1768
1769
1770
1771
1772
1773 xen_mc_batch();
1774 __xen_write_cr3(true, __pa(pgd));
1775 xen_mc_issue(PARAVIRT_LAZY_CPU);
1776
1777 memblock_x86_reserve_range(__pa(xen_start_info->pt_base),
1778 __pa(xen_start_info->pt_base +
1779 xen_start_info->nr_pt_frames * PAGE_SIZE),
1780 "XEN PAGETABLES");
1781
1782 return pgd;
1783}
1784#else
1785static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD);
1786static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD);
1787
1788static void __init xen_write_cr3_init(unsigned long cr3)
1789{
1790 unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir));
1791
1792 BUG_ON(read_cr3() != __pa(initial_page_table));
1793 BUG_ON(cr3 != __pa(swapper_pg_dir));
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805 swapper_kernel_pmd =
1806 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
1807 memcpy(swapper_kernel_pmd, initial_kernel_pmd,
1808 sizeof(pmd_t) * PTRS_PER_PMD);
1809 swapper_pg_dir[KERNEL_PGD_BOUNDARY] =
1810 __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT);
1811 set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO);
1812
1813 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1814 xen_write_cr3(cr3);
1815 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn);
1816
1817 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
1818 PFN_DOWN(__pa(initial_page_table)));
1819 set_page_prot(initial_page_table, PAGE_KERNEL);
1820 set_page_prot(initial_kernel_pmd, PAGE_KERNEL);
1821
1822 pv_mmu_ops.write_cr3 = &xen_write_cr3;
1823}
1824
1825pgd_t * __init xen_setup_kernel_pagetable(pgd_t *pgd,
1826 unsigned long max_pfn)
1827{
1828 pmd_t *kernel_pmd;
1829
1830 initial_kernel_pmd =
1831 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
1832
1833 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) +
1834 xen_start_info->nr_pt_frames * PAGE_SIZE +
1835 512*1024);
1836
1837 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
1838 memcpy(initial_kernel_pmd, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
1839
1840 xen_map_identity_early(initial_kernel_pmd, max_pfn);
1841
1842 memcpy(initial_page_table, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
1843 initial_page_table[KERNEL_PGD_BOUNDARY] =
1844 __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT);
1845
1846 set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO);
1847 set_page_prot(initial_page_table, PAGE_KERNEL_RO);
1848 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1849
1850 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1851
1852 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
1853 PFN_DOWN(__pa(initial_page_table)));
1854 xen_write_cr3(__pa(initial_page_table));
1855
1856 memblock_x86_reserve_range(__pa(xen_start_info->pt_base),
1857 __pa(xen_start_info->pt_base +
1858 xen_start_info->nr_pt_frames * PAGE_SIZE),
1859 "XEN PAGETABLES");
1860
1861 return initial_page_table;
1862}
1863#endif
1864
1865static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
1866
1867static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
1868{
1869 pte_t pte;
1870
1871 phys >>= PAGE_SHIFT;
1872
1873 switch (idx) {
1874 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1875#ifdef CONFIG_X86_F00F_BUG
1876 case FIX_F00F_IDT:
1877#endif
1878#ifdef CONFIG_X86_32
1879 case FIX_WP_TEST:
1880 case FIX_VDSO:
1881# ifdef CONFIG_HIGHMEM
1882 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
1883# endif
1884#else
1885 case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
1886 case VVAR_PAGE:
1887#endif
1888 case FIX_TEXT_POKE0:
1889 case FIX_TEXT_POKE1:
1890
1891 pte = pfn_pte(phys, prot);
1892 break;
1893
1894#ifdef CONFIG_X86_LOCAL_APIC
1895 case FIX_APIC_BASE:
1896 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
1897 break;
1898#endif
1899
1900#ifdef CONFIG_X86_IO_APIC
1901 case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
1902
1903
1904
1905
1906 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
1907 break;
1908#endif
1909
1910 case FIX_PARAVIRT_BOOTMAP:
1911
1912
1913 pte = mfn_pte(phys, prot);
1914 break;
1915
1916 default:
1917
1918 pte = mfn_pte(phys, __pgprot(pgprot_val(prot) | _PAGE_IOMAP));
1919 break;
1920 }
1921
1922 __native_set_fixmap(idx, pte);
1923
1924#ifdef CONFIG_X86_64
1925
1926
1927 if ((idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) ||
1928 idx == VVAR_PAGE) {
1929 unsigned long vaddr = __fix_to_virt(idx);
1930 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
1931 }
1932#endif
1933}
1934
1935void __init xen_ident_map_ISA(void)
1936{
1937 unsigned long pa;
1938
1939
1940
1941
1942
1943 if (!xen_initial_domain())
1944 return;
1945
1946 xen_raw_printk("Xen: setup ISA identity maps\n");
1947
1948 for (pa = ISA_START_ADDRESS; pa < ISA_END_ADDRESS; pa += PAGE_SIZE) {
1949 pte_t pte = mfn_pte(PFN_DOWN(pa), PAGE_KERNEL_IO);
1950
1951 if (HYPERVISOR_update_va_mapping(PAGE_OFFSET + pa, pte, 0))
1952 BUG();
1953 }
1954
1955 xen_flush_tlb();
1956}
1957
1958static void __init xen_post_allocator_init(void)
1959{
1960 pv_mmu_ops.set_pte = xen_set_pte;
1961 pv_mmu_ops.set_pmd = xen_set_pmd;
1962 pv_mmu_ops.set_pud = xen_set_pud;
1963#if PAGETABLE_LEVELS == 4
1964 pv_mmu_ops.set_pgd = xen_set_pgd;
1965#endif
1966
1967
1968
1969 pv_mmu_ops.alloc_pte = xen_alloc_pte;
1970 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
1971 pv_mmu_ops.release_pte = xen_release_pte;
1972 pv_mmu_ops.release_pmd = xen_release_pmd;
1973#if PAGETABLE_LEVELS == 4
1974 pv_mmu_ops.alloc_pud = xen_alloc_pud;
1975 pv_mmu_ops.release_pud = xen_release_pud;
1976#endif
1977
1978#ifdef CONFIG_X86_64
1979 SetPagePinned(virt_to_page(level3_user_vsyscall));
1980#endif
1981 xen_mark_init_mm_pinned();
1982}
1983
1984static void xen_leave_lazy_mmu(void)
1985{
1986 preempt_disable();
1987 xen_mc_flush();
1988 paravirt_leave_lazy_mmu();
1989 preempt_enable();
1990}
1991
1992static const struct pv_mmu_ops xen_mmu_ops __initconst = {
1993 .read_cr2 = xen_read_cr2,
1994 .write_cr2 = xen_write_cr2,
1995
1996 .read_cr3 = xen_read_cr3,
1997#ifdef CONFIG_X86_32
1998 .write_cr3 = xen_write_cr3_init,
1999#else
2000 .write_cr3 = xen_write_cr3,
2001#endif
2002
2003 .flush_tlb_user = xen_flush_tlb,
2004 .flush_tlb_kernel = xen_flush_tlb,
2005 .flush_tlb_single = xen_flush_tlb_single,
2006 .flush_tlb_others = xen_flush_tlb_others,
2007
2008 .pte_update = paravirt_nop,
2009 .pte_update_defer = paravirt_nop,
2010
2011 .pgd_alloc = xen_pgd_alloc,
2012 .pgd_free = xen_pgd_free,
2013
2014 .alloc_pte = xen_alloc_pte_init,
2015 .release_pte = xen_release_pte_init,
2016 .alloc_pmd = xen_alloc_pmd_init,
2017 .release_pmd = xen_release_pmd_init,
2018
2019 .set_pte = xen_set_pte_init,
2020 .set_pte_at = xen_set_pte_at,
2021 .set_pmd = xen_set_pmd_hyper,
2022
2023 .ptep_modify_prot_start = __ptep_modify_prot_start,
2024 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
2025
2026 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
2027 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
2028
2029 .make_pte = PV_CALLEE_SAVE(xen_make_pte),
2030 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
2031
2032#ifdef CONFIG_X86_PAE
2033 .set_pte_atomic = xen_set_pte_atomic,
2034 .pte_clear = xen_pte_clear,
2035 .pmd_clear = xen_pmd_clear,
2036#endif
2037 .set_pud = xen_set_pud_hyper,
2038
2039 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
2040 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
2041
2042#if PAGETABLE_LEVELS == 4
2043 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
2044 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
2045 .set_pgd = xen_set_pgd_hyper,
2046
2047 .alloc_pud = xen_alloc_pmd_init,
2048 .release_pud = xen_release_pmd_init,
2049#endif
2050
2051 .activate_mm = xen_activate_mm,
2052 .dup_mmap = xen_dup_mmap,
2053 .exit_mmap = xen_exit_mmap,
2054
2055 .lazy_mode = {
2056 .enter = paravirt_enter_lazy_mmu,
2057 .leave = xen_leave_lazy_mmu,
2058 },
2059
2060 .set_fixmap = xen_set_fixmap,
2061};
2062
2063void __init xen_init_mmu_ops(void)
2064{
2065 x86_init.mapping.pagetable_reserve = xen_mapping_pagetable_reserve;
2066 x86_init.paging.pagetable_setup_start = xen_pagetable_setup_start;
2067 x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done;
2068 pv_mmu_ops = xen_mmu_ops;
2069
2070 memset(dummy_mapping, 0xff, PAGE_SIZE);
2071}
2072
2073
2074#define MAX_CONTIG_ORDER 9
2075static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
2076
2077#define VOID_PTE (mfn_pte(0, __pgprot(0)))
2078static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
2079 unsigned long *in_frames,
2080 unsigned long *out_frames)
2081{
2082 int i;
2083 struct multicall_space mcs;
2084
2085 xen_mc_batch();
2086 for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
2087 mcs = __xen_mc_entry(0);
2088
2089 if (in_frames)
2090 in_frames[i] = virt_to_mfn(vaddr);
2091
2092 MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
2093 __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
2094
2095 if (out_frames)
2096 out_frames[i] = virt_to_pfn(vaddr);
2097 }
2098 xen_mc_issue(0);
2099}
2100
2101
2102
2103
2104
2105
2106static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
2107 unsigned long *mfns,
2108 unsigned long first_mfn)
2109{
2110 unsigned i, limit;
2111 unsigned long mfn;
2112
2113 xen_mc_batch();
2114
2115 limit = 1u << order;
2116 for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
2117 struct multicall_space mcs;
2118 unsigned flags;
2119
2120 mcs = __xen_mc_entry(0);
2121 if (mfns)
2122 mfn = mfns[i];
2123 else
2124 mfn = first_mfn + i;
2125
2126 if (i < (limit - 1))
2127 flags = 0;
2128 else {
2129 if (order == 0)
2130 flags = UVMF_INVLPG | UVMF_ALL;
2131 else
2132 flags = UVMF_TLB_FLUSH | UVMF_ALL;
2133 }
2134
2135 MULTI_update_va_mapping(mcs.mc, vaddr,
2136 mfn_pte(mfn, PAGE_KERNEL), flags);
2137
2138 set_phys_to_machine(virt_to_pfn(vaddr), mfn);
2139 }
2140
2141 xen_mc_issue(0);
2142}
2143
2144
2145
2146
2147
2148
2149
2150
2151
2152static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
2153 unsigned long *pfns_in,
2154 unsigned long extents_out,
2155 unsigned int order_out,
2156 unsigned long *mfns_out,
2157 unsigned int address_bits)
2158{
2159 long rc;
2160 int success;
2161
2162 struct xen_memory_exchange exchange = {
2163 .in = {
2164 .nr_extents = extents_in,
2165 .extent_order = order_in,
2166 .extent_start = pfns_in,
2167 .domid = DOMID_SELF
2168 },
2169 .out = {
2170 .nr_extents = extents_out,
2171 .extent_order = order_out,
2172 .extent_start = mfns_out,
2173 .address_bits = address_bits,
2174 .domid = DOMID_SELF
2175 }
2176 };
2177
2178 BUG_ON(extents_in << order_in != extents_out << order_out);
2179
2180 rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
2181 success = (exchange.nr_exchanged == extents_in);
2182
2183 BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
2184 BUG_ON(success && (rc != 0));
2185
2186 return success;
2187}
2188
2189int xen_create_contiguous_region(unsigned long vstart, unsigned int order,
2190 unsigned int address_bits)
2191{
2192 unsigned long *in_frames = discontig_frames, out_frame;
2193 unsigned long flags;
2194 int success;
2195
2196
2197
2198
2199
2200
2201
2202 if (xen_feature(XENFEAT_auto_translated_physmap))
2203 return 0;
2204
2205 if (unlikely(order > MAX_CONTIG_ORDER))
2206 return -ENOMEM;
2207
2208 memset((void *) vstart, 0, PAGE_SIZE << order);
2209
2210 spin_lock_irqsave(&xen_reservation_lock, flags);
2211
2212
2213 xen_zap_pfn_range(vstart, order, in_frames, NULL);
2214
2215
2216 out_frame = virt_to_pfn(vstart);
2217 success = xen_exchange_memory(1UL << order, 0, in_frames,
2218 1, order, &out_frame,
2219 address_bits);
2220
2221
2222 if (success)
2223 xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
2224 else
2225 xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
2226
2227 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2228
2229 return success ? 0 : -ENOMEM;
2230}
2231EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
2232
2233void xen_destroy_contiguous_region(unsigned long vstart, unsigned int order)
2234{
2235 unsigned long *out_frames = discontig_frames, in_frame;
2236 unsigned long flags;
2237 int success;
2238
2239 if (xen_feature(XENFEAT_auto_translated_physmap))
2240 return;
2241
2242 if (unlikely(order > MAX_CONTIG_ORDER))
2243 return;
2244
2245 memset((void *) vstart, 0, PAGE_SIZE << order);
2246
2247 spin_lock_irqsave(&xen_reservation_lock, flags);
2248
2249
2250 in_frame = virt_to_mfn(vstart);
2251
2252
2253 xen_zap_pfn_range(vstart, order, NULL, out_frames);
2254
2255
2256 success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
2257 0, out_frames, 0);
2258
2259
2260 if (success)
2261 xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
2262 else
2263 xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
2264
2265 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2266}
2267EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
2268
2269#ifdef CONFIG_XEN_PVHVM
2270static void xen_hvm_exit_mmap(struct mm_struct *mm)
2271{
2272 struct xen_hvm_pagetable_dying a;
2273 int rc;
2274
2275 a.domid = DOMID_SELF;
2276 a.gpa = __pa(mm->pgd);
2277 rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
2278 WARN_ON_ONCE(rc < 0);
2279}
2280
2281static int is_pagetable_dying_supported(void)
2282{
2283 struct xen_hvm_pagetable_dying a;
2284 int rc = 0;
2285
2286 a.domid = DOMID_SELF;
2287 a.gpa = 0x00;
2288 rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
2289 if (rc < 0) {
2290 printk(KERN_DEBUG "HVMOP_pagetable_dying not supported\n");
2291 return 0;
2292 }
2293 return 1;
2294}
2295
2296void __init xen_hvm_init_mmu_ops(void)
2297{
2298 if (is_pagetable_dying_supported())
2299 pv_mmu_ops.exit_mmap = xen_hvm_exit_mmap;
2300}
2301#endif
2302
2303#define REMAP_BATCH_SIZE 16
2304
2305struct remap_data {
2306 unsigned long mfn;
2307 pgprot_t prot;
2308 struct mmu_update *mmu_update;
2309};
2310
2311static int remap_area_mfn_pte_fn(pte_t *ptep, pgtable_t token,
2312 unsigned long addr, void *data)
2313{
2314 struct remap_data *rmd = data;
2315 pte_t pte = pte_mkspecial(pfn_pte(rmd->mfn++, rmd->prot));
2316
2317 rmd->mmu_update->ptr = virt_to_machine(ptep).maddr;
2318 rmd->mmu_update->val = pte_val_ma(pte);
2319 rmd->mmu_update++;
2320
2321 return 0;
2322}
2323
2324int xen_remap_domain_mfn_range(struct vm_area_struct *vma,
2325 unsigned long addr,
2326 unsigned long mfn, int nr,
2327 pgprot_t prot, unsigned domid)
2328{
2329 struct remap_data rmd;
2330 struct mmu_update mmu_update[REMAP_BATCH_SIZE];
2331 int batch;
2332 unsigned long range;
2333 int err = 0;
2334
2335 prot = __pgprot(pgprot_val(prot) | _PAGE_IOMAP);
2336
2337 BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_RESERVED | VM_IO)) ==
2338 (VM_PFNMAP | VM_RESERVED | VM_IO)));
2339
2340 rmd.mfn = mfn;
2341 rmd.prot = prot;
2342
2343 while (nr) {
2344 batch = min(REMAP_BATCH_SIZE, nr);
2345 range = (unsigned long)batch << PAGE_SHIFT;
2346
2347 rmd.mmu_update = mmu_update;
2348 err = apply_to_page_range(vma->vm_mm, addr, range,
2349 remap_area_mfn_pte_fn, &rmd);
2350 if (err)
2351 goto out;
2352
2353 err = -EFAULT;
2354 if (HYPERVISOR_mmu_update(mmu_update, batch, NULL, domid) < 0)
2355 goto out;
2356
2357 nr -= batch;
2358 addr += range;
2359 }
2360
2361 err = 0;
2362out:
2363
2364 flush_tlb_all();
2365
2366 return err;
2367}
2368EXPORT_SYMBOL_GPL(xen_remap_domain_mfn_range);
2369