linux/drivers/watchdog/shwdt.c
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   1/*
   2 * drivers/watchdog/shwdt.c
   3 *
   4 * Watchdog driver for integrated watchdog in the SuperH processors.
   5 *
   6 * Copyright (C) 2001 - 2012  Paul Mundt <lethal@linux-sh.org>
   7 *
   8 * This program is free software; you can redistribute it and/or modify it
   9 * under the terms of the GNU General Public License as published by the
  10 * Free Software Foundation; either version 2 of the License, or (at your
  11 * option) any later version.
  12 *
  13 * 14-Dec-2001 Matt Domsch <Matt_Domsch@dell.com>
  14 *     Added nowayout module option to override CONFIG_WATCHDOG_NOWAYOUT
  15 *
  16 * 19-Apr-2002 Rob Radez <rob@osinvestor.com>
  17 *     Added expect close support, made emulated timeout runtime changeable
  18 *     general cleanups, add some ioctls
  19 */
  20
  21#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  22
  23#include <linux/module.h>
  24#include <linux/moduleparam.h>
  25#include <linux/platform_device.h>
  26#include <linux/init.h>
  27#include <linux/types.h>
  28#include <linux/spinlock.h>
  29#include <linux/miscdevice.h>
  30#include <linux/watchdog.h>
  31#include <linux/pm_runtime.h>
  32#include <linux/fs.h>
  33#include <linux/mm.h>
  34#include <linux/slab.h>
  35#include <linux/io.h>
  36#include <linux/clk.h>
  37#include <linux/err.h>
  38#include <asm/watchdog.h>
  39
  40#define DRV_NAME "sh-wdt"
  41
  42/*
  43 * Default clock division ratio is 5.25 msecs. For an additional table of
  44 * values, consult the asm-sh/watchdog.h. Overload this at module load
  45 * time.
  46 *
  47 * In order for this to work reliably we need to have HZ set to 1000 or
  48 * something quite higher than 100 (or we need a proper high-res timer
  49 * implementation that will deal with this properly), otherwise the 10ms
  50 * resolution of a jiffy is enough to trigger the overflow. For things like
  51 * the SH-4 and SH-5, this isn't necessarily that big of a problem, though
  52 * for the SH-2 and SH-3, this isn't recommended unless the WDT is absolutely
  53 * necssary.
  54 *
  55 * As a result of this timing problem, the only modes that are particularly
  56 * feasible are the 4096 and the 2048 divisors, which yield 5.25 and 2.62ms
  57 * overflow periods respectively.
  58 *
  59 * Also, since we can't really expect userspace to be responsive enough
  60 * before the overflow happens, we maintain two separate timers .. One in
  61 * the kernel for clearing out WOVF every 2ms or so (again, this depends on
  62 * HZ == 1000), and another for monitoring userspace writes to the WDT device.
  63 *
  64 * As such, we currently use a configurable heartbeat interval which defaults
  65 * to 30s. In this case, the userspace daemon is only responsible for periodic
  66 * writes to the device before the next heartbeat is scheduled. If the daemon
  67 * misses its deadline, the kernel timer will allow the WDT to overflow.
  68 */
  69static int clock_division_ratio = WTCSR_CKS_4096;
  70#define next_ping_period(cks)   (jiffies + msecs_to_jiffies(cks - 4))
  71
  72#define WATCHDOG_HEARTBEAT 30                   /* 30 sec default heartbeat */
  73static int heartbeat = WATCHDOG_HEARTBEAT;      /* in seconds */
  74static bool nowayout = WATCHDOG_NOWAYOUT;
  75static unsigned long next_heartbeat;
  76
  77struct sh_wdt {
  78        void __iomem            *base;
  79        struct device           *dev;
  80        struct clk              *clk;
  81        spinlock_t              lock;
  82
  83        struct timer_list       timer;
  84};
  85
  86static int sh_wdt_start(struct watchdog_device *wdt_dev)
  87{
  88        struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev);
  89        unsigned long flags;
  90        u8 csr;
  91
  92        pm_runtime_get_sync(wdt->dev);
  93        clk_enable(wdt->clk);
  94
  95        spin_lock_irqsave(&wdt->lock, flags);
  96
  97        next_heartbeat = jiffies + (heartbeat * HZ);
  98        mod_timer(&wdt->timer, next_ping_period(clock_division_ratio));
  99
 100        csr = sh_wdt_read_csr();
 101        csr |= WTCSR_WT | clock_division_ratio;
 102        sh_wdt_write_csr(csr);
 103
 104        sh_wdt_write_cnt(0);
 105
 106        /*
 107         * These processors have a bit of an inconsistent initialization
 108         * process.. starting with SH-3, RSTS was moved to WTCSR, and the
 109         * RSTCSR register was removed.
 110         *
 111         * On the SH-2 however, in addition with bits being in different
 112         * locations, we must deal with RSTCSR outright..
 113         */
 114        csr = sh_wdt_read_csr();
 115        csr |= WTCSR_TME;
 116        csr &= ~WTCSR_RSTS;
 117        sh_wdt_write_csr(csr);
 118
 119#ifdef CONFIG_CPU_SH2
 120        csr = sh_wdt_read_rstcsr();
 121        csr &= ~RSTCSR_RSTS;
 122        sh_wdt_write_rstcsr(csr);
 123#endif
 124        spin_unlock_irqrestore(&wdt->lock, flags);
 125
 126        return 0;
 127}
 128
 129static int sh_wdt_stop(struct watchdog_device *wdt_dev)
 130{
 131        struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev);
 132        unsigned long flags;
 133        u8 csr;
 134
 135        spin_lock_irqsave(&wdt->lock, flags);
 136
 137        del_timer(&wdt->timer);
 138
 139        csr = sh_wdt_read_csr();
 140        csr &= ~WTCSR_TME;
 141        sh_wdt_write_csr(csr);
 142
 143        spin_unlock_irqrestore(&wdt->lock, flags);
 144
 145        clk_disable(wdt->clk);
 146        pm_runtime_put_sync(wdt->dev);
 147
 148        return 0;
 149}
 150
 151static int sh_wdt_keepalive(struct watchdog_device *wdt_dev)
 152{
 153        struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev);
 154        unsigned long flags;
 155
 156        spin_lock_irqsave(&wdt->lock, flags);
 157        next_heartbeat = jiffies + (heartbeat * HZ);
 158        spin_unlock_irqrestore(&wdt->lock, flags);
 159
 160        return 0;
 161}
 162
 163static int sh_wdt_set_heartbeat(struct watchdog_device *wdt_dev, unsigned t)
 164{
 165        struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev);
 166        unsigned long flags;
 167
 168        if (unlikely(t < 1 || t > 3600)) /* arbitrary upper limit */
 169                return -EINVAL;
 170
 171        spin_lock_irqsave(&wdt->lock, flags);
 172        heartbeat = t;
 173        wdt_dev->timeout = t;
 174        spin_unlock_irqrestore(&wdt->lock, flags);
 175
 176        return 0;
 177}
 178
 179static void sh_wdt_ping(unsigned long data)
 180{
 181        struct sh_wdt *wdt = (struct sh_wdt *)data;
 182        unsigned long flags;
 183
 184        spin_lock_irqsave(&wdt->lock, flags);
 185        if (time_before(jiffies, next_heartbeat)) {
 186                u8 csr;
 187
 188                csr = sh_wdt_read_csr();
 189                csr &= ~WTCSR_IOVF;
 190                sh_wdt_write_csr(csr);
 191
 192                sh_wdt_write_cnt(0);
 193
 194                mod_timer(&wdt->timer, next_ping_period(clock_division_ratio));
 195        } else
 196                dev_warn(wdt->dev, "Heartbeat lost! Will not ping "
 197                         "the watchdog\n");
 198        spin_unlock_irqrestore(&wdt->lock, flags);
 199}
 200
 201static const struct watchdog_info sh_wdt_info = {
 202        .options                = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
 203                                  WDIOF_MAGICCLOSE,
 204        .firmware_version       = 1,
 205        .identity               = "SH WDT",
 206};
 207
 208static const struct watchdog_ops sh_wdt_ops = {
 209        .owner          = THIS_MODULE,
 210        .start          = sh_wdt_start,
 211        .stop           = sh_wdt_stop,
 212        .ping           = sh_wdt_keepalive,
 213        .set_timeout    = sh_wdt_set_heartbeat,
 214};
 215
 216static struct watchdog_device sh_wdt_dev = {
 217        .info   = &sh_wdt_info,
 218        .ops    = &sh_wdt_ops,
 219};
 220
 221static int sh_wdt_probe(struct platform_device *pdev)
 222{
 223        struct sh_wdt *wdt;
 224        struct resource *res;
 225        int rc;
 226
 227        /*
 228         * As this driver only covers the global watchdog case, reject
 229         * any attempts to register per-CPU watchdogs.
 230         */
 231        if (pdev->id != -1)
 232                return -EINVAL;
 233
 234        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 235        if (unlikely(!res))
 236                return -EINVAL;
 237
 238        wdt = devm_kzalloc(&pdev->dev, sizeof(struct sh_wdt), GFP_KERNEL);
 239        if (unlikely(!wdt))
 240                return -ENOMEM;
 241
 242        wdt->dev = &pdev->dev;
 243
 244        wdt->clk = devm_clk_get(&pdev->dev, NULL);
 245        if (IS_ERR(wdt->clk)) {
 246                /*
 247                 * Clock framework support is optional, continue on
 248                 * anyways if we don't find a matching clock.
 249                 */
 250                wdt->clk = NULL;
 251        }
 252
 253        wdt->base = devm_ioremap_resource(wdt->dev, res);
 254        if (IS_ERR(wdt->base))
 255                return PTR_ERR(wdt->base);
 256
 257        watchdog_set_nowayout(&sh_wdt_dev, nowayout);
 258        watchdog_set_drvdata(&sh_wdt_dev, wdt);
 259
 260        spin_lock_init(&wdt->lock);
 261
 262        rc = sh_wdt_set_heartbeat(&sh_wdt_dev, heartbeat);
 263        if (unlikely(rc)) {
 264                /* Default timeout if invalid */
 265                sh_wdt_set_heartbeat(&sh_wdt_dev, WATCHDOG_HEARTBEAT);
 266
 267                dev_warn(&pdev->dev,
 268                         "heartbeat value must be 1<=x<=3600, using %d\n",
 269                         sh_wdt_dev.timeout);
 270        }
 271
 272        dev_info(&pdev->dev, "configured with heartbeat=%d sec (nowayout=%d)\n",
 273                 sh_wdt_dev.timeout, nowayout);
 274
 275        rc = watchdog_register_device(&sh_wdt_dev);
 276        if (unlikely(rc)) {
 277                dev_err(&pdev->dev, "Can't register watchdog (err=%d)\n", rc);
 278                return rc;
 279        }
 280
 281        init_timer(&wdt->timer);
 282        wdt->timer.function     = sh_wdt_ping;
 283        wdt->timer.data         = (unsigned long)wdt;
 284        wdt->timer.expires      = next_ping_period(clock_division_ratio);
 285
 286        platform_set_drvdata(pdev, wdt);
 287
 288        dev_info(&pdev->dev, "initialized.\n");
 289
 290        pm_runtime_enable(&pdev->dev);
 291
 292        return 0;
 293}
 294
 295static int sh_wdt_remove(struct platform_device *pdev)
 296{
 297        struct sh_wdt *wdt = platform_get_drvdata(pdev);
 298
 299        watchdog_unregister_device(&sh_wdt_dev);
 300
 301        pm_runtime_disable(&pdev->dev);
 302
 303        return 0;
 304}
 305
 306static void sh_wdt_shutdown(struct platform_device *pdev)
 307{
 308        sh_wdt_stop(&sh_wdt_dev);
 309}
 310
 311static struct platform_driver sh_wdt_driver = {
 312        .driver         = {
 313                .name   = DRV_NAME,
 314                .owner  = THIS_MODULE,
 315        },
 316
 317        .probe          = sh_wdt_probe,
 318        .remove         = sh_wdt_remove,
 319        .shutdown       = sh_wdt_shutdown,
 320};
 321
 322static int __init sh_wdt_init(void)
 323{
 324        if (unlikely(clock_division_ratio < 0x5 ||
 325                     clock_division_ratio > 0x7)) {
 326                clock_division_ratio = WTCSR_CKS_4096;
 327
 328                pr_info("divisor must be 0x5<=x<=0x7, using %d\n",
 329                        clock_division_ratio);
 330        }
 331
 332        return platform_driver_register(&sh_wdt_driver);
 333}
 334
 335static void __exit sh_wdt_exit(void)
 336{
 337        platform_driver_unregister(&sh_wdt_driver);
 338}
 339module_init(sh_wdt_init);
 340module_exit(sh_wdt_exit);
 341
 342MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>");
 343MODULE_DESCRIPTION("SuperH watchdog driver");
 344MODULE_LICENSE("GPL");
 345MODULE_ALIAS("platform:" DRV_NAME);
 346MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
 347
 348module_param(clock_division_ratio, int, 0);
 349MODULE_PARM_DESC(clock_division_ratio,
 350        "Clock division ratio. Valid ranges are from 0x5 (1.31ms) "
 351        "to 0x7 (5.25ms). (default=" __MODULE_STRING(WTCSR_CKS_4096) ")");
 352
 353module_param(heartbeat, int, 0);
 354MODULE_PARM_DESC(heartbeat,
 355        "Watchdog heartbeat in seconds. (1 <= heartbeat <= 3600, default="
 356                                __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
 357
 358module_param(nowayout, bool, 0);
 359MODULE_PARM_DESC(nowayout,
 360        "Watchdog cannot be stopped once started (default="
 361                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 362
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