linux/drivers/watchdog/booke_wdt.c
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   1/*
   2 * Watchdog timer for PowerPC Book-E systems
   3 *
   4 * Author: Matthew McClintock
   5 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
   6 *
   7 * Copyright 2005, 2008, 2010-2011 Freescale Semiconductor Inc.
   8 *
   9 * This program is free software; you can redistribute  it and/or modify it
  10 * under  the terms of  the GNU General  Public License as published by the
  11 * Free Software Foundation;  either version 2 of the  License, or (at your
  12 * option) any later version.
  13 */
  14
  15#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  16
  17#include <linux/module.h>
  18#include <linux/smp.h>
  19#include <linux/watchdog.h>
  20
  21#include <asm/reg_booke.h>
  22#include <asm/time.h>
  23#include <asm/div64.h>
  24
  25/* If the kernel parameter wdt=1, the watchdog will be enabled at boot.
  26 * Also, the wdt_period sets the watchdog timer period timeout.
  27 * For E500 cpus the wdt_period sets which bit changing from 0->1 will
  28 * trigger a watchog timeout. This watchdog timeout will occur 3 times, the
  29 * first time nothing will happen, the second time a watchdog exception will
  30 * occur, and the final time the board will reset.
  31 */
  32
  33u32 booke_wdt_enabled;
  34u32 booke_wdt_period = CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT;
  35
  36#ifdef  CONFIG_PPC_FSL_BOOK3E
  37#define WDTP(x)         ((((x)&0x3)<<30)|(((x)&0x3c)<<15))
  38#define WDTP_MASK       (WDTP(0x3f))
  39#else
  40#define WDTP(x)         (TCR_WP(x))
  41#define WDTP_MASK       (TCR_WP_MASK)
  42#endif
  43
  44#ifdef CONFIG_PPC_FSL_BOOK3E
  45
  46/* For the specified period, determine the number of seconds
  47 * corresponding to the reset time.  There will be a watchdog
  48 * exception at approximately 3/5 of this time.
  49 *
  50 * The formula to calculate this is given by:
  51 * 2.5 * (2^(63-period+1)) / timebase_freq
  52 *
  53 * In order to simplify things, we assume that period is
  54 * at least 1.  This will still result in a very long timeout.
  55 */
  56static unsigned long long period_to_sec(unsigned int period)
  57{
  58        unsigned long long tmp = 1ULL << (64 - period);
  59        unsigned long tmp2 = ppc_tb_freq;
  60
  61        /* tmp may be a very large number and we don't want to overflow,
  62         * so divide the timebase freq instead of multiplying tmp
  63         */
  64        tmp2 = tmp2 / 5 * 2;
  65
  66        do_div(tmp, tmp2);
  67        return tmp;
  68}
  69
  70/*
  71 * This procedure will find the highest period which will give a timeout
  72 * greater than the one required. e.g. for a bus speed of 66666666 and
  73 * and a parameter of 2 secs, then this procedure will return a value of 38.
  74 */
  75static unsigned int sec_to_period(unsigned int secs)
  76{
  77        unsigned int period;
  78        for (period = 63; period > 0; period--) {
  79                if (period_to_sec(period) >= secs)
  80                        return period;
  81        }
  82        return 0;
  83}
  84
  85#define MAX_WDT_TIMEOUT         period_to_sec(1)
  86
  87#else /* CONFIG_PPC_FSL_BOOK3E */
  88
  89static unsigned long long period_to_sec(unsigned int period)
  90{
  91        return period;
  92}
  93
  94static unsigned int sec_to_period(unsigned int secs)
  95{
  96        return secs;
  97}
  98
  99#define MAX_WDT_TIMEOUT         3       /* from Kconfig */
 100
 101#endif /* !CONFIG_PPC_FSL_BOOK3E */
 102
 103static void __booke_wdt_set(void *data)
 104{
 105        u32 val;
 106
 107        val = mfspr(SPRN_TCR);
 108        val &= ~WDTP_MASK;
 109        val |= WDTP(booke_wdt_period);
 110
 111        mtspr(SPRN_TCR, val);
 112}
 113
 114static void booke_wdt_set(void)
 115{
 116        on_each_cpu(__booke_wdt_set, NULL, 0);
 117}
 118
 119static void __booke_wdt_ping(void *data)
 120{
 121        mtspr(SPRN_TSR, TSR_ENW|TSR_WIS);
 122}
 123
 124static int booke_wdt_ping(struct watchdog_device *wdog)
 125{
 126        on_each_cpu(__booke_wdt_ping, NULL, 0);
 127
 128        return 0;
 129}
 130
 131static void __booke_wdt_enable(void *data)
 132{
 133        u32 val;
 134
 135        /* clear status before enabling watchdog */
 136        __booke_wdt_ping(NULL);
 137        val = mfspr(SPRN_TCR);
 138        val &= ~WDTP_MASK;
 139        val |= (TCR_WIE|TCR_WRC(WRC_CHIP)|WDTP(booke_wdt_period));
 140
 141#ifdef CONFIG_PPC_BOOK3E_64
 142        /*
 143         * Crit ints are currently broken on PPC64 Book-E, so
 144         * just disable them for now.
 145         */
 146        val &= ~TCR_WIE;
 147#endif
 148
 149        mtspr(SPRN_TCR, val);
 150}
 151
 152/**
 153 * booke_wdt_disable - disable the watchdog on the given CPU
 154 *
 155 * This function is called on each CPU.  It disables the watchdog on that CPU.
 156 *
 157 * TCR[WRC] cannot be changed once it has been set to non-zero, but we can
 158 * effectively disable the watchdog by setting its period to the maximum value.
 159 */
 160static void __booke_wdt_disable(void *data)
 161{
 162        u32 val;
 163
 164        val = mfspr(SPRN_TCR);
 165        val &= ~(TCR_WIE | WDTP_MASK);
 166        mtspr(SPRN_TCR, val);
 167
 168        /* clear status to make sure nothing is pending */
 169        __booke_wdt_ping(NULL);
 170
 171}
 172
 173static void __booke_wdt_start(struct watchdog_device *wdog)
 174{
 175        on_each_cpu(__booke_wdt_enable, NULL, 0);
 176        pr_debug("watchdog enabled (timeout = %u sec)\n", wdog->timeout);
 177}
 178
 179static int booke_wdt_start(struct watchdog_device *wdog)
 180{
 181        if (booke_wdt_enabled == 0) {
 182                booke_wdt_enabled = 1;
 183                __booke_wdt_start(wdog);
 184        }
 185        return 0;
 186}
 187
 188static int booke_wdt_stop(struct watchdog_device *wdog)
 189{
 190        on_each_cpu(__booke_wdt_disable, NULL, 0);
 191        booke_wdt_enabled = 0;
 192        pr_debug("watchdog disabled\n");
 193
 194        return 0;
 195}
 196
 197static int booke_wdt_set_timeout(struct watchdog_device *wdt_dev,
 198                                 unsigned int timeout)
 199{
 200        if (timeout > MAX_WDT_TIMEOUT)
 201                return -EINVAL;
 202        booke_wdt_period = sec_to_period(timeout);
 203        wdt_dev->timeout = timeout;
 204        booke_wdt_set();
 205
 206        return 0;
 207}
 208
 209static struct watchdog_info booke_wdt_info = {
 210        .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
 211        .identity = "PowerPC Book-E Watchdog",
 212};
 213
 214static struct watchdog_ops booke_wdt_ops = {
 215        .owner = THIS_MODULE,
 216        .start = booke_wdt_start,
 217        .stop = booke_wdt_stop,
 218        .ping = booke_wdt_ping,
 219        .set_timeout = booke_wdt_set_timeout,
 220};
 221
 222static struct watchdog_device booke_wdt_dev = {
 223        .info = &booke_wdt_info,
 224        .ops = &booke_wdt_ops,
 225        .min_timeout = 1,
 226        .max_timeout = 0xFFFF
 227};
 228
 229static void __exit booke_wdt_exit(void)
 230{
 231        watchdog_unregister_device(&booke_wdt_dev);
 232}
 233
 234static int __init booke_wdt_init(void)
 235{
 236        int ret = 0;
 237        bool nowayout = WATCHDOG_NOWAYOUT;
 238
 239        pr_info("powerpc book-e watchdog driver loaded\n");
 240        booke_wdt_info.firmware_version = cur_cpu_spec->pvr_value;
 241        booke_wdt_set_timeout(&booke_wdt_dev,
 242                              period_to_sec(CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT));
 243        watchdog_set_nowayout(&booke_wdt_dev, nowayout);
 244        if (booke_wdt_enabled)
 245                __booke_wdt_start(&booke_wdt_dev);
 246
 247        ret = watchdog_register_device(&booke_wdt_dev);
 248
 249        return ret;
 250}
 251
 252module_init(booke_wdt_init);
 253module_exit(booke_wdt_exit);
 254
 255MODULE_DESCRIPTION("PowerPC Book-E watchdog driver");
 256MODULE_LICENSE("GPL");
 257
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