linux/drivers/regulator/da9210-regulator.h
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   1
   2/*
   3 * da9210-regulator.h - Regulator definitions for DA9210
   4 * Copyright (C) 2013  Dialog Semiconductor Ltd.
   5 *
   6 * This library is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU Library General Public
   8 * License as published by the Free Software Foundation; either
   9 * version 2 of the License, or (at your option) any later version.
  10 *
  11 * This library is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14 * Library General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU Library General Public
  17 * License along with this library; if not, write to the
  18 * Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
  19 * Boston, MA  02110-1301, USA.
  20 */
  21
  22#ifndef __DA9210_REGISTERS_H__
  23#define __DA9210_REGISTERS_H__
  24
  25struct da9210_pdata {
  26        struct regulator_init_data da9210_constraints;
  27};
  28
  29/* Page selection */
  30#define DA9210_REG_PAGE_CON                     0x00
  31
  32/* System Control and Event Registers */
  33#define DA9210_REG_STATUS_A                     0x50
  34#define DA9210_REG_STATUS_B                     0x51
  35#define DA9210_REG_EVENT_A                      0x52
  36#define DA9210_REG_EVENT_B                      0x53
  37#define DA9210_REG_MASK_A                       0x54
  38#define DA9210_REG_MASK_B                       0x55
  39#define DA9210_REG_CONTROL_A                    0x56
  40
  41/* GPIO Control Registers */
  42#define DA9210_REG_GPIO_0_1                     0x58
  43#define DA9210_REG_GPIO_2_3                     0x59
  44#define DA9210_REG_GPIO_4_5                     0x5A
  45#define DA9210_REG_GPIO_6                       0x5B
  46
  47/* Regulator Registers */
  48#define DA9210_REG_BUCK_CONT                    0x5D
  49#define DA9210_REG_BUCK_ILIM                    0xD0
  50#define DA9210_REG_BUCK_CONF1                   0xD1
  51#define DA9210_REG_BUCK_CONF2                   0xD2
  52#define DA9210_REG_VBACK_AUTO                   0xD4
  53#define DA9210_REG_VBACK_BASE                   0xD5
  54#define DA9210_REG_VBACK_MAX_DVC_IF             0xD6
  55#define DA9210_REG_VBACK_DVC                    0xD7
  56#define DA9210_REG_VBUCK_A                      0xD8
  57#define DA9210_REG_VBUCK_B                      0xD9
  58
  59/* I2C Interface Settings */
  60#define DA9210_REG_INTERFACE                    0x105
  61
  62/* OTP */
  63#define DA9210_REG_OPT_COUNT                    0x140
  64#define DA9210_REG_OPT_ADDR                     0x141
  65#define DA9210_REG_OPT_DATA                     0x142
  66
  67/* Customer Trim and Configuration */
  68#define DA9210_REG_CONFIG_A                     0x143
  69#define DA9210_REG_CONFIG_B                     0x144
  70#define DA9210_REG_CONFIG_C                     0x145
  71#define DA9210_REG_CONFIG_D                     0x146
  72#define DA9210_REG_CONFIG_E                     0x147
  73
  74
  75/*
  76 * Registers bits
  77 */
  78/* DA9210_REG_PAGE_CON (addr=0x00) */
  79#define DA9210_PEG_PAGE_SHIFT                   0
  80#define DA9210_REG_PAGE_MASK                    0x0F
  81/* On I2C registers 0x00 - 0xFF */
  82#define DA9210_REG_PAGE0                        0
  83/* On I2C registers 0x100 - 0x1FF */
  84#define DA9210_REG_PAGE2                        2
  85#define DA9210_PAGE_WRITE_MODE                  0x00
  86#define DA9210_REPEAT_WRITE_MODE                0x40
  87#define DA9210_PAGE_REVERT                      0x80
  88
  89/* DA9210_REG_STATUS_A (addr=0x50) */
  90#define DA9210_GPI0                             0x01
  91#define DA9210_GPI1                             0x02
  92#define DA9210_GPI2                             0x04
  93#define DA9210_GPI3                             0x08
  94#define DA9210_GPI4                             0x10
  95#define DA9210_GPI5                             0x20
  96#define DA9210_GPI6                             0x40
  97
  98/* DA9210_REG_EVENT_A (addr=0x52) */
  99#define DA9210_E_GPI0                           0x01
 100#define DA9210_E_GPI1                           0x02
 101#define DA9210_E_GPI2                           0x04
 102#define DA9210_E_GPI3                           0x08
 103#define DA9210_E_GPI4                           0x10
 104#define DA9210_E_GPI5                           0x20
 105#define DA9210_E_GPI6                           0x40
 106
 107/* DA9210_REG_EVENT_B (addr=0x53) */
 108#define DA9210_E_OVCURR                         0x01
 109#define DA9210_E_NPWRGOOD                       0x02
 110#define DA9210_E_TEMP_WARN                      0x04
 111#define DA9210_E_TEMP_CRIT                      0x08
 112#define DA9210_E_VMAX                           0x10
 113
 114/* DA9210_REG_MASK_A (addr=0x54) */
 115#define DA9210_M_GPI0                           0x01
 116#define DA9210_M_GPI1                           0x02
 117#define DA9210_M_GPI2                           0x04
 118#define DA9210_M_GPI3                           0x08
 119#define DA9210_M_GPI4                           0x10
 120#define DA9210_M_GPI5                           0x20
 121#define DA9210_M_GPI6                           0x40
 122
 123/* DA9210_REG_MASK_B (addr=0x55) */
 124#define DA9210_M_OVCURR                         0x01
 125#define DA9210_M_NPWRGOOD                       0x02
 126#define DA9210_M_TEMP_WARN                      0x04
 127#define DA9210_M_TEMP_CRIT                      0x08
 128#define DA9210_M_VMAX                           0x10
 129
 130/* DA9210_REG_CONTROL_A (addr=0x56) */
 131#define DA9210_DEBOUNCING_SHIFT                 0
 132#define DA9210_DEBOUNCING_MASK                  0x07
 133#define DA9210_SLEW_RATE_SHIFT                  3
 134#define DA9210_SLEW_RATE_MASK                   0x18
 135#define DA9210_V_LOCK                           0x20
 136
 137/* DA9210_REG_GPIO_0_1 (addr=0x58) */
 138#define DA9210_GPIO0_PIN_SHIFT                  0
 139#define DA9210_GPIO0_PIN_MASK                   0x03
 140#define         DA9210_GPIO0_PIN_GPI            0x00
 141#define         DA9210_GPIO0_PIN_GPO_OD         0x02
 142#define         DA9210_GPIO0_PIN_GPO            0x03
 143#define DA9210_GPIO0_TYPE                       0x04
 144#define         DA9210_GPIO0_TYPE_GPI           0x00
 145#define         DA9210_GPIO0_TYPE_GPO           0x04
 146#define DA9210_GPIO0_MODE                       0x08
 147#define DA9210_GPIO1_PIN_SHIFT                  4
 148#define DA9210_GPIO1_PIN_MASK                   0x30
 149#define         DA9210_GPIO1_PIN_GPI            0x00
 150#define         DA9210_GPIO1_PIN_VERROR         0x10
 151#define         DA9210_GPIO1_PIN_GPO_OD         0x20
 152#define         DA9210_GPIO1_PIN_GPO            0x30
 153#define DA9210_GPIO1_TYPE_SHIFT                 0x40
 154#define         DA9210_GPIO1_TYPE_GPI           0x00
 155#define         DA9210_GPIO1_TYPE_GPO           0x40
 156#define DA9210_GPIO1_MODE                       0x80
 157
 158/* DA9210_REG_GPIO_2_3 (addr=0x59) */
 159#define DA9210_GPIO2_PIN_SHIFT                  0
 160#define DA9210_GPIO2_PIN_MASK                   0x03
 161#define         DA9210_GPIO2_PIN_GPI            0x00
 162#define         DA9210_GPIO5_PIN_BUCK_CLK       0x10
 163#define         DA9210_GPIO2_PIN_GPO_OD         0x02
 164#define         DA9210_GPIO2_PIN_GPO            0x03
 165#define DA9210_GPIO2_TYPE                       0x04
 166#define         DA9210_GPIO2_TYPE_GPI           0x00
 167#define         DA9210_GPIO2_TYPE_GPO           0x04
 168#define DA9210_GPIO2_MODE                       0x08
 169#define DA9210_GPIO3_PIN_SHIFT                  4
 170#define DA9210_GPIO3_PIN_MASK                   0x30
 171#define         DA9210_GPIO3_PIN_GPI            0x00
 172#define         DA9210_GPIO3_PIN_IERROR         0x10
 173#define         DA9210_GPIO3_PIN_GPO_OD         0x20
 174#define         DA9210_GPIO3_PIN_GPO            0x30
 175#define DA9210_GPIO3_TYPE_SHIFT                 0x40
 176#define         DA9210_GPIO3_TYPE_GPI           0x00
 177#define         DA9210_GPIO3_TYPE_GPO           0x40
 178#define DA9210_GPIO3_MODE                       0x80
 179
 180/* DA9210_REG_GPIO_4_5 (addr=0x5A) */
 181#define DA9210_GPIO4_PIN_SHIFT                  0
 182#define DA9210_GPIO4_PIN_MASK                   0x03
 183#define         DA9210_GPIO4_PIN_GPI            0x00
 184#define         DA9210_GPIO4_PIN_GPO_OD         0x02
 185#define         DA9210_GPIO4_PIN_GPO            0x03
 186#define DA9210_GPIO4_TYPE                       0x04
 187#define         DA9210_GPIO4_TYPE_GPI           0x00
 188#define         DA9210_GPIO4_TYPE_GPO           0x04
 189#define DA9210_GPIO4_MODE                       0x08
 190#define DA9210_GPIO5_PIN_SHIFT                  4
 191#define DA9210_GPIO5_PIN_MASK                   0x30
 192#define         DA9210_GPIO5_PIN_GPI            0x00
 193#define         DA9210_GPIO5_PIN_INTERFACE      0x01
 194#define         DA9210_GPIO5_PIN_GPO_OD         0x20
 195#define         DA9210_GPIO5_PIN_GPO            0x30
 196#define DA9210_GPIO5_TYPE_SHIFT                 0x40
 197#define         DA9210_GPIO5_TYPE_GPI           0x00
 198#define         DA9210_GPIO5_TYPE_GPO           0x40
 199#define DA9210_GPIO5_MODE                       0x80
 200
 201/* DA9210_REG_GPIO_6 (addr=0x5B) */
 202#define DA9210_GPIO6_PIN_SHIFT                  0
 203#define DA9210_GPIO6_PIN_MASK                   0x03
 204#define         DA9210_GPIO6_PIN_GPI            0x00
 205#define         DA9210_GPIO6_PIN_INTERFACE      0x01
 206#define         DA9210_GPIO6_PIN_GPO_OD         0x02
 207#define         DA9210_GPIO6_PIN_GPO            0x03
 208#define DA9210_GPIO6_TYPE                       0x04
 209#define         DA9210_GPIO6_TYPE_GPI           0x00
 210#define         DA9210_GPIO6_TYPE_GPO           0x04
 211#define DA9210_GPIO6_MODE                       0x08
 212
 213/* DA9210_REG_BUCK_CONT (addr=0x5D) */
 214#define DA9210_BUCK_EN                          0x01
 215#define DA9210_BUCK_GPI_SHIFT                   1
 216#define DA9210_BUCK_GPI_MASK                    0x06
 217#define         DA9210_BUCK_GPI_OFF             0x00
 218#define         DA9210_BUCK_GPI_GPIO0           0x02
 219#define         DA9210_BUCK_GPI_GPIO3           0x04
 220#define         DA9210_BUCK_GPI_GPIO4           0x06
 221#define DA9210_BUCK_PD_DIS                      0x08
 222#define DA9210_VBUCK_SEL                        0x10
 223#define         DA9210_VBUCK_SEL_A              0x00
 224#define         DA9210_VBUCK_SEL_B              0x10
 225#define DA9210_VBUCK_GPI_SHIFT                  5
 226#define DA9210_VBUCK_GPI_MASK                   0x60
 227#define         DA9210_VBUCK_GPI_OFF            0x00
 228#define         DA9210_VBUCK_GPI_GPIO0          0x20
 229#define         DA9210_VBUCK_GPI_GPIO3          0x40
 230#define         DA9210_VBUCK_GPI_GPIO4          0x60
 231#define DA9210_DVC_CTRL_EN                      0x80
 232
 233/* DA9210_REG_BUCK_ILIM (addr=0xD0) */
 234#define DA9210_BUCK_ILIM_SHIFT                  0
 235#define DA9210_BUCK_ILIM_MASK                   0x0F
 236#define DA9210_BUCK_IALARM                      0x10
 237
 238/* DA9210_REG_BUCK_CONF1 (addr=0xD1) */
 239#define DA9210_BUCK_MODE_SHIFT                  0
 240#define DA9210_BUCK_MODE_MASK                   0x03
 241#define         DA9210_BUCK_MODE_MANUAL         0x00
 242#define         DA9210_BUCK_MODE_SLEEP          0x01
 243#define         DA9210_BUCK_MODE_SYNC           0x02
 244#define         DA9210_BUCK_MODE_AUTO           0x03
 245#define DA9210_STARTUP_CTRL_SHIFT               2
 246#define DA9210_STARTUP_CTRL_MASK                0x1C
 247#define DA9210_PWR_DOWN_CTRL_SHIFT              5
 248#define DA9210_PWR_DOWN_CTRL_MASK               0xE0
 249
 250/* DA9210_REG_BUCK_CONF2 (addr=0xD2) */
 251#define DA9210_PHASE_SEL_SHIFT                  0
 252#define DA9210_PHASE_SEL_MASK                   0x03
 253#define DA9210_FREQ_SEL                         0x40
 254
 255/* DA9210_REG_BUCK_AUTO (addr=0xD4) */
 256#define DA9210_VBUCK_AUTO_SHIFT                 0
 257#define DA9210_VBUCK_AUTO_MASK                  0x7F
 258
 259/* DA9210_REG_BUCK_BASE (addr=0xD5) */
 260#define DA9210_VBUCK_BASE_SHIFT                 0
 261#define DA9210_VBUCK_BASE_MASK                  0x7F
 262
 263/* DA9210_REG_VBUCK_MAX_DVC_IF (addr=0xD6) */
 264#define DA9210_VBUCK_MAX_SHIFT                  0
 265#define DA9210_VBUCK_MAX_MASK                   0x7F
 266#define DA9210_DVC_STEP_SIZE                    0x80
 267#define         DA9210_DVC_STEP_SIZE_10MV       0x00
 268#define         DA9210_DVC_STEP_SIZE_20MV       0x80
 269
 270/* DA9210_REG_VBUCK_DVC (addr=0xD7) */
 271#define DA9210_VBUCK_DVC_SHIFT                  0
 272#define DA9210_VBUCK_DVC_MASK                   0x7F
 273
 274/* DA9210_REG_VBUCK_A/B (addr=0xD8/0xD9) */
 275#define DA9210_VBUCK_SHIFT                      0
 276#define DA9210_VBUCK_MASK                       0x7F
 277#define DA9210_VBUCK_BIAS                       0
 278#define DA9210_BUCK_SL                          0x80
 279
 280/* DA9210_REG_INTERFACE (addr=0x105) */
 281#define DA9210_IF_BASE_ADDR_SHIFT               4
 282#define DA9210_IF_BASE_ADDR_MASK                0xF0
 283
 284/* DA9210_REG_CONFIG_E (addr=0x147) */
 285#define DA9210_STAND_ALONE                      0x01
 286
 287#endif  /* __DA9210_REGISTERS_H__ */
 288
 289
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