linux/drivers/pinctrl/pinctrl-single.c
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   1/*
   2 * Generic device tree based pinctrl driver for one register per pin
   3 * type pinmux controllers
   4 *
   5 * Copyright (C) 2012 Texas Instruments, Inc.
   6 *
   7 * This file is licensed under the terms of the GNU General Public
   8 * License version 2. This program is licensed "as is" without any
   9 * warranty of any kind, whether express or implied.
  10 */
  11
  12#include <linux/init.h>
  13#include <linux/module.h>
  14#include <linux/io.h>
  15#include <linux/slab.h>
  16#include <linux/err.h>
  17#include <linux/list.h>
  18
  19#include <linux/of.h>
  20#include <linux/of_device.h>
  21#include <linux/of_address.h>
  22
  23#include <linux/pinctrl/pinctrl.h>
  24#include <linux/pinctrl/pinmux.h>
  25#include <linux/pinctrl/pinconf-generic.h>
  26
  27#include "core.h"
  28#include "pinconf.h"
  29
  30#define DRIVER_NAME                     "pinctrl-single"
  31#define PCS_MUX_PINS_NAME               "pinctrl-single,pins"
  32#define PCS_MUX_BITS_NAME               "pinctrl-single,bits"
  33#define PCS_REG_NAME_LEN                ((sizeof(unsigned long) * 2) + 3)
  34#define PCS_OFF_DISABLED                ~0U
  35
  36/**
  37 * struct pcs_pingroup - pingroups for a function
  38 * @np:         pingroup device node pointer
  39 * @name:       pingroup name
  40 * @gpins:      array of the pins in the group
  41 * @ngpins:     number of pins in the group
  42 * @node:       list node
  43 */
  44struct pcs_pingroup {
  45        struct device_node *np;
  46        const char *name;
  47        int *gpins;
  48        int ngpins;
  49        struct list_head node;
  50};
  51
  52/**
  53 * struct pcs_func_vals - mux function register offset and value pair
  54 * @reg:        register virtual address
  55 * @val:        register value
  56 */
  57struct pcs_func_vals {
  58        void __iomem *reg;
  59        unsigned val;
  60        unsigned mask;
  61};
  62
  63/**
  64 * struct pcs_conf_vals - pinconf parameter, pinconf register offset
  65 * and value, enable, disable, mask
  66 * @param:      config parameter
  67 * @val:        user input bits in the pinconf register
  68 * @enable:     enable bits in the pinconf register
  69 * @disable:    disable bits in the pinconf register
  70 * @mask:       mask bits in the register value
  71 */
  72struct pcs_conf_vals {
  73        enum pin_config_param param;
  74        unsigned val;
  75        unsigned enable;
  76        unsigned disable;
  77        unsigned mask;
  78};
  79
  80/**
  81 * struct pcs_conf_type - pinconf property name, pinconf param pair
  82 * @name:       property name in DTS file
  83 * @param:      config parameter
  84 */
  85struct pcs_conf_type {
  86        const char *name;
  87        enum pin_config_param param;
  88};
  89
  90/**
  91 * struct pcs_function - pinctrl function
  92 * @name:       pinctrl function name
  93 * @vals:       register and vals array
  94 * @nvals:      number of entries in vals array
  95 * @pgnames:    array of pingroup names the function uses
  96 * @npgnames:   number of pingroup names the function uses
  97 * @node:       list node
  98 */
  99struct pcs_function {
 100        const char *name;
 101        struct pcs_func_vals *vals;
 102        unsigned nvals;
 103        const char **pgnames;
 104        int npgnames;
 105        struct pcs_conf_vals *conf;
 106        int nconfs;
 107        struct list_head node;
 108};
 109
 110/**
 111 * struct pcs_gpiofunc_range - pin ranges with same mux value of gpio function
 112 * @offset:     offset base of pins
 113 * @npins:      number pins with the same mux value of gpio function
 114 * @gpiofunc:   mux value of gpio function
 115 * @node:       list node
 116 */
 117struct pcs_gpiofunc_range {
 118        unsigned offset;
 119        unsigned npins;
 120        unsigned gpiofunc;
 121        struct list_head node;
 122};
 123
 124/**
 125 * struct pcs_data - wrapper for data needed by pinctrl framework
 126 * @pa:         pindesc array
 127 * @cur:        index to current element
 128 *
 129 * REVISIT: We should be able to drop this eventually by adding
 130 * support for registering pins individually in the pinctrl
 131 * framework for those drivers that don't need a static array.
 132 */
 133struct pcs_data {
 134        struct pinctrl_pin_desc *pa;
 135        int cur;
 136};
 137
 138/**
 139 * struct pcs_name - register name for a pin
 140 * @name:       name of the pinctrl register
 141 *
 142 * REVISIT: We may want to make names optional in the pinctrl
 143 * framework as some drivers may not care about pin names to
 144 * avoid kernel bloat. The pin names can be deciphered by user
 145 * space tools using debugfs based on the register address and
 146 * SoC packaging information.
 147 */
 148struct pcs_name {
 149        char name[PCS_REG_NAME_LEN];
 150};
 151
 152/**
 153 * struct pcs_device - pinctrl device instance
 154 * @res:        resources
 155 * @base:       virtual address of the controller
 156 * @size:       size of the ioremapped area
 157 * @dev:        device entry
 158 * @pctl:       pin controller device
 159 * @mutex:      mutex protecting the lists
 160 * @width:      bits per mux register
 161 * @fmask:      function register mask
 162 * @fshift:     function register shift
 163 * @foff:       value to turn mux off
 164 * @fmax:       max number of functions in fmask
 165 * @is_pinconf: whether supports pinconf
 166 * @bits_per_pin:number of bits per pin
 167 * @names:      array of register names for pins
 168 * @pins:       physical pins on the SoC
 169 * @pgtree:     pingroup index radix tree
 170 * @ftree:      function index radix tree
 171 * @pingroups:  list of pingroups
 172 * @functions:  list of functions
 173 * @gpiofuncs:  list of gpio functions
 174 * @ngroups:    number of pingroups
 175 * @nfuncs:     number of functions
 176 * @desc:       pin controller descriptor
 177 * @read:       register read function to use
 178 * @write:      register write function to use
 179 */
 180struct pcs_device {
 181        struct resource *res;
 182        void __iomem *base;
 183        unsigned size;
 184        struct device *dev;
 185        struct pinctrl_dev *pctl;
 186        struct mutex mutex;
 187        unsigned width;
 188        unsigned fmask;
 189        unsigned fshift;
 190        unsigned foff;
 191        unsigned fmax;
 192        bool bits_per_mux;
 193        bool is_pinconf;
 194        unsigned bits_per_pin;
 195        struct pcs_name *names;
 196        struct pcs_data pins;
 197        struct radix_tree_root pgtree;
 198        struct radix_tree_root ftree;
 199        struct list_head pingroups;
 200        struct list_head functions;
 201        struct list_head gpiofuncs;
 202        unsigned ngroups;
 203        unsigned nfuncs;
 204        struct pinctrl_desc desc;
 205        unsigned (*read)(void __iomem *reg);
 206        void (*write)(unsigned val, void __iomem *reg);
 207};
 208
 209static int pcs_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
 210                           unsigned long *config);
 211static int pcs_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
 212                           unsigned long *configs, unsigned num_configs);
 213
 214static enum pin_config_param pcs_bias[] = {
 215        PIN_CONFIG_BIAS_PULL_DOWN,
 216        PIN_CONFIG_BIAS_PULL_UP,
 217};
 218
 219/*
 220 * REVISIT: Reads and writes could eventually use regmap or something
 221 * generic. But at least on omaps, some mux registers are performance
 222 * critical as they may need to be remuxed every time before and after
 223 * idle. Adding tests for register access width for every read and
 224 * write like regmap is doing is not desired, and caching the registers
 225 * does not help in this case.
 226 */
 227
 228static unsigned __maybe_unused pcs_readb(void __iomem *reg)
 229{
 230        return readb(reg);
 231}
 232
 233static unsigned __maybe_unused pcs_readw(void __iomem *reg)
 234{
 235        return readw(reg);
 236}
 237
 238static unsigned __maybe_unused pcs_readl(void __iomem *reg)
 239{
 240        return readl(reg);
 241}
 242
 243static void __maybe_unused pcs_writeb(unsigned val, void __iomem *reg)
 244{
 245        writeb(val, reg);
 246}
 247
 248static void __maybe_unused pcs_writew(unsigned val, void __iomem *reg)
 249{
 250        writew(val, reg);
 251}
 252
 253static void __maybe_unused pcs_writel(unsigned val, void __iomem *reg)
 254{
 255        writel(val, reg);
 256}
 257
 258static int pcs_get_groups_count(struct pinctrl_dev *pctldev)
 259{
 260        struct pcs_device *pcs;
 261
 262        pcs = pinctrl_dev_get_drvdata(pctldev);
 263
 264        return pcs->ngroups;
 265}
 266
 267static const char *pcs_get_group_name(struct pinctrl_dev *pctldev,
 268                                        unsigned gselector)
 269{
 270        struct pcs_device *pcs;
 271        struct pcs_pingroup *group;
 272
 273        pcs = pinctrl_dev_get_drvdata(pctldev);
 274        group = radix_tree_lookup(&pcs->pgtree, gselector);
 275        if (!group) {
 276                dev_err(pcs->dev, "%s could not find pingroup%i\n",
 277                        __func__, gselector);
 278                return NULL;
 279        }
 280
 281        return group->name;
 282}
 283
 284static int pcs_get_group_pins(struct pinctrl_dev *pctldev,
 285                                        unsigned gselector,
 286                                        const unsigned **pins,
 287                                        unsigned *npins)
 288{
 289        struct pcs_device *pcs;
 290        struct pcs_pingroup *group;
 291
 292        pcs = pinctrl_dev_get_drvdata(pctldev);
 293        group = radix_tree_lookup(&pcs->pgtree, gselector);
 294        if (!group) {
 295                dev_err(pcs->dev, "%s could not find pingroup%i\n",
 296                        __func__, gselector);
 297                return -EINVAL;
 298        }
 299
 300        *pins = group->gpins;
 301        *npins = group->ngpins;
 302
 303        return 0;
 304}
 305
 306static void pcs_pin_dbg_show(struct pinctrl_dev *pctldev,
 307                                        struct seq_file *s,
 308                                        unsigned pin)
 309{
 310        struct pcs_device *pcs;
 311        unsigned val, mux_bytes;
 312
 313        pcs = pinctrl_dev_get_drvdata(pctldev);
 314
 315        mux_bytes = pcs->width / BITS_PER_BYTE;
 316        val = pcs->read(pcs->base + pin * mux_bytes);
 317
 318        seq_printf(s, "%08x %s " , val, DRIVER_NAME);
 319}
 320
 321static void pcs_dt_free_map(struct pinctrl_dev *pctldev,
 322                                struct pinctrl_map *map, unsigned num_maps)
 323{
 324        struct pcs_device *pcs;
 325
 326        pcs = pinctrl_dev_get_drvdata(pctldev);
 327        devm_kfree(pcs->dev, map);
 328}
 329
 330static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev,
 331                                struct device_node *np_config,
 332                                struct pinctrl_map **map, unsigned *num_maps);
 333
 334static const struct pinctrl_ops pcs_pinctrl_ops = {
 335        .get_groups_count = pcs_get_groups_count,
 336        .get_group_name = pcs_get_group_name,
 337        .get_group_pins = pcs_get_group_pins,
 338        .pin_dbg_show = pcs_pin_dbg_show,
 339        .dt_node_to_map = pcs_dt_node_to_map,
 340        .dt_free_map = pcs_dt_free_map,
 341};
 342
 343static int pcs_get_functions_count(struct pinctrl_dev *pctldev)
 344{
 345        struct pcs_device *pcs;
 346
 347        pcs = pinctrl_dev_get_drvdata(pctldev);
 348
 349        return pcs->nfuncs;
 350}
 351
 352static const char *pcs_get_function_name(struct pinctrl_dev *pctldev,
 353                                                unsigned fselector)
 354{
 355        struct pcs_device *pcs;
 356        struct pcs_function *func;
 357
 358        pcs = pinctrl_dev_get_drvdata(pctldev);
 359        func = radix_tree_lookup(&pcs->ftree, fselector);
 360        if (!func) {
 361                dev_err(pcs->dev, "%s could not find function%i\n",
 362                        __func__, fselector);
 363                return NULL;
 364        }
 365
 366        return func->name;
 367}
 368
 369static int pcs_get_function_groups(struct pinctrl_dev *pctldev,
 370                                        unsigned fselector,
 371                                        const char * const **groups,
 372                                        unsigned * const ngroups)
 373{
 374        struct pcs_device *pcs;
 375        struct pcs_function *func;
 376
 377        pcs = pinctrl_dev_get_drvdata(pctldev);
 378        func = radix_tree_lookup(&pcs->ftree, fselector);
 379        if (!func) {
 380                dev_err(pcs->dev, "%s could not find function%i\n",
 381                        __func__, fselector);
 382                return -EINVAL;
 383        }
 384        *groups = func->pgnames;
 385        *ngroups = func->npgnames;
 386
 387        return 0;
 388}
 389
 390static int pcs_get_function(struct pinctrl_dev *pctldev, unsigned pin,
 391                            struct pcs_function **func)
 392{
 393        struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev);
 394        struct pin_desc *pdesc = pin_desc_get(pctldev, pin);
 395        const struct pinctrl_setting_mux *setting;
 396        unsigned fselector;
 397
 398        /* If pin is not described in DTS & enabled, mux_setting is NULL. */
 399        setting = pdesc->mux_setting;
 400        if (!setting)
 401                return -ENOTSUPP;
 402        fselector = setting->func;
 403        *func = radix_tree_lookup(&pcs->ftree, fselector);
 404        if (!(*func)) {
 405                dev_err(pcs->dev, "%s could not find function%i\n",
 406                        __func__, fselector);
 407                return -ENOTSUPP;
 408        }
 409        return 0;
 410}
 411
 412static int pcs_enable(struct pinctrl_dev *pctldev, unsigned fselector,
 413        unsigned group)
 414{
 415        struct pcs_device *pcs;
 416        struct pcs_function *func;
 417        int i;
 418
 419        pcs = pinctrl_dev_get_drvdata(pctldev);
 420        /* If function mask is null, needn't enable it. */
 421        if (!pcs->fmask)
 422                return 0;
 423        func = radix_tree_lookup(&pcs->ftree, fselector);
 424        if (!func)
 425                return -EINVAL;
 426
 427        dev_dbg(pcs->dev, "enabling %s function%i\n",
 428                func->name, fselector);
 429
 430        for (i = 0; i < func->nvals; i++) {
 431                struct pcs_func_vals *vals;
 432                unsigned val, mask;
 433
 434                vals = &func->vals[i];
 435                val = pcs->read(vals->reg);
 436
 437                if (pcs->bits_per_mux)
 438                        mask = vals->mask;
 439                else
 440                        mask = pcs->fmask;
 441
 442                val &= ~mask;
 443                val |= (vals->val & mask);
 444                pcs->write(val, vals->reg);
 445        }
 446
 447        return 0;
 448}
 449
 450static void pcs_disable(struct pinctrl_dev *pctldev, unsigned fselector,
 451                                        unsigned group)
 452{
 453        struct pcs_device *pcs;
 454        struct pcs_function *func;
 455        int i;
 456
 457        pcs = pinctrl_dev_get_drvdata(pctldev);
 458        /* If function mask is null, needn't disable it. */
 459        if (!pcs->fmask)
 460                return;
 461
 462        func = radix_tree_lookup(&pcs->ftree, fselector);
 463        if (!func) {
 464                dev_err(pcs->dev, "%s could not find function%i\n",
 465                        __func__, fselector);
 466                return;
 467        }
 468
 469        /*
 470         * Ignore disable if function-off is not specified. Some hardware
 471         * does not have clearly defined disable function. For pin specific
 472         * off modes, you can use alternate named states as described in
 473         * pinctrl-bindings.txt.
 474         */
 475        if (pcs->foff == PCS_OFF_DISABLED) {
 476                dev_dbg(pcs->dev, "ignoring disable for %s function%i\n",
 477                        func->name, fselector);
 478                return;
 479        }
 480
 481        dev_dbg(pcs->dev, "disabling function%i %s\n",
 482                fselector, func->name);
 483
 484        for (i = 0; i < func->nvals; i++) {
 485                struct pcs_func_vals *vals;
 486                unsigned val;
 487
 488                vals = &func->vals[i];
 489                val = pcs->read(vals->reg);
 490                val &= ~pcs->fmask;
 491                val |= pcs->foff << pcs->fshift;
 492                pcs->write(val, vals->reg);
 493        }
 494}
 495
 496static int pcs_request_gpio(struct pinctrl_dev *pctldev,
 497                            struct pinctrl_gpio_range *range, unsigned pin)
 498{
 499        struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev);
 500        struct pcs_gpiofunc_range *frange = NULL;
 501        struct list_head *pos, *tmp;
 502        int mux_bytes = 0;
 503        unsigned data;
 504
 505        /* If function mask is null, return directly. */
 506        if (!pcs->fmask)
 507                return -ENOTSUPP;
 508
 509        list_for_each_safe(pos, tmp, &pcs->gpiofuncs) {
 510                frange = list_entry(pos, struct pcs_gpiofunc_range, node);
 511                if (pin >= frange->offset + frange->npins
 512                        || pin < frange->offset)
 513                        continue;
 514                mux_bytes = pcs->width / BITS_PER_BYTE;
 515                data = pcs->read(pcs->base + pin * mux_bytes) & ~pcs->fmask;
 516                data |= frange->gpiofunc;
 517                pcs->write(data, pcs->base + pin * mux_bytes);
 518                break;
 519        }
 520        return 0;
 521}
 522
 523static const struct pinmux_ops pcs_pinmux_ops = {
 524        .get_functions_count = pcs_get_functions_count,
 525        .get_function_name = pcs_get_function_name,
 526        .get_function_groups = pcs_get_function_groups,
 527        .enable = pcs_enable,
 528        .disable = pcs_disable,
 529        .gpio_request_enable = pcs_request_gpio,
 530};
 531
 532/* Clear BIAS value */
 533static void pcs_pinconf_clear_bias(struct pinctrl_dev *pctldev, unsigned pin)
 534{
 535        unsigned long config;
 536        int i;
 537        for (i = 0; i < ARRAY_SIZE(pcs_bias); i++) {
 538                config = pinconf_to_config_packed(pcs_bias[i], 0);
 539                pcs_pinconf_set(pctldev, pin, &config, 1);
 540        }
 541}
 542
 543/*
 544 * Check whether PIN_CONFIG_BIAS_DISABLE is valid.
 545 * It's depend on that PULL_DOWN & PULL_UP configs are all invalid.
 546 */
 547static bool pcs_pinconf_bias_disable(struct pinctrl_dev *pctldev, unsigned pin)
 548{
 549        unsigned long config;
 550        int i;
 551
 552        for (i = 0; i < ARRAY_SIZE(pcs_bias); i++) {
 553                config = pinconf_to_config_packed(pcs_bias[i], 0);
 554                if (!pcs_pinconf_get(pctldev, pin, &config))
 555                        goto out;
 556        }
 557        return true;
 558out:
 559        return false;
 560}
 561
 562static int pcs_pinconf_get(struct pinctrl_dev *pctldev,
 563                                unsigned pin, unsigned long *config)
 564{
 565        struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev);
 566        struct pcs_function *func;
 567        enum pin_config_param param;
 568        unsigned offset = 0, data = 0, i, j, ret;
 569
 570        ret = pcs_get_function(pctldev, pin, &func);
 571        if (ret)
 572                return ret;
 573
 574        for (i = 0; i < func->nconfs; i++) {
 575                param = pinconf_to_config_param(*config);
 576                if (param == PIN_CONFIG_BIAS_DISABLE) {
 577                        if (pcs_pinconf_bias_disable(pctldev, pin)) {
 578                                *config = 0;
 579                                return 0;
 580                        } else {
 581                                return -ENOTSUPP;
 582                        }
 583                } else if (param != func->conf[i].param) {
 584                        continue;
 585                }
 586
 587                offset = pin * (pcs->width / BITS_PER_BYTE);
 588                data = pcs->read(pcs->base + offset) & func->conf[i].mask;
 589                switch (func->conf[i].param) {
 590                /* 4 parameters */
 591                case PIN_CONFIG_BIAS_PULL_DOWN:
 592                case PIN_CONFIG_BIAS_PULL_UP:
 593                case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
 594                        if ((data != func->conf[i].enable) ||
 595                            (data == func->conf[i].disable))
 596                                return -ENOTSUPP;
 597                        *config = 0;
 598                        break;
 599                /* 2 parameters */
 600                case PIN_CONFIG_INPUT_SCHMITT:
 601                        for (j = 0; j < func->nconfs; j++) {
 602                                switch (func->conf[j].param) {
 603                                case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
 604                                        if (data != func->conf[j].enable)
 605                                                return -ENOTSUPP;
 606                                        break;
 607                                default:
 608                                        break;
 609                                }
 610                        }
 611                        *config = data;
 612                        break;
 613                case PIN_CONFIG_DRIVE_STRENGTH:
 614                case PIN_CONFIG_SLEW_RATE:
 615                default:
 616                        *config = data;
 617                        break;
 618                }
 619                return 0;
 620        }
 621        return -ENOTSUPP;
 622}
 623
 624static int pcs_pinconf_set(struct pinctrl_dev *pctldev,
 625                                unsigned pin, unsigned long *configs,
 626                                unsigned num_configs)
 627{
 628        struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev);
 629        struct pcs_function *func;
 630        unsigned offset = 0, shift = 0, i, data, ret;
 631        u16 arg;
 632        int j;
 633
 634        ret = pcs_get_function(pctldev, pin, &func);
 635        if (ret)
 636                return ret;
 637
 638        for (j = 0; j < num_configs; j++) {
 639                for (i = 0; i < func->nconfs; i++) {
 640                        if (pinconf_to_config_param(configs[j])
 641                                != func->conf[i].param)
 642                                continue;
 643
 644                        offset = pin * (pcs->width / BITS_PER_BYTE);
 645                        data = pcs->read(pcs->base + offset);
 646                        arg = pinconf_to_config_argument(configs[j]);
 647                        switch (func->conf[i].param) {
 648                        /* 2 parameters */
 649                        case PIN_CONFIG_INPUT_SCHMITT:
 650                        case PIN_CONFIG_DRIVE_STRENGTH:
 651                        case PIN_CONFIG_SLEW_RATE:
 652                                shift = ffs(func->conf[i].mask) - 1;
 653                                data &= ~func->conf[i].mask;
 654                                data |= (arg << shift) & func->conf[i].mask;
 655                                break;
 656                        /* 4 parameters */
 657                        case PIN_CONFIG_BIAS_DISABLE:
 658                                pcs_pinconf_clear_bias(pctldev, pin);
 659                                break;
 660                        case PIN_CONFIG_BIAS_PULL_DOWN:
 661                        case PIN_CONFIG_BIAS_PULL_UP:
 662                                if (arg)
 663                                        pcs_pinconf_clear_bias(pctldev, pin);
 664                                /* fall through */
 665                        case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
 666                                data &= ~func->conf[i].mask;
 667                                if (arg)
 668                                        data |= func->conf[i].enable;
 669                                else
 670                                        data |= func->conf[i].disable;
 671                                break;
 672                        default:
 673                                return -ENOTSUPP;
 674                        }
 675                        pcs->write(data, pcs->base + offset);
 676
 677                        break;
 678                }
 679                if (i >= func->nconfs)
 680                        return -ENOTSUPP;
 681        } /* for each config */
 682
 683        return 0;
 684}
 685
 686static int pcs_pinconf_group_get(struct pinctrl_dev *pctldev,
 687                                unsigned group, unsigned long *config)
 688{
 689        const unsigned *pins;
 690        unsigned npins, old = 0;
 691        int i, ret;
 692
 693        ret = pcs_get_group_pins(pctldev, group, &pins, &npins);
 694        if (ret)
 695                return ret;
 696        for (i = 0; i < npins; i++) {
 697                if (pcs_pinconf_get(pctldev, pins[i], config))
 698                        return -ENOTSUPP;
 699                /* configs do not match between two pins */
 700                if (i && (old != *config))
 701                        return -ENOTSUPP;
 702                old = *config;
 703        }
 704        return 0;
 705}
 706
 707static int pcs_pinconf_group_set(struct pinctrl_dev *pctldev,
 708                                unsigned group, unsigned long *configs,
 709                                unsigned num_configs)
 710{
 711        const unsigned *pins;
 712        unsigned npins;
 713        int i, ret;
 714
 715        ret = pcs_get_group_pins(pctldev, group, &pins, &npins);
 716        if (ret)
 717                return ret;
 718        for (i = 0; i < npins; i++) {
 719                if (pcs_pinconf_set(pctldev, pins[i], configs, num_configs))
 720                        return -ENOTSUPP;
 721        }
 722        return 0;
 723}
 724
 725static void pcs_pinconf_dbg_show(struct pinctrl_dev *pctldev,
 726                                struct seq_file *s, unsigned pin)
 727{
 728}
 729
 730static void pcs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
 731                                struct seq_file *s, unsigned selector)
 732{
 733}
 734
 735static void pcs_pinconf_config_dbg_show(struct pinctrl_dev *pctldev,
 736                                        struct seq_file *s,
 737                                        unsigned long config)
 738{
 739        pinconf_generic_dump_config(pctldev, s, config);
 740}
 741
 742static const struct pinconf_ops pcs_pinconf_ops = {
 743        .pin_config_get = pcs_pinconf_get,
 744        .pin_config_set = pcs_pinconf_set,
 745        .pin_config_group_get = pcs_pinconf_group_get,
 746        .pin_config_group_set = pcs_pinconf_group_set,
 747        .pin_config_dbg_show = pcs_pinconf_dbg_show,
 748        .pin_config_group_dbg_show = pcs_pinconf_group_dbg_show,
 749        .pin_config_config_dbg_show = pcs_pinconf_config_dbg_show,
 750        .is_generic = true,
 751};
 752
 753/**
 754 * pcs_add_pin() - add a pin to the static per controller pin array
 755 * @pcs: pcs driver instance
 756 * @offset: register offset from base
 757 */
 758static int pcs_add_pin(struct pcs_device *pcs, unsigned offset,
 759                unsigned pin_pos)
 760{
 761        struct pinctrl_pin_desc *pin;
 762        struct pcs_name *pn;
 763        int i;
 764
 765        i = pcs->pins.cur;
 766        if (i >= pcs->desc.npins) {
 767                dev_err(pcs->dev, "too many pins, max %i\n",
 768                        pcs->desc.npins);
 769                return -ENOMEM;
 770        }
 771
 772        pin = &pcs->pins.pa[i];
 773        pn = &pcs->names[i];
 774        sprintf(pn->name, "%lx.%d",
 775                (unsigned long)pcs->res->start + offset, pin_pos);
 776        pin->name = pn->name;
 777        pin->number = i;
 778        pcs->pins.cur++;
 779
 780        return i;
 781}
 782
 783/**
 784 * pcs_allocate_pin_table() - adds all the pins for the pinctrl driver
 785 * @pcs: pcs driver instance
 786 *
 787 * In case of errors, resources are freed in pcs_free_resources.
 788 *
 789 * If your hardware needs holes in the address space, then just set
 790 * up multiple driver instances.
 791 */
 792static int pcs_allocate_pin_table(struct pcs_device *pcs)
 793{
 794        int mux_bytes, nr_pins, i;
 795        int num_pins_in_register = 0;
 796
 797        mux_bytes = pcs->width / BITS_PER_BYTE;
 798
 799        if (pcs->bits_per_mux) {
 800                pcs->bits_per_pin = fls(pcs->fmask);
 801                nr_pins = (pcs->size * BITS_PER_BYTE) / pcs->bits_per_pin;
 802                num_pins_in_register = pcs->width / pcs->bits_per_pin;
 803        } else {
 804                nr_pins = pcs->size / mux_bytes;
 805        }
 806
 807        dev_dbg(pcs->dev, "allocating %i pins\n", nr_pins);
 808        pcs->pins.pa = devm_kzalloc(pcs->dev,
 809                                sizeof(*pcs->pins.pa) * nr_pins,
 810                                GFP_KERNEL);
 811        if (!pcs->pins.pa)
 812                return -ENOMEM;
 813
 814        pcs->names = devm_kzalloc(pcs->dev,
 815                                sizeof(struct pcs_name) * nr_pins,
 816                                GFP_KERNEL);
 817        if (!pcs->names)
 818                return -ENOMEM;
 819
 820        pcs->desc.pins = pcs->pins.pa;
 821        pcs->desc.npins = nr_pins;
 822
 823        for (i = 0; i < pcs->desc.npins; i++) {
 824                unsigned offset;
 825                int res;
 826                int byte_num;
 827                int pin_pos = 0;
 828
 829                if (pcs->bits_per_mux) {
 830                        byte_num = (pcs->bits_per_pin * i) / BITS_PER_BYTE;
 831                        offset = (byte_num / mux_bytes) * mux_bytes;
 832                        pin_pos = i % num_pins_in_register;
 833                } else {
 834                        offset = i * mux_bytes;
 835                }
 836                res = pcs_add_pin(pcs, offset, pin_pos);
 837                if (res < 0) {
 838                        dev_err(pcs->dev, "error adding pins: %i\n", res);
 839                        return res;
 840                }
 841        }
 842
 843        return 0;
 844}
 845
 846/**
 847 * pcs_add_function() - adds a new function to the function list
 848 * @pcs: pcs driver instance
 849 * @np: device node of the mux entry
 850 * @name: name of the function
 851 * @vals: array of mux register value pairs used by the function
 852 * @nvals: number of mux register value pairs
 853 * @pgnames: array of pingroup names for the function
 854 * @npgnames: number of pingroup names
 855 */
 856static struct pcs_function *pcs_add_function(struct pcs_device *pcs,
 857                                        struct device_node *np,
 858                                        const char *name,
 859                                        struct pcs_func_vals *vals,
 860                                        unsigned nvals,
 861                                        const char **pgnames,
 862                                        unsigned npgnames)
 863{
 864        struct pcs_function *function;
 865
 866        function = devm_kzalloc(pcs->dev, sizeof(*function), GFP_KERNEL);
 867        if (!function)
 868                return NULL;
 869
 870        function->name = name;
 871        function->vals = vals;
 872        function->nvals = nvals;
 873        function->pgnames = pgnames;
 874        function->npgnames = npgnames;
 875
 876        mutex_lock(&pcs->mutex);
 877        list_add_tail(&function->node, &pcs->functions);
 878        radix_tree_insert(&pcs->ftree, pcs->nfuncs, function);
 879        pcs->nfuncs++;
 880        mutex_unlock(&pcs->mutex);
 881
 882        return function;
 883}
 884
 885static void pcs_remove_function(struct pcs_device *pcs,
 886                                struct pcs_function *function)
 887{
 888        int i;
 889
 890        mutex_lock(&pcs->mutex);
 891        for (i = 0; i < pcs->nfuncs; i++) {
 892                struct pcs_function *found;
 893
 894                found = radix_tree_lookup(&pcs->ftree, i);
 895                if (found == function)
 896                        radix_tree_delete(&pcs->ftree, i);
 897        }
 898        list_del(&function->node);
 899        mutex_unlock(&pcs->mutex);
 900}
 901
 902/**
 903 * pcs_add_pingroup() - add a pingroup to the pingroup list
 904 * @pcs: pcs driver instance
 905 * @np: device node of the mux entry
 906 * @name: name of the pingroup
 907 * @gpins: array of the pins that belong to the group
 908 * @ngpins: number of pins in the group
 909 */
 910static int pcs_add_pingroup(struct pcs_device *pcs,
 911                                        struct device_node *np,
 912                                        const char *name,
 913                                        int *gpins,
 914                                        int ngpins)
 915{
 916        struct pcs_pingroup *pingroup;
 917
 918        pingroup = devm_kzalloc(pcs->dev, sizeof(*pingroup), GFP_KERNEL);
 919        if (!pingroup)
 920                return -ENOMEM;
 921
 922        pingroup->name = name;
 923        pingroup->np = np;
 924        pingroup->gpins = gpins;
 925        pingroup->ngpins = ngpins;
 926
 927        mutex_lock(&pcs->mutex);
 928        list_add_tail(&pingroup->node, &pcs->pingroups);
 929        radix_tree_insert(&pcs->pgtree, pcs->ngroups, pingroup);
 930        pcs->ngroups++;
 931        mutex_unlock(&pcs->mutex);
 932
 933        return 0;
 934}
 935
 936/**
 937 * pcs_get_pin_by_offset() - get a pin index based on the register offset
 938 * @pcs: pcs driver instance
 939 * @offset: register offset from the base
 940 *
 941 * Note that this is OK as long as the pins are in a static array.
 942 */
 943static int pcs_get_pin_by_offset(struct pcs_device *pcs, unsigned offset)
 944{
 945        unsigned index;
 946
 947        if (offset >= pcs->size) {
 948                dev_err(pcs->dev, "mux offset out of range: 0x%x (0x%x)\n",
 949                        offset, pcs->size);
 950                return -EINVAL;
 951        }
 952
 953        if (pcs->bits_per_mux)
 954                index = (offset * BITS_PER_BYTE) / pcs->bits_per_pin;
 955        else
 956                index = offset / (pcs->width / BITS_PER_BYTE);
 957
 958        return index;
 959}
 960
 961/*
 962 * check whether data matches enable bits or disable bits
 963 * Return value: 1 for matching enable bits, 0 for matching disable bits,
 964 *               and negative value for matching failure.
 965 */
 966static int pcs_config_match(unsigned data, unsigned enable, unsigned disable)
 967{
 968        int ret = -EINVAL;
 969
 970        if (data == enable)
 971                ret = 1;
 972        else if (data == disable)
 973                ret = 0;
 974        return ret;
 975}
 976
 977static void add_config(struct pcs_conf_vals **conf, enum pin_config_param param,
 978                       unsigned value, unsigned enable, unsigned disable,
 979                       unsigned mask)
 980{
 981        (*conf)->param = param;
 982        (*conf)->val = value;
 983        (*conf)->enable = enable;
 984        (*conf)->disable = disable;
 985        (*conf)->mask = mask;
 986        (*conf)++;
 987}
 988
 989static void add_setting(unsigned long **setting, enum pin_config_param param,
 990                        unsigned arg)
 991{
 992        **setting = pinconf_to_config_packed(param, arg);
 993        (*setting)++;
 994}
 995
 996/* add pinconf setting with 2 parameters */
 997static void pcs_add_conf2(struct pcs_device *pcs, struct device_node *np,
 998                          const char *name, enum pin_config_param param,
 999                          struct pcs_conf_vals **conf, unsigned long **settings)
1000{
1001        unsigned value[2], shift;
1002        int ret;
1003
1004        ret = of_property_read_u32_array(np, name, value, 2);
1005        if (ret)
1006                return;
1007        /* set value & mask */
1008        value[0] &= value[1];
1009        shift = ffs(value[1]) - 1;
1010        /* skip enable & disable */
1011        add_config(conf, param, value[0], 0, 0, value[1]);
1012        add_setting(settings, param, value[0] >> shift);
1013}
1014
1015/* add pinconf setting with 4 parameters */
1016static void pcs_add_conf4(struct pcs_device *pcs, struct device_node *np,
1017                          const char *name, enum pin_config_param param,
1018                          struct pcs_conf_vals **conf, unsigned long **settings)
1019{
1020        unsigned value[4];
1021        int ret;
1022
1023        /* value to set, enable, disable, mask */
1024        ret = of_property_read_u32_array(np, name, value, 4);
1025        if (ret)
1026                return;
1027        if (!value[3]) {
1028                dev_err(pcs->dev, "mask field of the property can't be 0\n");
1029                return;
1030        }
1031        value[0] &= value[3];
1032        value[1] &= value[3];
1033        value[2] &= value[3];
1034        ret = pcs_config_match(value[0], value[1], value[2]);
1035        if (ret < 0)
1036                dev_dbg(pcs->dev, "failed to match enable or disable bits\n");
1037        add_config(conf, param, value[0], value[1], value[2], value[3]);
1038        add_setting(settings, param, ret);
1039}
1040
1041static int pcs_parse_pinconf(struct pcs_device *pcs, struct device_node *np,
1042                             struct pcs_function *func,
1043                             struct pinctrl_map **map)
1044
1045{
1046        struct pinctrl_map *m = *map;
1047        int i = 0, nconfs = 0;
1048        unsigned long *settings = NULL, *s = NULL;
1049        struct pcs_conf_vals *conf = NULL;
1050        struct pcs_conf_type prop2[] = {
1051                { "pinctrl-single,drive-strength", PIN_CONFIG_DRIVE_STRENGTH, },
1052                { "pinctrl-single,slew-rate", PIN_CONFIG_SLEW_RATE, },
1053                { "pinctrl-single,input-schmitt", PIN_CONFIG_INPUT_SCHMITT, },
1054        };
1055        struct pcs_conf_type prop4[] = {
1056                { "pinctrl-single,bias-pullup", PIN_CONFIG_BIAS_PULL_UP, },
1057                { "pinctrl-single,bias-pulldown", PIN_CONFIG_BIAS_PULL_DOWN, },
1058                { "pinctrl-single,input-schmitt-enable",
1059                        PIN_CONFIG_INPUT_SCHMITT_ENABLE, },
1060        };
1061
1062        /* If pinconf isn't supported, don't parse properties in below. */
1063        if (!pcs->is_pinconf)
1064                return 0;
1065
1066        /* cacluate how much properties are supported in current node */
1067        for (i = 0; i < ARRAY_SIZE(prop2); i++) {
1068                if (of_find_property(np, prop2[i].name, NULL))
1069                        nconfs++;
1070        }
1071        for (i = 0; i < ARRAY_SIZE(prop4); i++) {
1072                if (of_find_property(np, prop4[i].name, NULL))
1073                        nconfs++;
1074        }
1075        if (!nconfs)
1076                return 0;
1077
1078        func->conf = devm_kzalloc(pcs->dev,
1079                                  sizeof(struct pcs_conf_vals) * nconfs,
1080                                  GFP_KERNEL);
1081        if (!func->conf)
1082                return -ENOMEM;
1083        func->nconfs = nconfs;
1084        conf = &(func->conf[0]);
1085        m++;
1086        settings = devm_kzalloc(pcs->dev, sizeof(unsigned long) * nconfs,
1087                                GFP_KERNEL);
1088        if (!settings)
1089                return -ENOMEM;
1090        s = &settings[0];
1091
1092        for (i = 0; i < ARRAY_SIZE(prop2); i++)
1093                pcs_add_conf2(pcs, np, prop2[i].name, prop2[i].param,
1094                              &conf, &s);
1095        for (i = 0; i < ARRAY_SIZE(prop4); i++)
1096                pcs_add_conf4(pcs, np, prop4[i].name, prop4[i].param,
1097                              &conf, &s);
1098        m->type = PIN_MAP_TYPE_CONFIGS_GROUP;
1099        m->data.configs.group_or_pin = np->name;
1100        m->data.configs.configs = settings;
1101        m->data.configs.num_configs = nconfs;
1102        return 0;
1103}
1104
1105static void pcs_free_pingroups(struct pcs_device *pcs);
1106
1107/**
1108 * smux_parse_one_pinctrl_entry() - parses a device tree mux entry
1109 * @pcs: pinctrl driver instance
1110 * @np: device node of the mux entry
1111 * @map: map entry
1112 * @num_maps: number of map
1113 * @pgnames: pingroup names
1114 *
1115 * Note that this binding currently supports only sets of one register + value.
1116 *
1117 * Also note that this driver tries to avoid understanding pin and function
1118 * names because of the extra bloat they would cause especially in the case of
1119 * a large number of pins. This driver just sets what is specified for the board
1120 * in the .dts file. Further user space debugging tools can be developed to
1121 * decipher the pin and function names using debugfs.
1122 *
1123 * If you are concerned about the boot time, set up the static pins in
1124 * the bootloader, and only set up selected pins as device tree entries.
1125 */
1126static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs,
1127                                                struct device_node *np,
1128                                                struct pinctrl_map **map,
1129                                                unsigned *num_maps,
1130                                                const char **pgnames)
1131{
1132        struct pcs_func_vals *vals;
1133        const __be32 *mux;
1134        int size, rows, *pins, index = 0, found = 0, res = -ENOMEM;
1135        struct pcs_function *function;
1136
1137        mux = of_get_property(np, PCS_MUX_PINS_NAME, &size);
1138        if ((!mux) || (size < sizeof(*mux) * 2)) {
1139                dev_err(pcs->dev, "bad data for mux %s\n",
1140                        np->name);
1141                return -EINVAL;
1142        }
1143
1144        size /= sizeof(*mux);   /* Number of elements in array */
1145        rows = size / 2;
1146
1147        vals = devm_kzalloc(pcs->dev, sizeof(*vals) * rows, GFP_KERNEL);
1148        if (!vals)
1149                return -ENOMEM;
1150
1151        pins = devm_kzalloc(pcs->dev, sizeof(*pins) * rows, GFP_KERNEL);
1152        if (!pins)
1153                goto free_vals;
1154
1155        while (index < size) {
1156                unsigned offset, val;
1157                int pin;
1158
1159                offset = be32_to_cpup(mux + index++);
1160                val = be32_to_cpup(mux + index++);
1161                vals[found].reg = pcs->base + offset;
1162                vals[found].val = val;
1163
1164                pin = pcs_get_pin_by_offset(pcs, offset);
1165                if (pin < 0) {
1166                        dev_err(pcs->dev,
1167                                "could not add functions for %s %ux\n",
1168                                np->name, offset);
1169                        break;
1170                }
1171                pins[found++] = pin;
1172        }
1173
1174        pgnames[0] = np->name;
1175        function = pcs_add_function(pcs, np, np->name, vals, found, pgnames, 1);
1176        if (!function)
1177                goto free_pins;
1178
1179        res = pcs_add_pingroup(pcs, np, np->name, pins, found);
1180        if (res < 0)
1181                goto free_function;
1182
1183        (*map)->type = PIN_MAP_TYPE_MUX_GROUP;
1184        (*map)->data.mux.group = np->name;
1185        (*map)->data.mux.function = np->name;
1186
1187        if (pcs->is_pinconf) {
1188                res = pcs_parse_pinconf(pcs, np, function, map);
1189                if (res)
1190                        goto free_pingroups;
1191                *num_maps = 2;
1192        } else {
1193                *num_maps = 1;
1194        }
1195        return 0;
1196
1197free_pingroups:
1198        pcs_free_pingroups(pcs);
1199        *num_maps = 1;
1200free_function:
1201        pcs_remove_function(pcs, function);
1202
1203free_pins:
1204        devm_kfree(pcs->dev, pins);
1205
1206free_vals:
1207        devm_kfree(pcs->dev, vals);
1208
1209        return res;
1210}
1211
1212#define PARAMS_FOR_BITS_PER_MUX 3
1213
1214static int pcs_parse_bits_in_pinctrl_entry(struct pcs_device *pcs,
1215                                                struct device_node *np,
1216                                                struct pinctrl_map **map,
1217                                                unsigned *num_maps,
1218                                                const char **pgnames)
1219{
1220        struct pcs_func_vals *vals;
1221        const __be32 *mux;
1222        int size, rows, *pins, index = 0, found = 0, res = -ENOMEM;
1223        int npins_in_row;
1224        struct pcs_function *function;
1225
1226        mux = of_get_property(np, PCS_MUX_BITS_NAME, &size);
1227
1228        if (!mux) {
1229                dev_err(pcs->dev, "no valid property for %s\n", np->name);
1230                return -EINVAL;
1231        }
1232
1233        if (size < (sizeof(*mux) * PARAMS_FOR_BITS_PER_MUX)) {
1234                dev_err(pcs->dev, "bad data for %s\n", np->name);
1235                return -EINVAL;
1236        }
1237
1238        /* Number of elements in array */
1239        size /= sizeof(*mux);
1240
1241        rows = size / PARAMS_FOR_BITS_PER_MUX;
1242        npins_in_row = pcs->width / pcs->bits_per_pin;
1243
1244        vals = devm_kzalloc(pcs->dev, sizeof(*vals) * rows * npins_in_row,
1245                        GFP_KERNEL);
1246        if (!vals)
1247                return -ENOMEM;
1248
1249        pins = devm_kzalloc(pcs->dev, sizeof(*pins) * rows * npins_in_row,
1250                        GFP_KERNEL);
1251        if (!pins)
1252                goto free_vals;
1253
1254        while (index < size) {
1255                unsigned offset, val;
1256                unsigned mask, bit_pos, val_pos, mask_pos, submask;
1257                unsigned pin_num_from_lsb;
1258                int pin;
1259
1260                offset = be32_to_cpup(mux + index++);
1261                val = be32_to_cpup(mux + index++);
1262                mask = be32_to_cpup(mux + index++);
1263
1264                /* Parse pins in each row from LSB */
1265                while (mask) {
1266                        bit_pos = ffs(mask);
1267                        pin_num_from_lsb = bit_pos / pcs->bits_per_pin;
1268                        mask_pos = ((pcs->fmask) << (bit_pos - 1));
1269                        val_pos = val & mask_pos;
1270                        submask = mask & mask_pos;
1271                        mask &= ~mask_pos;
1272
1273                        if (submask != mask_pos) {
1274                                dev_warn(pcs->dev,
1275                                                "Invalid submask 0x%x for %s at 0x%x\n",
1276                                                submask, np->name, offset);
1277                                continue;
1278                        }
1279
1280                        vals[found].mask = submask;
1281                        vals[found].reg = pcs->base + offset;
1282                        vals[found].val = val_pos;
1283
1284                        pin = pcs_get_pin_by_offset(pcs, offset);
1285                        if (pin < 0) {
1286                                dev_err(pcs->dev,
1287                                        "could not add functions for %s %ux\n",
1288                                        np->name, offset);
1289                                break;
1290                        }
1291                        pins[found++] = pin + pin_num_from_lsb;
1292                }
1293        }
1294
1295        pgnames[0] = np->name;
1296        function = pcs_add_function(pcs, np, np->name, vals, found, pgnames, 1);
1297        if (!function)
1298                goto free_pins;
1299
1300        res = pcs_add_pingroup(pcs, np, np->name, pins, found);
1301        if (res < 0)
1302                goto free_function;
1303
1304        (*map)->type = PIN_MAP_TYPE_MUX_GROUP;
1305        (*map)->data.mux.group = np->name;
1306        (*map)->data.mux.function = np->name;
1307
1308        if (pcs->is_pinconf) {
1309                dev_err(pcs->dev, "pinconf not supported\n");
1310                goto free_pingroups;
1311        }
1312
1313        *num_maps = 1;
1314        return 0;
1315
1316free_pingroups:
1317        pcs_free_pingroups(pcs);
1318        *num_maps = 1;
1319free_function:
1320        pcs_remove_function(pcs, function);
1321
1322free_pins:
1323        devm_kfree(pcs->dev, pins);
1324
1325free_vals:
1326        devm_kfree(pcs->dev, vals);
1327
1328        return res;
1329}
1330/**
1331 * pcs_dt_node_to_map() - allocates and parses pinctrl maps
1332 * @pctldev: pinctrl instance
1333 * @np_config: device tree pinmux entry
1334 * @map: array of map entries
1335 * @num_maps: number of maps
1336 */
1337static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev,
1338                                struct device_node *np_config,
1339                                struct pinctrl_map **map, unsigned *num_maps)
1340{
1341        struct pcs_device *pcs;
1342        const char **pgnames;
1343        int ret;
1344
1345        pcs = pinctrl_dev_get_drvdata(pctldev);
1346
1347        /* create 2 maps. One is for pinmux, and the other is for pinconf. */
1348        *map = devm_kzalloc(pcs->dev, sizeof(**map) * 2, GFP_KERNEL);
1349        if (!*map)
1350                return -ENOMEM;
1351
1352        *num_maps = 0;
1353
1354        pgnames = devm_kzalloc(pcs->dev, sizeof(*pgnames), GFP_KERNEL);
1355        if (!pgnames) {
1356                ret = -ENOMEM;
1357                goto free_map;
1358        }
1359
1360        if (pcs->bits_per_mux) {
1361                ret = pcs_parse_bits_in_pinctrl_entry(pcs, np_config, map,
1362                                num_maps, pgnames);
1363                if (ret < 0) {
1364                        dev_err(pcs->dev, "no pins entries for %s\n",
1365                                np_config->name);
1366                        goto free_pgnames;
1367                }
1368        } else {
1369                ret = pcs_parse_one_pinctrl_entry(pcs, np_config, map,
1370                                num_maps, pgnames);
1371                if (ret < 0) {
1372                        dev_err(pcs->dev, "no pins entries for %s\n",
1373                                np_config->name);
1374                        goto free_pgnames;
1375                }
1376        }
1377
1378        return 0;
1379
1380free_pgnames:
1381        devm_kfree(pcs->dev, pgnames);
1382free_map:
1383        devm_kfree(pcs->dev, *map);
1384
1385        return ret;
1386}
1387
1388/**
1389 * pcs_free_funcs() - free memory used by functions
1390 * @pcs: pcs driver instance
1391 */
1392static void pcs_free_funcs(struct pcs_device *pcs)
1393{
1394        struct list_head *pos, *tmp;
1395        int i;
1396
1397        mutex_lock(&pcs->mutex);
1398        for (i = 0; i < pcs->nfuncs; i++) {
1399                struct pcs_function *func;
1400
1401                func = radix_tree_lookup(&pcs->ftree, i);
1402                if (!func)
1403                        continue;
1404                radix_tree_delete(&pcs->ftree, i);
1405        }
1406        list_for_each_safe(pos, tmp, &pcs->functions) {
1407                struct pcs_function *function;
1408
1409                function = list_entry(pos, struct pcs_function, node);
1410                list_del(&function->node);
1411        }
1412        mutex_unlock(&pcs->mutex);
1413}
1414
1415/**
1416 * pcs_free_pingroups() - free memory used by pingroups
1417 * @pcs: pcs driver instance
1418 */
1419static void pcs_free_pingroups(struct pcs_device *pcs)
1420{
1421        struct list_head *pos, *tmp;
1422        int i;
1423
1424        mutex_lock(&pcs->mutex);
1425        for (i = 0; i < pcs->ngroups; i++) {
1426                struct pcs_pingroup *pingroup;
1427
1428                pingroup = radix_tree_lookup(&pcs->pgtree, i);
1429                if (!pingroup)
1430                        continue;
1431                radix_tree_delete(&pcs->pgtree, i);
1432        }
1433        list_for_each_safe(pos, tmp, &pcs->pingroups) {
1434                struct pcs_pingroup *pingroup;
1435
1436                pingroup = list_entry(pos, struct pcs_pingroup, node);
1437                list_del(&pingroup->node);
1438        }
1439        mutex_unlock(&pcs->mutex);
1440}
1441
1442/**
1443 * pcs_free_resources() - free memory used by this driver
1444 * @pcs: pcs driver instance
1445 */
1446static void pcs_free_resources(struct pcs_device *pcs)
1447{
1448        if (pcs->pctl)
1449                pinctrl_unregister(pcs->pctl);
1450
1451        pcs_free_funcs(pcs);
1452        pcs_free_pingroups(pcs);
1453}
1454
1455#define PCS_GET_PROP_U32(name, reg, err)                                \
1456        do {                                                            \
1457                ret = of_property_read_u32(np, name, reg);              \
1458                if (ret) {                                              \
1459                        dev_err(pcs->dev, err);                         \
1460                        return ret;                                     \
1461                }                                                       \
1462        } while (0);
1463
1464static struct of_device_id pcs_of_match[];
1465
1466static int pcs_add_gpio_func(struct device_node *node, struct pcs_device *pcs)
1467{
1468        const char *propname = "pinctrl-single,gpio-range";
1469        const char *cellname = "#pinctrl-single,gpio-range-cells";
1470        struct of_phandle_args gpiospec;
1471        struct pcs_gpiofunc_range *range;
1472        int ret, i;
1473
1474        for (i = 0; ; i++) {
1475                ret = of_parse_phandle_with_args(node, propname, cellname,
1476                                                 i, &gpiospec);
1477                /* Do not treat it as error. Only treat it as end condition. */
1478                if (ret) {
1479                        ret = 0;
1480                        break;
1481                }
1482                range = devm_kzalloc(pcs->dev, sizeof(*range), GFP_KERNEL);
1483                if (!range) {
1484                        ret = -ENOMEM;
1485                        break;
1486                }
1487                range->offset = gpiospec.args[0];
1488                range->npins = gpiospec.args[1];
1489                range->gpiofunc = gpiospec.args[2];
1490                mutex_lock(&pcs->mutex);
1491                list_add_tail(&range->node, &pcs->gpiofuncs);
1492                mutex_unlock(&pcs->mutex);
1493        }
1494        return ret;
1495}
1496
1497#ifdef CONFIG_PM
1498static int pinctrl_single_suspend(struct platform_device *pdev,
1499                                        pm_message_t state)
1500{
1501        struct pcs_device *pcs;
1502
1503        pcs = platform_get_drvdata(pdev);
1504        if (!pcs)
1505                return -EINVAL;
1506
1507        return pinctrl_force_sleep(pcs->pctl);
1508}
1509
1510static int pinctrl_single_resume(struct platform_device *pdev)
1511{
1512        struct pcs_device *pcs;
1513
1514        pcs = platform_get_drvdata(pdev);
1515        if (!pcs)
1516                return -EINVAL;
1517
1518        return pinctrl_force_default(pcs->pctl);
1519}
1520#endif
1521
1522static int pcs_probe(struct platform_device *pdev)
1523{
1524        struct device_node *np = pdev->dev.of_node;
1525        const struct of_device_id *match;
1526        struct resource *res;
1527        struct pcs_device *pcs;
1528        int ret;
1529
1530        match = of_match_device(pcs_of_match, &pdev->dev);
1531        if (!match)
1532                return -EINVAL;
1533
1534        pcs = devm_kzalloc(&pdev->dev, sizeof(*pcs), GFP_KERNEL);
1535        if (!pcs) {
1536                dev_err(&pdev->dev, "could not allocate\n");
1537                return -ENOMEM;
1538        }
1539        pcs->dev = &pdev->dev;
1540        mutex_init(&pcs->mutex);
1541        INIT_LIST_HEAD(&pcs->pingroups);
1542        INIT_LIST_HEAD(&pcs->functions);
1543        INIT_LIST_HEAD(&pcs->gpiofuncs);
1544        pcs->is_pinconf = match->data;
1545
1546        PCS_GET_PROP_U32("pinctrl-single,register-width", &pcs->width,
1547                         "register width not specified\n");
1548
1549        ret = of_property_read_u32(np, "pinctrl-single,function-mask",
1550                                   &pcs->fmask);
1551        if (!ret) {
1552                pcs->fshift = ffs(pcs->fmask) - 1;
1553                pcs->fmax = pcs->fmask >> pcs->fshift;
1554        } else {
1555                /* If mask property doesn't exist, function mux is invalid. */
1556                pcs->fmask = 0;
1557                pcs->fshift = 0;
1558                pcs->fmax = 0;
1559        }
1560
1561        ret = of_property_read_u32(np, "pinctrl-single,function-off",
1562                                        &pcs->foff);
1563        if (ret)
1564                pcs->foff = PCS_OFF_DISABLED;
1565
1566        pcs->bits_per_mux = of_property_read_bool(np,
1567                                                  "pinctrl-single,bit-per-mux");
1568
1569        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1570        if (!res) {
1571                dev_err(pcs->dev, "could not get resource\n");
1572                return -ENODEV;
1573        }
1574
1575        pcs->res = devm_request_mem_region(pcs->dev, res->start,
1576                        resource_size(res), DRIVER_NAME);
1577        if (!pcs->res) {
1578                dev_err(pcs->dev, "could not get mem_region\n");
1579                return -EBUSY;
1580        }
1581
1582        pcs->size = resource_size(pcs->res);
1583        pcs->base = devm_ioremap(pcs->dev, pcs->res->start, pcs->size);
1584        if (!pcs->base) {
1585                dev_err(pcs->dev, "could not ioremap\n");
1586                return -ENODEV;
1587        }
1588
1589        INIT_RADIX_TREE(&pcs->pgtree, GFP_KERNEL);
1590        INIT_RADIX_TREE(&pcs->ftree, GFP_KERNEL);
1591        platform_set_drvdata(pdev, pcs);
1592
1593        switch (pcs->width) {
1594        case 8:
1595                pcs->read = pcs_readb;
1596                pcs->write = pcs_writeb;
1597                break;
1598        case 16:
1599                pcs->read = pcs_readw;
1600                pcs->write = pcs_writew;
1601                break;
1602        case 32:
1603                pcs->read = pcs_readl;
1604                pcs->write = pcs_writel;
1605                break;
1606        default:
1607                break;
1608        }
1609
1610        pcs->desc.name = DRIVER_NAME;
1611        pcs->desc.pctlops = &pcs_pinctrl_ops;
1612        pcs->desc.pmxops = &pcs_pinmux_ops;
1613        if (pcs->is_pinconf)
1614                pcs->desc.confops = &pcs_pinconf_ops;
1615        pcs->desc.owner = THIS_MODULE;
1616
1617        ret = pcs_allocate_pin_table(pcs);
1618        if (ret < 0)
1619                goto free;
1620
1621        pcs->pctl = pinctrl_register(&pcs->desc, pcs->dev, pcs);
1622        if (!pcs->pctl) {
1623                dev_err(pcs->dev, "could not register single pinctrl driver\n");
1624                ret = -EINVAL;
1625                goto free;
1626        }
1627
1628        ret = pcs_add_gpio_func(np, pcs);
1629        if (ret < 0)
1630                goto free;
1631
1632        dev_info(pcs->dev, "%i pins at pa %p size %u\n",
1633                 pcs->desc.npins, pcs->base, pcs->size);
1634
1635        return 0;
1636
1637free:
1638        pcs_free_resources(pcs);
1639
1640        return ret;
1641}
1642
1643static int pcs_remove(struct platform_device *pdev)
1644{
1645        struct pcs_device *pcs = platform_get_drvdata(pdev);
1646
1647        if (!pcs)
1648                return 0;
1649
1650        pcs_free_resources(pcs);
1651
1652        return 0;
1653}
1654
1655static struct of_device_id pcs_of_match[] = {
1656        { .compatible = "pinctrl-single", .data = (void *)false },
1657        { .compatible = "pinconf-single", .data = (void *)true },
1658        { },
1659};
1660MODULE_DEVICE_TABLE(of, pcs_of_match);
1661
1662static struct platform_driver pcs_driver = {
1663        .probe          = pcs_probe,
1664        .remove         = pcs_remove,
1665        .driver = {
1666                .owner          = THIS_MODULE,
1667                .name           = DRIVER_NAME,
1668                .of_match_table = pcs_of_match,
1669        },
1670#ifdef CONFIG_PM
1671        .suspend = pinctrl_single_suspend,
1672        .resume = pinctrl_single_resume,
1673#endif
1674};
1675
1676module_platform_driver(pcs_driver);
1677
1678MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>");
1679MODULE_DESCRIPTION("One-register-per-pin type device tree based pinctrl driver");
1680MODULE_LICENSE("GPL v2");
1681
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