linux/drivers/pinctrl/pinctrl-mxs.c
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   1/*
   2 * Copyright 2012 Freescale Semiconductor, Inc.
   3 *
   4 * The code contained herein is licensed under the GNU General Public
   5 * License. You may obtain a copy of the GNU General Public License
   6 * Version 2 or later at the following locations:
   7 *
   8 * http://www.opensource.org/licenses/gpl-license.html
   9 * http://www.gnu.org/copyleft/gpl.html
  10 */
  11
  12#include <linux/err.h>
  13#include <linux/init.h>
  14#include <linux/io.h>
  15#include <linux/module.h>
  16#include <linux/of.h>
  17#include <linux/of_address.h>
  18#include <linux/pinctrl/machine.h>
  19#include <linux/pinctrl/pinconf.h>
  20#include <linux/pinctrl/pinctrl.h>
  21#include <linux/pinctrl/pinmux.h>
  22#include <linux/platform_device.h>
  23#include <linux/slab.h>
  24#include "core.h"
  25#include "pinctrl-mxs.h"
  26
  27#define SUFFIX_LEN      4
  28
  29struct mxs_pinctrl_data {
  30        struct device *dev;
  31        struct pinctrl_dev *pctl;
  32        void __iomem *base;
  33        struct mxs_pinctrl_soc_data *soc;
  34};
  35
  36static int mxs_get_groups_count(struct pinctrl_dev *pctldev)
  37{
  38        struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
  39
  40        return d->soc->ngroups;
  41}
  42
  43static const char *mxs_get_group_name(struct pinctrl_dev *pctldev,
  44                                      unsigned group)
  45{
  46        struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
  47
  48        return d->soc->groups[group].name;
  49}
  50
  51static int mxs_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
  52                              const unsigned **pins, unsigned *num_pins)
  53{
  54        struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
  55
  56        *pins = d->soc->groups[group].pins;
  57        *num_pins = d->soc->groups[group].npins;
  58
  59        return 0;
  60}
  61
  62static void mxs_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
  63                             unsigned offset)
  64{
  65        seq_printf(s, " %s", dev_name(pctldev->dev));
  66}
  67
  68static int mxs_dt_node_to_map(struct pinctrl_dev *pctldev,
  69                              struct device_node *np,
  70                              struct pinctrl_map **map, unsigned *num_maps)
  71{
  72        struct pinctrl_map *new_map;
  73        char *group = NULL;
  74        unsigned new_num = 1;
  75        unsigned long config = 0;
  76        unsigned long *pconfig;
  77        int length = strlen(np->name) + SUFFIX_LEN;
  78        bool purecfg = false;
  79        u32 val, reg;
  80        int ret, i = 0;
  81
  82        /* Check for pin config node which has no 'reg' property */
  83        if (of_property_read_u32(np, "reg", &reg))
  84                purecfg = true;
  85
  86        ret = of_property_read_u32(np, "fsl,drive-strength", &val);
  87        if (!ret)
  88                config = val | MA_PRESENT;
  89        ret = of_property_read_u32(np, "fsl,voltage", &val);
  90        if (!ret)
  91                config |= val << VOL_SHIFT | VOL_PRESENT;
  92        ret = of_property_read_u32(np, "fsl,pull-up", &val);
  93        if (!ret)
  94                config |= val << PULL_SHIFT | PULL_PRESENT;
  95
  96        /* Check for group node which has both mux and config settings */
  97        if (!purecfg && config)
  98                new_num = 2;
  99
 100        new_map = kzalloc(sizeof(*new_map) * new_num, GFP_KERNEL);
 101        if (!new_map)
 102                return -ENOMEM;
 103
 104        if (!purecfg) {
 105                new_map[i].type = PIN_MAP_TYPE_MUX_GROUP;
 106                new_map[i].data.mux.function = np->name;
 107
 108                /* Compose group name */
 109                group = kzalloc(length, GFP_KERNEL);
 110                if (!group) {
 111                        ret = -ENOMEM;
 112                        goto free;
 113                }
 114                snprintf(group, length, "%s.%d", np->name, reg);
 115                new_map[i].data.mux.group = group;
 116                i++;
 117        }
 118
 119        if (config) {
 120                pconfig = kmemdup(&config, sizeof(config), GFP_KERNEL);
 121                if (!pconfig) {
 122                        ret = -ENOMEM;
 123                        goto free_group;
 124                }
 125
 126                new_map[i].type = PIN_MAP_TYPE_CONFIGS_GROUP;
 127                new_map[i].data.configs.group_or_pin = purecfg ? np->name :
 128                                                                 group;
 129                new_map[i].data.configs.configs = pconfig;
 130                new_map[i].data.configs.num_configs = 1;
 131        }
 132
 133        *map = new_map;
 134        *num_maps = new_num;
 135
 136        return 0;
 137
 138free_group:
 139        if (!purecfg)
 140                kfree(group);
 141free:
 142        kfree(new_map);
 143        return ret;
 144}
 145
 146static void mxs_dt_free_map(struct pinctrl_dev *pctldev,
 147                            struct pinctrl_map *map, unsigned num_maps)
 148{
 149        u32 i;
 150
 151        for (i = 0; i < num_maps; i++) {
 152                if (map[i].type == PIN_MAP_TYPE_MUX_GROUP)
 153                        kfree(map[i].data.mux.group);
 154                if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
 155                        kfree(map[i].data.configs.configs);
 156        }
 157
 158        kfree(map);
 159}
 160
 161static const struct pinctrl_ops mxs_pinctrl_ops = {
 162        .get_groups_count = mxs_get_groups_count,
 163        .get_group_name = mxs_get_group_name,
 164        .get_group_pins = mxs_get_group_pins,
 165        .pin_dbg_show = mxs_pin_dbg_show,
 166        .dt_node_to_map = mxs_dt_node_to_map,
 167        .dt_free_map = mxs_dt_free_map,
 168};
 169
 170static int mxs_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
 171{
 172        struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
 173
 174        return d->soc->nfunctions;
 175}
 176
 177static const char *mxs_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
 178                                             unsigned function)
 179{
 180        struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
 181
 182        return d->soc->functions[function].name;
 183}
 184
 185static int mxs_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
 186                                       unsigned group,
 187                                       const char * const **groups,
 188                                       unsigned * const num_groups)
 189{
 190        struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
 191
 192        *groups = d->soc->functions[group].groups;
 193        *num_groups = d->soc->functions[group].ngroups;
 194
 195        return 0;
 196}
 197
 198static int mxs_pinctrl_enable(struct pinctrl_dev *pctldev, unsigned selector,
 199                              unsigned group)
 200{
 201        struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
 202        struct mxs_group *g = &d->soc->groups[group];
 203        void __iomem *reg;
 204        u8 bank, shift;
 205        u16 pin;
 206        u32 i;
 207
 208        for (i = 0; i < g->npins; i++) {
 209                bank = PINID_TO_BANK(g->pins[i]);
 210                pin = PINID_TO_PIN(g->pins[i]);
 211                reg = d->base + d->soc->regs->muxsel;
 212                reg += bank * 0x20 + pin / 16 * 0x10;
 213                shift = pin % 16 * 2;
 214
 215                writel(0x3 << shift, reg + CLR);
 216                writel(g->muxsel[i] << shift, reg + SET);
 217        }
 218
 219        return 0;
 220}
 221
 222static const struct pinmux_ops mxs_pinmux_ops = {
 223        .get_functions_count = mxs_pinctrl_get_funcs_count,
 224        .get_function_name = mxs_pinctrl_get_func_name,
 225        .get_function_groups = mxs_pinctrl_get_func_groups,
 226        .enable = mxs_pinctrl_enable,
 227};
 228
 229static int mxs_pinconf_get(struct pinctrl_dev *pctldev,
 230                           unsigned pin, unsigned long *config)
 231{
 232        return -ENOTSUPP;
 233}
 234
 235static int mxs_pinconf_set(struct pinctrl_dev *pctldev,
 236                           unsigned pin, unsigned long *configs,
 237                           unsigned num_configs)
 238{
 239        return -ENOTSUPP;
 240}
 241
 242static int mxs_pinconf_group_get(struct pinctrl_dev *pctldev,
 243                                 unsigned group, unsigned long *config)
 244{
 245        struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
 246
 247        *config = d->soc->groups[group].config;
 248
 249        return 0;
 250}
 251
 252static int mxs_pinconf_group_set(struct pinctrl_dev *pctldev,
 253                                 unsigned group, unsigned long *configs,
 254                                 unsigned num_configs)
 255{
 256        struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
 257        struct mxs_group *g = &d->soc->groups[group];
 258        void __iomem *reg;
 259        u8 ma, vol, pull, bank, shift;
 260        u16 pin;
 261        u32 i;
 262        int n;
 263        unsigned long config;
 264
 265        for (n = 0; n < num_configs; n++) {
 266                config = configs[n];
 267
 268                ma = CONFIG_TO_MA(config);
 269                vol = CONFIG_TO_VOL(config);
 270                pull = CONFIG_TO_PULL(config);
 271
 272                for (i = 0; i < g->npins; i++) {
 273                        bank = PINID_TO_BANK(g->pins[i]);
 274                        pin = PINID_TO_PIN(g->pins[i]);
 275
 276                        /* drive */
 277                        reg = d->base + d->soc->regs->drive;
 278                        reg += bank * 0x40 + pin / 8 * 0x10;
 279
 280                        /* mA */
 281                        if (config & MA_PRESENT) {
 282                                shift = pin % 8 * 4;
 283                                writel(0x3 << shift, reg + CLR);
 284                                writel(ma << shift, reg + SET);
 285                        }
 286
 287                        /* vol */
 288                        if (config & VOL_PRESENT) {
 289                                shift = pin % 8 * 4 + 2;
 290                                if (vol)
 291                                        writel(1 << shift, reg + SET);
 292                                else
 293                                        writel(1 << shift, reg + CLR);
 294                        }
 295
 296                        /* pull */
 297                        if (config & PULL_PRESENT) {
 298                                reg = d->base + d->soc->regs->pull;
 299                                reg += bank * 0x10;
 300                                shift = pin;
 301                                if (pull)
 302                                        writel(1 << shift, reg + SET);
 303                                else
 304                                        writel(1 << shift, reg + CLR);
 305                        }
 306                }
 307
 308                /* cache the config value for mxs_pinconf_group_get() */
 309                g->config = config;
 310
 311        } /* for each config */
 312
 313        return 0;
 314}
 315
 316static void mxs_pinconf_dbg_show(struct pinctrl_dev *pctldev,
 317                                 struct seq_file *s, unsigned pin)
 318{
 319        /* Not support */
 320}
 321
 322static void mxs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
 323                                       struct seq_file *s, unsigned group)
 324{
 325        unsigned long config;
 326
 327        if (!mxs_pinconf_group_get(pctldev, group, &config))
 328                seq_printf(s, "0x%lx", config);
 329}
 330
 331static const struct pinconf_ops mxs_pinconf_ops = {
 332        .pin_config_get = mxs_pinconf_get,
 333        .pin_config_set = mxs_pinconf_set,
 334        .pin_config_group_get = mxs_pinconf_group_get,
 335        .pin_config_group_set = mxs_pinconf_group_set,
 336        .pin_config_dbg_show = mxs_pinconf_dbg_show,
 337        .pin_config_group_dbg_show = mxs_pinconf_group_dbg_show,
 338};
 339
 340static struct pinctrl_desc mxs_pinctrl_desc = {
 341        .pctlops = &mxs_pinctrl_ops,
 342        .pmxops = &mxs_pinmux_ops,
 343        .confops = &mxs_pinconf_ops,
 344        .owner = THIS_MODULE,
 345};
 346
 347static int mxs_pinctrl_parse_group(struct platform_device *pdev,
 348                                   struct device_node *np, int idx,
 349                                   const char **out_name)
 350{
 351        struct mxs_pinctrl_data *d = platform_get_drvdata(pdev);
 352        struct mxs_group *g = &d->soc->groups[idx];
 353        struct property *prop;
 354        const char *propname = "fsl,pinmux-ids";
 355        char *group;
 356        int length = strlen(np->name) + SUFFIX_LEN;
 357        u32 val, i;
 358
 359        group = devm_kzalloc(&pdev->dev, length, GFP_KERNEL);
 360        if (!group)
 361                return -ENOMEM;
 362        if (of_property_read_u32(np, "reg", &val))
 363                snprintf(group, length, "%s", np->name);
 364        else
 365                snprintf(group, length, "%s.%d", np->name, val);
 366        g->name = group;
 367
 368        prop = of_find_property(np, propname, &length);
 369        if (!prop)
 370                return -EINVAL;
 371        g->npins = length / sizeof(u32);
 372
 373        g->pins = devm_kzalloc(&pdev->dev, g->npins * sizeof(*g->pins),
 374                               GFP_KERNEL);
 375        if (!g->pins)
 376                return -ENOMEM;
 377
 378        g->muxsel = devm_kzalloc(&pdev->dev, g->npins * sizeof(*g->muxsel),
 379                                 GFP_KERNEL);
 380        if (!g->muxsel)
 381                return -ENOMEM;
 382
 383        of_property_read_u32_array(np, propname, g->pins, g->npins);
 384        for (i = 0; i < g->npins; i++) {
 385                g->muxsel[i] = MUXID_TO_MUXSEL(g->pins[i]);
 386                g->pins[i] = MUXID_TO_PINID(g->pins[i]);
 387        }
 388
 389        if (out_name)
 390                *out_name = g->name;
 391
 392        return 0;
 393}
 394
 395static int mxs_pinctrl_probe_dt(struct platform_device *pdev,
 396                                struct mxs_pinctrl_data *d)
 397{
 398        struct mxs_pinctrl_soc_data *soc = d->soc;
 399        struct device_node *np = pdev->dev.of_node;
 400        struct device_node *child;
 401        struct mxs_function *f;
 402        const char *gpio_compat = "fsl,mxs-gpio";
 403        const char *fn, *fnull = "";
 404        int i = 0, idxf = 0, idxg = 0;
 405        int ret;
 406        u32 val;
 407
 408        child = of_get_next_child(np, NULL);
 409        if (!child) {
 410                dev_err(&pdev->dev, "no group is defined\n");
 411                return -ENOENT;
 412        }
 413
 414        /* Count total functions and groups */
 415        fn = fnull;
 416        for_each_child_of_node(np, child) {
 417                if (of_device_is_compatible(child, gpio_compat))
 418                        continue;
 419                soc->ngroups++;
 420                /* Skip pure pinconf node */
 421                if (of_property_read_u32(child, "reg", &val))
 422                        continue;
 423                if (strcmp(fn, child->name)) {
 424                        fn = child->name;
 425                        soc->nfunctions++;
 426                }
 427        }
 428
 429        soc->functions = devm_kzalloc(&pdev->dev, soc->nfunctions *
 430                                      sizeof(*soc->functions), GFP_KERNEL);
 431        if (!soc->functions)
 432                return -ENOMEM;
 433
 434        soc->groups = devm_kzalloc(&pdev->dev, soc->ngroups *
 435                                   sizeof(*soc->groups), GFP_KERNEL);
 436        if (!soc->groups)
 437                return -ENOMEM;
 438
 439        /* Count groups for each function */
 440        fn = fnull;
 441        f = &soc->functions[idxf];
 442        for_each_child_of_node(np, child) {
 443                if (of_device_is_compatible(child, gpio_compat))
 444                        continue;
 445                if (of_property_read_u32(child, "reg", &val))
 446                        continue;
 447                if (strcmp(fn, child->name)) {
 448                        f = &soc->functions[idxf++];
 449                        f->name = fn = child->name;
 450                }
 451                f->ngroups++;
 452        };
 453
 454        /* Get groups for each function */
 455        idxf = 0;
 456        fn = fnull;
 457        for_each_child_of_node(np, child) {
 458                if (of_device_is_compatible(child, gpio_compat))
 459                        continue;
 460                if (of_property_read_u32(child, "reg", &val)) {
 461                        ret = mxs_pinctrl_parse_group(pdev, child,
 462                                                      idxg++, NULL);
 463                        if (ret)
 464                                return ret;
 465                        continue;
 466                }
 467
 468                if (strcmp(fn, child->name)) {
 469                        f = &soc->functions[idxf++];
 470                        f->groups = devm_kzalloc(&pdev->dev, f->ngroups *
 471                                                 sizeof(*f->groups),
 472                                                 GFP_KERNEL);
 473                        if (!f->groups)
 474                                return -ENOMEM;
 475                        fn = child->name;
 476                        i = 0;
 477                }
 478                ret = mxs_pinctrl_parse_group(pdev, child, idxg++,
 479                                              &f->groups[i++]);
 480                if (ret)
 481                        return ret;
 482        }
 483
 484        return 0;
 485}
 486
 487int mxs_pinctrl_probe(struct platform_device *pdev,
 488                      struct mxs_pinctrl_soc_data *soc)
 489{
 490        struct device_node *np = pdev->dev.of_node;
 491        struct mxs_pinctrl_data *d;
 492        int ret;
 493
 494        d = devm_kzalloc(&pdev->dev, sizeof(*d), GFP_KERNEL);
 495        if (!d)
 496                return -ENOMEM;
 497
 498        d->dev = &pdev->dev;
 499        d->soc = soc;
 500
 501        d->base = of_iomap(np, 0);
 502        if (!d->base)
 503                return -EADDRNOTAVAIL;
 504
 505        mxs_pinctrl_desc.pins = d->soc->pins;
 506        mxs_pinctrl_desc.npins = d->soc->npins;
 507        mxs_pinctrl_desc.name = dev_name(&pdev->dev);
 508
 509        platform_set_drvdata(pdev, d);
 510
 511        ret = mxs_pinctrl_probe_dt(pdev, d);
 512        if (ret) {
 513                dev_err(&pdev->dev, "dt probe failed: %d\n", ret);
 514                goto err;
 515        }
 516
 517        d->pctl = pinctrl_register(&mxs_pinctrl_desc, &pdev->dev, d);
 518        if (!d->pctl) {
 519                dev_err(&pdev->dev, "Couldn't register MXS pinctrl driver\n");
 520                ret = -EINVAL;
 521                goto err;
 522        }
 523
 524        return 0;
 525
 526err:
 527        iounmap(d->base);
 528        return ret;
 529}
 530EXPORT_SYMBOL_GPL(mxs_pinctrl_probe);
 531
 532int mxs_pinctrl_remove(struct platform_device *pdev)
 533{
 534        struct mxs_pinctrl_data *d = platform_get_drvdata(pdev);
 535
 536        pinctrl_unregister(d->pctl);
 537        iounmap(d->base);
 538
 539        return 0;
 540}
 541EXPORT_SYMBOL_GPL(mxs_pinctrl_remove);
 542
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