linux/drivers/mfd/palmas.c
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   1/*
   2 * TI Palmas MFD Driver
   3 *
   4 * Copyright 2011-2012 Texas Instruments Inc.
   5 *
   6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
   7 *
   8 *  This program is free software; you can redistribute it and/or modify it
   9 *  under  the terms of the GNU General  Public License as published by the
  10 *  Free Software Foundation;  either version 2 of the License, or (at your
  11 *  option) any later version.
  12 *
  13 */
  14
  15#include <linux/module.h>
  16#include <linux/moduleparam.h>
  17#include <linux/init.h>
  18#include <linux/slab.h>
  19#include <linux/i2c.h>
  20#include <linux/interrupt.h>
  21#include <linux/irq.h>
  22#include <linux/regmap.h>
  23#include <linux/err.h>
  24#include <linux/mfd/core.h>
  25#include <linux/mfd/palmas.h>
  26#include <linux/of_device.h>
  27
  28#define PALMAS_EXT_REQ (PALMAS_EXT_CONTROL_ENABLE1 |    \
  29                        PALMAS_EXT_CONTROL_ENABLE2 |    \
  30                        PALMAS_EXT_CONTROL_NSLEEP)
  31
  32struct palmas_sleep_requestor_info {
  33        int id;
  34        int reg_offset;
  35        int bit_pos;
  36};
  37
  38#define EXTERNAL_REQUESTOR(_id, _offset, _pos)          \
  39        [PALMAS_EXTERNAL_REQSTR_ID_##_id] = {           \
  40                .id = PALMAS_EXTERNAL_REQSTR_ID_##_id,  \
  41                .reg_offset = _offset,                  \
  42                .bit_pos = _pos,                        \
  43        }
  44
  45static struct palmas_sleep_requestor_info sleep_req_info[] = {
  46        EXTERNAL_REQUESTOR(REGEN1, 0, 0),
  47        EXTERNAL_REQUESTOR(REGEN2, 0, 1),
  48        EXTERNAL_REQUESTOR(SYSEN1, 0, 2),
  49        EXTERNAL_REQUESTOR(SYSEN2, 0, 3),
  50        EXTERNAL_REQUESTOR(CLK32KG, 0, 4),
  51        EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5),
  52        EXTERNAL_REQUESTOR(REGEN3, 0, 6),
  53        EXTERNAL_REQUESTOR(SMPS12, 1, 0),
  54        EXTERNAL_REQUESTOR(SMPS3, 1, 1),
  55        EXTERNAL_REQUESTOR(SMPS45, 1, 2),
  56        EXTERNAL_REQUESTOR(SMPS6, 1, 3),
  57        EXTERNAL_REQUESTOR(SMPS7, 1, 4),
  58        EXTERNAL_REQUESTOR(SMPS8, 1, 5),
  59        EXTERNAL_REQUESTOR(SMPS9, 1, 6),
  60        EXTERNAL_REQUESTOR(SMPS10, 1, 7),
  61        EXTERNAL_REQUESTOR(LDO1, 2, 0),
  62        EXTERNAL_REQUESTOR(LDO2, 2, 1),
  63        EXTERNAL_REQUESTOR(LDO3, 2, 2),
  64        EXTERNAL_REQUESTOR(LDO4, 2, 3),
  65        EXTERNAL_REQUESTOR(LDO5, 2, 4),
  66        EXTERNAL_REQUESTOR(LDO6, 2, 5),
  67        EXTERNAL_REQUESTOR(LDO7, 2, 6),
  68        EXTERNAL_REQUESTOR(LDO8, 2, 7),
  69        EXTERNAL_REQUESTOR(LDO9, 3, 0),
  70        EXTERNAL_REQUESTOR(LDOLN, 3, 1),
  71        EXTERNAL_REQUESTOR(LDOUSB, 3, 2),
  72};
  73
  74static const struct regmap_config palmas_regmap_config[PALMAS_NUM_CLIENTS] = {
  75        {
  76                .reg_bits = 8,
  77                .val_bits = 8,
  78                .max_register = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
  79                                        PALMAS_PRIMARY_SECONDARY_PAD3),
  80        },
  81        {
  82                .reg_bits = 8,
  83                .val_bits = 8,
  84                .max_register = PALMAS_BASE_TO_REG(PALMAS_GPADC_BASE,
  85                                        PALMAS_GPADC_SMPS_VSEL_MONITORING),
  86        },
  87        {
  88                .reg_bits = 8,
  89                .val_bits = 8,
  90                .max_register = PALMAS_BASE_TO_REG(PALMAS_TRIM_GPADC_BASE,
  91                                        PALMAS_GPADC_TRIM16),
  92        },
  93};
  94
  95static const struct regmap_irq palmas_irqs[] = {
  96        /* INT1 IRQs */
  97        [PALMAS_CHARG_DET_N_VBUS_OVV_IRQ] = {
  98                .mask = PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV,
  99        },
 100        [PALMAS_PWRON_IRQ] = {
 101                .mask = PALMAS_INT1_STATUS_PWRON,
 102        },
 103        [PALMAS_LONG_PRESS_KEY_IRQ] = {
 104                .mask = PALMAS_INT1_STATUS_LONG_PRESS_KEY,
 105        },
 106        [PALMAS_RPWRON_IRQ] = {
 107                .mask = PALMAS_INT1_STATUS_RPWRON,
 108        },
 109        [PALMAS_PWRDOWN_IRQ] = {
 110                .mask = PALMAS_INT1_STATUS_PWRDOWN,
 111        },
 112        [PALMAS_HOTDIE_IRQ] = {
 113                .mask = PALMAS_INT1_STATUS_HOTDIE,
 114        },
 115        [PALMAS_VSYS_MON_IRQ] = {
 116                .mask = PALMAS_INT1_STATUS_VSYS_MON,
 117        },
 118        [PALMAS_VBAT_MON_IRQ] = {
 119                .mask = PALMAS_INT1_STATUS_VBAT_MON,
 120        },
 121        /* INT2 IRQs*/
 122        [PALMAS_RTC_ALARM_IRQ] = {
 123                .mask = PALMAS_INT2_STATUS_RTC_ALARM,
 124                .reg_offset = 1,
 125        },
 126        [PALMAS_RTC_TIMER_IRQ] = {
 127                .mask = PALMAS_INT2_STATUS_RTC_TIMER,
 128                .reg_offset = 1,
 129        },
 130        [PALMAS_WDT_IRQ] = {
 131                .mask = PALMAS_INT2_STATUS_WDT,
 132                .reg_offset = 1,
 133        },
 134        [PALMAS_BATREMOVAL_IRQ] = {
 135                .mask = PALMAS_INT2_STATUS_BATREMOVAL,
 136                .reg_offset = 1,
 137        },
 138        [PALMAS_RESET_IN_IRQ] = {
 139                .mask = PALMAS_INT2_STATUS_RESET_IN,
 140                .reg_offset = 1,
 141        },
 142        [PALMAS_FBI_BB_IRQ] = {
 143                .mask = PALMAS_INT2_STATUS_FBI_BB,
 144                .reg_offset = 1,
 145        },
 146        [PALMAS_SHORT_IRQ] = {
 147                .mask = PALMAS_INT2_STATUS_SHORT,
 148                .reg_offset = 1,
 149        },
 150        [PALMAS_VAC_ACOK_IRQ] = {
 151                .mask = PALMAS_INT2_STATUS_VAC_ACOK,
 152                .reg_offset = 1,
 153        },
 154        /* INT3 IRQs */
 155        [PALMAS_GPADC_AUTO_0_IRQ] = {
 156                .mask = PALMAS_INT3_STATUS_GPADC_AUTO_0,
 157                .reg_offset = 2,
 158        },
 159        [PALMAS_GPADC_AUTO_1_IRQ] = {
 160                .mask = PALMAS_INT3_STATUS_GPADC_AUTO_1,
 161                .reg_offset = 2,
 162        },
 163        [PALMAS_GPADC_EOC_SW_IRQ] = {
 164                .mask = PALMAS_INT3_STATUS_GPADC_EOC_SW,
 165                .reg_offset = 2,
 166        },
 167        [PALMAS_GPADC_EOC_RT_IRQ] = {
 168                .mask = PALMAS_INT3_STATUS_GPADC_EOC_RT,
 169                .reg_offset = 2,
 170        },
 171        [PALMAS_ID_OTG_IRQ] = {
 172                .mask = PALMAS_INT3_STATUS_ID_OTG,
 173                .reg_offset = 2,
 174        },
 175        [PALMAS_ID_IRQ] = {
 176                .mask = PALMAS_INT3_STATUS_ID,
 177                .reg_offset = 2,
 178        },
 179        [PALMAS_VBUS_OTG_IRQ] = {
 180                .mask = PALMAS_INT3_STATUS_VBUS_OTG,
 181                .reg_offset = 2,
 182        },
 183        [PALMAS_VBUS_IRQ] = {
 184                .mask = PALMAS_INT3_STATUS_VBUS,
 185                .reg_offset = 2,
 186        },
 187        /* INT4 IRQs */
 188        [PALMAS_GPIO_0_IRQ] = {
 189                .mask = PALMAS_INT4_STATUS_GPIO_0,
 190                .reg_offset = 3,
 191        },
 192        [PALMAS_GPIO_1_IRQ] = {
 193                .mask = PALMAS_INT4_STATUS_GPIO_1,
 194                .reg_offset = 3,
 195        },
 196        [PALMAS_GPIO_2_IRQ] = {
 197                .mask = PALMAS_INT4_STATUS_GPIO_2,
 198                .reg_offset = 3,
 199        },
 200        [PALMAS_GPIO_3_IRQ] = {
 201                .mask = PALMAS_INT4_STATUS_GPIO_3,
 202                .reg_offset = 3,
 203        },
 204        [PALMAS_GPIO_4_IRQ] = {
 205                .mask = PALMAS_INT4_STATUS_GPIO_4,
 206                .reg_offset = 3,
 207        },
 208        [PALMAS_GPIO_5_IRQ] = {
 209                .mask = PALMAS_INT4_STATUS_GPIO_5,
 210                .reg_offset = 3,
 211        },
 212        [PALMAS_GPIO_6_IRQ] = {
 213                .mask = PALMAS_INT4_STATUS_GPIO_6,
 214                .reg_offset = 3,
 215        },
 216        [PALMAS_GPIO_7_IRQ] = {
 217                .mask = PALMAS_INT4_STATUS_GPIO_7,
 218                .reg_offset = 3,
 219        },
 220};
 221
 222static struct regmap_irq_chip palmas_irq_chip = {
 223        .name = "palmas",
 224        .irqs = palmas_irqs,
 225        .num_irqs = ARRAY_SIZE(palmas_irqs),
 226
 227        .num_regs = 4,
 228        .irq_reg_stride = 5,
 229        .status_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
 230                        PALMAS_INT1_STATUS),
 231        .mask_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
 232                        PALMAS_INT1_MASK),
 233};
 234
 235int palmas_ext_control_req_config(struct palmas *palmas,
 236        enum palmas_external_requestor_id id,  int ext_ctrl, bool enable)
 237{
 238        int preq_mask_bit = 0;
 239        int reg_add = 0;
 240        int bit_pos;
 241        int ret;
 242
 243        if (!(ext_ctrl & PALMAS_EXT_REQ))
 244                return 0;
 245
 246        if (id >= PALMAS_EXTERNAL_REQSTR_ID_MAX)
 247                return 0;
 248
 249        if (ext_ctrl & PALMAS_EXT_CONTROL_NSLEEP) {
 250                reg_add = PALMAS_NSLEEP_RES_ASSIGN;
 251                preq_mask_bit = 0;
 252        } else if (ext_ctrl & PALMAS_EXT_CONTROL_ENABLE1) {
 253                reg_add = PALMAS_ENABLE1_RES_ASSIGN;
 254                preq_mask_bit = 1;
 255        } else if (ext_ctrl & PALMAS_EXT_CONTROL_ENABLE2) {
 256                reg_add = PALMAS_ENABLE2_RES_ASSIGN;
 257                preq_mask_bit = 2;
 258        }
 259
 260        bit_pos = sleep_req_info[id].bit_pos;
 261        reg_add += sleep_req_info[id].reg_offset;
 262        if (enable)
 263                ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
 264                                reg_add, BIT(bit_pos), BIT(bit_pos));
 265        else
 266                ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
 267                                reg_add, BIT(bit_pos), 0);
 268        if (ret < 0) {
 269                dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n",
 270                        reg_add, ret);
 271                return ret;
 272        }
 273
 274        /* Unmask the PREQ */
 275        ret = palmas_update_bits(palmas, PALMAS_PMU_CONTROL_BASE,
 276                        PALMAS_POWER_CTRL, BIT(preq_mask_bit), 0);
 277        if (ret < 0) {
 278                dev_err(palmas->dev, "POWER_CTRL register update failed %d\n",
 279                        ret);
 280                return ret;
 281        }
 282        return ret;
 283}
 284EXPORT_SYMBOL_GPL(palmas_ext_control_req_config);
 285
 286static int palmas_set_pdata_irq_flag(struct i2c_client *i2c,
 287                struct palmas_platform_data *pdata)
 288{
 289        struct irq_data *irq_data = irq_get_irq_data(i2c->irq);
 290        if (!irq_data) {
 291                dev_err(&i2c->dev, "Invalid IRQ: %d\n", i2c->irq);
 292                return -EINVAL;
 293        }
 294
 295        pdata->irq_flags = irqd_get_trigger_type(irq_data);
 296        dev_info(&i2c->dev, "Irq flag is 0x%08x\n", pdata->irq_flags);
 297        return 0;
 298}
 299
 300static void palmas_dt_to_pdata(struct i2c_client *i2c,
 301                struct palmas_platform_data *pdata)
 302{
 303        struct device_node *node = i2c->dev.of_node;
 304        int ret;
 305        u32 prop;
 306
 307        ret = of_property_read_u32(node, "ti,mux-pad1", &prop);
 308        if (!ret) {
 309                pdata->mux_from_pdata = 1;
 310                pdata->pad1 = prop;
 311        }
 312
 313        ret = of_property_read_u32(node, "ti,mux-pad2", &prop);
 314        if (!ret) {
 315                pdata->mux_from_pdata = 1;
 316                pdata->pad2 = prop;
 317        }
 318
 319        /* The default for this register is all masked */
 320        ret = of_property_read_u32(node, "ti,power-ctrl", &prop);
 321        if (!ret)
 322                pdata->power_ctrl = prop;
 323        else
 324                pdata->power_ctrl = PALMAS_POWER_CTRL_NSLEEP_MASK |
 325                                        PALMAS_POWER_CTRL_ENABLE1_MASK |
 326                                        PALMAS_POWER_CTRL_ENABLE2_MASK;
 327        if (i2c->irq)
 328                palmas_set_pdata_irq_flag(i2c, pdata);
 329
 330        pdata->pm_off = of_property_read_bool(node,
 331                        "ti,system-power-controller");
 332}
 333
 334static struct palmas *palmas_dev;
 335static void palmas_power_off(void)
 336{
 337        unsigned int addr;
 338        int ret, slave;
 339
 340        if (!palmas_dev)
 341                return;
 342
 343        slave = PALMAS_BASE_TO_SLAVE(PALMAS_PMU_CONTROL_BASE);
 344        addr = PALMAS_BASE_TO_REG(PALMAS_PMU_CONTROL_BASE, PALMAS_DEV_CTRL);
 345
 346        ret = regmap_update_bits(
 347                        palmas_dev->regmap[slave],
 348                        addr,
 349                        PALMAS_DEV_CTRL_DEV_ON,
 350                        0);
 351
 352        if (ret)
 353                pr_err("%s: Unable to write to DEV_CTRL_DEV_ON: %d\n",
 354                                __func__, ret);
 355}
 356
 357static unsigned int palmas_features = PALMAS_PMIC_FEATURE_SMPS10_BOOST;
 358static unsigned int tps659038_features;
 359
 360static const struct of_device_id of_palmas_match_tbl[] = {
 361        {
 362                .compatible = "ti,palmas",
 363                .data = &palmas_features,
 364        },
 365        {
 366                .compatible = "ti,tps659038",
 367                .data = &tps659038_features,
 368        },
 369        { },
 370};
 371
 372static int palmas_i2c_probe(struct i2c_client *i2c,
 373                            const struct i2c_device_id *id)
 374{
 375        struct palmas *palmas;
 376        struct palmas_platform_data *pdata;
 377        struct device_node *node = i2c->dev.of_node;
 378        int ret = 0, i;
 379        unsigned int reg, addr, *features;
 380        int slave;
 381        const struct of_device_id *match;
 382
 383        pdata = dev_get_platdata(&i2c->dev);
 384
 385        if (node && !pdata) {
 386                pdata = devm_kzalloc(&i2c->dev, sizeof(*pdata), GFP_KERNEL);
 387
 388                if (!pdata)
 389                        return -ENOMEM;
 390
 391                palmas_dt_to_pdata(i2c, pdata);
 392        }
 393
 394        if (!pdata)
 395                return -EINVAL;
 396
 397        palmas = devm_kzalloc(&i2c->dev, sizeof(struct palmas), GFP_KERNEL);
 398        if (palmas == NULL)
 399                return -ENOMEM;
 400
 401        i2c_set_clientdata(i2c, palmas);
 402        palmas->dev = &i2c->dev;
 403        palmas->irq = i2c->irq;
 404
 405        match = of_match_device(of_match_ptr(of_palmas_match_tbl), &i2c->dev);
 406
 407        if (!match)
 408                return -ENODATA;
 409
 410        features = (unsigned int *)match->data;
 411        palmas->features = *features;
 412
 413        for (i = 0; i < PALMAS_NUM_CLIENTS; i++) {
 414                if (i == 0)
 415                        palmas->i2c_clients[i] = i2c;
 416                else {
 417                        palmas->i2c_clients[i] =
 418                                        i2c_new_dummy(i2c->adapter,
 419                                                        i2c->addr + i);
 420                        if (!palmas->i2c_clients[i]) {
 421                                dev_err(palmas->dev,
 422                                        "can't attach client %d\n", i);
 423                                ret = -ENOMEM;
 424                                goto err;
 425                        }
 426                        palmas->i2c_clients[i]->dev.of_node = of_node_get(node);
 427                }
 428                palmas->regmap[i] = devm_regmap_init_i2c(palmas->i2c_clients[i],
 429                                &palmas_regmap_config[i]);
 430                if (IS_ERR(palmas->regmap[i])) {
 431                        ret = PTR_ERR(palmas->regmap[i]);
 432                        dev_err(palmas->dev,
 433                                "Failed to allocate regmap %d, err: %d\n",
 434                                i, ret);
 435                        goto err;
 436                }
 437        }
 438
 439        if (!palmas->irq) {
 440                dev_warn(palmas->dev, "IRQ missing: skipping irq request\n");
 441                goto no_irq;
 442        }
 443
 444        /* Change interrupt line output polarity */
 445        if (pdata->irq_flags & IRQ_TYPE_LEVEL_HIGH)
 446                reg = PALMAS_POLARITY_CTRL_INT_POLARITY;
 447        else
 448                reg = 0;
 449        ret = palmas_update_bits(palmas, PALMAS_PU_PD_OD_BASE,
 450                        PALMAS_POLARITY_CTRL, PALMAS_POLARITY_CTRL_INT_POLARITY,
 451                        reg);
 452        if (ret < 0) {
 453                dev_err(palmas->dev, "POLARITY_CTRL updat failed: %d\n", ret);
 454                goto err;
 455        }
 456
 457        /* Change IRQ into clear on read mode for efficiency */
 458        slave = PALMAS_BASE_TO_SLAVE(PALMAS_INTERRUPT_BASE);
 459        addr = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE, PALMAS_INT_CTRL);
 460        reg = PALMAS_INT_CTRL_INT_CLEAR;
 461
 462        regmap_write(palmas->regmap[slave], addr, reg);
 463
 464        ret = regmap_add_irq_chip(palmas->regmap[slave], palmas->irq,
 465                        IRQF_ONESHOT | pdata->irq_flags, 0, &palmas_irq_chip,
 466                        &palmas->irq_data);
 467        if (ret < 0)
 468                goto err;
 469
 470no_irq:
 471        slave = PALMAS_BASE_TO_SLAVE(PALMAS_PU_PD_OD_BASE);
 472        addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
 473                        PALMAS_PRIMARY_SECONDARY_PAD1);
 474
 475        if (pdata->mux_from_pdata) {
 476                reg = pdata->pad1;
 477                ret = regmap_write(palmas->regmap[slave], addr, reg);
 478                if (ret)
 479                        goto err_irq;
 480        } else {
 481                ret = regmap_read(palmas->regmap[slave], addr, &reg);
 482                if (ret)
 483                        goto err_irq;
 484        }
 485
 486        if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0))
 487                palmas->gpio_muxed |= PALMAS_GPIO_0_MUXED;
 488        if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK))
 489                palmas->gpio_muxed |= PALMAS_GPIO_1_MUXED;
 490        else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK) ==
 491                        (2 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT))
 492                palmas->led_muxed |= PALMAS_LED1_MUXED;
 493        else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK) ==
 494                        (3 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT))
 495                palmas->pwm_muxed |= PALMAS_PWM1_MUXED;
 496        if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK))
 497                palmas->gpio_muxed |= PALMAS_GPIO_2_MUXED;
 498        else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK) ==
 499                        (2 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT))
 500                palmas->led_muxed |= PALMAS_LED2_MUXED;
 501        else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK) ==
 502                        (3 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT))
 503                palmas->pwm_muxed |= PALMAS_PWM2_MUXED;
 504        if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3))
 505                palmas->gpio_muxed |= PALMAS_GPIO_3_MUXED;
 506
 507        addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
 508                        PALMAS_PRIMARY_SECONDARY_PAD2);
 509
 510        if (pdata->mux_from_pdata) {
 511                reg = pdata->pad2;
 512                ret = regmap_write(palmas->regmap[slave], addr, reg);
 513                if (ret)
 514                        goto err_irq;
 515        } else {
 516                ret = regmap_read(palmas->regmap[slave], addr, &reg);
 517                if (ret)
 518                        goto err_irq;
 519        }
 520
 521        if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4))
 522                palmas->gpio_muxed |= PALMAS_GPIO_4_MUXED;
 523        if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_MASK))
 524                palmas->gpio_muxed |= PALMAS_GPIO_5_MUXED;
 525        if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6))
 526                palmas->gpio_muxed |= PALMAS_GPIO_6_MUXED;
 527        if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_MASK))
 528                palmas->gpio_muxed |= PALMAS_GPIO_7_MUXED;
 529
 530        dev_info(palmas->dev, "Muxing GPIO %x, PWM %x, LED %x\n",
 531                        palmas->gpio_muxed, palmas->pwm_muxed,
 532                        palmas->led_muxed);
 533
 534        reg = pdata->power_ctrl;
 535
 536        slave = PALMAS_BASE_TO_SLAVE(PALMAS_PMU_CONTROL_BASE);
 537        addr = PALMAS_BASE_TO_REG(PALMAS_PMU_CONTROL_BASE, PALMAS_POWER_CTRL);
 538
 539        ret = regmap_write(palmas->regmap[slave], addr, reg);
 540        if (ret)
 541                goto err_irq;
 542
 543        /*
 544         * If we are probing with DT do this the DT way and return here
 545         * otherwise continue and add devices using mfd helpers.
 546         */
 547        if (node) {
 548                ret = of_platform_populate(node, NULL, NULL, &i2c->dev);
 549                if (ret < 0) {
 550                        goto err_irq;
 551                } else if (pdata->pm_off && !pm_power_off) {
 552                        palmas_dev = palmas;
 553                        pm_power_off = palmas_power_off;
 554                        return ret;
 555                }
 556        }
 557
 558        return ret;
 559
 560err_irq:
 561        regmap_del_irq_chip(palmas->irq, palmas->irq_data);
 562err:
 563        return ret;
 564}
 565
 566static int palmas_i2c_remove(struct i2c_client *i2c)
 567{
 568        struct palmas *palmas = i2c_get_clientdata(i2c);
 569
 570        mfd_remove_devices(palmas->dev);
 571        regmap_del_irq_chip(palmas->irq, palmas->irq_data);
 572
 573        return 0;
 574}
 575
 576static const struct i2c_device_id palmas_i2c_id[] = {
 577        { "palmas", },
 578        { "twl6035", },
 579        { "twl6037", },
 580        { "tps65913", },
 581        { /* end */ }
 582};
 583MODULE_DEVICE_TABLE(i2c, palmas_i2c_id);
 584
 585static struct i2c_driver palmas_i2c_driver = {
 586        .driver = {
 587                   .name = "palmas",
 588                   .of_match_table = of_palmas_match_tbl,
 589                   .owner = THIS_MODULE,
 590        },
 591        .probe = palmas_i2c_probe,
 592        .remove = palmas_i2c_remove,
 593        .id_table = palmas_i2c_id,
 594};
 595
 596static int __init palmas_i2c_init(void)
 597{
 598        return i2c_add_driver(&palmas_i2c_driver);
 599}
 600/* init early so consumer devices can complete system boot */
 601subsys_initcall(palmas_i2c_init);
 602
 603static void __exit palmas_i2c_exit(void)
 604{
 605        i2c_del_driver(&palmas_i2c_driver);
 606}
 607module_exit(palmas_i2c_exit);
 608
 609MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
 610MODULE_DESCRIPTION("Palmas chip family multi-function driver");
 611MODULE_LICENSE("GPL");
 612
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