linux/drivers/mfd/max8997-irq.c
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   1/*
   2 * max8997-irq.c - Interrupt controller support for MAX8997
   3 *
   4 * Copyright (C) 2011 Samsung Electronics Co.Ltd
   5 * MyungJoo Ham <myungjoo.ham@samsung.com>
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License as published by
   9 * the Free Software Foundation; either version 2 of the License, or
  10 * (at your option) any later version.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License
  18 * along with this program; if not, write to the Free Software
  19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20 *
  21 * This driver is based on max8998-irq.c
  22 */
  23
  24#include <linux/err.h>
  25#include <linux/irq.h>
  26#include <linux/interrupt.h>
  27#include <linux/mfd/max8997.h>
  28#include <linux/mfd/max8997-private.h>
  29
  30static const u8 max8997_mask_reg[] = {
  31        [PMIC_INT1] = MAX8997_REG_INT1MSK,
  32        [PMIC_INT2] = MAX8997_REG_INT2MSK,
  33        [PMIC_INT3] = MAX8997_REG_INT3MSK,
  34        [PMIC_INT4] = MAX8997_REG_INT4MSK,
  35        [FUEL_GAUGE] = MAX8997_REG_INVALID,
  36        [MUIC_INT1] = MAX8997_MUIC_REG_INTMASK1,
  37        [MUIC_INT2] = MAX8997_MUIC_REG_INTMASK2,
  38        [MUIC_INT3] = MAX8997_MUIC_REG_INTMASK3,
  39        [GPIO_LOW] = MAX8997_REG_INVALID,
  40        [GPIO_HI] = MAX8997_REG_INVALID,
  41        [FLASH_STATUS] = MAX8997_REG_INVALID,
  42};
  43
  44static struct i2c_client *get_i2c(struct max8997_dev *max8997,
  45                                enum max8997_irq_source src)
  46{
  47        switch (src) {
  48        case PMIC_INT1 ... PMIC_INT4:
  49                return max8997->i2c;
  50        case FUEL_GAUGE:
  51                return NULL;
  52        case MUIC_INT1 ... MUIC_INT3:
  53                return max8997->muic;
  54        case GPIO_LOW ... GPIO_HI:
  55                return max8997->i2c;
  56        case FLASH_STATUS:
  57                return max8997->i2c;
  58        default:
  59                return ERR_PTR(-EINVAL);
  60        }
  61}
  62
  63struct max8997_irq_data {
  64        int mask;
  65        enum max8997_irq_source group;
  66};
  67
  68#define DECLARE_IRQ(idx, _group, _mask)         \
  69        [(idx)] = { .group = (_group), .mask = (_mask) }
  70static const struct max8997_irq_data max8997_irqs[] = {
  71        DECLARE_IRQ(MAX8997_PMICIRQ_PWRONR,     PMIC_INT1, 1 << 0),
  72        DECLARE_IRQ(MAX8997_PMICIRQ_PWRONF,     PMIC_INT1, 1 << 1),
  73        DECLARE_IRQ(MAX8997_PMICIRQ_PWRON1SEC,  PMIC_INT1, 1 << 3),
  74        DECLARE_IRQ(MAX8997_PMICIRQ_JIGONR,     PMIC_INT1, 1 << 4),
  75        DECLARE_IRQ(MAX8997_PMICIRQ_JIGONF,     PMIC_INT1, 1 << 5),
  76        DECLARE_IRQ(MAX8997_PMICIRQ_LOWBAT2,    PMIC_INT1, 1 << 6),
  77        DECLARE_IRQ(MAX8997_PMICIRQ_LOWBAT1,    PMIC_INT1, 1 << 7),
  78
  79        DECLARE_IRQ(MAX8997_PMICIRQ_JIGR,       PMIC_INT2, 1 << 0),
  80        DECLARE_IRQ(MAX8997_PMICIRQ_JIGF,       PMIC_INT2, 1 << 1),
  81        DECLARE_IRQ(MAX8997_PMICIRQ_MR,         PMIC_INT2, 1 << 2),
  82        DECLARE_IRQ(MAX8997_PMICIRQ_DVS1OK,     PMIC_INT2, 1 << 3),
  83        DECLARE_IRQ(MAX8997_PMICIRQ_DVS2OK,     PMIC_INT2, 1 << 4),
  84        DECLARE_IRQ(MAX8997_PMICIRQ_DVS3OK,     PMIC_INT2, 1 << 5),
  85        DECLARE_IRQ(MAX8997_PMICIRQ_DVS4OK,     PMIC_INT2, 1 << 6),
  86
  87        DECLARE_IRQ(MAX8997_PMICIRQ_CHGINS,     PMIC_INT3, 1 << 0),
  88        DECLARE_IRQ(MAX8997_PMICIRQ_CHGRM,      PMIC_INT3, 1 << 1),
  89        DECLARE_IRQ(MAX8997_PMICIRQ_DCINOVP,    PMIC_INT3, 1 << 2),
  90        DECLARE_IRQ(MAX8997_PMICIRQ_TOPOFFR,    PMIC_INT3, 1 << 3),
  91        DECLARE_IRQ(MAX8997_PMICIRQ_CHGRSTF,    PMIC_INT3, 1 << 5),
  92        DECLARE_IRQ(MAX8997_PMICIRQ_MBCHGTMEXPD,        PMIC_INT3, 1 << 7),
  93
  94        DECLARE_IRQ(MAX8997_PMICIRQ_RTC60S,     PMIC_INT4, 1 << 0),
  95        DECLARE_IRQ(MAX8997_PMICIRQ_RTCA1,      PMIC_INT4, 1 << 1),
  96        DECLARE_IRQ(MAX8997_PMICIRQ_RTCA2,      PMIC_INT4, 1 << 2),
  97        DECLARE_IRQ(MAX8997_PMICIRQ_SMPL_INT,   PMIC_INT4, 1 << 3),
  98        DECLARE_IRQ(MAX8997_PMICIRQ_RTC1S,      PMIC_INT4, 1 << 4),
  99        DECLARE_IRQ(MAX8997_PMICIRQ_WTSR,       PMIC_INT4, 1 << 5),
 100
 101        DECLARE_IRQ(MAX8997_MUICIRQ_ADCError,   MUIC_INT1, 1 << 2),
 102        DECLARE_IRQ(MAX8997_MUICIRQ_ADCLow,     MUIC_INT1, 1 << 1),
 103        DECLARE_IRQ(MAX8997_MUICIRQ_ADC,        MUIC_INT1, 1 << 0),
 104
 105        DECLARE_IRQ(MAX8997_MUICIRQ_VBVolt,     MUIC_INT2, 1 << 4),
 106        DECLARE_IRQ(MAX8997_MUICIRQ_DBChg,      MUIC_INT2, 1 << 3),
 107        DECLARE_IRQ(MAX8997_MUICIRQ_DCDTmr,     MUIC_INT2, 1 << 2),
 108        DECLARE_IRQ(MAX8997_MUICIRQ_ChgDetRun,  MUIC_INT2, 1 << 1),
 109        DECLARE_IRQ(MAX8997_MUICIRQ_ChgTyp,     MUIC_INT2, 1 << 0),
 110
 111        DECLARE_IRQ(MAX8997_MUICIRQ_OVP,        MUIC_INT3, 1 << 2),
 112};
 113
 114static void max8997_irq_lock(struct irq_data *data)
 115{
 116        struct max8997_dev *max8997 = irq_get_chip_data(data->irq);
 117
 118        mutex_lock(&max8997->irqlock);
 119}
 120
 121static void max8997_irq_sync_unlock(struct irq_data *data)
 122{
 123        struct max8997_dev *max8997 = irq_get_chip_data(data->irq);
 124        int i;
 125
 126        for (i = 0; i < MAX8997_IRQ_GROUP_NR; i++) {
 127                u8 mask_reg = max8997_mask_reg[i];
 128                struct i2c_client *i2c = get_i2c(max8997, i);
 129
 130                if (mask_reg == MAX8997_REG_INVALID ||
 131                                IS_ERR_OR_NULL(i2c))
 132                        continue;
 133                max8997->irq_masks_cache[i] = max8997->irq_masks_cur[i];
 134
 135                max8997_write_reg(i2c, max8997_mask_reg[i],
 136                                max8997->irq_masks_cur[i]);
 137        }
 138
 139        mutex_unlock(&max8997->irqlock);
 140}
 141
 142static const inline struct max8997_irq_data *
 143irq_to_max8997_irq(struct max8997_dev *max8997, int irq)
 144{
 145        struct irq_data *data = irq_get_irq_data(irq);
 146        return &max8997_irqs[data->hwirq];
 147}
 148
 149static void max8997_irq_mask(struct irq_data *data)
 150{
 151        struct max8997_dev *max8997 = irq_get_chip_data(data->irq);
 152        const struct max8997_irq_data *irq_data = irq_to_max8997_irq(max8997,
 153                                                                data->irq);
 154
 155        max8997->irq_masks_cur[irq_data->group] |= irq_data->mask;
 156}
 157
 158static void max8997_irq_unmask(struct irq_data *data)
 159{
 160        struct max8997_dev *max8997 = irq_get_chip_data(data->irq);
 161        const struct max8997_irq_data *irq_data = irq_to_max8997_irq(max8997,
 162                                                                data->irq);
 163
 164        max8997->irq_masks_cur[irq_data->group] &= ~irq_data->mask;
 165}
 166
 167static struct irq_chip max8997_irq_chip = {
 168        .name                   = "max8997",
 169        .irq_bus_lock           = max8997_irq_lock,
 170        .irq_bus_sync_unlock    = max8997_irq_sync_unlock,
 171        .irq_mask               = max8997_irq_mask,
 172        .irq_unmask             = max8997_irq_unmask,
 173};
 174
 175#define MAX8997_IRQSRC_PMIC             (1 << 1)
 176#define MAX8997_IRQSRC_FUELGAUGE        (1 << 2)
 177#define MAX8997_IRQSRC_MUIC             (1 << 3)
 178#define MAX8997_IRQSRC_GPIO             (1 << 4)
 179#define MAX8997_IRQSRC_FLASH            (1 << 5)
 180static irqreturn_t max8997_irq_thread(int irq, void *data)
 181{
 182        struct max8997_dev *max8997 = data;
 183        u8 irq_reg[MAX8997_IRQ_GROUP_NR] = {};
 184        u8 irq_src;
 185        int ret;
 186        int i, cur_irq;
 187
 188        ret = max8997_read_reg(max8997->i2c, MAX8997_REG_INTSRC, &irq_src);
 189        if (ret < 0) {
 190                dev_err(max8997->dev, "Failed to read interrupt source: %d\n",
 191                                ret);
 192                return IRQ_NONE;
 193        }
 194
 195        if (irq_src & MAX8997_IRQSRC_PMIC) {
 196                /* PMIC INT1 ~ INT4 */
 197                max8997_bulk_read(max8997->i2c, MAX8997_REG_INT1, 4,
 198                                &irq_reg[PMIC_INT1]);
 199        }
 200        if (irq_src & MAX8997_IRQSRC_FUELGAUGE) {
 201                /*
 202                 * TODO: FUEL GAUGE
 203                 *
 204                 * This is to be supported by Max17042 driver. When
 205                 * an interrupt incurs here, it should be relayed to a
 206                 * Max17042 device that is connected (probably by
 207                 * platform-data). However, we do not have interrupt
 208                 * handling in Max17042 driver currently. The Max17042 IRQ
 209                 * driver should be ready to be used as a stand-alone device and
 210                 * a Max8997-dependent device. Because it is not ready in
 211                 * Max17042-side and it is not too critical in operating
 212                 * Max8997, we do not implement this in initial releases.
 213                 */
 214                irq_reg[FUEL_GAUGE] = 0;
 215        }
 216        if (irq_src & MAX8997_IRQSRC_MUIC) {
 217                /* MUIC INT1 ~ INT3 */
 218                max8997_bulk_read(max8997->muic, MAX8997_MUIC_REG_INT1, 3,
 219                                &irq_reg[MUIC_INT1]);
 220        }
 221        if (irq_src & MAX8997_IRQSRC_GPIO) {
 222                /* GPIO Interrupt */
 223                u8 gpio_info[MAX8997_NUM_GPIO];
 224
 225                irq_reg[GPIO_LOW] = 0;
 226                irq_reg[GPIO_HI] = 0;
 227
 228                max8997_bulk_read(max8997->i2c, MAX8997_REG_GPIOCNTL1,
 229                                MAX8997_NUM_GPIO, gpio_info);
 230                for (i = 0; i < MAX8997_NUM_GPIO; i++) {
 231                        bool interrupt = false;
 232
 233                        switch (gpio_info[i] & MAX8997_GPIO_INT_MASK) {
 234                        case MAX8997_GPIO_INT_BOTH:
 235                                if (max8997->gpio_status[i] != gpio_info[i])
 236                                        interrupt = true;
 237                                break;
 238                        case MAX8997_GPIO_INT_RISE:
 239                                if ((max8997->gpio_status[i] != gpio_info[i]) &&
 240                                    (gpio_info[i] & MAX8997_GPIO_DATA_MASK))
 241                                        interrupt = true;
 242                                break;
 243                        case MAX8997_GPIO_INT_FALL:
 244                                if ((max8997->gpio_status[i] != gpio_info[i]) &&
 245                                    !(gpio_info[i] & MAX8997_GPIO_DATA_MASK))
 246                                        interrupt = true;
 247                                break;
 248                        default:
 249                                break;
 250                        }
 251
 252                        if (interrupt) {
 253                                if (i < 8)
 254                                        irq_reg[GPIO_LOW] |= (1 << i);
 255                                else
 256                                        irq_reg[GPIO_HI] |= (1 << (i - 8));
 257                        }
 258
 259                }
 260        }
 261        if (irq_src & MAX8997_IRQSRC_FLASH) {
 262                /* Flash Status Interrupt */
 263                ret = max8997_read_reg(max8997->i2c, MAX8997_REG_FLASHSTATUS,
 264                                &irq_reg[FLASH_STATUS]);
 265        }
 266
 267        /* Apply masking */
 268        for (i = 0; i < MAX8997_IRQ_GROUP_NR; i++)
 269                irq_reg[i] &= ~max8997->irq_masks_cur[i];
 270
 271        /* Report */
 272        for (i = 0; i < MAX8997_IRQ_NR; i++) {
 273                if (irq_reg[max8997_irqs[i].group] & max8997_irqs[i].mask) {
 274                        cur_irq = irq_find_mapping(max8997->irq_domain, i);
 275                        if (cur_irq)
 276                                handle_nested_irq(cur_irq);
 277                }
 278        }
 279
 280        return IRQ_HANDLED;
 281}
 282
 283int max8997_irq_resume(struct max8997_dev *max8997)
 284{
 285        if (max8997->irq && max8997->irq_domain)
 286                max8997_irq_thread(0, max8997);
 287        return 0;
 288}
 289
 290static int max8997_irq_domain_map(struct irq_domain *d, unsigned int irq,
 291                                        irq_hw_number_t hw)
 292{
 293        struct max8997_dev *max8997 = d->host_data;
 294
 295        irq_set_chip_data(irq, max8997);
 296        irq_set_chip_and_handler(irq, &max8997_irq_chip, handle_edge_irq);
 297        irq_set_nested_thread(irq, 1);
 298#ifdef CONFIG_ARM
 299        set_irq_flags(irq, IRQF_VALID);
 300#else
 301        irq_set_noprobe(irq);
 302#endif
 303        return 0;
 304}
 305
 306static struct irq_domain_ops max8997_irq_domain_ops = {
 307        .map = max8997_irq_domain_map,
 308};
 309
 310int max8997_irq_init(struct max8997_dev *max8997)
 311{
 312        struct irq_domain *domain;
 313        int i;
 314        int ret;
 315        u8 val;
 316
 317        if (!max8997->irq) {
 318                dev_warn(max8997->dev, "No interrupt specified.\n");
 319                return 0;
 320        }
 321
 322        mutex_init(&max8997->irqlock);
 323
 324        /* Mask individual interrupt sources */
 325        for (i = 0; i < MAX8997_IRQ_GROUP_NR; i++) {
 326                struct i2c_client *i2c;
 327
 328                max8997->irq_masks_cur[i] = 0xff;
 329                max8997->irq_masks_cache[i] = 0xff;
 330                i2c = get_i2c(max8997, i);
 331
 332                if (IS_ERR_OR_NULL(i2c))
 333                        continue;
 334                if (max8997_mask_reg[i] == MAX8997_REG_INVALID)
 335                        continue;
 336
 337                max8997_write_reg(i2c, max8997_mask_reg[i], 0xff);
 338        }
 339
 340        for (i = 0; i < MAX8997_NUM_GPIO; i++) {
 341                max8997->gpio_status[i] = (max8997_read_reg(max8997->i2c,
 342                                                MAX8997_REG_GPIOCNTL1 + i,
 343                                                &val)
 344                                        & MAX8997_GPIO_DATA_MASK) ?
 345                                        true : false;
 346        }
 347
 348        domain = irq_domain_add_linear(NULL, MAX8997_IRQ_NR,
 349                                        &max8997_irq_domain_ops, max8997);
 350        if (!domain) {
 351                dev_err(max8997->dev, "could not create irq domain\n");
 352                return -ENODEV;
 353        }
 354        max8997->irq_domain = domain;
 355
 356        ret = request_threaded_irq(max8997->irq, NULL, max8997_irq_thread,
 357                        IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
 358                        "max8997-irq", max8997);
 359
 360        if (ret) {
 361                dev_err(max8997->dev, "Failed to request IRQ %d: %d\n",
 362                                max8997->irq, ret);
 363                return ret;
 364        }
 365
 366        if (!max8997->ono)
 367                return 0;
 368
 369        ret = request_threaded_irq(max8997->ono, NULL, max8997_irq_thread,
 370                        IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING |
 371                        IRQF_ONESHOT, "max8997-ono", max8997);
 372
 373        if (ret)
 374                dev_err(max8997->dev, "Failed to request ono-IRQ %d: %d\n",
 375                                max8997->ono, ret);
 376
 377        return 0;
 378}
 379
 380void max8997_irq_exit(struct max8997_dev *max8997)
 381{
 382        if (max8997->ono)
 383                free_irq(max8997->ono, max8997);
 384
 385        if (max8997->irq)
 386                free_irq(max8997->irq, max8997);
 387}
 388
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