linux/drivers/cpufreq/cpufreq-cpu0.c
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   1/*
   2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
   3 *
   4 * The OPP code in function cpu0_set_target() is reused from
   5 * drivers/cpufreq/omap-cpufreq.c
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License version 2 as
   9 * published by the Free Software Foundation.
  10 */
  11
  12#define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
  13
  14#include <linux/clk.h>
  15#include <linux/cpu.h>
  16#include <linux/cpufreq.h>
  17#include <linux/err.h>
  18#include <linux/module.h>
  19#include <linux/of.h>
  20#include <linux/opp.h>
  21#include <linux/platform_device.h>
  22#include <linux/regulator/consumer.h>
  23#include <linux/slab.h>
  24
  25static unsigned int transition_latency;
  26static unsigned int voltage_tolerance; /* in percentage */
  27
  28static struct device *cpu_dev;
  29static struct clk *cpu_clk;
  30static struct regulator *cpu_reg;
  31static struct cpufreq_frequency_table *freq_table;
  32
  33static int cpu0_verify_speed(struct cpufreq_policy *policy)
  34{
  35        return cpufreq_frequency_table_verify(policy, freq_table);
  36}
  37
  38static unsigned int cpu0_get_speed(unsigned int cpu)
  39{
  40        return clk_get_rate(cpu_clk) / 1000;
  41}
  42
  43static int cpu0_set_target(struct cpufreq_policy *policy,
  44                           unsigned int target_freq, unsigned int relation)
  45{
  46        struct cpufreq_freqs freqs;
  47        struct opp *opp;
  48        unsigned long volt = 0, volt_old = 0, tol = 0;
  49        long freq_Hz, freq_exact;
  50        unsigned int index;
  51        int ret;
  52
  53        ret = cpufreq_frequency_table_target(policy, freq_table, target_freq,
  54                                             relation, &index);
  55        if (ret) {
  56                pr_err("failed to match target freqency %d: %d\n",
  57                       target_freq, ret);
  58                return ret;
  59        }
  60
  61        freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
  62        if (freq_Hz < 0)
  63                freq_Hz = freq_table[index].frequency * 1000;
  64        freq_exact = freq_Hz;
  65        freqs.new = freq_Hz / 1000;
  66        freqs.old = clk_get_rate(cpu_clk) / 1000;
  67
  68        if (freqs.old == freqs.new)
  69                return 0;
  70
  71        cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
  72
  73        if (!IS_ERR(cpu_reg)) {
  74                rcu_read_lock();
  75                opp = opp_find_freq_ceil(cpu_dev, &freq_Hz);
  76                if (IS_ERR(opp)) {
  77                        rcu_read_unlock();
  78                        pr_err("failed to find OPP for %ld\n", freq_Hz);
  79                        freqs.new = freqs.old;
  80                        ret = PTR_ERR(opp);
  81                        goto post_notify;
  82                }
  83                volt = opp_get_voltage(opp);
  84                rcu_read_unlock();
  85                tol = volt * voltage_tolerance / 100;
  86                volt_old = regulator_get_voltage(cpu_reg);
  87        }
  88
  89        pr_debug("%u MHz, %ld mV --> %u MHz, %ld mV\n",
  90                 freqs.old / 1000, volt_old ? volt_old / 1000 : -1,
  91                 freqs.new / 1000, volt ? volt / 1000 : -1);
  92
  93        /* scaling up?  scale voltage before frequency */
  94        if (!IS_ERR(cpu_reg) && freqs.new > freqs.old) {
  95                ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
  96                if (ret) {
  97                        pr_err("failed to scale voltage up: %d\n", ret);
  98                        freqs.new = freqs.old;
  99                        goto post_notify;
 100                }
 101        }
 102
 103        ret = clk_set_rate(cpu_clk, freq_exact);
 104        if (ret) {
 105                pr_err("failed to set clock rate: %d\n", ret);
 106                if (!IS_ERR(cpu_reg))
 107                        regulator_set_voltage_tol(cpu_reg, volt_old, tol);
 108                freqs.new = freqs.old;
 109                goto post_notify;
 110        }
 111
 112        /* scaling down?  scale voltage after frequency */
 113        if (!IS_ERR(cpu_reg) && freqs.new < freqs.old) {
 114                ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
 115                if (ret) {
 116                        pr_err("failed to scale voltage down: %d\n", ret);
 117                        clk_set_rate(cpu_clk, freqs.old * 1000);
 118                        freqs.new = freqs.old;
 119                }
 120        }
 121
 122post_notify:
 123        cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
 124
 125        return ret;
 126}
 127
 128static int cpu0_cpufreq_init(struct cpufreq_policy *policy)
 129{
 130        int ret;
 131
 132        ret = cpufreq_frequency_table_cpuinfo(policy, freq_table);
 133        if (ret) {
 134                pr_err("invalid frequency table: %d\n", ret);
 135                return ret;
 136        }
 137
 138        policy->cpuinfo.transition_latency = transition_latency;
 139        policy->cur = clk_get_rate(cpu_clk) / 1000;
 140
 141        /*
 142         * The driver only supports the SMP configuartion where all processors
 143         * share the clock and voltage and clock.  Use cpufreq affected_cpus
 144         * interface to have all CPUs scaled together.
 145         */
 146        cpumask_setall(policy->cpus);
 147
 148        cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
 149
 150        return 0;
 151}
 152
 153static int cpu0_cpufreq_exit(struct cpufreq_policy *policy)
 154{
 155        cpufreq_frequency_table_put_attr(policy->cpu);
 156
 157        return 0;
 158}
 159
 160static struct freq_attr *cpu0_cpufreq_attr[] = {
 161        &cpufreq_freq_attr_scaling_available_freqs,
 162        NULL,
 163};
 164
 165static struct cpufreq_driver cpu0_cpufreq_driver = {
 166        .flags = CPUFREQ_STICKY,
 167        .verify = cpu0_verify_speed,
 168        .target = cpu0_set_target,
 169        .get = cpu0_get_speed,
 170        .init = cpu0_cpufreq_init,
 171        .exit = cpu0_cpufreq_exit,
 172        .name = "generic_cpu0",
 173        .attr = cpu0_cpufreq_attr,
 174};
 175
 176static int cpu0_cpufreq_probe(struct platform_device *pdev)
 177{
 178        struct device_node *np;
 179        int ret;
 180
 181        cpu_dev = get_cpu_device(0);
 182        if (!cpu_dev) {
 183                pr_err("failed to get cpu0 device\n");
 184                return -ENODEV;
 185        }
 186
 187        np = of_node_get(cpu_dev->of_node);
 188        if (!np) {
 189                pr_err("failed to find cpu0 node\n");
 190                return -ENOENT;
 191        }
 192
 193        cpu_reg = devm_regulator_get_optional(cpu_dev, "cpu0");
 194        if (IS_ERR(cpu_reg)) {
 195                /*
 196                 * If cpu0 regulator supply node is present, but regulator is
 197                 * not yet registered, we should try defering probe.
 198                 */
 199                if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
 200                        dev_err(cpu_dev, "cpu0 regulator not ready, retry\n");
 201                        ret = -EPROBE_DEFER;
 202                        goto out_put_node;
 203                }
 204                pr_warn("failed to get cpu0 regulator: %ld\n",
 205                        PTR_ERR(cpu_reg));
 206        }
 207
 208        cpu_clk = devm_clk_get(cpu_dev, NULL);
 209        if (IS_ERR(cpu_clk)) {
 210                ret = PTR_ERR(cpu_clk);
 211                pr_err("failed to get cpu0 clock: %d\n", ret);
 212                goto out_put_node;
 213        }
 214
 215        ret = of_init_opp_table(cpu_dev);
 216        if (ret) {
 217                pr_err("failed to init OPP table: %d\n", ret);
 218                goto out_put_node;
 219        }
 220
 221        ret = opp_init_cpufreq_table(cpu_dev, &freq_table);
 222        if (ret) {
 223                pr_err("failed to init cpufreq table: %d\n", ret);
 224                goto out_put_node;
 225        }
 226
 227        of_property_read_u32(np, "voltage-tolerance", &voltage_tolerance);
 228
 229        if (of_property_read_u32(np, "clock-latency", &transition_latency))
 230                transition_latency = CPUFREQ_ETERNAL;
 231
 232        if (!IS_ERR(cpu_reg)) {
 233                struct opp *opp;
 234                unsigned long min_uV, max_uV;
 235                int i;
 236
 237                /*
 238                 * OPP is maintained in order of increasing frequency, and
 239                 * freq_table initialised from OPP is therefore sorted in the
 240                 * same order.
 241                 */
 242                for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
 243                        ;
 244                rcu_read_lock();
 245                opp = opp_find_freq_exact(cpu_dev,
 246                                freq_table[0].frequency * 1000, true);
 247                min_uV = opp_get_voltage(opp);
 248                opp = opp_find_freq_exact(cpu_dev,
 249                                freq_table[i-1].frequency * 1000, true);
 250                max_uV = opp_get_voltage(opp);
 251                rcu_read_unlock();
 252                ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
 253                if (ret > 0)
 254                        transition_latency += ret * 1000;
 255        }
 256
 257        ret = cpufreq_register_driver(&cpu0_cpufreq_driver);
 258        if (ret) {
 259                pr_err("failed register driver: %d\n", ret);
 260                goto out_free_table;
 261        }
 262
 263        of_node_put(np);
 264        return 0;
 265
 266out_free_table:
 267        opp_free_cpufreq_table(cpu_dev, &freq_table);
 268out_put_node:
 269        of_node_put(np);
 270        return ret;
 271}
 272
 273static int cpu0_cpufreq_remove(struct platform_device *pdev)
 274{
 275        cpufreq_unregister_driver(&cpu0_cpufreq_driver);
 276        opp_free_cpufreq_table(cpu_dev, &freq_table);
 277
 278        return 0;
 279}
 280
 281static struct platform_driver cpu0_cpufreq_platdrv = {
 282        .driver = {
 283                .name   = "cpufreq-cpu0",
 284                .owner  = THIS_MODULE,
 285        },
 286        .probe          = cpu0_cpufreq_probe,
 287        .remove         = cpu0_cpufreq_remove,
 288};
 289module_platform_driver(cpu0_cpufreq_platdrv);
 290
 291MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
 292MODULE_DESCRIPTION("Generic CPU0 cpufreq driver");
 293MODULE_LICENSE("GPL");
 294
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