1* Samsung SPI Controller 2 3The Samsung SPI controller is used to interface with various devices such as flash 4and display controllers using the SPI communication interface. 5 6Required SoC Specific Properties: 7 8- compatible: should be one of the following. 9 - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms 10 - samsung,s3c6410-spi: for s3c6410 platforms 11 - samsung,s5p6440-spi: for s5p6440 and s5p6450 platforms 12 - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms 13 - samsung,exynos4210-spi: for exynos4 and exynos5 platforms 14 15- reg: physical base address of the controller and length of memory mapped 16 region. 17 18- interrupts: The interrupt number to the cpu. The interrupt specifier format 19 depends on the interrupt controller. 20 21[PRELIMINARY: the dma channel allocation will change once there are 22official DMA bindings] 23 24- tx-dma-channel: The dma channel specifier for tx operations. The format of 25 the dma specifier depends on the dma controller. 26 27- rx-dma-channel: The dma channel specifier for rx operations. The format of 28 the dma specifier depends on the dma controller. 29 30Required Board Specific Properties: 31 32- #address-cells: should be 1. 33- #size-cells: should be 0. 34 35Optional Board Specific Properties: 36 37- samsung,spi-src-clk: If the spi controller includes a internal clock mux to 38 select the clock source for the spi bus clock, this property can be used to 39 indicate the clock to be used for driving the spi bus clock. If not specified, 40 the clock number 0 is used as default. 41 42- num-cs: Specifies the number of chip select lines supported. If 43 not specified, the default number of chip select lines is set to 1. 44 45SPI Controller specific data in SPI slave nodes: 46 47- The spi slave nodes should provide the following information which is required 48 by the spi controller. 49 50 - cs-gpio: A gpio specifier that specifies the gpio line used as 51 the slave select line by the spi controller. The format of the gpio 52 specifier depends on the gpio controller. 53 54 - samsung,spi-feedback-delay: The sampling phase shift to be applied on the 55 miso line (to account for any lag in the miso line). The following are the 56 valid values. 57 58 - 0: No phase shift. 59 - 1: 90 degree phase shift sampling. 60 - 2: 180 degree phase shift sampling. 61 - 3: 270 degree phase shift sampling. 62 63Aliases: 64 65- All the SPI controller nodes should be represented in the aliases node using 66 the following format 'spi{n}' where n is a unique number for the alias. 67 68 69Example: 70 71- SoC Specific Portion: 72 73 spi_0: spi@12d20000 { 74 compatible = "samsung,exynos4210-spi"; 75 reg = <0x12d20000 0x100>; 76 interrupts = <0 66 0>; 77 tx-dma-channel = <&pdma0 5>; 78 rx-dma-channel = <&pdma0 4>; 79 }; 80 81- Board Specific Portion: 82 83 spi_0: spi@12d20000 { 84 #address-cells = <1>; 85 #size-cells = <0>; 86 pinctrl-names = "default"; 87 pinctrl-0 = <&spi0_bus>; 88 89 w25q80bw@0 { 90 #address-cells = <1>; 91 #size-cells = <1>; 92 compatible = "w25x80"; 93 reg = <0>; 94 spi-max-frequency = <10000>; 95 96 controller-data { 97 cs-gpio = <&gpa2 5 1 0 3>; 98 samsung,spi-feedback-delay = <0>; 99 }; 100 101 partition@0 { 102 label = "U-Boot"; 103 reg = <0x0 0x40000>; 104 read-only; 105 }; 106 107 partition@40000 { 108 label = "Kernel"; 109 reg = <0x40000 0xc0000>; 110 }; 111 }; 112 }; 113