linux/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
<<
>>
Prefs
   1Samsung GPIO and Pin Mux/Config controller
   2
   3Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
   4controller. It controls the input/output settings on the available pads/pins
   5and also provides ability to multiplex and configure the output of various
   6on-chip controllers onto these pads.
   7
   8Required Properties:
   9- compatible: should be one of the following.
  10  - "samsung,s3c2412-pinctrl": for S3C2412-compatible pin-controller,
  11  - "samsung,s3c2416-pinctrl": for S3C2416-compatible pin-controller,
  12  - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller,
  13  - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller,
  14  - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller,
  15  - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller.
  16  - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller.
  17  - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller.
  18  - "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller.
  19
  20- reg: Base address of the pin controller hardware module and length of
  21  the address space it occupies.
  22
  23- Pin banks as child nodes: Pin banks of the controller are represented by child
  24  nodes of the controller node. Bank name is taken from name of the node. Each
  25  bank node must contain following properties:
  26
  27  - gpio-controller: identifies the node as a gpio controller and pin bank.
  28  - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
  29    binding is used, the amount of cells must be specified as 2. See the below
  30    mentioned gpio binding representation for description of particular cells.
  31
  32        Eg: <&gpx2 6 0>
  33        <[phandle of the gpio controller node]
  34        [pin number within the gpio controller]
  35        [flags]>
  36
  37        Values for gpio specifier:
  38        - Pin number: is a value between 0 to 7.
  39        - Flags: 0 - Active High
  40                 1 - Active Low
  41
  42- Pin mux/config groups as child nodes: The pin mux (selecting pin function
  43  mode) and pin config (pull up/down, driver strength) settings are represented
  44  as child nodes of the pin-controller node. There should be atleast one
  45  child node and there is no limit on the count of these child nodes.
  46
  47  The child node should contain a list of pin(s) on which a particular pin
  48  function selection or pin configuration (or both) have to applied. This
  49  list of pins is specified using the property name "samsung,pins". There
  50  should be atleast one pin specfied for this property and there is no upper
  51  limit on the count of pins that can be specified. The pins are specified
  52  using pin names which are derived from the hardware manual of the SoC. As
  53  an example, the pins in GPA0 bank of the pin controller can be represented
  54  as "gpa0-0", "gpa0-1", "gpa0-2" and so on. The names should be in lower case.
  55  The format of the pin names should be (as per the hardware manual)
  56  "[pin bank name]-[pin number within the bank]".
  57
  58  The pin function selection that should be applied on the pins listed in the
  59  child node is specified using the "samsung,pin-function" property. The value
  60  of this property that should be applied to each of the pins listed in the
  61  "samsung,pins" property should be picked from the hardware manual of the SoC
  62  for the specified pin group. This property is optional in the child node if
  63  no specific function selection is desired for the pins listed in the child
  64  node. The value of this property is used as-is to program the pin-controller
  65  function selector register of the pin-bank.
  66
  67  The child node can also optionally specify one or more of the pin
  68  configuration that should be applied on all the pins listed in the
  69  "samsung,pins" property of the child node. The following pin configuration
  70  properties are supported.
  71
  72  - samsung,pin-pud: Pull up/down configuration.
  73  - samsung,pin-drv: Drive strength configuration.
  74  - samsung,pin-pud-pdn: Pull up/down configuration in power down mode.
  75  - samsung,pin-drv-pdn: Drive strength configuration in power down mode.
  76
  77  The values specified by these config properties should be derived from the
  78  hardware manual and these values are programmed as-is into the pin
  79  pull up/down and driver strength register of the pin-controller.
  80
  81  Note: A child should include atleast a pin function selection property or
  82  pin configuration property (one or more) or both.
  83
  84  The client nodes that require a particular pin function selection and/or
  85  pin configuration should use the bindings listed in the "pinctrl-bindings.txt"
  86  file.
  87
  88External GPIO and Wakeup Interrupts:
  89
  90The controller supports two types of external interrupts over gpio. The first
  91is the external gpio interrupt and second is the external wakeup interrupts.
  92The difference between the two is that the external wakeup interrupts can be
  93used as system wakeup events.
  94
  95A. External GPIO Interrupts: For supporting external gpio interrupts, the
  96   following properties should be specified in the pin-controller device node.
  97
  98   - interrupt-parent: phandle of the interrupt parent to which the external
  99     GPIO interrupts are forwarded to.
 100   - interrupts: interrupt specifier for the controller. The format and value of
 101     the interrupt specifier depends on the interrupt parent for the controller.
 102
 103   In addition, following properties must be present in node of every bank
 104   of pins supporting GPIO interrupts:
 105
 106   - interrupt-controller: identifies the controller node as interrupt-parent.
 107   - #interrupt-cells: the value of this property should be 2.
 108     - First Cell: represents the external gpio interrupt number local to the
 109       external gpio interrupt space of the controller.
 110     - Second Cell: flags to identify the type of the interrupt
 111       - 1 = rising edge triggered
 112       - 2 = falling edge triggered
 113       - 3 = rising and falling edge triggered
 114       - 4 = high level triggered
 115       - 8 = low level triggered
 116
 117B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
 118   child node representing the external wakeup interrupt controller should be
 119   included in the pin-controller device node. This child node should include
 120   the following properties.
 121
 122   - compatible: identifies the type of the external wakeup interrupt controller
 123     The possible values are:
 124     - samsung,s3c2410-wakeup-eint: represents wakeup interrupt controller
 125       found on Samsung S3C24xx SoCs except S3C2412 and S3C2413,
 126     - samsung,s3c2412-wakeup-eint: represents wakeup interrupt controller
 127       found on Samsung S3C2412 and S3C2413 SoCs,
 128     - samsung,s3c64xx-wakeup-eint: represents wakeup interrupt controller
 129       found on Samsung S3C64xx SoCs,
 130     - samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller
 131       found on Samsung Exynos4210 SoC.
 132   - interrupt-parent: phandle of the interrupt parent to which the external
 133     wakeup interrupts are forwarded to.
 134   - interrupts: interrupt used by multiplexed wakeup interrupts.
 135
 136   In addition, following properties must be present in node of every bank
 137   of pins supporting wake-up interrupts:
 138
 139   - interrupt-controller: identifies the node as interrupt-parent.
 140   - #interrupt-cells: the value of this property should be 2
 141     - First Cell: represents the external wakeup interrupt number local to
 142       the external wakeup interrupt space of the controller.
 143     - Second Cell: flags to identify the type of the interrupt
 144       - 1 = rising edge triggered
 145       - 2 = falling edge triggered
 146       - 3 = rising and falling edge triggered
 147       - 4 = high level triggered
 148       - 8 = low level triggered
 149
 150   Node of every bank of pins supporting direct wake-up interrupts (without
 151   multiplexing) must contain following properties:
 152
 153   - interrupt-parent: phandle of the interrupt parent to which the external
 154     wakeup interrupts are forwarded to.
 155   - interrupts: interrupts of the interrupt parent which are used for external
 156     wakeup interrupts from pins of the bank, must contain interrupts for all
 157     pins of the bank.
 158
 159Aliases:
 160
 161All the pin controller nodes should be represented in the aliases node using
 162the following format 'pinctrl{n}' where n is a unique number for the alias.
 163
 164Example: A pin-controller node with pin banks:
 165
 166        pinctrl_0: pinctrl@11400000 {
 167                compatible = "samsung,exynos4210-pinctrl";
 168                reg = <0x11400000 0x1000>;
 169                interrupts = <0 47 0>;
 170
 171                /* ... */
 172
 173                /* Pin bank without external interrupts */
 174                gpy0: gpy0 {
 175                        gpio-controller;
 176                        #gpio-cells = <2>;
 177                };
 178
 179                /* ... */
 180
 181                /* Pin bank with external GPIO or muxed wake-up interrupts */
 182                gpj0: gpj0 {
 183                        gpio-controller;
 184                        #gpio-cells = <2>;
 185
 186                        interrupt-controller;
 187                        #interrupt-cells = <2>;
 188                };
 189
 190                /* ... */
 191
 192                /* Pin bank with external direct wake-up interrupts */
 193                gpx0: gpx0 {
 194                        gpio-controller;
 195                        #gpio-cells = <2>;
 196
 197                        interrupt-controller;
 198                        interrupt-parent = <&gic>;
 199                        interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
 200                                     <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>;
 201                        #interrupt-cells = <2>;
 202                };
 203
 204                /* ... */
 205        };
 206
 207Example 1: A pin-controller node with pin groups.
 208
 209        pinctrl_0: pinctrl@11400000 {
 210                compatible = "samsung,exynos4210-pinctrl";
 211                reg = <0x11400000 0x1000>;
 212                interrupts = <0 47 0>;
 213
 214                /* ... */
 215
 216                uart0_data: uart0-data {
 217                        samsung,pins = "gpa0-0", "gpa0-1";
 218                        samsung,pin-function = <2>;
 219                        samsung,pin-pud = <0>;
 220                        samsung,pin-drv = <0>;
 221                };
 222
 223                uart0_fctl: uart0-fctl {
 224                        samsung,pins = "gpa0-2", "gpa0-3";
 225                        samsung,pin-function = <2>;
 226                        samsung,pin-pud = <0>;
 227                        samsung,pin-drv = <0>;
 228                };
 229
 230                uart1_data: uart1-data {
 231                        samsung,pins = "gpa0-4", "gpa0-5";
 232                        samsung,pin-function = <2>;
 233                        samsung,pin-pud = <0>;
 234                        samsung,pin-drv = <0>;
 235                };
 236
 237                uart1_fctl: uart1-fctl {
 238                        samsung,pins = "gpa0-6", "gpa0-7";
 239                        samsung,pin-function = <2>;
 240                        samsung,pin-pud = <0>;
 241                        samsung,pin-drv = <0>;
 242                };
 243
 244                i2c2_bus: i2c2-bus {
 245                        samsung,pins = "gpa0-6", "gpa0-7";
 246                        samsung,pin-function = <3>;
 247                        samsung,pin-pud = <3>;
 248                        samsung,pin-drv = <0>;
 249                };
 250        };
 251
 252Example 2: A pin-controller node with external wakeup interrupt controller node.
 253
 254        pinctrl_1: pinctrl@11000000 {
 255                compatible = "samsung,exynos4210-pinctrl";
 256                reg = <0x11000000 0x1000>;
 257                interrupts = <0 46 0>
 258
 259                /* ... */
 260
 261                wakeup-interrupt-controller {
 262                        compatible = "samsung,exynos4210-wakeup-eint";
 263                        interrupt-parent = <&gic>;
 264                        interrupts = <0 32 0>;
 265                };
 266        };
 267
 268Example 3: A uart client node that supports 'default' and 'flow-control' states.
 269
 270        uart@13800000 {
 271                compatible = "samsung,exynos4210-uart";
 272                reg = <0x13800000 0x100>;
 273                interrupts = <0 52 0>;
 274                pinctrl-names = "default", "flow-control;
 275                pinctrl-0 = <&uart0_data>;
 276                pinctrl-1 = <&uart0_data &uart0_fctl>;
 277        };
 278
 279Example 4: Set up the default pin state for uart controller.
 280
 281        static int s3c24xx_serial_probe(struct platform_device *pdev) {
 282                struct pinctrl *pinctrl;
 283
 284                /* ... */
 285
 286                pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
 287        }
 288
 289Example 5: A display port client node that supports 'default' pinctrl state
 290           and gpio binding.
 291
 292        display-port-controller {
 293                /* ... */
 294
 295                samsung,hpd-gpio = <&gpx2 6 0>;
 296                pinctrl-names = "default";
 297                pinctrl-0 = <&dp_hpd>;
 298        };
 299
 300Example 6: Request the gpio for display port controller
 301
 302        static int exynos_dp_probe(struct platform_device *pdev)
 303        {
 304                int hpd_gpio, ret;
 305                struct device *dev = &pdev->dev;
 306                struct device_node *dp_node = dev->of_node;
 307
 308                /* ... */
 309
 310                hpd_gpio = of_get_named_gpio(dp_node, "samsung,hpd-gpio", 0);
 311
 312                /* ... */
 313
 314                ret = devm_gpio_request_one(&pdev->dev, hpd_gpio, GPIOF_IN,
 315                                            "hpd_gpio");
 316                /* ... */
 317        }
 318