linux/Documentation/devicetree/bindings/gpio/sodaville.txt
<<
>>
Prefs
   1GPIO controller on CE4100 / Sodaville SoCs
   2==========================================
   3
   4The bindings for CE4100's GPIO controller match the generic description
   5which is covered by the gpio.txt file in this folder.
   6
   7The only additional property is the intel,muxctl property which holds the
   8value which is written into the MUXCNTL register.
   9
  10There is no compatible property for now because the driver is probed via
  11PCI id (vendor 0x8086 device 0x2e67).
  12
  13The interrupt specifier consists of two cells encoded as follows:
  14 - <1st cell>: The interrupt-number that identifies the interrupt source.
  15 - <2nd cell>: The level-sense information, encoded as follows:
  16                4 - active high level-sensitive
  17                8 - active low level-sensitive
  18
  19Example of the GPIO device and one user:
  20
  21        pcigpio: gpio@b,1 {
  22                        /* two cells for GPIO and interrupt */
  23                        #gpio-cells = <2>;
  24                        #interrupt-cells = <2>;
  25                        compatible = "pci8086,2e67.2",
  26                                           "pci8086,2e67",
  27                                           "pciclassff0000",
  28                                           "pciclassff00";
  29
  30                        reg = <0x15900 0x0 0x0 0x0 0x0>;
  31                        /* Interrupt line of the gpio device */
  32                        interrupts = <15 1>;
  33                        /* It is an interrupt and GPIO controller itself */
  34                        interrupt-controller;
  35                        gpio-controller;
  36                        intel,muxctl = <0>;
  37        };
  38
  39        testuser@20 {
  40                        compatible = "example,testuser";
  41                        /* User the 11th GPIO line as an active high triggered
  42                         * level interrupt
  43                         */
  44                        interrupts = <11 8>;
  45                        interrupt-parent = <&pcigpio>;
  46                        /* Use this GPIO also with the gpio functions */
  47                        gpios = <&pcigpio 11 0>;
  48        };
  49