linux/kernel/rcupdate.c
<<
alue4.1/spav2. 4.1/form2. 4.1a alue4. href="../linux+v11" .3/kernel/rcupdate.c">alue4.1img src="../.static/gfx/right.png" alt=">>">al1/spav2.al1spav class="lxr_search">aluealue4.1input typ hidden" nam navtarget" on> ">alue4.1input typ text" nam search" id search">alue4.1buttptityp submit">Searchalue4.Prefs. 4.1/a>al1/spav2.ue4. .1/div2.ue4. .1form ac v="ajax+*" method="post" onsubmit="return false;">al1input typ hidden" nam ajax_lookup" id ajax_lookup" on> ">aue4. .1/form2.aue4. .1div class="headingbottpm">. 1div id file_contents"2
. .11/a>1spav class="comment">/*1/spav2.. .21/a>1spav class="comment"> * Read-Copy Update mechanism for mutual exclus  v1/spav2.. .31/a>1spav class="comment"> *1/spav2.. .41/a>1spav class="comment"> * This program is free software; you cav redistribute it and/or modify1/spav2.. .51/a>1spav class="comment"> * it under the terms of the GNU General Public License as published by1/spav2.. .61/a>1spav class="comment"> * the Free Software Founda
  v; either vers  v 2 of the License, or1/spav2.. .71/a>1spav class="comment"> * (at your  >
  v) any later vers  v.1/spav2.. .81/a>1spav class="comment"> *1/spav2.. .91/a>1spav class="comment"> * This program is distributed in the hope that it will be useful,1/spav2.. .10"a>1spav class="comment"> * but WITHOUT ANY WARRANTY; without even the implied warranty of1/spav2.. 111/a>1spav class="comment"> * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the1/spav2.. 121/a>1spav class="comment"> * GNU General Public License for more details.1/spav2.. 131/a>1spav class="comment"> *1/spav2.. 141/a>1spav class="comment"> * You should have received a copy of the GNU General Public License1/spav2.. 151/a>1spav class="comment"> * along with this program; if not, write to the Free Software1/spav2.. 161/a>1spav class="comment"> * Founda
  v, Inc., 59 Temple Place - Suite 330, Bost v, MA 02111-1307, USA.1/spav2.. 171/a>1spav class="comment"> *1/spav2.. 181/a>1spav class="comment"> * Copyright IBM Corpora
  v, 20011/spav2.. 191/a>1spav class="comment"> *1/spav2.. 210"a>1spav class="comment"> * Authors: Dipavkar Sarma <dipavkar@in.ibm.com>1/spav2.. 211/a>1spav class="comment"> *          Manfred Spraul <manfred@colorfullife.com>1/spav2.. 221/a>1spav class="comment"> *1/spav2.. 231/a>1spav class="comment"> * Based on the original work by Paul McKenney <paulmck@us.ibm.com>1/spav2.. 241/a>1spav class="comment"> * and inputs from Rusty Russell, Andrea Arcavgeli and Andi Kleev.1/spav2.. 251/a>1spav class="comment"> * Papers:1/spav2.. 261/a>1spav class="comment"> * http://www.rdrop.com/users/paulmck/paper/rclockpdcsproof.pdf1/spav2.. 271/a>1spav class="comment"> * http://lse.sourceforge.net/locking/rclock_OLS.2001.05.01c.sc.pdf (OLS2001)1/spav2.. 281/a>1spav class="comment"> *1/spav2.. 291/a>1spav class="comment"> * For detailed explana
  v of Read-Copy Update mechanism see -1/spav2.. 310"a>1spav class="comment"> *              http://lse.sourceforge.net/locking/rcupdate.html1/spav2.. 311/a>1spav class="comment"> *1/spav2.. 321/a>1spav class="comment"> */1/spav2.. 331/a>#include <linux/typ s.h1/a>>.. 341/a>#include <linux/kernel.h1/a>>.. 351/a>#include <linux/init.h1/a>>.. 361/a>#include <linux/spinlock.h1/a>>.. 371/a>#include <linux/smp.h1/a>>.. 381/a>#include <linux/interrupt.h1/a>>.. 391/a>#include <linux/sched.h1/a>>.. 401/a>#include <linux/atomic.h1/a>>.. 411/a>#include <linux/bitops.h1/a>>.. 421/a>#include <linux/percpu.h1/a>>.. 431/a>#include <linux/notifier.h1/a>>.. 441/a>#include <linux/cpu.h1/a>>.. 451/a>#include <linux/mutex.h1/a>>.. 461/a>#include <linux/export.h1/a>>.. 471/a>#include <linux/hardirq.h1/a>>.. 481/a>#include <linux/delay.h1/a>>.. 491/a>#include <linux/module.h1/a>>.. 501/a>.. 511/a>#define.1a href="+code=CREATE_TRACE_POINTS" class="sref">CREATE_TRACE_POINTS1/a>.. 521/a>#include <trace/events/rcu.h1/a>>.. 531/a>.. 541/a>#include "rcu.h1/a>".. 551/a>.. 561/a>1a href="+code=module_param" class="sref">module_param1/a>(1a href="+code=rcu_expedited" class="sref">rcu_expedited1/a>, int, 0);.. 571/a>.. 581/a>#ifdef.1a href="+code=CONFIG_PREEMPT_RCU" class="sref">CONFIG_PREEMPT_RCU1/a>.. 591/a>.. 610"a>1spav class="comment">/*1/spav2.. 611/a>1spav class="comment"> * Preemptible RCU implementa
  v for rcu_read_lock().1/spav2.. 621/a>1spav class="comment"> * Just increment ->rcu_read_lock_nesting, shared state will be updated1/spav2.. 631/a>1spav class="comment"> * if we block.1/spav2.. 641/a>1spav class="comment"> */1/spav2.. 651/a>void.1a href="+code=__rcu_read_lock" class="sref">__rcu_read_lock1/a>(void).. 661/a>{.. 671/a>        1a href="+code=current" class="sref">current1/a>->1a href="+code=rcu_read_lock_nesting" class="sref">rcu_read_lock_nesting1/a>++;.. 681/a>        1a href="+code=barrier" class="sref">barrier1/a>();  1spav class="comment">/* critical sec
  v after entry code. */1/spav2.. 691/a>}.. 701/a>1a href="+code=EXPORT_SYMBOL_GPL" class="sref">EXPORT_SYMBOL_GPL1/a>(1a href="+code=__rcu_read_lock" class="sref">__rcu_read_lock1/a>);.. 711/a>.. 721/a>1spav class="comment">/*1/spav2.. 731/a>1spav class="comment"> * Preemptible RCU implementa
  v for rcu_read_unlock().1/spav2.. 741/a>1spav class="comment"> * Decrement ->rcu_read_lock_nesting.  If the result is zero (outermost1/spav2.. 751/a>1spav class="comment"> * rcu_read_unlock()) and ->rcu_read_unlock_special is non-zero, thev1/spav2.. 761/a>1spav class="comment"> * invoke rcu_read_unlock_special() to cleav up after a context switch. 771/a>1spav class="comment"> * iv an RCU read-side critical sec
  v and other special cases.1/spav2.. 781/a>1spav class="comment"> */1/spav2.. 791/a>void.1a href="+code=__rcu_read_unlock" class="sref">__rcu_read_unlock1/a>(void).. 801/a>{.. 811/a>        struct.1a href="+code=task_struct" class="sref">task_struct1/a> *1a href="+code=t" class="sref">t1/a> = 1a href="+code=current" class="sref">current1/a>;.. 821/a>.. 831/a>        if (1a href="+code=t" class="sref">t1/a>->1a href="+code=rcu_read_lock_nesting" class="sref">rcu_read_lock_nesting1/a> != 1) {.. 841/a>                --1a href="+code=t" class="sref">t1/a>->1a href="+code=rcu_read_lock_nesting" class="sref">rcu_read_lock_nesting1/a>;.. 851/a>        } else {.. 861/a>                1a href="+code=barrier" class="sref">barrier1/a>();  1spav class="comment">/* critical sec
  v before exit code. */1/spav2.. 871/a>                1a href="+code=t" class="sref">t1/a>->1a href="+code=rcu_read_lock_nesting" class="sref">rcu_read_lock_nesting1/a> = 1a href="+code=INT_MIN" class="sref">INT_MIN1/a>;.. 881/a>#ifdef.1a href="+code=CONFIG_PROVE_RCU_DELAY" class="sref">CONFIG_PROVE_RCU_DELAY1/a>.. 891/a>                1a href="+code=udelay" class="sref">udelay1/a>(10); 1spav class="comment">/* Make preempti v more probable. */1/spav2.. 901/a>#endif 1spav class="comment">/* #ifdef.CONFIG_PROVE_RCU_DELAY */1/spav2.. 911/a>                1a href="+code=barrier" class="sref">barrier1/a>();  1spav class="comment">/* assigv before ->rcu_read_unlock_special load */1/spav2.. 921/a>                if (1a href="+code=unlikely" class="sref">unlikely1/a>(1a href="+code=ACCESS_ONCE" class="sref">ACCESS_ONCE1/a>(1a href="+code=t" class="sref">t1/a>->1a href="+code=rcu_read_unlock_special" class="sref">rcu_read_unlock_special1/a>))).. 931/a>                        1a href="+code=rcu_read_unlock_special" class="sref">rcu_read_unlock_special1/a>(1a href="+code=t" class="sref">t1/a>);.. 941/a>                1a href="+code=barrier" class="sref">barrier1/a>();  1spav class="comment">/* ->rcu_read_unlock_special load before assigv */1/spav2.. 951/a>                1a href="+code=t" class="sref">t1/a>->1a href="+code=rcu_read_lock_nesting" class="sref">rcu_read_lock_nesting1/a> = 0;.. 961/a>        }.. 971/a>#ifdef.1a href="+code=CONFIG_PROVE_LOCKING" class="sref">CONFIG_PROVE_LOCKING1/a>.. 981/a>        {.. 991/a>                int.1a href="+code=rrln" class="sref">rrln1/a> = 1a href="+code=ACCESS_ONCE" class="sref">ACCESS_ONCE1/a>(1a href="+code=t" class="sref">t1/a>->1a href="+code=rcu_read_lock_nesting" class="sref">rcu_read_lock_nesting1/a>);..1001/a>..1011/a>                1a href="+code=WARN_ON_ONCE" class="sref">WARN_ON_ONCE1/a>(1a href="+code=rrln" class="sref">rrln1/a> < 0 &&.1a href="+code=rrln" class="sref">rrln1/a> > 1a href="+code=INT_MIN" class="sref">INT_MIN1/a> / 2);..1021/a>        }..1031/a>#endif 1spav class="comment">/* #ifdef.CONFIG_PROVE_LOCKING */1/spav2..1041/a>}..1051/a>1a href="+code=EXPORT_SYMBOL_GPL" class="sref">EXPORT_SYMBOL_GPL1/a>(1a href="+code=__rcu_read_unlock" class="sref">__rcu_read_unlock1/a>);..1061/a>..1071/a>#endif 1spav class="comment">/* #ifdef.CONFIG_PREEMPT_RCU */1/spav2..1081/a>..1091/a>#ifdef.1a href="+code=CONFIG_DEBUG_LOCK_ALLOC" class="sref">CONFIG_DEBUG_LOCK_ALLOC1/a>..1.10"a>static struct.1a href="+code=lock_class_key" class="sref">lock_class_key1/a> 1a href="+code=rcu_lock_key" class="sref">rcu_lock_key1/a>;..1111/a>struct.1a href="+code=lockdep_map" class="sref">lockdep_map1/a> 1a href="+code=rcu_lock_map" class="sref">rcu_lock_map1/a> =..1121/a>        1a href="+code=STATIC_LOCKDEP_MAP_INIT" class="sref">STATIC_LOCKDEP_MAP_INIT1/a>(1spav class="string">"rcu_read_lock"rcu_lock_key1/a>);..1131/a>1a href="+code=EXPORT_SYMBOL_GPL" class="sref">EXPORT_SYMBOL_GPL1/a>(1a href="+code=rcu_lock_map" class="sref">rcu_lock_map1/a>);..1141/a>..1151/a>static struct.1a href="+code=lock_class_key" class="sref">lock_class_key1/a> 1a href="+code=rcu_bh_lock_key" class="sref">rcu_bh_lock_key1/a>;..1161/a>struct.1a href="+code=lockdep_map" class="sref">lockdep_map1/a> 1a href="+code=rcu_bh_lock_map" class="sref">rcu_bh_lock_map1/a> =..1171/a>        1a href="+code=STATIC_LOCKDEP_MAP_INIT" class="sref">STATIC_LOCKDEP_MAP_INIT1/a>(1spav class="string">"rcu_read_lock_bh"rcu_bh_lock_key1/a>);..1181/a>1a href="+code=EXPORT_SYMBOL_GPL" class="sref">EXPORT_SYMBOL_GPL1/a>(1a href="+code=rcu_bh_lock_map" class="sref">rcu_bh_lock_map1/a>);..1191/a>..1210"a>static struct.1a href="+code=lock_class_key" class="sref">lock_class_key1/a> 1a href="+code=rcu_sched_lock_key" class="sref">rcu_sched_lock_key1/a>;..1211/a>struct.1a href="+code=lockdep_map" class="sref">lockdep_map1/a> 1a href="+code=rcu_sched_lock_map" class="sref">rcu_sched_lock_map1/a> =..1221/a>        1a href="+code=STATIC_LOCKDEP_MAP_INIT" class="sref">STATIC_LOCKDEP_MAP_INIT1/a>(1spav class="string">"rcu_read_lock_sched"rcu_sched_lock_key1/a>);..1231/a>1a href="+code=EXPORT_SYMBOL_GPL" class="sref">EXPORT_SYMBOL_GPL1/a>(1a href="+code=rcu_sched_lock_map" class="sref">rcu_sched_lock_map1/a>);..1241/a>..1251/a>int.1a href="+code=debug_lockdep_rcu_enabled" class="sref">debug_lockdep_rcu_enabled1/a>(void)..1261/a>{..1271/a>        return 1a href="+code=rcu_scheduler_ac
 ve" class="sref">rcu_scheduler_ac
 ve1/a> &&.1a href="+code=debug_locks" class="sref">debug_locks1/a> &&..1281/a>               1a href="+code=current" class="sref">current1/a>->1a href="+code=lockdep_recurs  v" class="sref">lockdep_recurs  v1/a> == 0;..1291/a>}..1301/a>1a href="+code=EXPORT_SYMBOL_GPL" class="sref">EXPORT_SYMBOL_GPL1/a>(1a href="+code=debug_lockdep_rcu_enabled" class="sref">debug_lockdep_rcu_enabled1/a>);..1311/a>..1321/a>1spav class="comment">/**1/spav2..1331/a>1spav class="comment"> * rcu_read_lock_bh_held() - might we be iv RCU-bh read-side critical sec
  v?1/spav2..1341/a>1spav class="comment"> *1/spav2..1351/a>1spav class="comment"> * Check for bottpm half being disabled, which covers both the1/spav2..1361/a>1spav class="comment"> * CONFIG_PROVE_RCU and not cases.  Note that if someone uses1/spav2..1371/a>1spav class="comment"> * rcu_read_lock_bh(), but thev later enables BH, lockdep (if enabled)1/spav2..1381/a>1spav class="comment"> * will show the situa
  v.  This is useful for debug checks iv func
  vs1/spav2..1391/a>1spav class="comment"> * that require that they be called withiv an RCU read-side critical1/spav2..1410"a>1spav class="comment"> * sec
  v.1/spav2..1411/a>1spav class="comment"> *1/spav2..1421/a>1spav class="comment"> * Check debug_lockdep_rcu_enabled() to prevent false posit ves during boot.1/spav2..1431/a>1spav class="comment"> *1/spav2..1441/a>1spav class="comment"> * Note that rcu_read_lock() is disallowed if the CPU is either idle or1/spav2..1451/a>1spav class="comment"> * offline from an RCU perspec
 ve, so check for those as well.1/spav2..1461/a>1spav class="comment"> */1/spav2..1471/a>int.1a href="+code=rcu_read_lock_bh_held" class="sref">rcu_read_lock_bh_held1/a>(void)..1481/a>{..1491/a>        if (!1a href="+code=debug_lockdep_rcu_enabled" class="sref">debug_lockdep_rcu_enabled1/a>())..1501/a>                return 1;..1511/a>        if (1a href="+code=rcu_is_cpu_idle" class="sref">rcu_is_cpu_idle1/a>())..1521/a>                return 0;..1531/a>        if (!1a href="+code=rcu_lockdep_current_cpu_online" class="sref">rcu_lockdep_current_cpu_online1/a>())..1541/a>                return 0;..1551/a>        return 1a href="+code=in_softirq" class="sref">in_softirq1/a>() || 1a href="+code=irqs_disabled" class="sref">irqs_disabled1/a>();..1561/a>}..1571/a>1a href="+code=EXPORT_SYMBOL_GPL" class="sref">EXPORT_SYMBOL_GPL1/a>(1a href="+code=rcu_read_lock_bh_held" class="sref">rcu_read_lock_bh_held1/a>);..1581/a>..1591/a>#endif 1spav class="comment">/* #ifdef.CONFIG_DEBUG_LOCK_ALLOC */1/spav2..1601/a>..1611/a>struct.1a href="+code=rcu_synchronize" class="sref">rcu_synchronize1/a> {..1621/a>        struct.1a href="+code=rcu_head" class="sref">rcu_head1/a> 1a href="+code=head" class="sref">head1/a>;..1631/a>        struct.1a href="+code=complet  v" class="sref">complet  v1/a> 1a href="+code=complet  v" class="sref">complet  v1/a>;..1641/a>};..1651/a>..1661/a>1spav class="comment">/*1/spav2..1671/a>1spav class="comment"> * Awaken the corresponding synchronize_rcu() instance now that a1/spav2..1681/a>1spav class="comment"> * grace period has elapsed.1/spav2..1691/a>1spav class="comment"> */1/spav2..1710"a>static void.1a href="+code=wakeme_after_rcu" class="sref">wakeme_after_rcu1/a>(struct.1a href="+code=rcu_head" class="sref">rcu_head1/a>  *1a href="+code=head" class="sref">head1/a>)..1711/a>{..1721/a>        struct.1a href="+code=rcu_synchronize" class="sref">rcu_synchronize1/a> *1a href="+code=rcu" class="sref">rcu1/a>;..1731/a>..1741/a>        1a href="+code=rcu" class="sref">rcu1/a> = 1a href="+code=container_of" class="sref">container_of1/a>(1a href="+code=head" class="sref">head1/a>, struct.1a href="+code=rcu_synchronize" class="sref">rcu_synchronize1/a>, 1a href="+code=head" class="sref">head1/a>);..1c51/a>        1a href="+code=f="+cod4M3/6="+rcu_26.3160"
	 line" nam  
L48">. 481/a>#iate.c52v cla" id 
L173de=f="+cod4M3/6="+0="+cochr
L1736">. 761/1a>1spav class="comment">1 * in171a href="+code=rcu_expedited" clas1m  
L77">1. 771/a>1spav class="com1ment"1 * iv e" nam  
L169">.1691/aitupdatg123" class="line/aitupdatg1 class="line" nam  
  vsupdate.c#_debug_locks1/a> & vsupdate.c#_d href="kernel/rcupdatrl/rcupdate.c#L174rfr_rcu" class="sref">wakeme_after_rcuc#L168" iref="kernel/rcupdate.c#L178" i1 
L78"ef">rcu_head1/a>  *1a href="+colass="lin1e" nam  
L79">. 791/a>vo1id.1a180rnel/rcupdate.c#L171" id 
L171" class="line" nam  
L171">.1711/a>{..1721/a>        struc="sref">_1_rcu_read_unlock1/a>(voi1d).task1_struct1/a> *1a href="+c1ode=t18ef="+code=rcu_sched_lock_mapt;.<_
L170">._ournta
L105" class="lint;.<_
L170">._ournta
Lad1/a>);.container_of1/a>(1a href="+code=head" class="sref">head1/a>, struct.1e=current1" class="sref">current1/1a>;.<1 href="kernel/_sched_lock_mapt;.<_
L175">.1c51/a>        1at;.<_
L175">.1cad1/a>);.container_
L175">.1c51/a>        1a href="+code=f="+cod4M3/6="+rcu_26.3160"
	 lint" class=1"sref">t1/a>->1a href1="+co1e=rcu_read_locate.c#L158" id 
L158" claWblespav2 mehref="keithft;.cupdm  
L89">. 891/a>                1a href1"+code=t"1 class="sref">t1/a>->11a hr18">rcu_synchronize1/a>, 1a hrerl/rcupdate.c#L174rfr_rca>);.container_of1/a>(1a href="+code=head""sref">container_/a>1spav class="comment"> */1/spav2.;.. 891/a>                1a href1"">. 761/1r" class="sref">barrier11/a>()18 1a href="+code=rcu_bh_lock_/aituref_
L175">.1c51/a>        1a/aituref_
L175">.1cad1/a>);.container_
L175">.1c51/a>        1a href="+code=f="+cod4M3/6="+rcu_26.3160"
	 lintpav2.._ournta
L105" class="lindee.coy_
L170">._ournta
Lad1/a>);.container_of1/a>(1a href="+code=head" class="sref">head1/a>, struct.1ec#L168" i  
L88">. 881/a>#ifdef.11a hre18="+code=lockdep_recurs  v" class="sr="+code=u1delay" class="sref">udel1ay1/a19ernel/rcupdate.c#L129" id 
L129" class="line" nam  
L129">.1291/a>}.head1/a>, struct.1 
L90" cl1ass="line" nam  
L90">. 1901/a19g_lockdep_rcu_enabled" class="sref"lass="sre1f">barrier1/a>();  1spav1 clas19 href="nesting1/a> = 1a href="+code=INT_MIN23" class="linef="+code=INT_MIN_lockdep_rcu_enabled" class="sref"l=current1="sref">t1/a>->1a hre1f="+c19ockdep_rcu_enabled() to pre
L165" class="line" nam  
L165">.1651/a+code=rcu1_read_unlock_special" cl1ass="193" class="line" nam  
L143">.1wrapp="ke.c#L138pav2ae" na"kernel/rlinelema href="kernel/rcupdate.c#L12" id 
L12"lass="sre1f">barrier1/a>();  1spav1 clas19t rcu_read_lock() is disallow
L89">. 891/a>                1a href1de=t" cla1ss="sref">t1/a>->1a h1ref="1code=rss="line" nam  
L146">.my_th
L157group_
L89class="sref">STATIC_my_th
L157group_
L89cel/rcupdate.c#L147" id 
L147" class="lin_read_loc1k_nesting1/a> = 0;.rcu_head1/a>  *1a href="+coss="line"1 nam  
L97">. 971/a>#ifd1ef.1a1href="+code=COs="line" nam  
L154">.th
L157group_
L89class="sref">STAth
L157group_
L89cel/rc_locks" class="sref">debug_locks1/a> &&. class="sref">head1/a>, struct.1 L18" id 
LL18" class="line" nam  
L hre19="+code=lockdep_recurs  v" class="s2code=t" c2ass="sref">t1/a>->1a 2ref="20ernel/rcupdate.c#L129" id 
L129" class="line" nam  
L129">.1291/a>}..my_th
L157group_
L89class="sref">STATIC_my_th
L157group_
L89cel/r class="sref">head1/a>, struct.2ref">rcu_2ead_lock_nesting1/a>);.<2 href2"kerne1spav class="comment">/* Make preempti v more probable.ow
L89">. 891/a>                1a href2;&.1a2href="+code=rrln" class=2sref"20class="sref">t1/a> = 1a href="+cod2sref">INT2MIN1/a> / 2);.t1/a> = 1a href="+cod2s 231/a>1sss="line" nam  
L103">.1231/a>2endif ss="lin_sched_lock_mapt;eturn 0;..1691ef="ket;.<_
L170">..1481/a>{..rnel/rcupdate.c#L170" id 
L170" class="line" nam  
L170">.1710">static void.1a href="+code=wakeme_after_rcu" class="sref">wakeme_after_r2.CONFIG_P2OVE_LOCKING */1/spav2.rcu_head1/a>  *1a href="+c2PL" class2"sref">EXPORT_SYMBOL_GPL2/a>(120pdate.c#L85" a  
L169">.1691ef="keobjectet;.<.1481/a>{..1741/a>        1a href>);.._ef="kedeeccode=t" class="srcu0">._ef="kedeeccel/r class="sref">head1/a>, struct.2rm  
L26">_rcu_read_unlock1/a>);.<2 href2"kernede=lockdep_recurs  v" class="s2c/a>1spav lass="line" nam  
L107">21071/2>#endif 1spav class="comment">/* #i2def.CONFI2_PREEMPT_RCU */1/spav2.<2 href2"kerness="lin_sched_lock_mapt;eturn 0;..1691ef="ke
L170">._v cl.1481/a>{.._v clrnel/rcupdate.c#L170" id 
L170" class="line" nam  
L170">.1710">static void.1a href="+code=wakeme_after_rcu" class="sref">wakeme_after_r2" nam  
L209">.1091/a>#ifdef.1a hr2f="+c21ref="+code=__rcu_read_unlock" class2e=lock_cl2ss_key" class="sref">loc2_clas211date.c#L85" a  
L169">.1691ef="keobjectev cl.1481/a>{..1741/a>        1a href>);.._ef="kedeeccode=t" class="srcu0">._ef="kedeeccel/r class="sref">head1/a>, struct.2"+code=lo2kdep_map" class="sref">l2ckdep2map1/ade=lockdep_recurs  v" class="s2="string"2"rcu_read_lock"2rcu_synchronize1/a> *1a href=2T_SYMBOL_2PL" class="sref">EXPORT_2YMBOL2d 
L13" class="line" nam  
L
L165" class="line" nam  
L165">.1651/2 class="s2ef">rcu_lock_map1/a>);.<2 href2ou should have received a copy fixup_t;.lock_clas2_key12"> * along with this program; i- is rcupda objectnel/t;..2=lockdep_2ap" class="sref">lockdep2map1/2, Inc., 59 Temple Place - Suit
L89">. 891/a>                1a href2>"rc2_read_lock_bh"0">._vixup_t;.._vixup_t;.static void.1a addcode=t" class="saddca hrefenum a  
L169">.1691ef="keobj_kerne.1481/a>{.{.wakeme_after_r2"ef.CONFI2ass="sref">EXPORT_SYMBOL2GPL1/21
L78"ef">rcu_head1/a>  *1a href="+c2spav2..1710">static void.1a href="+code=wakeme_after_rcL173">.1731/a>.head1/a>, struct.2="line" naam  
L20">. 210"a>1spav ca> 1a22g_lockdep_rcu_enabled" class="sref2e" nam  
L221">. 211/a>1spav class="kdep2ref="+code=rcudate.c"line" nam  
L150kerne.1481/a>{..1731/a>.{. * B>(1a 22ef">rcu_read_unlock_sp class="line" nam  
L
L165" class="line" nam  
L165">.1651/2 
L24">. 2241/a>1spav class="commen href2 and inputs from Rusty Russelllllllllllllllll* Ensu checks queu1/s  vsbarcupa 941ll executw that a1/spav2.. 251llllllllllllllll* Ing, sdetectnecks , sa 94CE" .>. 261/a>1spav class="comhref=2> * http://www.rdrop.com/userllllllllllllllll* thiv an, , sshould slassy fail,.1spav  class="comment"> * http:;&2.sourceforge.net/locking/rclollllllllllllllll* In ! 
L106"rnelfigur(if este.c# 94rnel/ waypav2tell ing, sa 9state will be updated1/spav2.lockd2p_recurs  v1/a> == 0;. * For detailed explana
  v llllllllllllllll* att
L89 isy fixupoversjlemeprss="a warn1/sp4" id 
L144" class="line" nam  
L1442e"line" naMBOL_GPL1/a>(1a href="+c2de=de2 *              http://lse.sollllllllllllllll*
L89">. 891/a>                1a href2>debug_lo2kdep_rcu_enabled1/a>);.<2 href23 href="nnrnel/rcupdate.c#L57" id 
L57" cla23" class="linef="+code=" cla_lockdep_rcu_enabled" class="sref2..1001/a>.head1/a>, struct.2a>1spav c2ass="comment"> * rcu_rea2_lock23rent_cpu_online" class="sref">rcu_lockdep_current_cpu_onlin22.23pdate.c#L85" id 
L85"s="line" nam  
L150">.1id 
L89edepthss="line" nam  
L17id 
L89edepth="ker)">. 0"kernel/rcupdate.c#id 
L89ecou>debug_locks1/a> id 
L89ecou>d="ker)">. 0"kercu_lockdep_current_cpu_onlin22m  
L26">>.1361/a>1spav class="co2ment"23 1spav class="comment_spe/rcupdate.c#L57L155" id 
L155" class="line" nam  
L155">.1551/u"kernel/rcupdate.c#L161" id 
L12">.1371/a21spav class="comment"> *2rcu_r231a href="+code=debugnlock_spe/rcupdate.c#L57ass="line" nam  
L100">.1001/a>.head1/a>, struct.2aef.CONFI2av class="comment"> * wi2l sho23nel/rcupdate.c#L98" ine" class="sref">rcu_lockdep_current_cpu_onlin239">.13912a>1spav class="comment">2* tha24_lockdep_rcu_enabled"de=lockdep_recurs  v" class="s2="kernel/2cupdate.c#L140" id 
L1402 clas24kernel/rcupdate.c#L100" id 
L100" cl
L17ref="+code=t" class="s
L17ref="+c.1551/>rcu_lockdep_current_cpu_onlin23debug_lo2"kernel/rcupdate.c#L141"2id 
L241a href="+code=rcu_is0" id 
L100" cl
L17ref="+cef="keode=t" class="s
L17ref="+cef="ke.1551/>rcu_lockdep_current_cpu_onlin23 * Check2debug24e=rcu_read_unlock_spe/rcupdate.c#L57
L17ref="+cebhss="line" nam  
L17ref="+cebh.1551/>rcu_lockdep_current_cpu_onlin23>1spav c2"kernel/rcupdate.c#L143"2id 
L24ef">rcu_read_unlock_special1/a>(1a hef="keobjectet;.<.1481/a>{..1741/a>        1a href>);.._ef="kedeeccode=t" class="srcu0">._ef="kedeeccel/r class="sref">head1/a>, struct.2>.1441/a>2spav class="comment"> * 2ote t24"comment">/* ->rcu class="sref">debug_lockdep_rcu_enable2  
L145">21451/a>1spav class="comm2nt"> 24pdate.c#L85" rneault:ernel/rcupdate.c#L161" id 
L12.rcu_lockdep_current_cpu_onlin23>.1371/a2147">.1471/a>int.1a href2"+cod241a href="+codde=lockdep_recurs  v" class="s2=ef.CONFI2ock_bh_held1/a>(void).()).<2 href="kernel/rcupdate.c2L150"25*              http://lse.s
L165" class="line" nam  
L165">.1651/2ss="line"2nam  
L151">.1511/a>    2   if251" class="line" nam  
L141">.1vixup_rcupd>.1nel/  vs1/sphena Arcavgeli and Andi Kleev.1/spav2.()).<2 href="kernel/rcupdate.c2L152"25" class="line" nam  
L132">.13- is rcupda objectnel/rcupd>.12" id 
L62" class="line" nam  
L62">.2       if2(!1a href="+code=rcu_loc2dep_c253" class="line" nam  
L143">.1- is unknown objectnel/rcupd>.12 (>/**1/b sa ss="li vsy/t;.()).<2 href="kernel/rcupdate.c2L154"25u should have received a copy Acupd>.clasel/perform.in_softi2q1/a>25offline from an RCU perspec
 ve, so check for those as well.1/spav2ass="sref2>irqs_disabled1/a>();.0">._vixup_rcupd>.1ode=t" class="srcu0">._vixup_rcupd>.1el/rcupda">static void.1a addcode=t" class="saddca hrefenum a  
L169">.1691ef="keobj_kerne.1481/a>{.{.wakeme_after_r2s="sref">2XPORT_SYMBOL_GPL1/a>(1a 2ref="25rcu_read_lock_bh_held" class="sref"2ref">rcu_2ead_lock_bh_held1/a>);.<2 href25nel/rcupdate.e.c#L171" id 
L171" class= class="line" nam  
L170">.1710">static void.1a href="+code=wakeme_after_rcL173">.1731/a>.head1/a>, struct.259" class2"line" nam  
L159">.15912a>#en2if 1spav class="comment">/* #ifdef.2ONFIG_DEB2G_LOCK_ALLOC */1/spav2.<2 href26ref="kernel/rcate.c"line" nam  
L150kerne.1481/a>{..1611/2>stru26class="sref">t1/a> = 1a href="+cod2        s2ruct.1a href="+code=rcu_2ead" 26href="kernel/h th73">.1731/a>.{.c26ef">rcu_read_unlock_sp class="line" nam  
L
L165" class="line" nam  
L165">.1651/2" class="2ref">complet  v1/a>;..1651/2"in_softi2nam  
L164">.1641/a>};.<2 href2"kernel/rcupdate.c#L165" id lllllllllllllllll* track.llllllllllllllll*ve, so check for those as well.1/spav2
L167">.1271/a>1spav class="commen2"> * 261a href="+code=debugnpecial1/a>(1a hef="keobjectet;.<.1481/a>{..1741/a>        1a href>);.._ef="kedeeccode=t" class="srcu0">._ef="kedeeccel/r class="sref">head1/a>, struct.2.c#L168" 2d 
L168" class="line" na2  
L126"+code=CONFIG_PROVE_RCU_DELAY" classef="keobjectercupd>.1ode=t" class="sef="keobjectercupd>.1 class="line" nam  
L174">.1741/a>        1a href>);.._ef="kedeeccode=t" class="srcu0">._ef="kedeeccel/r class="sref">head1/a>, struct.2.(1a href="+code=__rcu_read_lock2de=head" 2lass="sref">head1/a>)..1731/a>.{..1651/2+code=rcu2 class="sref">rcu1/a>;.<2 href2omment"> * Preemptible RCU imllllllllllllllll* Ensu checks queu1/s  vsbarcupa 941ll executw that a1/spav2.. 481/a>#iate.c52v c2a" id2ead_unlock()) and ->rcu_rellllllllllllllll* thiv an, , sshould slassy fail,.. 761/2a>1spav class="comment">2 * in2oke rcu_read_unlock_special()llllllllllllllll* In ! 
L106"rnelfigur(if este.c# 94rnel/ waypav2tell ing, sa 9state will be updated1/spav2.2. 771/a>1spav class="com2ment"2 * iv an RCU read-side criticllllllllllllllll*  s rref="kernel/rcupdate.c#L86" clasors bo/spavw94CEve44" id 
L144" class="line" nam  
L1442uc#L168" 2ref="kernel/rcupdate.c#L278" i27 
L28" class="line" nam  
L2llllllllllllllll* att
L89 isy fixupoversjlemeprss="a warn1/sp4" id 
L144" class="line" nam  
L1442lass="lin2e" nam  
L79">. 791/a>vo2id.1a28 * For detailed explana
  v llllllllllllllll*ve, so check for those as well.1/spav2="sref">_2_rcu_read_unlock1/a>(voi2d).task2_struct1/a> *1a href="+c2ode=t281a href="+code=rcu_is0" id 
L100" class="line" nam  
L100">.1001/a>.head1/a>, struct.2e=current2" class="sref">current1/2a>;.<28e=rcu_read_unlock_spe class=">rcu_lockdep_current_cpu_onlin2t" class=2"sref">t1/a>->1a href2="+co2e=rcu_hspav rcu_lockdep_current_cpu_onlin2"+code=t"2 class="sref">t1/a>->21a hr28"comment">/* ->rcus="line" nam  
L150">.1id 
L89edepthss="line" nam  
L17id 
L89edepth="ker)">. 0"kernel/rcupdate.c#id 
L89ecou>debug_locks1/a> id 
L89ecou>d="ker)">. 0"kercu_lockdep_current_cpu_onlin2t" nam  
2esting1/a>;..1551/u"kernel/rcupdate.c#L161" id 
L12"">. 761/2r" class="sref">barrier12/a>()2  1spav class="commente=rcu_is0" id 
L100" class="line" nam  
L100">.1001/a>.head1/a>, struct.2e  
L77">2rref="kernel/rcupdate.c#21ent"281a href="+code=debugnlock_spe class=">rcu_lockdep_current_cpu_onlin2tc#L168" 2  
L88">. 881/a>#ifdef.12a hre2="+code=CONFIG_PROVE_Rde=lockdep_recurs  v" class="s2="+code=u2delay" class="sref">udel2ay1/a29_lockdep_rcu_enabled"0" id 
L100" cl
L17ref="+code=t" class="s
L17ref="+c.1551/>rcu_lockdep_current_cpu_onlin2 
L90" cl2ass="line" nam  
L90">. 2901/a2#endif 1spav class="comment">/* #ifde
L17ref="+cef="keode=t" class="s
L17ref="+cef="ke.1551/>rcu_lockdep_current_cpu_onlin2lass="sre2f">barrier1/a>();  1spav2 clas2="comment">/* assigv b/rcupdate.c#L57
L17ref="+cebhss="line" nam  
L17ref="+cebh.1551/>rcu_lockdep_current_cpu_onlin2l=current2="sref">t1/a>->1a hre2f="+c2de=rcu_read_unlock_speCU_DELAY" classef="keobjectercupd>.1ode=t" class="sef="keobjectercupd>.1 class="line" nam  
L174">.1741/a>        1a href>);.._ef="kedeeccode=t" class="srcu0">._ef="kedeeccel/r class="sref">head1/a>, struct.2+code=rcu2_read_unlock_special" cl2ass="2ref">rcu_read_unlock_s class="sref">debug_lockdep_rcu_enable2lass="sre2f">barrier1/a>();  1spav2 clas2="comment">/* rneault:ernel/rcupdate.c#L161" id 
L12de=t" cla2ss="sref">t1/a>->1a h2ref="29pdate.c#L85" id 
L85" class=">rcu_lockdep_current_cpu_onlin2_read_loc2k_nesting1/a> = 0;.2 nam  
L97">. 971/a>#ifd2ef.1a2href="de=lockdep_recurs  v" class="s2=c#L168" 2LL18" class="line" nam  2L hre29(1a href="+code=rcu_bh_lock_map" c3code=t" c3ass="sref">t1/a>->1a 3ref="30 * For detailed explana
  v
L165" class="line" nam  
L165">.1651/3ref">rcu_3ead_lock_nesting1/a>);.<3 href30"line" nam  
L140">.1410"a>1s1vixup_v clnel/  vs1/sphena Arcavgeli and Andi Kleev.1/spav2..1- is rcupda objectnel/v cl2" id 
L62" class="line" nam  
L62">.3sref">INT3MIN1/a> / 2);..1ve, so check for those as well.1/spav3s 231/a>13ss="line" nam  
L103">.1331/a>3endif ss="linss="line" nam  
L146">0">._vixup_v cl.1481/a>{.0">._vixup_v clel/rcupda">static void.1a addcode=t" class="saddca hrefenum a  
L169">.1691ef="keobj_kerne.1481/a>{.{.wakeme_after_r3.CONFIG_P3OVE_LOCKING */1/spav2.rcu_head1/a>  *1a href="+c3PL" class3"sref">EXPORT_SYMBOL_GPL3/a>(130pdate.c#L85" e.c#L171" id 
L171" class= class="line" nam  
L170">.1710">static void.1a href="+code=wakeme_after_rcL173">.1731/a>.head1/a>, struct.3rm  
L26"3_rcu_read_unlock1/a>);.<3 href301a href="+code=rcu_expedited" clas3c/a>1spav3lass="line" nam  
L107">31071/301a href="+codcate.c"line" nam  
L150kerne.1481/a>{..1731/a>.{..1091/a>#ifdef.1a hr3f="+c31_lockdep_rcu_enabled"0 detailed explana
  v
L165" class="line" nam  
L165">.1651/3e=lock_cl3ss_key" class="sref">loc3_clas31*              http://lse.sollllllllllllllll* Ensu checks queu1/s  vsbarcupa 941ll executw that a1/spav2.l3ckdep311" class="line" nam  
L141">llllllllllllllll* Ing, sdetectnecks , sa 94CE" ..llllllllllllllll* thiv an, , sshould slassy fail,.EXPORT_3YMBOL3d 
L13" class="line" nam  
L>llllllllllllllll* In ! 
L106"rnelfigur(if este.c# 94rnel/ waypav2tell ing, sa 9state will be updated1/spav2.rcu_lock_map1/a>);.<3 href3ou should have received a copllllllllllllllll*  s rref="kernel/rcupdate.c#L86" clasors bo/spavw94CEve44" id 
L144" class="line" nam  
L1443_class_ke3" class="sref">lock_clas3_key13"> * along with this program;llllllllllllllll* att
L89 isy fixupoversjlemeprss="a warn1/sp4" id 
L144" class="line" nam  
L1443=lockdep_3ap" class="sref">lockdep3map1/3, Inc., 59 Temple Place - Suillllllllllllllll*ve, so check for those as well.1/spav3>"rc3_read_lock_bh"EXPORT_SYMBOL3GPL1/31"+code=CONFIG_PROVE_RCU_DELAY" classass="line" nam  
L100">.1001/a>.head1/a>, struct.3spav2.. 210"a>1spav 3a> 1a32kerne1spav rcu_lockdep_current_cpu_onlin3=+code=lo3221">. 211/a>1spav class3"kdep32"comment">/* assigv bs="line" nam  
L150">.1id 
L89edepthss="line" nam  
L17id 
L89edepth="ker)">. 0"kernel/rcupdate.c#id 
L89ecou>debug_locks1/a> id 
L89ecou>d="ker)">. 0"kercu_lockdep_current_cpu_onlin3spav2..1551/u"kernel/rcupdate.c#L161" id 
L13s_SYMBOL_3spav class="comment"> * 3>(1a 32ef">rcu_read_unlock_s_PROVE_RCU_DELAY" classass="line" nam  
L100">.1001/a>.head1/a>, struct.3sclass="s3241/a>1spav class="comme3 href32"comment">/* ->rcuenabled" class=">rcu_lockdep_current_cpu_onlin3=class_ke3rnel/rcupdate.c#L25" id 3ebug_32pdate.c#L85" id 
L85"de=lockdep_recurs  v" class="s3am  
L26"3>. 261/a>1spav class="co3href=32 1spav class="comment0" id 
L100" cl
L17ref="+code=t" class="s
L17ref="+c.1551/>rcu_lockdep_current_cpu_onlin31/a>1spav3 class="comment"> * http3;&3.1a href="+code=debugomment">/* #ifde
L17ref="+cef="keode=t" class="s
L17ref="+cef="ke.1551/>rcu_lockdep_current_cpu_onlin31ef.CONFI3href="kernel/rcupdate.c#31a hr32"+code=CONFIG_PROVE_RCU_DELAY" class
L17ref="+cebhss="line" nam  
L17ref="+cebh.1551/>rcu_lockdep_current_cpu_onlin3ef">lockd3p_recurs  v1/a> == 0;..1741/a>        1a href>);.._ef="kedeeccode=t" class="srcu0">._ef="kedeeccel/r class="sref">head1/a>, struct.3e"line" n3MBOL_GPL1/a>(1a href="+c3de=de33endif 1spav class="co class="sref">debug_lockdep_rcu_enable3>debug_lo3kdep_rcu_enabled1/a>);.<3 href33"comment">/* rneault:ernel/rcupdate.c#L161" id 
L13. * rcu_rea3_lock33rent_cpu_onlide=lockdep_recurs  v" class="s32.33pdatee=lockdep_recurs  v" class="s32m  
L26"3>.1361/a>1spav class="co3ment"3 * CONFIG_PROVE_RCU and not 
L131" class="line" nam  
L131">.1311/a3">.1371/a31spav class="comment"> *3rcu_r3ad_lock_bh(), but thev later ent;.<_
L170">._ournta
Lment"t;.. href="kerobjectl165" class="line" nam  
L165">.1651/3aef.CONFI3av class="comment"> * wi3l sho3 the situa
  v.  This is useful@0">.: po sts=pav2
L170">. e.c#L1u cheoav2..339">.13913a>1spav class="comment">3* tha3 require that they be called w" id 
L62" class="line" nam  
L62">.33"line" n3cupdate.c#L140" id 
L1403 clas3="line" nam  
L140">.1410"a>1s led)1e.c#L138pinformsf="kerobjectl of"a new2
L170">. e.c#L1u chehat" id 
L62" class="line" nam  
L62">.33debug_lo3"kernel/rcupdate.c#L141"3id 
L341" class="line" nam  
L141">.1stanbeen41lloc>.12 tanis rueoavari155" os spavnta
Lnabled)1e.c#L138" id 
L62" class="line" nam  
L62">.33 * Check3debug3lockdep_rcu_enabled() to preve1/sp botrebug c. href
L170">. e.c#L1u cscupdatere ss="li vsy/rnent"dL144" id 
L144" class="line" nam  
L14433>1spav c3"kernel/rcupdate.c#L143"3id 
L343" class="line" nam  
L143">.1updatere dy43"li vsy/1lloc>.12 2ate.c#L57e" nam  
L143">.1updatere dy43"li vsy/ nam  
L100">.1001/fte.c#L73" id 
L73" class="2>..1stanbeell/rcupdate.c#L141"3id 
L341" class="line"2f="ker1 class="srelass="line"2f="iuot3c#L1!sched_lock_mapt;eturn 0;.                1a href1de=t" cl3.c#L146" 3d 
L124 1spav class="com3ents=3"line" nam  
L146">.1461/a>1spav class="comment"> */1/spav2.in3.1a href2"+cod241a href=3+codd3=lockdnam  
L170">.1710">stainer_of1/a>(1a href="+code=head" class="sref">head1/a>, structakeme_after_r2" nam  
L209">.1091/a>#ifdef.1a hr2f="+c21ref="+code=__rcu_read_unlock" class2e=lock_cl2ss_key" class="sref">loc2_cla3.1481/a>{.._ef="kedee/a>(1a href="+code=head" cu0">._ef="kedee/a>(1a hreeccel/r class="sref">head1/a>, struct.3e"line" n3MBOL_GPL1/a>(1a href="+c3de=de33endif 1spav class="co class="sref">debug_lockdep_rcu_enable3>debug_lo3kdep_r5*       3      http://lse.s
L165"3class3"line">.1361/a>1spav class="co3ment"3nam  
L153">.1511/a>    2   if251"3class3"line" GPL1/a>(1a hre
L157group_
L89cel/r class="sref">head1/a>, struct.2ref">rcu_2ead_loctainer_of1/a>(1a href="+code=head" class="sref">head1/a>, struckdep_rcu_enable3>debug_lo3kdep_r5ta
Lnable1/spav2.()).<2 hr3f="ke35.{..2       if2(!3a hre3="+code=rcu_loc2dep_c253" clL170">._ournta
Lment"t;.() class="sref">head1/a>, s wi3l class=situa
  v.  This is useful@0">.: po sts=pav2
L170">. e.c#L1u cheoav2.in_sofmment">3* tha3 require that they be called w" id 
L62" class="line" nam  
L62">.33"line" n32>irqs_di3abled1/a>();.0">. class="line" nam  
L62">.33"line" n32471/a>in3d>.1el/rcupda">static vo3d.1a 35line" nam  
L167">.1671/a>1spanel/rcupdate.c#L141"3id 
L341" clasclass=nsitua
  v.  This is they be  class="line" nam  
L62">.33"line" n32a2href=23date.e.c#L171" id 
L171"3class35" nam  
L165">.1651/3aef.CONFI33deboutcallgo outcs="scope" iAs withI3av class="comment"> * wouldlllllll* track..13913a>1spav class="cocupdate.c#ernel/rcupdate.c#L143"3id 
L343" class="line" nam  
L143">lllll* track..1410"a>1s led)1e.c#.1updatere  class="2>..33debug_lo3"ker3av class="comment"> * wouldll1403 clas3
L341"f="iuot3c#Lv2lll* track..1731/a>..33                1a href1de=t" cl3ass==.0">._vixup_v cl.1481/a>{.0">._vixu1651/2" c3ass="2ref">complet  v1/a3;..1710">sta>container_of1/a>(1a href="+code=head" class="sref">head1/a>, structakeme_after_r2" nam  
L209">.1091/a>#ifdef.1a hr2f="+c21ref="+code=__rcu_read_unlock" class2e=lock_cl2ss_key" class="sref">loc2_cla3sjlememav3 su checks ..1710">statnel/rcupd3te.c#L73" id 
L73" class3"2>.<36 1a href>);.._ef="kedeeccode=t" class="srcu0">._ef="kedeeccel/r class="sref">head1/a>, struct.3e"line" n3MBOL_GPL1/a>(1a href="+c3de=de33endif 1spav class="co class="sref">debug_lockdep_rcu_enable3>debug_lo3kdep_r1/spav2
L367">.1271/a>1spav class=3comme36ONFI2_PREEMPT_RCU */1/spav2.<2 href3jectet;.<3class="line" nam  
L174"3.17413"line" GPL1/a>(1a hre
L157group_
L89cel/r class="sref">head1/a>, struct.2ref">rcu_2ead_locta>container_of1/a>(1a href="+code=head" class="sref">head1/a>, struckdep_rcu_enable3>debug_lo3kdep_r1c void.13cupd>.1 class="line" nam3 
L1736line" nam  
L165">.1651/3ref">rcu_3href="+co3e=rcu_he2d" cl21/a>(1a h3ef="+3"line" neme_after_r2" nam  
/1/spav2.rcu_heaf="+c3de=de33endif 1spav class="co class="sref">debug_loc =ass="line" nam  
L100">.1001/a>.kernel/rc3pdath th73">.1731/a>..1spav class="co/a>.ef301a h"line" nam   neing">"sref">he"vixup_v,s="line" nam  
L100">.1001/a>.kta
Lnableref=:ernel/rcupdate.c#L131" id3
L12t.1a href2"+code=lockdep_ref="keobj_kerne.1481/a>{."keobj_kernene1a href="+code=rcur">.1691ef="keobj_kerne.1481/a>{..1001/a>.kss==.rcu13a>;.<3 href2omment">"+code=lockdep_ref="ke>._ef="kedeeccode=t" clref="keobj_kernene1a href="+code=rcur">.1691ef="ke91ef="keobj_kerne.1481/a>{..1001/a>.k651/2" c3cutw that a1/spav2..1691ef="keobj_kerne.1481/a>{..1001/a>.kjlememav3"kernel/rcupdate.c#L139"3id 
L339" cl nam  
L164">.1641/a>};.(1a hre
L157group_
L89cel/r class="sref">head1/a>, struct.2ref">rcu_2ead_locf="+c3de=de33endif 1spav class="co class="sref">debug_lockdep_rcu_enable3>debug_lo3kdep_r# 94rnel/3waypav2tell ing, sa 9sta3e wil3 be uprln" class=2sref"20class="sref">t1/a> = 1a hreock_mapt;eturn 0;.{.0">._vixu" clasors3bo/spavw94CEve44" id 
L134" cl37href="ki 
L153" cne" nam  
L169">.3s="a warn3/sp4" id 
L144" class="l3ne" n3m  
L1#iORT_SYMBOL3GPL1/31update1spav class="co/1pdatet.2ref">rcu_2ead_loc 1a hreTRE_rcu_enabled() to pre
L165"TRE_rcu_==.rcu_2ead_loc 1a hreTRE_rsass="lrcu_enabled() to pre
L165"TRE_rsass="lrcu_==.rcu_2ead_loc 1a hre 0;.TRA>/* ->rcuenabl 1a hre 0;.TRA>/k_cl2ss_key" class="sref">loc2_cla31/spav2="3ref">_2_rcu_read_unlock13a>(vo32d)..1710">sto_lllle"sreftorclas_ref="+code=wakeme_afo_lllle"sreftorclas_ref=t.2rechar">rcu_synchronize1/atorclas/a>.1spav class="co1/atorclas/a>.ine" nakeme_after_r2" nam  
L209">.1091/a>#ifdef.1a hr2f="+c21ref="+code=__rcu_rrh_enabled" class=rh_nene,s="line" nam  
L100">.1001/a>.dep_rcu_e3abled" class="sref2ref">3ask2_38ault:ernel/rcupdate.ccccccccccccccccunsigaterlongernelef">rcu_headecs">.1731/a>..1001/a>.dta
Lnables="sref">head1/a>, struc3.2e=c3rrent2" class="sref">ccccccccccccccccunsigaterlongernelef">rcu_heac_ol1091/a>#ifdef.1ac_ol1ine" nunsigaterlongernelef">rcu_heac091/a>#ifdef.1ack_cl2ss_key" class="sref">loc2_cla31ss==..1001/a>.1a hr28"c3mment">/* ->rcus="lin3" nam3t"1 class="srefnelef">rcu_healllle"sreftorclas_ref="+code=wakeme_alllle"sreftorclas_ref=t.2rercu_synchronize1/atorclas/a>.1spav class="co1/atorclas/a>.ine" n="+code=__rcu_rrh_enabled" class=rh_nene,ernelef">rcu_headecs">.1731/a>.rcu_heac_ol1091/a>#ifdef.1ac_ol1ine" nrnelef">rcu_heac091/a>#ifdef.1ack_cl2dep_rcu_enable3>debug_lo3kdep_rid 
L89ed3pth="ker)">. 0"kernel/rc3pdate38L26"3>.1361/a>1spav class="co3ment"3155">.1553/u"kernel/rcupdate.c#L163" id 38e updaGPL1/a>(1a hre
L157group_
L89cel/r class="sref">head1/a>, struct.2ref">rcu_2ead_locto_lllle"sreftorclas_ref="+code=wakeme_afo_lllle"sreftorclas_ref=t.2r2dep_rcu_enable3>debug_lo3kdep_ri 94rnel/3er1 class="sref">head1/a3, str38be uprllseep_rcu_enable3>debug_lo3kdep_ri clasors3. 881/a>#ifdef.12a hre2=3+code3CONFIG#/1pdat 
L170">.1710">sto_lllle"sreftorclas_ref="+code=wakeme_afo_lllle"sreftorclas_ref=t.2rercu_synchronize1/atorclas/a>.1spav class="co1/atorclas/a>.ine" n="+code=__rcu_rrh_enabled" class=rh_nene,ernelef">rcu_headecs">.1731/a>.rcu_heac_ol1091/a>#ifdef.1ac_ol1ine" nrnelef">rcu_heac091/a>#ifdef.1ack_cl2 \ep_rcu_enable3>debug_lo3kdep_ri="a warn32ay1/a29_lockdep_rcu_ena3led"03 id 
L100" cl
do { } while (02ss_key" class="sref">loc2_cla351/>rcu_l3ckdep_current_cpu_onlin23
L90"3cl2ass">.1id 
L89edepthss="line" nam  
L17"+cef="ke31551/>rcu_lockdep_curren3_cpu_3MIN23" class="linef="+code=INT_MIN_3ebh.1551/3rcu_lockdep_current_cpu_3nlin231="sref">t1/a>->1a hre1f="+c19oc 0;.STALL_COMMON* ->rcuenabl 1a hre 0;.STALL_COMMONN23" class="linef="+code=INT_MIN_3ess==..1 class="line" nam3 
L1739line" nam  
L165">.1651/2 class="s3rier1/a>(3;  1spav2 clas2="comment3>/* r3eault:f">t1/a>->1a hre1f="+c19ockdep_rcu_enabled() to pre
L165" class="line" nam  
L165">.1651/a+code=rcu3->1a h3ref="29pdate.c#L85" id 
385" c3ass=">#/1pdat 
L170">.1710">s 0;.STALL_DELAY_DELTAenabled() to pr 0;.STALL_DELAY_DELTAent2" class="s(5 * 
L170">.1710">sHZenabled() to prHZk_cl2ss_key" class="sref">loc2_cla3ing1/a> =30;..1710">s 0;.STALL_DELAY_DELTAenabled() to pr 0;.STALL_DELAY_DELTAent2" class="s0ep_rcu_enable3>debug_lo3kdep_rf clasors3="+code=rcu_bh_lock_map"3c3cod3=t" c3">.1id 
L89edepthss="line" nam  
L17"="a warn3tailed explana
  v
L165"3class3"line" nam  
L165">.1651/3ref">rcu_4ead_lock_4esting1/a>);.<3 href30"l4ne" n4m  
L1s="lin_read_loc1k_nesticpu/a>,ll_suppress">.1731/a>.,ll_suppressf=3kernelef">rcu_hea__ref=_mostl"kerne1spav clas__ref=_mostl"f=3k;lass=2sref"20class="sref">1 = suppress a>,lllllllllls. ._vixup_v cl.1481/a>{.0">._vix4Kleev.1/s4av2.rcu_hea__ref=_mostl"kerne1spav clas__ref=_mostl"f=3k1a href="+code=rcu 1a hre 0;.CP;.STALL_TIMEOUG_PROVE_RCU_DELAY" clas 0;.CP;.STALL_TIMEOUGf=3k; cl.1481/a>{.0">._vix4K2eev.1/s4acu_lockdep_current_cpu_4 / 2)4OBJECTSble. HEAD23" class="linef="+43ss="line4 nam  
L103">.1331/a>3en4if ss4"linss=ref="+code=rcumodule_param_PROVE_RCU_DELAmodule_paramt.2rercu_synchronize1/aicpu/a>,ll_suppress">.1731/a>.,ll_suppressf=3k,dca , 06442dep_rcu_enable3>debug_lo3kdep_4p_v clel/4cupda">static void.1a ad4code=4" clas=ref="+code=rcumodule_param_PROVE_RCU_DELAmodule_paramt.2rercu_synchronize1/aicpu/a>,ll_timeou_kerne.1481/a>{.,ll_timeou_f=3k,dca , 06442dep_rcu_enable3>debug_lo3kdep_4p5v clel/4cef="29pdate.c#L85" id 
4class4 classep_rcu_enable3>debug_lo3kdep_4p6v clel/4c;..17s="lin_read_loc1k_nestijiffies_till_s>,ll_chehref="+code=head"estijiffies_till_s>,ll_chehrt.2renam 2ss_key" class="sref">loc2_cla401a href=4+codcate.c"line" nam  
L450ker4e.1481ss="line" nam  
L100">.1001/a>4update.c#4161" id 
L13def.CONFI3_P4EEMPT4RCU */1/spav2.s="lin_read_loc1k_ntill_s>,ll_chehref="+code=head"till_s>,ll_chehrt.2r1a href="+code=rcuACCESSnt">/* ->rcuenablACCESSnt">/t.2rercu_synchronize1/aicpu/a>,ll_timeou_kerne.1481/a>{.,ll_timeou_f=3k2dep_rcu_enable3>debug_lo3kdep_4p9date.c#41ailed explana
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L165"41" id40line" nam  
L165">.1651/3ref">rcu_41651/3e=l4ck_cl3ss_key" class="sre4">loc4_clas31*      http://lse.sollllllllllllllll* Ensu checks queu1/s  vsbarcup4 941ll ex4cutw that a1/spav2.                1a href1de=t" cl4,.{.0">._vix4# 94rnel/4waypav2tell ing, sa 9sta4e wil41"1 class="srecks1/a> id 
L89ecoutill_s>,ll_chehref="+code=head"till_s>,ll_chehrt.2r1< 3sass="line" nam  
L100">.1001/a>4" clasors4bo/spavw94CEve44" id 
L144" cl41L85" id 
L85"de=lockdhref="+code=rcuACCESSnt">/* ->rcuenablACCESSnt">/t.2rercu_synchronize1/aicpu/a>,ll_timeou_kerne.1481/a>{.,ll_timeou_f=3k21a 3dep_rcu_enable3>debug_lo3kdep_4s="a warn4/sp4" id 
L144" class="l4ne" n41id 
L100" cl
L17ref="in_read_loc1k_ntill_s>,ll_chehref="+code=head"till_s>,ll_chehrt.2r1a 3dep_rcu_enable3>debug_lo3kdep_4s1a href=4uot;rc3_read_lock_bh&quo4; id 
L89ecoutill_s>,ll_chehref="+code=head"till_s>,ll_chehrt.2r1> 300sass="line" nam  
L100">.1001/a>4"pdate.c#4abled" class="sref3"ef.C4NFI3a41lin31ef.CONFI3href="kernel/rcupdate.ACCESSnt">/* ->rcuenablACCESSnt">/t.2rercu_synchronize1/aicpu/a>,ll_timeou_kerne.1481/a>{.,ll_timeou_f=3k21a 302.head1/a>, struc4.3spa42.,ll_chehrt.2r1a 302.. 2104a>1spav 3a> 1a32kerne1sp4v rcu4lockdep_curren>.1361/a>1spav class="co3ment"4"kdep32"c4mment">/* assigv bs="lin4" nam42ault:ernel/rcass="s3pdate.c#3 href3till_s>,ll_chehref="+code=head"till_s>,ll_chehrt.2r1* 
L170">.1710">sHZenabled() to prHZk_cl + 
L170">.1710">s 0;.STALL_DELAY_DELTAenabled() to pr 0;.STALL_DELAY_DELTAent2.. 0"kernel/rc4pdate4c#id 
>.1361/a>1spav class="co3ment"4"..1651/2 class="s4head1/a4, str42 class="saddca hrefenum a  
L169">_panic091/a>#ifdef.1a9">_panict.2reakeme_after_r2" nam  
notif clefllll1spav class="co/otif clefllllc21ref="+code=__rcu_rldllef="+code=head"tdlllle" nunsigaterlongernelef">rcu_heaevef="+code=head"evlle" n/rupdate.c#L172" kernpt 1spav class="copt k_cl2ss_key" class="sref">loc2_cla4e3rnel/rc4pdate.c#L25" id 3ebug_324date.42class="line" nam  
L170">.1710">sta4 class="c43href=32 1spav class="co4ment042 1a href>);..1731/a>.,ll_suppressf=3ke= id 
L13.rcu_l4ckdep_current_cpu_onlin34/a>1s4av3 class="comass="s3pdate.c#3 href3NOTIFY_DON/* ->rcuenablNOTIFY_DON/ent2.rcu_lockdep_curren4_cpu_42t" c3ass="sref">t1/a>->1a 3ref="4ebh.1551/4rcu_lockdep_current_cpu_4nlin342line" nam  
L165">.1651/3ref">rcu_4jectev cl4class="line" nam  
L174"4.1741430class="saddakeme_after_r2" nam  
notif clefllll1spav class="co/otif clefllllc21rerefenum a  
L169">_panicefllll1spav class="co9">_panicefllllf=3ke= ="line" nam  
L170">.1710">sta4cu_enable41/a>);.<3 href33"comment4>/* r43ault:ernel/rc"+code=lockdep_r/otif cleel331spav class="co/otif cleel33nene1a href="+code=rcur">_panic091/a>#ifdef.1a9">_panict.2r,s="line" nam  
L100">.1001/a>4.c#L132" 4d 
L133e=rcu_read_unlock4spe c4ass="> nam  
L164">.1641/a>};. 4 rcu_rea3_lock33rent_cpu4onlid43line" nam  
L165">.1651/2 class="s44"3id 
L34t;rcu_heachehricpu/a>,ll_obj_kerne.1481/a>{.chehricpu/a>,ll_obj_t.2renam 2ss_key" class="sref">loc2_cla433pdatee=4ockdep_recurs  v" class=4s32m 43class="line" nam  
L170">.1710">sta4 * CONFIG4PROVE_RCU and not 
L131"4class43 1a href>);.(1a hrepanice/otif clelist1spav class="copanice/otif clelistlle" n3MBOL_GPL1/a>(1a href="_panicefllll1spav class="co9">_panicefllllf=3k2dep_rcu_enable3>debug_lo3kdep_431spav cl4ss="comment"> *3rcu_r3ad4lock_43v3 class="comass="s32..4href="kerobjectl165" cla4s="li43t" c3ass="sref">t1/a>->1a 3ref="4.339"nelef">rcu_heaearly_obj_el331spav class="coearly_obj_el33t.2rercu_synchronizechehricpu/a>,ll_obj_kerne.1481/a>{.chehricpu/a>,ll_obj_t.2r2dep_rcu_enable3>debug_lo3kdep_4cupdate.c4L140" id 
L1403 clas3="l4ne" n44.1481/a>{.. e.4#L1u chehat" id 
L62" cl4ss="l44
L150">.1idlass=2sref"20class="sref">t1/a> = 1a hre 0;.STALL_COMMONP._vixup_v cl.1481/a>{.0">._vix4nta
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