linux/sound/pci/es1968.c
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   1/*
   2 *  Driver for ESS Maestro 1/2/2E Sound Card (started 21.8.99)
   3 *  Copyright (c) by Matze Braun <MatzeBraun@gmx.de>.
   4 *                   Takashi Iwai <tiwai@suse.de>
   5 *                  
   6 *  Most of the driver code comes from Zach Brown(zab@redhat.com)
   7 *      Alan Cox OSS Driver
   8 *  Rewritted from card-es1938.c source.
   9 *
  10 *  TODO:
  11 *   Perhaps Synth
  12 *
  13 *   This program is free software; you can redistribute it and/or modify
  14 *   it under the terms of the GNU General Public License as published by
  15 *   the Free Software Foundation; either version 2 of the License, or
  16 *   (at your option) any later version.
  17 *
  18 *   This program is distributed in the hope that it will be useful,
  19 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  20 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21 *   GNU General Public License for more details.
  22 *
  23 *   You should have received a copy of the GNU General Public License
  24 *   along with this program; if not, write to the Free Software
  25 *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  26 *
  27 *
  28 *  Notes from Zach Brown about the driver code
  29 *
  30 *  Hardware Description
  31 *
  32 *      A working Maestro setup contains the Maestro chip wired to a 
  33 *      codec or 2.  In the Maestro we have the APUs, the ASSP, and the
  34 *      Wavecache.  The APUs can be though of as virtual audio routing
  35 *      channels.  They can take data from a number of sources and perform
  36 *      basic encodings of the data.  The wavecache is a storehouse for
  37 *      PCM data.  Typically it deals with PCI and interracts with the
  38 *      APUs.  The ASSP is a wacky DSP like device that ESS is loth
  39 *      to release docs on.  Thankfully it isn't required on the Maestro
  40 *      until you start doing insane things like FM emulation and surround
  41 *      encoding.  The codecs are almost always AC-97 compliant codecs, 
  42 *      but it appears that early Maestros may have had PT101 (an ESS
  43 *      part?) wired to them.  The only real difference in the Maestro
  44 *      families is external goop like docking capability, memory for
  45 *      the ASSP, and initialization differences.
  46 *
  47 *  Driver Operation
  48 *
  49 *      We only drive the APU/Wavecache as typical DACs and drive the
  50 *      mixers in the codecs.  There are 64 APUs.  We assign 6 to each
  51 *      /dev/dsp? device.  2 channels for output, and 4 channels for
  52 *      input.
  53 *
  54 *      Each APU can do a number of things, but we only really use
  55 *      3 basic functions.  For playback we use them to convert PCM
  56 *      data fetched over PCI by the wavecahche into analog data that
  57 *      is handed to the codec.  One APU for mono, and a pair for stereo.
  58 *      When in stereo, the combination of smarts in the APU and Wavecache
  59 *      decide which wavecache gets the left or right channel.
  60 *
  61 *      For record we still use the old overly mono system.  For each in
  62 *      coming channel the data comes in from the codec, through a 'input'
  63 *      APU, through another rate converter APU, and then into memory via
  64 *      the wavecache and PCI.  If its stereo, we mash it back into LRLR in
  65 *      software.  The pass between the 2 APUs is supposedly what requires us
  66 *      to have a 512 byte buffer sitting around in wavecache/memory.
  67 *
  68 *      The wavecache makes our life even more fun.  First off, it can
  69 *      only address the first 28 bits of PCI address space, making it
  70 *      useless on quite a few architectures.  Secondly, its insane.
  71 *      It claims to fetch from 4 regions of PCI space, each 4 meg in length.
  72 *      But that doesn't really work.  You can only use 1 region.  So all our
  73 *      allocations have to be in 4meg of each other.  Booo.  Hiss.
  74 *      So we have a module parameter, dsps_order, that is the order of
  75 *      the number of dsps to provide.  All their buffer space is allocated
  76 *      on open time.  The sonicvibes OSS routines we inherited really want
  77 *      power of 2 buffers, so we have all those next to each other, then
  78 *      512 byte regions for the recording wavecaches.  This ends up
  79 *      wasting quite a bit of memory.  The only fixes I can see would be 
  80 *      getting a kernel allocator that could work in zones, or figuring out
  81 *      just how to coerce the WP into doing what we want.
  82 *
  83 *      The indirection of the various registers means we have to spinlock
  84 *      nearly all register accesses.  We have the main register indirection
  85 *      like the wave cache, maestro registers, etc.  Then we have beasts
  86 *      like the APU interface that is indirect registers gotten at through
  87 *      the main maestro indirection.  Ouch.  We spinlock around the actual
  88 *      ports on a per card basis.  This means spinlock activity at each IO
  89 *      operation, but the only IO operation clusters are in non critical 
  90 *      paths and it makes the code far easier to follow.  Interrupts are
  91 *      blocked while holding the locks because the int handler has to
  92 *      get at some of them :(.  The mixer interface doesn't, however.
  93 *      We also have an OSS state lock that is thrown around in a few
  94 *      places.
  95 */
  96
  97#include <asm/io.h>
  98#include <linux/delay.h>
  99#include <linux/interrupt.h>
 100#include <linux/init.h>
 101#include <linux/pci.h>
 102#include <linux/dma-mapping.h>
 103#include <linux/slab.h>
 104#include <linux/gameport.h>
 105#include <linux/module.h>
 106#include <linux/mutex.h>
 107#include <linux/input.h>
 108
 109#include <sound/core.h>
 110#include <sound/pcm.h>
 111#include <sound/mpu401.h>
 112#include <sound/ac97_codec.h>
 113#include <sound/initval.h>
 114
 115#ifdef CONFIG_SND_ES1968_RADIO
 116#include <sound/tea575x-tuner.h>
 117#endif
 118
 119#define CARD_NAME "ESS Maestro1/2"
 120#define DRIVER_NAME "ES1968"
 121
 122MODULE_DESCRIPTION("ESS Maestro");
 123MODULE_LICENSE("GPL");
 124MODULE_SUPPORTED_DEVICE("{{ESS,Maestro 2e},"
 125                "{ESS,Maestro 2},"
 126                "{ESS,Maestro 1},"
 127                "{TerraTec,DMX}}");
 128
 129#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
 130#define SUPPORT_JOYSTICK 1
 131#endif
 132
 133static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 1-MAX */
 134static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
 135static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;     /* Enable this card */
 136static int total_bufsize[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1024 };
 137static int pcm_substreams_p[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 4 };
 138static int pcm_substreams_c[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1 };
 139static int clock[SNDRV_CARDS];
 140static int use_pm[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
 141static int enable_mpu[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
 142#ifdef SUPPORT_JOYSTICK
 143static bool joystick[SNDRV_CARDS];
 144#endif
 145static int radio_nr[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1};
 146
 147module_param_array(index, int, NULL, 0444);
 148MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
 149module_param_array(id, charp, NULL, 0444);
 150MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
 151module_param_array(enable, bool, NULL, 0444);
 152MODULE_PARM_DESC(enable, "Enable " CARD_NAME " soundcard.");
 153module_param_array(total_bufsize, int, NULL, 0444);
 154MODULE_PARM_DESC(total_bufsize, "Total buffer size in kB.");
 155module_param_array(pcm_substreams_p, int, NULL, 0444);
 156MODULE_PARM_DESC(pcm_substreams_p, "PCM Playback substreams for " CARD_NAME " soundcard.");
 157module_param_array(pcm_substreams_c, int, NULL, 0444);
 158MODULE_PARM_DESC(pcm_substreams_c, "PCM Capture substreams for " CARD_NAME " soundcard.");
 159module_param_array(clock, int, NULL, 0444);
 160MODULE_PARM_DESC(clock, "Clock on " CARD_NAME " soundcard.  (0 = auto-detect)");
 161module_param_array(use_pm, int, NULL, 0444);
 162MODULE_PARM_DESC(use_pm, "Toggle power-management.  (0 = off, 1 = on, 2 = auto)");
 163module_param_array(enable_mpu, int, NULL, 0444);
 164MODULE_PARM_DESC(enable_mpu, "Enable MPU401.  (0 = off, 1 = on, 2 = auto)");
 165#ifdef SUPPORT_JOYSTICK
 166module_param_array(joystick, bool, NULL, 0444);
 167MODULE_PARM_DESC(joystick, "Enable joystick.");
 168#endif
 169module_param_array(radio_nr, int, NULL, 0444);
 170MODULE_PARM_DESC(radio_nr, "Radio device numbers");
 171
 172
 173
 174#define NR_APUS                 64
 175#define NR_APU_REGS             16
 176
 177/* NEC Versas ? */
 178#define NEC_VERSA_SUBID1        0x80581033
 179#define NEC_VERSA_SUBID2        0x803c1033
 180
 181/* Mode Flags */
 182#define ESS_FMT_STEREO          0x01
 183#define ESS_FMT_16BIT           0x02
 184
 185#define DAC_RUNNING             1
 186#define ADC_RUNNING             2
 187
 188/* Values for the ESM_LEGACY_AUDIO_CONTROL */
 189
 190#define ESS_DISABLE_AUDIO       0x8000
 191#define ESS_ENABLE_SERIAL_IRQ   0x4000
 192#define IO_ADRESS_ALIAS         0x0020
 193#define MPU401_IRQ_ENABLE       0x0010
 194#define MPU401_IO_ENABLE        0x0008
 195#define GAME_IO_ENABLE          0x0004
 196#define FM_IO_ENABLE            0x0002
 197#define SB_IO_ENABLE            0x0001
 198
 199/* Values for the ESM_CONFIG_A */
 200
 201#define PIC_SNOOP1              0x4000
 202#define PIC_SNOOP2              0x2000
 203#define SAFEGUARD               0x0800
 204#define DMA_CLEAR               0x0700
 205#define DMA_DDMA                0x0000
 206#define DMA_TDMA                0x0100
 207#define DMA_PCPCI               0x0200
 208#define POST_WRITE              0x0080
 209#define PCI_TIMING              0x0040
 210#define SWAP_LR                 0x0020
 211#define SUBTR_DECODE            0x0002
 212
 213/* Values for the ESM_CONFIG_B */
 214
 215#define SPDIF_CONFB             0x0100
 216#define HWV_CONFB               0x0080
 217#define DEBOUNCE                0x0040
 218#define GPIO_CONFB              0x0020
 219#define CHI_CONFB               0x0010
 220#define IDMA_CONFB              0x0008  /*undoc */
 221#define MIDI_FIX                0x0004  /*undoc */
 222#define IRQ_TO_ISA              0x0001  /*undoc */
 223
 224/* Values for Ring Bus Control B */
 225#define RINGB_2CODEC_ID_MASK    0x0003
 226#define RINGB_DIS_VALIDATION    0x0008
 227#define RINGB_EN_SPDIF          0x0010
 228#define RINGB_EN_2CODEC         0x0020
 229#define RINGB_SING_BIT_DUAL     0x0040
 230
 231/* ****Port Addresses**** */
 232
 233/*   Write & Read */
 234#define ESM_INDEX               0x02
 235#define ESM_DATA                0x00
 236
 237/*   AC97 + RingBus */
 238#define ESM_AC97_INDEX          0x30
 239#define ESM_AC97_DATA           0x32
 240#define ESM_RING_BUS_DEST       0x34
 241#define ESM_RING_BUS_CONTR_A    0x36
 242#define ESM_RING_BUS_CONTR_B    0x38
 243#define ESM_RING_BUS_SDO        0x3A
 244
 245/*   WaveCache*/
 246#define WC_INDEX                0x10
 247#define WC_DATA                 0x12
 248#define WC_CONTROL              0x14
 249
 250/*   ASSP*/
 251#define ASSP_INDEX              0x80
 252#define ASSP_MEMORY             0x82
 253#define ASSP_DATA               0x84
 254#define ASSP_CONTROL_A          0xA2
 255#define ASSP_CONTROL_B          0xA4
 256#define ASSP_CONTROL_C          0xA6
 257#define ASSP_HOSTW_INDEX        0xA8
 258#define ASSP_HOSTW_DATA         0xAA
 259#define ASSP_HOSTW_IRQ          0xAC
 260/* Midi */
 261#define ESM_MPU401_PORT         0x98
 262/* Others */
 263#define ESM_PORT_HOST_IRQ       0x18
 264
 265#define IDR0_DATA_PORT          0x00
 266#define IDR1_CRAM_POINTER       0x01
 267#define IDR2_CRAM_DATA          0x02
 268#define IDR3_WAVE_DATA          0x03
 269#define IDR4_WAVE_PTR_LOW       0x04
 270#define IDR5_WAVE_PTR_HI        0x05
 271#define IDR6_TIMER_CTRL         0x06
 272#define IDR7_WAVE_ROMRAM        0x07
 273
 274#define WRITEABLE_MAP           0xEFFFFF
 275#define READABLE_MAP            0x64003F
 276
 277/* PCI Register */
 278
 279#define ESM_LEGACY_AUDIO_CONTROL 0x40
 280#define ESM_ACPI_COMMAND        0x54
 281#define ESM_CONFIG_A            0x50
 282#define ESM_CONFIG_B            0x52
 283#define ESM_DDMA                0x60
 284
 285/* Bob Bits */
 286#define ESM_BOB_ENABLE          0x0001
 287#define ESM_BOB_START           0x0001
 288
 289/* Host IRQ Control Bits */
 290#define ESM_RESET_MAESTRO       0x8000
 291#define ESM_RESET_DIRECTSOUND   0x4000
 292#define ESM_HIRQ_ClkRun         0x0100
 293#define ESM_HIRQ_HW_VOLUME      0x0040
 294#define ESM_HIRQ_HARPO          0x0030  /* What's that? */
 295#define ESM_HIRQ_ASSP           0x0010
 296#define ESM_HIRQ_DSIE           0x0004
 297#define ESM_HIRQ_MPU401         0x0002
 298#define ESM_HIRQ_SB             0x0001
 299
 300/* Host IRQ Status Bits */
 301#define ESM_MPU401_IRQ          0x02
 302#define ESM_SB_IRQ              0x01
 303#define ESM_SOUND_IRQ           0x04
 304#define ESM_ASSP_IRQ            0x10
 305#define ESM_HWVOL_IRQ           0x40
 306
 307#define ESS_SYSCLK              50000000
 308#define ESM_BOB_FREQ            200
 309#define ESM_BOB_FREQ_MAX        800
 310
 311#define ESM_FREQ_ESM1           (49152000L / 1024L)     /* default rate 48000 */
 312#define ESM_FREQ_ESM2           (50000000L / 1024L)
 313
 314/* APU Modes: reg 0x00, bit 4-7 */
 315#define ESM_APU_MODE_SHIFT      4
 316#define ESM_APU_MODE_MASK       (0xf << 4)
 317#define ESM_APU_OFF             0x00
 318#define ESM_APU_16BITLINEAR     0x01    /* 16-Bit Linear Sample Player */
 319#define ESM_APU_16BITSTEREO     0x02    /* 16-Bit Stereo Sample Player */
 320#define ESM_APU_8BITLINEAR      0x03    /* 8-Bit Linear Sample Player */
 321#define ESM_APU_8BITSTEREO      0x04    /* 8-Bit Stereo Sample Player */
 322#define ESM_APU_8BITDIFF        0x05    /* 8-Bit Differential Sample Playrer */
 323#define ESM_APU_DIGITALDELAY    0x06    /* Digital Delay Line */
 324#define ESM_APU_DUALTAP         0x07    /* Dual Tap Reader */
 325#define ESM_APU_CORRELATOR      0x08    /* Correlator */
 326#define ESM_APU_INPUTMIXER      0x09    /* Input Mixer */
 327#define ESM_APU_WAVETABLE       0x0A    /* Wave Table Mode */
 328#define ESM_APU_SRCONVERTOR     0x0B    /* Sample Rate Convertor */
 329#define ESM_APU_16BITPINGPONG   0x0C    /* 16-Bit Ping-Pong Sample Player */
 330#define ESM_APU_RESERVED1       0x0D    /* Reserved 1 */
 331#define ESM_APU_RESERVED2       0x0E    /* Reserved 2 */
 332#define ESM_APU_RESERVED3       0x0F    /* Reserved 3 */
 333
 334/* reg 0x00 */
 335#define ESM_APU_FILTER_Q_SHIFT          0
 336#define ESM_APU_FILTER_Q_MASK           (3 << 0)
 337/* APU Filtey Q Control */
 338#define ESM_APU_FILTER_LESSQ    0x00
 339#define ESM_APU_FILTER_MOREQ    0x03
 340
 341#define ESM_APU_FILTER_TYPE_SHIFT       2
 342#define ESM_APU_FILTER_TYPE_MASK        (3 << 2)
 343#define ESM_APU_ENV_TYPE_SHIFT          8
 344#define ESM_APU_ENV_TYPE_MASK           (3 << 8)
 345#define ESM_APU_ENV_STATE_SHIFT         10
 346#define ESM_APU_ENV_STATE_MASK          (3 << 10)
 347#define ESM_APU_END_CURVE               (1 << 12)
 348#define ESM_APU_INT_ON_LOOP             (1 << 13)
 349#define ESM_APU_DMA_ENABLE              (1 << 14)
 350
 351/* reg 0x02 */
 352#define ESM_APU_SUBMIX_GROUP_SHIRT      0
 353#define ESM_APU_SUBMIX_GROUP_MASK       (7 << 0)
 354#define ESM_APU_SUBMIX_MODE             (1 << 3)
 355#define ESM_APU_6dB                     (1 << 4)
 356#define ESM_APU_DUAL_EFFECT             (1 << 5)
 357#define ESM_APU_EFFECT_CHANNELS_SHIFT   6
 358#define ESM_APU_EFFECT_CHANNELS_MASK    (3 << 6)
 359
 360/* reg 0x03 */
 361#define ESM_APU_STEP_SIZE_MASK          0x0fff
 362
 363/* reg 0x04 */
 364#define ESM_APU_PHASE_SHIFT             0
 365#define ESM_APU_PHASE_MASK              (0xff << 0)
 366#define ESM_APU_WAVE64K_PAGE_SHIFT      8       /* most 8bit of wave start offset */
 367#define ESM_APU_WAVE64K_PAGE_MASK       (0xff << 8)
 368
 369/* reg 0x05 - wave start offset */
 370/* reg 0x06 - wave end offset */
 371/* reg 0x07 - wave loop length */
 372
 373/* reg 0x08 */
 374#define ESM_APU_EFFECT_GAIN_SHIFT       0
 375#define ESM_APU_EFFECT_GAIN_MASK        (0xff << 0)
 376#define ESM_APU_TREMOLO_DEPTH_SHIFT     8
 377#define ESM_APU_TREMOLO_DEPTH_MASK      (0xf << 8)
 378#define ESM_APU_TREMOLO_RATE_SHIFT      12
 379#define ESM_APU_TREMOLO_RATE_MASK       (0xf << 12)
 380
 381/* reg 0x09 */
 382/* bit 0-7 amplitude dest? */
 383#define ESM_APU_AMPLITUDE_NOW_SHIFT     8
 384#define ESM_APU_AMPLITUDE_NOW_MASK      (0xff << 8)
 385
 386/* reg 0x0a */
 387#define ESM_APU_POLAR_PAN_SHIFT         0
 388#define ESM_APU_POLAR_PAN_MASK          (0x3f << 0)
 389/* Polar Pan Control */
 390#define ESM_APU_PAN_CENTER_CIRCLE               0x00
 391#define ESM_APU_PAN_MIDDLE_RADIUS               0x01
 392#define ESM_APU_PAN_OUTSIDE_RADIUS              0x02
 393
 394#define ESM_APU_FILTER_TUNING_SHIFT     8
 395#define ESM_APU_FILTER_TUNING_MASK      (0xff << 8)
 396
 397/* reg 0x0b */
 398#define ESM_APU_DATA_SRC_A_SHIFT        0
 399#define ESM_APU_DATA_SRC_A_MASK         (0x7f << 0)
 400#define ESM_APU_INV_POL_A               (1 << 7)
 401#define ESM_APU_DATA_SRC_B_SHIFT        8
 402#define ESM_APU_DATA_SRC_B_MASK         (0x7f << 8)
 403#define ESM_APU_INV_POL_B               (1 << 15)
 404
 405#define ESM_APU_VIBRATO_RATE_SHIFT      0
 406#define ESM_APU_VIBRATO_RATE_MASK       (0xf << 0)
 407#define ESM_APU_VIBRATO_DEPTH_SHIFT     4
 408#define ESM_APU_VIBRATO_DEPTH_MASK      (0xf << 4)
 409#define ESM_APU_VIBRATO_PHASE_SHIFT     8
 410#define ESM_APU_VIBRATO_PHASE_MASK      (0xff << 8)
 411
 412/* reg 0x0c */
 413#define ESM_APU_RADIUS_SELECT           (1 << 6)
 414
 415/* APU Filter Control */
 416#define ESM_APU_FILTER_2POLE_LOPASS     0x00
 417#define ESM_APU_FILTER_2POLE_BANDPASS   0x01
 418#define ESM_APU_FILTER_2POLE_HIPASS     0x02
 419#define ESM_APU_FILTER_1POLE_LOPASS     0x03
 420#define ESM_APU_FILTER_1POLE_HIPASS     0x04
 421#define ESM_APU_FILTER_OFF              0x05
 422
 423/* APU ATFP Type */
 424#define ESM_APU_ATFP_AMPLITUDE                  0x00
 425#define ESM_APU_ATFP_TREMELO                    0x01
 426#define ESM_APU_ATFP_FILTER                     0x02
 427#define ESM_APU_ATFP_PAN                        0x03
 428
 429/* APU ATFP Flags */
 430#define ESM_APU_ATFP_FLG_OFF                    0x00
 431#define ESM_APU_ATFP_FLG_WAIT                   0x01
 432#define ESM_APU_ATFP_FLG_DONE                   0x02
 433#define ESM_APU_ATFP_FLG_INPROCESS              0x03
 434
 435
 436/* capture mixing buffer size */
 437#define ESM_MEM_ALIGN           0x1000
 438#define ESM_MIXBUF_SIZE         0x400
 439
 440#define ESM_MODE_PLAY           0
 441#define ESM_MODE_CAPTURE        1
 442
 443
 444/* APU use in the driver */
 445enum snd_enum_apu_type {
 446        ESM_APU_PCM_PLAY,
 447        ESM_APU_PCM_CAPTURE,
 448        ESM_APU_PCM_RATECONV,
 449        ESM_APU_FREE
 450};
 451
 452/* chip type */
 453enum {
 454        TYPE_MAESTRO, TYPE_MAESTRO2, TYPE_MAESTRO2E
 455};
 456
 457/* DMA Hack! */
 458struct esm_memory {
 459        struct snd_dma_buffer buf;
 460        int empty;      /* status */
 461        struct list_head list;
 462};
 463
 464/* Playback Channel */
 465struct esschan {
 466        int running;
 467
 468        u8 apu[4];
 469        u8 apu_mode[4];
 470
 471        /* playback/capture pcm buffer */
 472        struct esm_memory *memory;
 473        /* capture mixer buffer */
 474        struct esm_memory *mixbuf;
 475
 476        unsigned int hwptr;     /* current hw pointer in bytes */
 477        unsigned int count;     /* sample counter in bytes */
 478        unsigned int dma_size;  /* total buffer size in bytes */
 479        unsigned int frag_size; /* period size in bytes */
 480        unsigned int wav_shift;
 481        u16 base[4];            /* offset for ptr */
 482
 483        /* stereo/16bit flag */
 484        unsigned char fmt;
 485        int mode;       /* playback / capture */
 486
 487        int bob_freq;   /* required timer frequency */
 488
 489        struct snd_pcm_substream *substream;
 490
 491        /* linked list */
 492        struct list_head list;
 493
 494#ifdef CONFIG_PM_SLEEP
 495        u16 wc_map[4];
 496#endif
 497};
 498
 499struct es1968 {
 500        /* Module Config */
 501        int total_bufsize;                      /* in bytes */
 502
 503        int playback_streams, capture_streams;
 504
 505        unsigned int clock;             /* clock */
 506        /* for clock measurement */
 507        unsigned int in_measurement: 1;
 508        unsigned int measure_apu;
 509        unsigned int measure_lastpos;
 510        unsigned int measure_count;
 511
 512        /* buffer */
 513        struct snd_dma_buffer dma;
 514
 515        /* Resources... */
 516        int irq;
 517        unsigned long io_port;
 518        int type;
 519        struct pci_dev *pci;
 520        struct snd_card *card;
 521        struct snd_pcm *pcm;
 522        int do_pm;              /* power-management enabled */
 523
 524        /* DMA memory block */
 525        struct list_head buf_list;
 526
 527        /* ALSA Stuff */
 528        struct snd_ac97 *ac97;
 529        struct snd_rawmidi *rmidi;
 530
 531        spinlock_t reg_lock;
 532        unsigned int in_suspend;
 533
 534        /* Maestro Stuff */
 535        u16 maestro_map[32];
 536        int bobclient;          /* active timer instancs */
 537        int bob_freq;           /* timer frequency */
 538        struct mutex memory_mutex;      /* memory lock */
 539
 540        /* APU states */
 541        unsigned char apu[NR_APUS];
 542
 543        /* active substreams */
 544        struct list_head substream_list;
 545        spinlock_t substream_lock;
 546
 547#ifdef CONFIG_PM_SLEEP
 548        u16 apu_map[NR_APUS][NR_APU_REGS];
 549#endif
 550
 551#ifdef SUPPORT_JOYSTICK
 552        struct gameport *gameport;
 553#endif
 554
 555#ifdef CONFIG_SND_ES1968_INPUT
 556        struct input_dev *input_dev;
 557        char phys[64];                  /* physical device path */
 558#else
 559        struct snd_kcontrol *master_switch; /* for h/w volume control */
 560        struct snd_kcontrol *master_volume;
 561#endif
 562        struct work_struct hwvol_work;
 563
 564#ifdef CONFIG_SND_ES1968_RADIO
 565        struct v4l2_device v4l2_dev;
 566        struct snd_tea575x tea;
 567        unsigned int tea575x_tuner;
 568#endif
 569};
 570
 571static irqreturn_t snd_es1968_interrupt(int irq, void *dev_id);
 572
 573static DEFINE_PCI_DEVICE_TABLE(snd_es1968_ids) = {
 574        /* Maestro 1 */
 575        { 0x1285, 0x0100, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO },
 576        /* Maestro 2 */
 577        { 0x125d, 0x1968, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO2 },
 578        /* Maestro 2E */
 579        { 0x125d, 0x1978, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO2E },
 580        { 0, }
 581};
 582
 583MODULE_DEVICE_TABLE(pci, snd_es1968_ids);
 584
 585/* *********************
 586   * Low Level Funcs!  *
 587   *********************/
 588
 589/* no spinlock */
 590static void __maestro_write(struct es1968 *chip, u16 reg, u16 data)
 591{
 592        outw(reg, chip->io_port + ESM_INDEX);
 593        outw(data, chip->io_port + ESM_DATA);
 594        chip->maestro_map[reg] = data;
 595}
 596
 597static inline void maestro_write(struct es1968 *chip, u16 reg, u16 data)
 598{
 599        unsigned long flags;
 600        spin_lock_irqsave(&chip->reg_lock, flags);
 601        __maestro_write(chip, reg, data);
 602        spin_unlock_irqrestore(&chip->reg_lock, flags);
 603}
 604
 605/* no spinlock */
 606static u16 __maestro_read(struct es1968 *chip, u16 reg)
 607{
 608        if (READABLE_MAP & (1 << reg)) {
 609                outw(reg, chip->io_port + ESM_INDEX);
 610                chip->maestro_map[reg] = inw(chip->io_port + ESM_DATA);
 611        }
 612        return chip->maestro_map[reg];
 613}
 614
 615static inline u16 maestro_read(struct es1968 *chip, u16 reg)
 616{
 617        unsigned long flags;
 618        u16 result;
 619        spin_lock_irqsave(&chip->reg_lock, flags);
 620        result = __maestro_read(chip, reg);
 621        spin_unlock_irqrestore(&chip->reg_lock, flags);
 622        return result;
 623}
 624
 625/* Wait for the codec bus to be free */
 626static int snd_es1968_ac97_wait(struct es1968 *chip)
 627{
 628        int timeout = 100000;
 629
 630        while (timeout-- > 0) {
 631                if (!(inb(chip->io_port + ESM_AC97_INDEX) & 1))
 632                        return 0;
 633                cond_resched();
 634        }
 635        snd_printd("es1968: ac97 timeout\n");
 636        return 1; /* timeout */
 637}
 638
 639static int snd_es1968_ac97_wait_poll(struct es1968 *chip)
 640{
 641        int timeout = 100000;
 642
 643        while (timeout-- > 0) {
 644                if (!(inb(chip->io_port + ESM_AC97_INDEX) & 1))
 645                        return 0;
 646        }
 647        snd_printd("es1968: ac97 timeout\n");
 648        return 1; /* timeout */
 649}
 650
 651static void snd_es1968_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
 652{
 653        struct es1968 *chip = ac97->private_data;
 654
 655        snd_es1968_ac97_wait(chip);
 656
 657        /* Write the bus */
 658        outw(val, chip->io_port + ESM_AC97_DATA);
 659        /*msleep(1);*/
 660        outb(reg, chip->io_port + ESM_AC97_INDEX);
 661        /*msleep(1);*/
 662}
 663
 664static unsigned short snd_es1968_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
 665{
 666        u16 data = 0;
 667        struct es1968 *chip = ac97->private_data;
 668
 669        snd_es1968_ac97_wait(chip);
 670
 671        outb(reg | 0x80, chip->io_port + ESM_AC97_INDEX);
 672        /*msleep(1);*/
 673
 674        if (!snd_es1968_ac97_wait_poll(chip)) {
 675                data = inw(chip->io_port + ESM_AC97_DATA);
 676                /*msleep(1);*/
 677        }
 678
 679        return data;
 680}
 681
 682/* no spinlock */
 683static void apu_index_set(struct es1968 *chip, u16 index)
 684{
 685        int i;
 686        __maestro_write(chip, IDR1_CRAM_POINTER, index);
 687        for (i = 0; i < 1000; i++)
 688                if (__maestro_read(chip, IDR1_CRAM_POINTER) == index)
 689                        return;
 690        snd_printd("es1968: APU register select failed. (Timeout)\n");
 691}
 692
 693/* no spinlock */
 694static void apu_data_set(struct es1968 *chip, u16 data)
 695{
 696        int i;
 697        for (i = 0; i < 1000; i++) {
 698                if (__maestro_read(chip, IDR0_DATA_PORT) == data)
 699                        return;
 700                __maestro_write(chip, IDR0_DATA_PORT, data);
 701        }
 702        snd_printd("es1968: APU register set probably failed (Timeout)!\n");
 703}
 704
 705/* no spinlock */
 706static void __apu_set_register(struct es1968 *chip, u16 channel, u8 reg, u16 data)
 707{
 708        if (snd_BUG_ON(channel >= NR_APUS))
 709                return;
 710#ifdef CONFIG_PM_SLEEP
 711        chip->apu_map[channel][reg] = data;
 712#endif
 713        reg |= (channel << 4);
 714        apu_index_set(chip, reg);
 715        apu_data_set(chip, data);
 716}
 717
 718static void apu_set_register(struct es1968 *chip, u16 channel, u8 reg, u16 data)
 719{
 720        unsigned long flags;
 721        spin_lock_irqsave(&chip->reg_lock, flags);
 722        __apu_set_register(chip, channel, reg, data);
 723        spin_unlock_irqrestore(&chip->reg_lock, flags);
 724}
 725
 726static u16 __apu_get_register(struct es1968 *chip, u16 channel, u8 reg)
 727{
 728        if (snd_BUG_ON(channel >= NR_APUS))
 729                return 0;
 730        reg |= (channel << 4);
 731        apu_index_set(chip, reg);
 732        return __maestro_read(chip, IDR0_DATA_PORT);
 733}
 734
 735static u16 apu_get_register(struct es1968 *chip, u16 channel, u8 reg)
 736{
 737        unsigned long flags;
 738        u16 v;
 739        spin_lock_irqsave(&chip->reg_lock, flags);
 740        v = __apu_get_register(chip, channel, reg);
 741        spin_unlock_irqrestore(&chip->reg_lock, flags);
 742        return v;
 743}
 744
 745#if 0 /* ASSP is not supported */
 746
 747static void assp_set_register(struct es1968 *chip, u32 reg, u32 value)
 748{
 749        unsigned long flags;
 750
 751        spin_lock_irqsave(&chip->reg_lock, flags);
 752        outl(reg, chip->io_port + ASSP_INDEX);
 753        outl(value, chip->io_port + ASSP_DATA);
 754        spin_unlock_irqrestore(&chip->reg_lock, flags);
 755}
 756
 757static u32 assp_get_register(struct es1968 *chip, u32 reg)
 758{
 759        unsigned long flags;
 760        u32 value;
 761
 762        spin_lock_irqsave(&chip->reg_lock, flags);
 763        outl(reg, chip->io_port + ASSP_INDEX);
 764        value = inl(chip->io_port + ASSP_DATA);
 765        spin_unlock_irqrestore(&chip->reg_lock, flags);
 766
 767        return value;
 768}
 769
 770#endif
 771
 772static void wave_set_register(struct es1968 *chip, u16 reg, u16 value)
 773{
 774        unsigned long flags;
 775
 776        spin_lock_irqsave(&chip->reg_lock, flags);
 777        outw(reg, chip->io_port + WC_INDEX);
 778        outw(value, chip->io_port + WC_DATA);
 779        spin_unlock_irqrestore(&chip->reg_lock, flags);
 780}
 781
 782static u16 wave_get_register(struct es1968 *chip, u16 reg)
 783{
 784        unsigned long flags;
 785        u16 value;
 786
 787        spin_lock_irqsave(&chip->reg_lock, flags);
 788        outw(reg, chip->io_port + WC_INDEX);
 789        value = inw(chip->io_port + WC_DATA);
 790        spin_unlock_irqrestore(&chip->reg_lock, flags);
 791
 792        return value;
 793}
 794
 795/* *******************
 796   * Bob the Timer!  *
 797   *******************/
 798
 799static void snd_es1968_bob_stop(struct es1968 *chip)
 800{
 801        u16 reg;
 802
 803        reg = __maestro_read(chip, 0x11);
 804        reg &= ~ESM_BOB_ENABLE;
 805        __maestro_write(chip, 0x11, reg);
 806        reg = __maestro_read(chip, 0x17);
 807        reg &= ~ESM_BOB_START;
 808        __maestro_write(chip, 0x17, reg);
 809}
 810
 811static void snd_es1968_bob_start(struct es1968 *chip)
 812{
 813        int prescale;
 814        int divide;
 815
 816        /* compute ideal interrupt frequency for buffer size & play rate */
 817        /* first, find best prescaler value to match freq */
 818        for (prescale = 5; prescale < 12; prescale++)
 819                if (chip->bob_freq > (ESS_SYSCLK >> (prescale + 9)))
 820                        break;
 821
 822        /* next, back off prescaler whilst getting divider into optimum range */
 823        divide = 1;
 824        while ((prescale > 5) && (divide < 32)) {
 825                prescale--;
 826                divide <<= 1;
 827        }
 828        divide >>= 1;
 829
 830        /* now fine-tune the divider for best match */
 831        for (; divide < 31; divide++)
 832                if (chip->bob_freq >
 833                    ((ESS_SYSCLK >> (prescale + 9)) / (divide + 1))) break;
 834
 835        /* divide = 0 is illegal, but don't let prescale = 4! */
 836        if (divide == 0) {
 837                divide++;
 838                if (prescale > 5)
 839                        prescale--;
 840        } else if (divide > 1)
 841                divide--;
 842
 843        __maestro_write(chip, 6, 0x9000 | (prescale << 5) | divide);    /* set reg */
 844
 845        /* Now set IDR 11/17 */
 846        __maestro_write(chip, 0x11, __maestro_read(chip, 0x11) | 1);
 847        __maestro_write(chip, 0x17, __maestro_read(chip, 0x17) | 1);
 848}
 849
 850/* call with substream spinlock */
 851static void snd_es1968_bob_inc(struct es1968 *chip, int freq)
 852{
 853        chip->bobclient++;
 854        if (chip->bobclient == 1) {
 855                chip->bob_freq = freq;
 856                snd_es1968_bob_start(chip);
 857        } else if (chip->bob_freq < freq) {
 858                snd_es1968_bob_stop(chip);
 859                chip->bob_freq = freq;
 860                snd_es1968_bob_start(chip);
 861        }
 862}
 863
 864/* call with substream spinlock */
 865static void snd_es1968_bob_dec(struct es1968 *chip)
 866{
 867        chip->bobclient--;
 868        if (chip->bobclient <= 0)
 869                snd_es1968_bob_stop(chip);
 870        else if (chip->bob_freq > ESM_BOB_FREQ) {
 871                /* check reduction of timer frequency */
 872                int max_freq = ESM_BOB_FREQ;
 873                struct esschan *es;
 874                list_for_each_entry(es, &chip->substream_list, list) {
 875                        if (max_freq < es->bob_freq)
 876                                max_freq = es->bob_freq;
 877                }
 878                if (max_freq != chip->bob_freq) {
 879                        snd_es1968_bob_stop(chip);
 880                        chip->bob_freq = max_freq;
 881                        snd_es1968_bob_start(chip);
 882                }
 883        }
 884}
 885
 886static int
 887snd_es1968_calc_bob_rate(struct es1968 *chip, struct esschan *es,
 888                         struct snd_pcm_runtime *runtime)
 889{
 890        /* we acquire 4 interrupts per period for precise control.. */
 891        int freq = runtime->rate * 4;
 892        if (es->fmt & ESS_FMT_STEREO)
 893                freq <<= 1;
 894        if (es->fmt & ESS_FMT_16BIT)
 895                freq <<= 1;
 896        freq /= es->frag_size;
 897        if (freq < ESM_BOB_FREQ)
 898                freq = ESM_BOB_FREQ;
 899        else if (freq > ESM_BOB_FREQ_MAX)
 900                freq = ESM_BOB_FREQ_MAX;
 901        return freq;
 902}
 903
 904
 905/*************
 906 *  PCM Part *
 907 *************/
 908
 909static u32 snd_es1968_compute_rate(struct es1968 *chip, u32 freq)
 910{
 911        u32 rate = (freq << 16) / chip->clock;
 912#if 0 /* XXX: do we need this? */ 
 913        if (rate > 0x10000)
 914                rate = 0x10000;
 915#endif
 916        return rate;
 917}
 918
 919/* get current pointer */
 920static inline unsigned int
 921snd_es1968_get_dma_ptr(struct es1968 *chip, struct esschan *es)
 922{
 923        unsigned int offset;
 924
 925        offset = apu_get_register(chip, es->apu[0], 5);
 926
 927        offset -= es->base[0];
 928
 929        return (offset & 0xFFFE);       /* hardware is in words */
 930}
 931
 932static void snd_es1968_apu_set_freq(struct es1968 *chip, int apu, int freq)
 933{
 934        apu_set_register(chip, apu, 2,
 935                           (apu_get_register(chip, apu, 2) & 0x00FF) |
 936                           ((freq & 0xff) << 8) | 0x10);
 937        apu_set_register(chip, apu, 3, freq >> 8);
 938}
 939
 940/* spin lock held */
 941static inline void snd_es1968_trigger_apu(struct es1968 *esm, int apu, int mode)
 942{
 943        /* set the APU mode */
 944        __apu_set_register(esm, apu, 0,
 945                           (__apu_get_register(esm, apu, 0) & 0xff0f) |
 946                           (mode << 4));
 947}
 948
 949static void snd_es1968_pcm_start(struct es1968 *chip, struct esschan *es)
 950{
 951        spin_lock(&chip->reg_lock);
 952        __apu_set_register(chip, es->apu[0], 5, es->base[0]);
 953        snd_es1968_trigger_apu(chip, es->apu[0], es->apu_mode[0]);
 954        if (es->mode == ESM_MODE_CAPTURE) {
 955                __apu_set_register(chip, es->apu[2], 5, es->base[2]);
 956                snd_es1968_trigger_apu(chip, es->apu[2], es->apu_mode[2]);
 957        }
 958        if (es->fmt & ESS_FMT_STEREO) {
 959                __apu_set_register(chip, es->apu[1], 5, es->base[1]);
 960                snd_es1968_trigger_apu(chip, es->apu[1], es->apu_mode[1]);
 961                if (es->mode == ESM_MODE_CAPTURE) {
 962                        __apu_set_register(chip, es->apu[3], 5, es->base[3]);
 963                        snd_es1968_trigger_apu(chip, es->apu[3], es->apu_mode[3]);
 964                }
 965        }
 966        spin_unlock(&chip->reg_lock);
 967}
 968
 969static void snd_es1968_pcm_stop(struct es1968 *chip, struct esschan *es)
 970{
 971        spin_lock(&chip->reg_lock);
 972        snd_es1968_trigger_apu(chip, es->apu[0], 0);
 973        snd_es1968_trigger_apu(chip, es->apu[1], 0);
 974        if (es->mode == ESM_MODE_CAPTURE) {
 975                snd_es1968_trigger_apu(chip, es->apu[2], 0);
 976                snd_es1968_trigger_apu(chip, es->apu[3], 0);
 977        }
 978        spin_unlock(&chip->reg_lock);
 979}
 980
 981/* set the wavecache control reg */
 982static void snd_es1968_program_wavecache(struct es1968 *chip, struct esschan *es,
 983                                         int channel, u32 addr, int capture)
 984{
 985        u32 tmpval = (addr - 0x10) & 0xFFF8;
 986
 987        if (! capture) {
 988                if (!(es->fmt & ESS_FMT_16BIT))
 989                        tmpval |= 4;    /* 8bit */
 990                if (es->fmt & ESS_FMT_STEREO)
 991                        tmpval |= 2;    /* stereo */
 992        }
 993
 994        /* set the wavecache control reg */
 995        wave_set_register(chip, es->apu[channel] << 3, tmpval);
 996
 997#ifdef CONFIG_PM_SLEEP
 998        es->wc_map[channel] = tmpval;
 999#endif
1000}
1001
1002
1003static void snd_es1968_playback_setup(struct es1968 *chip, struct esschan *es,
1004                                      struct snd_pcm_runtime *runtime)
1005{
1006        u32 pa;
1007        int high_apu = 0;
1008        int channel, apu;
1009        int i, size;
1010        unsigned long flags;
1011        u32 freq;
1012
1013        size = es->dma_size >> es->wav_shift;
1014
1015        if (es->fmt & ESS_FMT_STEREO)
1016                high_apu++;
1017
1018        for (channel = 0; channel <= high_apu; channel++) {
1019                apu = es->apu[channel];
1020
1021                snd_es1968_program_wavecache(chip, es, channel, es->memory->buf.addr, 0);
1022
1023                /* Offset to PCMBAR */
1024                pa = es->memory->buf.addr;
1025                pa -= chip->dma.addr;
1026                pa >>= 1;       /* words */
1027
1028                pa |= 0x00400000;       /* System RAM (Bit 22) */
1029
1030                if (es->fmt & ESS_FMT_STEREO) {
1031                        /* Enable stereo */
1032                        if (channel)
1033                                pa |= 0x00800000;       /* (Bit 23) */
1034                        if (es->fmt & ESS_FMT_16BIT)
1035                                pa >>= 1;
1036                }
1037
1038                /* base offset of dma calcs when reading the pointer
1039                   on this left one */
1040                es->base[channel] = pa & 0xFFFF;
1041
1042                for (i = 0; i < 16; i++)
1043                        apu_set_register(chip, apu, i, 0x0000);
1044
1045                /* Load the buffer into the wave engine */
1046                apu_set_register(chip, apu, 4, ((pa >> 16) & 0xFF) << 8);
1047                apu_set_register(chip, apu, 5, pa & 0xFFFF);
1048                apu_set_register(chip, apu, 6, (pa + size) & 0xFFFF);
1049                /* setting loop == sample len */
1050                apu_set_register(chip, apu, 7, size);
1051
1052                /* clear effects/env.. */
1053                apu_set_register(chip, apu, 8, 0x0000);
1054                /* set amp now to 0xd0 (?), low byte is 'amplitude dest'? */
1055                apu_set_register(chip, apu, 9, 0xD000);
1056
1057                /* clear routing stuff */
1058                apu_set_register(chip, apu, 11, 0x0000);
1059                /* dma on, no envelopes, filter to all 1s) */
1060                apu_set_register(chip, apu, 0, 0x400F);
1061
1062                if (es->fmt & ESS_FMT_16BIT)
1063                        es->apu_mode[channel] = ESM_APU_16BITLINEAR;
1064                else
1065                        es->apu_mode[channel] = ESM_APU_8BITLINEAR;
1066
1067                if (es->fmt & ESS_FMT_STEREO) {
1068                        /* set panning: left or right */
1069                        /* Check: different panning. On my Canyon 3D Chipset the
1070                           Channels are swapped. I don't know, about the output
1071                           to the SPDif Link. Perhaps you have to change this
1072                           and not the APU Regs 4-5. */
1073                        apu_set_register(chip, apu, 10,
1074                                         0x8F00 | (channel ? 0 : 0x10));
1075                        es->apu_mode[channel] += 1;     /* stereo */
1076                } else
1077                        apu_set_register(chip, apu, 10, 0x8F08);
1078        }
1079
1080        spin_lock_irqsave(&chip->reg_lock, flags);
1081        /* clear WP interrupts */
1082        outw(1, chip->io_port + 0x04);
1083        /* enable WP ints */
1084        outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ);
1085        spin_unlock_irqrestore(&chip->reg_lock, flags);
1086
1087        freq = runtime->rate;
1088        /* set frequency */
1089        if (freq > 48000)
1090                freq = 48000;
1091        if (freq < 4000)
1092                freq = 4000;
1093
1094        /* hmmm.. */
1095        if (!(es->fmt & ESS_FMT_16BIT) && !(es->fmt & ESS_FMT_STEREO))
1096                freq >>= 1;
1097
1098        freq = snd_es1968_compute_rate(chip, freq);
1099
1100        /* Load the frequency, turn on 6dB */
1101        snd_es1968_apu_set_freq(chip, es->apu[0], freq);
1102        snd_es1968_apu_set_freq(chip, es->apu[1], freq);
1103}
1104
1105
1106static void init_capture_apu(struct es1968 *chip, struct esschan *es, int channel,
1107                             unsigned int pa, unsigned int bsize,
1108                             int mode, int route)
1109{
1110        int i, apu = es->apu[channel];
1111
1112        es->apu_mode[channel] = mode;
1113
1114        /* set the wavecache control reg */
1115        snd_es1968_program_wavecache(chip, es, channel, pa, 1);
1116
1117        /* Offset to PCMBAR */
1118        pa -= chip->dma.addr;
1119        pa >>= 1;       /* words */
1120
1121        /* base offset of dma calcs when reading the pointer
1122           on this left one */
1123        es->base[channel] = pa & 0xFFFF;
1124        pa |= 0x00400000;       /* bit 22 -> System RAM */
1125
1126        /* Begin loading the APU */
1127        for (i = 0; i < 16; i++)
1128                apu_set_register(chip, apu, i, 0x0000);
1129
1130        /* need to enable subgroups.. and we should probably
1131           have different groups for different /dev/dsps..  */
1132        apu_set_register(chip, apu, 2, 0x8);
1133
1134        /* Load the buffer into the wave engine */
1135        apu_set_register(chip, apu, 4, ((pa >> 16) & 0xFF) << 8);
1136        apu_set_register(chip, apu, 5, pa & 0xFFFF);
1137        apu_set_register(chip, apu, 6, (pa + bsize) & 0xFFFF);
1138        apu_set_register(chip, apu, 7, bsize);
1139        /* clear effects/env.. */
1140        apu_set_register(chip, apu, 8, 0x00F0);
1141        /* amplitude now?  sure.  why not.  */
1142        apu_set_register(chip, apu, 9, 0x0000);
1143        /* set filter tune, radius, polar pan */
1144        apu_set_register(chip, apu, 10, 0x8F08);
1145        /* route input */
1146        apu_set_register(chip, apu, 11, route);
1147        /* dma on, no envelopes, filter to all 1s) */
1148        apu_set_register(chip, apu, 0, 0x400F);
1149}
1150
1151static void snd_es1968_capture_setup(struct es1968 *chip, struct esschan *es,
1152                                     struct snd_pcm_runtime *runtime)
1153{
1154        int size;
1155        u32 freq;
1156        unsigned long flags;
1157
1158        size = es->dma_size >> es->wav_shift;
1159
1160        /* APU assignments:
1161           0 = mono/left SRC
1162           1 = right SRC
1163           2 = mono/left Input Mixer
1164           3 = right Input Mixer
1165        */
1166        /* data seems to flow from the codec, through an apu into
1167           the 'mixbuf' bit of page, then through the SRC apu
1168           and out to the real 'buffer'.  ok.  sure.  */
1169
1170        /* input mixer (left/mono) */
1171        /* parallel in crap, see maestro reg 0xC [8-11] */
1172        init_capture_apu(chip, es, 2,
1173                         es->mixbuf->buf.addr, ESM_MIXBUF_SIZE/4, /* in words */
1174                         ESM_APU_INPUTMIXER, 0x14);
1175        /* SRC (left/mono); get input from inputing apu */
1176        init_capture_apu(chip, es, 0, es->memory->buf.addr, size,
1177                         ESM_APU_SRCONVERTOR, es->apu[2]);
1178        if (es->fmt & ESS_FMT_STEREO) {
1179                /* input mixer (right) */
1180                init_capture_apu(chip, es, 3,
1181                                 es->mixbuf->buf.addr + ESM_MIXBUF_SIZE/2,
1182                                 ESM_MIXBUF_SIZE/4, /* in words */
1183                                 ESM_APU_INPUTMIXER, 0x15);
1184                /* SRC (right) */
1185                init_capture_apu(chip, es, 1,
1186                                 es->memory->buf.addr + size*2, size,
1187                                 ESM_APU_SRCONVERTOR, es->apu[3]);
1188        }
1189
1190        freq = runtime->rate;
1191        /* Sample Rate conversion APUs don't like 0x10000 for their rate */
1192        if (freq > 47999)
1193                freq = 47999;
1194        if (freq < 4000)
1195                freq = 4000;
1196
1197        freq = snd_es1968_compute_rate(chip, freq);
1198
1199        /* Load the frequency, turn on 6dB */
1200        snd_es1968_apu_set_freq(chip, es->apu[0], freq);
1201        snd_es1968_apu_set_freq(chip, es->apu[1], freq);
1202
1203        /* fix mixer rate at 48khz.  and its _must_ be 0x10000. */
1204        freq = 0x10000;
1205        snd_es1968_apu_set_freq(chip, es->apu[2], freq);
1206        snd_es1968_apu_set_freq(chip, es->apu[3], freq);
1207
1208        spin_lock_irqsave(&chip->reg_lock, flags);
1209        /* clear WP interrupts */
1210        outw(1, chip->io_port + 0x04);
1211        /* enable WP ints */
1212        outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ);
1213        spin_unlock_irqrestore(&chip->reg_lock, flags);
1214}
1215
1216/*******************
1217 *  ALSA Interface *
1218 *******************/
1219
1220static int snd_es1968_pcm_prepare(struct snd_pcm_substream *substream)
1221{
1222        struct es1968 *chip = snd_pcm_substream_chip(substream);
1223        struct snd_pcm_runtime *runtime = substream->runtime;
1224        struct esschan *es = runtime->private_data;
1225
1226        es->dma_size = snd_pcm_lib_buffer_bytes(substream);
1227        es->frag_size = snd_pcm_lib_period_bytes(substream);
1228
1229        es->wav_shift = 1; /* maestro handles always 16bit */
1230        es->fmt = 0;
1231        if (snd_pcm_format_width(runtime->format) == 16)
1232                es->fmt |= ESS_FMT_16BIT;
1233        if (runtime->channels > 1) {
1234                es->fmt |= ESS_FMT_STEREO;
1235                if (es->fmt & ESS_FMT_16BIT) /* 8bit is already word shifted */
1236                        es->wav_shift++;
1237        }
1238        es->bob_freq = snd_es1968_calc_bob_rate(chip, es, runtime);
1239
1240        switch (es->mode) {
1241        case ESM_MODE_PLAY:
1242                snd_es1968_playback_setup(chip, es, runtime);
1243                break;
1244        case ESM_MODE_CAPTURE:
1245                snd_es1968_capture_setup(chip, es, runtime);
1246                break;
1247        }
1248
1249        return 0;
1250}
1251
1252static int snd_es1968_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1253{
1254        struct es1968 *chip = snd_pcm_substream_chip(substream);
1255        struct esschan *es = substream->runtime->private_data;
1256
1257        spin_lock(&chip->substream_lock);
1258        switch (cmd) {
1259        case SNDRV_PCM_TRIGGER_START:
1260        case SNDRV_PCM_TRIGGER_RESUME:
1261                if (es->running)
1262                        break;
1263                snd_es1968_bob_inc(chip, es->bob_freq);
1264                es->count = 0;
1265                es->hwptr = 0;
1266                snd_es1968_pcm_start(chip, es);
1267                es->running = 1;
1268                break;
1269        case SNDRV_PCM_TRIGGER_STOP:
1270        case SNDRV_PCM_TRIGGER_SUSPEND:
1271                if (! es->running)
1272                        break;
1273                snd_es1968_pcm_stop(chip, es);
1274                es->running = 0;
1275                snd_es1968_bob_dec(chip);
1276                break;
1277        }
1278        spin_unlock(&chip->substream_lock);
1279        return 0;
1280}
1281
1282static snd_pcm_uframes_t snd_es1968_pcm_pointer(struct snd_pcm_substream *substream)
1283{
1284        struct es1968 *chip = snd_pcm_substream_chip(substream);
1285        struct esschan *es = substream->runtime->private_data;
1286        unsigned int ptr;
1287
1288        ptr = snd_es1968_get_dma_ptr(chip, es) << es->wav_shift;
1289        
1290        return bytes_to_frames(substream->runtime, ptr % es->dma_size);
1291}
1292
1293static struct snd_pcm_hardware snd_es1968_playback = {
1294        .info =                 (SNDRV_PCM_INFO_MMAP |
1295                                 SNDRV_PCM_INFO_MMAP_VALID |
1296                                 SNDRV_PCM_INFO_INTERLEAVED |
1297                                 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1298                                 /*SNDRV_PCM_INFO_PAUSE |*/
1299                                 SNDRV_PCM_INFO_RESUME),
1300        .formats =              SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
1301        .rates =                SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
1302        .rate_min =             4000,
1303        .rate_max =             48000,
1304        .channels_min =         1,
1305        .channels_max =         2,
1306        .buffer_bytes_max =     65536,
1307        .period_bytes_min =     256,
1308        .period_bytes_max =     65536,
1309        .periods_min =          1,
1310        .periods_max =          1024,
1311        .fifo_size =            0,
1312};
1313
1314static struct snd_pcm_hardware snd_es1968_capture = {
1315        .info =                 (SNDRV_PCM_INFO_NONINTERLEAVED |
1316                                 SNDRV_PCM_INFO_MMAP |
1317                                 SNDRV_PCM_INFO_MMAP_VALID |
1318                                 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1319                                 /*SNDRV_PCM_INFO_PAUSE |*/
1320                                 SNDRV_PCM_INFO_RESUME),
1321        .formats =              /*SNDRV_PCM_FMTBIT_U8 |*/ SNDRV_PCM_FMTBIT_S16_LE,
1322        .rates =                SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
1323        .rate_min =             4000,
1324        .rate_max =             48000,
1325        .channels_min =         1,
1326        .channels_max =         2,
1327        .buffer_bytes_max =     65536,
1328        .period_bytes_min =     256,
1329        .period_bytes_max =     65536,
1330        .periods_min =          1,
1331        .periods_max =          1024,
1332        .fifo_size =            0,
1333};
1334
1335/* *************************
1336   * DMA memory management *
1337   *************************/
1338
1339/* Because the Maestro can only take addresses relative to the PCM base address
1340   register :( */
1341
1342static int calc_available_memory_size(struct es1968 *chip)
1343{
1344        int max_size = 0;
1345        struct esm_memory *buf;
1346
1347        mutex_lock(&chip->memory_mutex);
1348        list_for_each_entry(buf, &chip->buf_list, list) {
1349                if (buf->empty && buf->buf.bytes > max_size)
1350                        max_size = buf->buf.bytes;
1351        }
1352        mutex_unlock(&chip->memory_mutex);
1353        if (max_size >= 128*1024)
1354                max_size = 127*1024;
1355        return max_size;
1356}
1357
1358/* allocate a new memory chunk with the specified size */
1359static struct esm_memory *snd_es1968_new_memory(struct es1968 *chip, int size)
1360{
1361        struct esm_memory *buf;
1362
1363        size = ALIGN(size, ESM_MEM_ALIGN);
1364        mutex_lock(&chip->memory_mutex);
1365        list_for_each_entry(buf, &chip->buf_list, list) {
1366                if (buf->empty && buf->buf.bytes >= size)
1367                        goto __found;
1368        }
1369        mutex_unlock(&chip->memory_mutex);
1370        return NULL;
1371
1372__found:
1373        if (buf->buf.bytes > size) {
1374                struct esm_memory *chunk = kmalloc(sizeof(*chunk), GFP_KERNEL);
1375                if (chunk == NULL) {
1376                        mutex_unlock(&chip->memory_mutex);
1377                        return NULL;
1378                }
1379                chunk->buf = buf->buf;
1380                chunk->buf.bytes -= size;
1381                chunk->buf.area += size;
1382                chunk->buf.addr += size;
1383                chunk->empty = 1;
1384                buf->buf.bytes = size;
1385                list_add(&chunk->list, &buf->list);
1386        }
1387        buf->empty = 0;
1388        mutex_unlock(&chip->memory_mutex);
1389        return buf;
1390}
1391
1392/* free a memory chunk */
1393static void snd_es1968_free_memory(struct es1968 *chip, struct esm_memory *buf)
1394{
1395        struct esm_memory *chunk;
1396
1397        mutex_lock(&chip->memory_mutex);
1398        buf->empty = 1;
1399        if (buf->list.prev != &chip->buf_list) {
1400                chunk = list_entry(buf->list.prev, struct esm_memory, list);
1401                if (chunk->empty) {
1402                        chunk->buf.bytes += buf->buf.bytes;
1403                        list_del(&buf->list);
1404                        kfree(buf);
1405                        buf = chunk;
1406                }
1407        }
1408        if (buf->list.next != &chip->buf_list) {
1409                chunk = list_entry(buf->list.next, struct esm_memory, list);
1410                if (chunk->empty) {
1411                        buf->buf.bytes += chunk->buf.bytes;
1412                        list_del(&chunk->list);
1413                        kfree(chunk);
1414                }
1415        }
1416        mutex_unlock(&chip->memory_mutex);
1417}
1418
1419static void snd_es1968_free_dmabuf(struct es1968 *chip)
1420{
1421        struct list_head *p;
1422
1423        if (! chip->dma.area)
1424                return;
1425        snd_dma_reserve_buf(&chip->dma, snd_dma_pci_buf_id(chip->pci));
1426        while ((p = chip->buf_list.next) != &chip->buf_list) {
1427                struct esm_memory *chunk = list_entry(p, struct esm_memory, list);
1428                list_del(p);
1429                kfree(chunk);
1430        }
1431}
1432
1433static int
1434snd_es1968_init_dmabuf(struct es1968 *chip)
1435{
1436        int err;
1437        struct esm_memory *chunk;
1438
1439        chip->dma.dev.type = SNDRV_DMA_TYPE_DEV;
1440        chip->dma.dev.dev = snd_dma_pci_data(chip->pci);
1441        if (! snd_dma_get_reserved_buf(&chip->dma, snd_dma_pci_buf_id(chip->pci))) {
1442                err = snd_dma_alloc_pages_fallback(SNDRV_DMA_TYPE_DEV,
1443                                                   snd_dma_pci_data(chip->pci),
1444                                                   chip->total_bufsize, &chip->dma);
1445                if (err < 0 || ! chip->dma.area) {
1446                        snd_printk(KERN_ERR "es1968: can't allocate dma pages for size %d\n",
1447                                   chip->total_bufsize);
1448                        return -ENOMEM;
1449                }
1450                if ((chip->dma.addr + chip->dma.bytes - 1) & ~((1 << 28) - 1)) {
1451                        snd_dma_free_pages(&chip->dma);
1452                        snd_printk(KERN_ERR "es1968: DMA buffer beyond 256MB.\n");
1453                        return -ENOMEM;
1454                }
1455        }
1456
1457        INIT_LIST_HEAD(&chip->buf_list);
1458        /* allocate an empty chunk */
1459        chunk = kmalloc(sizeof(*chunk), GFP_KERNEL);
1460        if (chunk == NULL) {
1461                snd_es1968_free_dmabuf(chip);
1462                return -ENOMEM;
1463        }
1464        memset(chip->dma.area, 0, ESM_MEM_ALIGN);
1465        chunk->buf = chip->dma;
1466        chunk->buf.area += ESM_MEM_ALIGN;
1467        chunk->buf.addr += ESM_MEM_ALIGN;
1468        chunk->buf.bytes -= ESM_MEM_ALIGN;
1469        chunk->empty = 1;
1470        list_add(&chunk->list, &chip->buf_list);
1471
1472        return 0;
1473}
1474
1475/* setup the dma_areas */
1476/* buffer is extracted from the pre-allocated memory chunk */
1477static int snd_es1968_hw_params(struct snd_pcm_substream *substream,
1478                                struct snd_pcm_hw_params *hw_params)
1479{
1480        struct es1968 *chip = snd_pcm_substream_chip(substream);
1481        struct snd_pcm_runtime *runtime = substream->runtime;
1482        struct esschan *chan = runtime->private_data;
1483        int size = params_buffer_bytes(hw_params);
1484
1485        if (chan->memory) {
1486                if (chan->memory->buf.bytes >= size) {
1487                        runtime->dma_bytes = size;
1488                        return 0;
1489                }
1490                snd_es1968_free_memory(chip, chan->memory);
1491        }
1492        chan->memory = snd_es1968_new_memory(chip, size);
1493        if (chan->memory == NULL) {
1494                // snd_printd("cannot allocate dma buffer: size = %d\n", size);
1495                return -ENOMEM;
1496        }
1497        snd_pcm_set_runtime_buffer(substream, &chan->memory->buf);
1498        return 1; /* area was changed */
1499}
1500
1501/* remove dma areas if allocated */
1502static int snd_es1968_hw_free(struct snd_pcm_substream *substream)
1503{
1504        struct es1968 *chip = snd_pcm_substream_chip(substream);
1505        struct snd_pcm_runtime *runtime = substream->runtime;
1506        struct esschan *chan;
1507        
1508        if (runtime->private_data == NULL)
1509                return 0;
1510        chan = runtime->private_data;
1511        if (chan->memory) {
1512                snd_es1968_free_memory(chip, chan->memory);
1513                chan->memory = NULL;
1514        }
1515        return 0;
1516}
1517
1518
1519/*
1520 * allocate APU pair
1521 */
1522static int snd_es1968_alloc_apu_pair(struct es1968 *chip, int type)
1523{
1524        int apu;
1525
1526        for (apu = 0; apu < NR_APUS; apu += 2) {
1527                if (chip->apu[apu] == ESM_APU_FREE &&
1528                    chip->apu[apu + 1] == ESM_APU_FREE) {
1529                        chip->apu[apu] = chip->apu[apu + 1] = type;
1530                        return apu;
1531                }
1532        }
1533        return -EBUSY;
1534}
1535
1536/*
1537 * release APU pair
1538 */
1539static void snd_es1968_free_apu_pair(struct es1968 *chip, int apu)
1540{
1541        chip->apu[apu] = chip->apu[apu + 1] = ESM_APU_FREE;
1542}
1543
1544
1545/******************
1546 * PCM open/close *
1547 ******************/
1548
1549static int snd_es1968_playback_open(struct snd_pcm_substream *substream)
1550{
1551        struct es1968 *chip = snd_pcm_substream_chip(substream);
1552        struct snd_pcm_runtime *runtime = substream->runtime;
1553        struct esschan *es;
1554        int apu1;
1555
1556        /* search 2 APUs */
1557        apu1 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_PLAY);
1558        if (apu1 < 0)
1559                return apu1;
1560
1561        es = kzalloc(sizeof(*es), GFP_KERNEL);
1562        if (!es) {
1563                snd_es1968_free_apu_pair(chip, apu1);
1564                return -ENOMEM;
1565        }
1566
1567        es->apu[0] = apu1;
1568        es->apu[1] = apu1 + 1;
1569        es->apu_mode[0] = 0;
1570        es->apu_mode[1] = 0;
1571        es->running = 0;
1572        es->substream = substream;
1573        es->mode = ESM_MODE_PLAY;
1574
1575        runtime->private_data = es;
1576        runtime->hw = snd_es1968_playback;
1577        runtime->hw.buffer_bytes_max = runtime->hw.period_bytes_max =
1578                calc_available_memory_size(chip);
1579
1580        spin_lock_irq(&chip->substream_lock);
1581        list_add(&es->list, &chip->substream_list);
1582        spin_unlock_irq(&chip->substream_lock);
1583
1584        return 0;
1585}
1586
1587static int snd_es1968_capture_open(struct snd_pcm_substream *substream)
1588{
1589        struct snd_pcm_runtime *runtime = substream->runtime;
1590        struct es1968 *chip = snd_pcm_substream_chip(substream);
1591        struct esschan *es;
1592        int apu1, apu2;
1593
1594        apu1 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_CAPTURE);
1595        if (apu1 < 0)
1596                return apu1;
1597        apu2 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_RATECONV);
1598        if (apu2 < 0) {
1599                snd_es1968_free_apu_pair(chip, apu1);
1600                return apu2;
1601        }
1602        
1603        es = kzalloc(sizeof(*es), GFP_KERNEL);
1604        if (!es) {
1605                snd_es1968_free_apu_pair(chip, apu1);
1606                snd_es1968_free_apu_pair(chip, apu2);
1607                return -ENOMEM;
1608        }
1609
1610        es->apu[0] = apu1;
1611        es->apu[1] = apu1 + 1;
1612        es->apu[2] = apu2;
1613        es->apu[3] = apu2 + 1;
1614        es->apu_mode[0] = 0;
1615        es->apu_mode[1] = 0;
1616        es->apu_mode[2] = 0;
1617        es->apu_mode[3] = 0;
1618        es->running = 0;
1619        es->substream = substream;
1620        es->mode = ESM_MODE_CAPTURE;
1621
1622        /* get mixbuffer */
1623        if ((es->mixbuf = snd_es1968_new_memory(chip, ESM_MIXBUF_SIZE)) == NULL) {
1624                snd_es1968_free_apu_pair(chip, apu1);
1625                snd_es1968_free_apu_pair(chip, apu2);
1626                kfree(es);
1627                return -ENOMEM;
1628        }
1629        memset(es->mixbuf->buf.area, 0, ESM_MIXBUF_SIZE);
1630
1631        runtime->private_data = es;
1632        runtime->hw = snd_es1968_capture;
1633        runtime->hw.buffer_bytes_max = runtime->hw.period_bytes_max =
1634                calc_available_memory_size(chip) - 1024; /* keep MIXBUF size */
1635        snd_pcm_hw_constraint_pow2(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES);
1636
1637        spin_lock_irq(&chip->substream_lock);
1638        list_add(&es->list, &chip->substream_list);
1639        spin_unlock_irq(&chip->substream_lock);
1640
1641        return 0;
1642}
1643
1644static int snd_es1968_playback_close(struct snd_pcm_substream *substream)
1645{
1646        struct es1968 *chip = snd_pcm_substream_chip(substream);
1647        struct esschan *es;
1648
1649        if (substream->runtime->private_data == NULL)
1650                return 0;
1651        es = substream->runtime->private_data;
1652        spin_lock_irq(&chip->substream_lock);
1653        list_del(&es->list);
1654        spin_unlock_irq(&chip->substream_lock);
1655        snd_es1968_free_apu_pair(chip, es->apu[0]);
1656        kfree(es);
1657
1658        return 0;
1659}
1660
1661static int snd_es1968_capture_close(struct snd_pcm_substream *substream)
1662{
1663        struct es1968 *chip = snd_pcm_substream_chip(substream);
1664        struct esschan *es;
1665
1666        if (substream->runtime->private_data == NULL)
1667                return 0;
1668        es = substream->runtime->private_data;
1669        spin_lock_irq(&chip->substream_lock);
1670        list_del(&es->list);
1671        spin_unlock_irq(&chip->substream_lock);
1672        snd_es1968_free_memory(chip, es->mixbuf);
1673        snd_es1968_free_apu_pair(chip, es->apu[0]);
1674        snd_es1968_free_apu_pair(chip, es->apu[2]);
1675        kfree(es);
1676
1677        return 0;
1678}
1679
1680static struct snd_pcm_ops snd_es1968_playback_ops = {
1681        .open =         snd_es1968_playback_open,
1682        .close =        snd_es1968_playback_close,
1683        .ioctl =        snd_pcm_lib_ioctl,
1684        .hw_params =    snd_es1968_hw_params,
1685        .hw_free =      snd_es1968_hw_free,
1686        .prepare =      snd_es1968_pcm_prepare,
1687        .trigger =      snd_es1968_pcm_trigger,
1688        .pointer =      snd_es1968_pcm_pointer,
1689};
1690
1691static struct snd_pcm_ops snd_es1968_capture_ops = {
1692        .open =         snd_es1968_capture_open,
1693        .close =        snd_es1968_capture_close,
1694        .ioctl =        snd_pcm_lib_ioctl,
1695        .hw_params =    snd_es1968_hw_params,
1696        .hw_free =      snd_es1968_hw_free,
1697        .prepare =      snd_es1968_pcm_prepare,
1698        .trigger =      snd_es1968_pcm_trigger,
1699        .pointer =      snd_es1968_pcm_pointer,
1700};
1701
1702
1703/*
1704 * measure clock
1705 */
1706#define CLOCK_MEASURE_BUFSIZE   16768   /* enough large for a single shot */
1707
1708static void es1968_measure_clock(struct es1968 *chip)
1709{
1710        int i, apu;
1711        unsigned int pa, offset, t;
1712        struct esm_memory *memory;
1713        struct timeval start_time, stop_time;
1714
1715        if (chip->clock == 0)
1716                chip->clock = 48000; /* default clock value */
1717
1718        /* search 2 APUs (although one apu is enough) */
1719        if ((apu = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_PLAY)) < 0) {
1720                snd_printk(KERN_ERR "Hmm, cannot find empty APU pair!?\n");
1721                return;
1722        }
1723        if ((memory = snd_es1968_new_memory(chip, CLOCK_MEASURE_BUFSIZE)) == NULL) {
1724                snd_printk(KERN_ERR "cannot allocate dma buffer - using default clock %d\n", chip->clock);
1725                snd_es1968_free_apu_pair(chip, apu);
1726                return;
1727        }
1728
1729        memset(memory->buf.area, 0, CLOCK_MEASURE_BUFSIZE);
1730
1731        wave_set_register(chip, apu << 3, (memory->buf.addr - 0x10) & 0xfff8);
1732
1733        pa = (unsigned int)((memory->buf.addr - chip->dma.addr) >> 1);
1734        pa |= 0x00400000;       /* System RAM (Bit 22) */
1735
1736        /* initialize apu */
1737        for (i = 0; i < 16; i++)
1738                apu_set_register(chip, apu, i, 0x0000);
1739
1740        apu_set_register(chip, apu, 0, 0x400f);
1741        apu_set_register(chip, apu, 4, ((pa >> 16) & 0xff) << 8);
1742        apu_set_register(chip, apu, 5, pa & 0xffff);
1743        apu_set_register(chip, apu, 6, (pa + CLOCK_MEASURE_BUFSIZE/2) & 0xffff);
1744        apu_set_register(chip, apu, 7, CLOCK_MEASURE_BUFSIZE/2);
1745        apu_set_register(chip, apu, 8, 0x0000);
1746        apu_set_register(chip, apu, 9, 0xD000);
1747        apu_set_register(chip, apu, 10, 0x8F08);
1748        apu_set_register(chip, apu, 11, 0x0000);
1749        spin_lock_irq(&chip->reg_lock);
1750        outw(1, chip->io_port + 0x04); /* clear WP interrupts */
1751        outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ); /* enable WP ints */
1752        spin_unlock_irq(&chip->reg_lock);
1753
1754        snd_es1968_apu_set_freq(chip, apu, ((unsigned int)48000 << 16) / chip->clock); /* 48000 Hz */
1755
1756        chip->in_measurement = 1;
1757        chip->measure_apu = apu;
1758        spin_lock_irq(&chip->reg_lock);
1759        snd_es1968_bob_inc(chip, ESM_BOB_FREQ);
1760        __apu_set_register(chip, apu, 5, pa & 0xffff);
1761        snd_es1968_trigger_apu(chip, apu, ESM_APU_16BITLINEAR);
1762        do_gettimeofday(&start_time);
1763        spin_unlock_irq(&chip->reg_lock);
1764        msleep(50);
1765        spin_lock_irq(&chip->reg_lock);
1766        offset = __apu_get_register(chip, apu, 5);
1767        do_gettimeofday(&stop_time);
1768        snd_es1968_trigger_apu(chip, apu, 0); /* stop */
1769        snd_es1968_bob_dec(chip);
1770        chip->in_measurement = 0;
1771        spin_unlock_irq(&chip->reg_lock);
1772
1773        /* check the current position */
1774        offset -= (pa & 0xffff);
1775        offset &= 0xfffe;
1776        offset += chip->measure_count * (CLOCK_MEASURE_BUFSIZE/2);
1777
1778        t = stop_time.tv_sec - start_time.tv_sec;
1779        t *= 1000000;
1780        if (stop_time.tv_usec < start_time.tv_usec)
1781                t -= start_time.tv_usec - stop_time.tv_usec;
1782        else
1783                t += stop_time.tv_usec - start_time.tv_usec;
1784        if (t == 0) {
1785                snd_printk(KERN_ERR "?? calculation error..\n");
1786        } else {
1787                offset *= 1000;
1788                offset = (offset / t) * 1000 + ((offset % t) * 1000) / t;
1789                if (offset < 47500 || offset > 48500) {
1790                        if (offset >= 40000 && offset <= 50000)
1791                                chip->clock = (chip->clock * offset) / 48000;
1792                }
1793                printk(KERN_INFO "es1968: clocking to %d\n", chip->clock);
1794        }
1795        snd_es1968_free_memory(chip, memory);
1796        snd_es1968_free_apu_pair(chip, apu);
1797}
1798
1799
1800/*
1801 */
1802
1803static void snd_es1968_pcm_free(struct snd_pcm *pcm)
1804{
1805        struct es1968 *esm = pcm->private_data;
1806        snd_es1968_free_dmabuf(esm);
1807        esm->pcm = NULL;
1808}
1809
1810static int
1811snd_es1968_pcm(struct es1968 *chip, int device)
1812{
1813        struct snd_pcm *pcm;
1814        int err;
1815
1816        /* get DMA buffer */
1817        if ((err = snd_es1968_init_dmabuf(chip)) < 0)
1818                return err;
1819
1820        /* set PCMBAR */
1821        wave_set_register(chip, 0x01FC, chip->dma.addr >> 12);
1822        wave_set_register(chip, 0x01FD, chip->dma.addr >> 12);
1823        wave_set_register(chip, 0x01FE, chip->dma.addr >> 12);
1824        wave_set_register(chip, 0x01FF, chip->dma.addr >> 12);
1825
1826        if ((err = snd_pcm_new(chip->card, "ESS Maestro", device,
1827                               chip->playback_streams,
1828                               chip->capture_streams, &pcm)) < 0)
1829                return err;
1830
1831        pcm->private_data = chip;
1832        pcm->private_free = snd_es1968_pcm_free;
1833
1834        snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1968_playback_ops);
1835        snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1968_capture_ops);
1836
1837        pcm->info_flags = 0;
1838
1839        strcpy(pcm->name, "ESS Maestro");
1840
1841        chip->pcm = pcm;
1842
1843        return 0;
1844}
1845/*
1846 * suppress jitter on some maestros when playing stereo
1847 */
1848static void snd_es1968_suppress_jitter(struct es1968 *chip, struct esschan *es)
1849{
1850        unsigned int cp1;
1851        unsigned int cp2;
1852        unsigned int diff;
1853
1854        cp1 = __apu_get_register(chip, 0, 5);
1855        cp2 = __apu_get_register(chip, 1, 5);
1856        diff = (cp1 > cp2 ? cp1 - cp2 : cp2 - cp1);
1857
1858        if (diff > 1)
1859                __maestro_write(chip, IDR0_DATA_PORT, cp1);
1860}
1861
1862/*
1863 * update pointer
1864 */
1865static void snd_es1968_update_pcm(struct es1968 *chip, struct esschan *es)
1866{
1867        unsigned int hwptr;
1868        unsigned int diff;
1869        struct snd_pcm_substream *subs = es->substream;
1870        
1871        if (subs == NULL || !es->running)
1872                return;
1873
1874        hwptr = snd_es1968_get_dma_ptr(chip, es) << es->wav_shift;
1875        hwptr %= es->dma_size;
1876
1877        diff = (es->dma_size + hwptr - es->hwptr) % es->dma_size;
1878
1879        es->hwptr = hwptr;
1880        es->count += diff;
1881
1882        if (es->count > es->frag_size) {
1883                spin_unlock(&chip->substream_lock);
1884                snd_pcm_period_elapsed(subs);
1885                spin_lock(&chip->substream_lock);
1886                es->count %= es->frag_size;
1887        }
1888}
1889
1890/* The hardware volume works by incrementing / decrementing 2 counters
1891   (without wrap around) in response to volume button presses and then
1892   generating an interrupt. The pair of counters is stored in bits 1-3 and 5-7
1893   of a byte wide register. The meaning of bits 0 and 4 is unknown. */
1894static void es1968_update_hw_volume(struct work_struct *work)
1895{
1896        struct es1968 *chip = container_of(work, struct es1968, hwvol_work);
1897        int x, val;
1898
1899        /* Figure out which volume control button was pushed,
1900           based on differences from the default register
1901           values. */
1902        x = inb(chip->io_port + 0x1c) & 0xee;
1903        /* Reset the volume control registers. */
1904        outb(0x88, chip->io_port + 0x1c);
1905        outb(0x88, chip->io_port + 0x1d);
1906        outb(0x88, chip->io_port + 0x1e);
1907        outb(0x88, chip->io_port + 0x1f);
1908
1909        if (chip->in_suspend)
1910                return;
1911
1912#ifndef CONFIG_SND_ES1968_INPUT
1913        if (! chip->master_switch || ! chip->master_volume)
1914                return;
1915
1916        val = snd_ac97_read(chip->ac97, AC97_MASTER);
1917        switch (x) {
1918        case 0x88:
1919                /* mute */
1920                val ^= 0x8000;
1921                break;
1922        case 0xaa:
1923                /* volume up */
1924                if ((val & 0x7f) > 0)
1925                        val--;
1926                if ((val & 0x7f00) > 0)
1927                        val -= 0x0100;
1928                break;
1929        case 0x66:
1930                /* volume down */
1931                if ((val & 0x7f) < 0x1f)
1932                        val++;
1933                if ((val & 0x7f00) < 0x1f00)
1934                        val += 0x0100;
1935                break;
1936        }
1937        if (snd_ac97_update(chip->ac97, AC97_MASTER, val))
1938                snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1939                               &chip->master_volume->id);
1940#else
1941        if (!chip->input_dev)
1942                return;
1943
1944        val = 0;
1945        switch (x) {
1946        case 0x88:
1947                /* The counters have not changed, yet we've received a HV
1948                   interrupt. According to tests run by various people this
1949                   happens when pressing the mute button. */
1950                val = KEY_MUTE;
1951                break;
1952        case 0xaa:
1953                /* counters increased by 1 -> volume up */
1954                val = KEY_VOLUMEUP;
1955                break;
1956        case 0x66:
1957                /* counters decreased by 1 -> volume down */
1958                val = KEY_VOLUMEDOWN;
1959                break;
1960        }
1961
1962        if (val) {
1963                input_report_key(chip->input_dev, val, 1);
1964                input_sync(chip->input_dev);
1965                input_report_key(chip->input_dev, val, 0);
1966                input_sync(chip->input_dev);
1967        }
1968#endif
1969}
1970
1971/*
1972 * interrupt handler
1973 */
1974static irqreturn_t snd_es1968_interrupt(int irq, void *dev_id)
1975{
1976        struct es1968 *chip = dev_id;
1977        u32 event;
1978
1979        if (!(event = inb(chip->io_port + 0x1A)))
1980                return IRQ_NONE;
1981
1982        outw(inw(chip->io_port + 4) & 1, chip->io_port + 4);
1983
1984        if (event & ESM_HWVOL_IRQ)
1985                schedule_work(&chip->hwvol_work);
1986
1987        /* else ack 'em all, i imagine */
1988        outb(0xFF, chip->io_port + 0x1A);
1989
1990        if ((event & ESM_MPU401_IRQ) && chip->rmidi) {
1991                snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1992        }
1993
1994        if (event & ESM_SOUND_IRQ) {
1995                struct esschan *es;
1996                spin_lock(&chip->substream_lock);
1997                list_for_each_entry(es, &chip->substream_list, list) {
1998                        if (es->running) {
1999                                snd_es1968_update_pcm(chip, es);
2000                                if (es->fmt & ESS_FMT_STEREO)
2001                                        snd_es1968_suppress_jitter(chip, es);
2002                        }
2003                }
2004                spin_unlock(&chip->substream_lock);
2005                if (chip->in_measurement) {
2006                        unsigned int curp = __apu_get_register(chip, chip->measure_apu, 5);
2007                        if (curp < chip->measure_lastpos)
2008                                chip->measure_count++;
2009                        chip->measure_lastpos = curp;
2010                }
2011        }
2012
2013        return IRQ_HANDLED;
2014}
2015
2016/*
2017 *  Mixer stuff
2018 */
2019
2020static int
2021snd_es1968_mixer(struct es1968 *chip)
2022{
2023        struct snd_ac97_bus *pbus;
2024        struct snd_ac97_template ac97;
2025#ifndef CONFIG_SND_ES1968_INPUT
2026        struct snd_ctl_elem_id elem_id;
2027#endif
2028        int err;
2029        static struct snd_ac97_bus_ops ops = {
2030                .write = snd_es1968_ac97_write,
2031                .read = snd_es1968_ac97_read,
2032        };
2033
2034        if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
2035                return err;
2036        pbus->no_vra = 1; /* ES1968 doesn't need VRA */
2037
2038        memset(&ac97, 0, sizeof(ac97));
2039        ac97.private_data = chip;
2040        if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97)) < 0)
2041                return err;
2042
2043#ifndef CONFIG_SND_ES1968_INPUT
2044        /* attach master switch / volumes for h/w volume control */
2045        memset(&elem_id, 0, sizeof(elem_id));
2046        elem_id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
2047        strcpy(elem_id.name, "Master Playback Switch");
2048        chip->master_switch = snd_ctl_find_id(chip->card, &elem_id);
2049        memset(&elem_id, 0, sizeof(elem_id));
2050        elem_id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
2051        strcpy(elem_id.name, "Master Playback Volume");
2052        chip->master_volume = snd_ctl_find_id(chip->card, &elem_id);
2053#endif
2054
2055        return 0;
2056}
2057
2058/*
2059 * reset ac97 codec
2060 */
2061
2062static void snd_es1968_ac97_reset(struct es1968 *chip)
2063{
2064        unsigned long ioaddr = chip->io_port;
2065
2066        unsigned short save_ringbus_a;
2067        unsigned short save_68;
2068        unsigned short w;
2069        unsigned int vend;
2070
2071        /* save configuration */
2072        save_ringbus_a = inw(ioaddr + 0x36);
2073
2074        //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38); /* clear second codec id? */
2075        /* set command/status address i/o to 1st codec */
2076        outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a);
2077        outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c);
2078
2079        /* disable ac link */
2080        outw(0x0000, ioaddr + 0x36);
2081        save_68 = inw(ioaddr + 0x68);
2082        pci_read_config_word(chip->pci, 0x58, &w);      /* something magical with gpio and bus arb. */
2083        pci_read_config_dword(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend);
2084        if (w & 1)
2085                save_68 |= 0x10;
2086        outw(0xfffe, ioaddr + 0x64);    /* unmask gpio 0 */
2087        outw(0x0001, ioaddr + 0x68);    /* gpio write */
2088        outw(0x0000, ioaddr + 0x60);    /* write 0 to gpio 0 */
2089        udelay(20);
2090        outw(0x0001, ioaddr + 0x60);    /* write 1 to gpio 1 */
2091        msleep(20);
2092
2093        outw(save_68 | 0x1, ioaddr + 0x68);     /* now restore .. */
2094        outw((inw(ioaddr + 0x38) & 0xfffc) | 0x1, ioaddr + 0x38);
2095        outw((inw(ioaddr + 0x3a) & 0xfffc) | 0x1, ioaddr + 0x3a);
2096        outw((inw(ioaddr + 0x3c) & 0xfffc) | 0x1, ioaddr + 0x3c);
2097
2098        /* now the second codec */
2099        /* disable ac link */
2100        outw(0x0000, ioaddr + 0x36);
2101        outw(0xfff7, ioaddr + 0x64);    /* unmask gpio 3 */
2102        save_68 = inw(ioaddr + 0x68);
2103        outw(0x0009, ioaddr + 0x68);    /* gpio write 0 & 3 ?? */
2104        outw(0x0001, ioaddr + 0x60);    /* write 1 to gpio */
2105        udelay(20);
2106        outw(0x0009, ioaddr + 0x60);    /* write 9 to gpio */
2107        msleep(500);
2108        //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38);
2109        outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a);
2110        outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c);
2111
2112#if 0                           /* the loop here needs to be much better if we want it.. */
2113        snd_printk(KERN_INFO "trying software reset\n");
2114        /* try and do a software reset */
2115        outb(0x80 | 0x7c, ioaddr + 0x30);
2116        for (w = 0;; w++) {
2117                if ((inw(ioaddr + 0x30) & 1) == 0) {
2118                        if (inb(ioaddr + 0x32) != 0)
2119                                break;
2120
2121                        outb(0x80 | 0x7d, ioaddr + 0x30);
2122                        if (((inw(ioaddr + 0x30) & 1) == 0)
2123                            && (inb(ioaddr + 0x32) != 0))
2124                                break;
2125                        outb(0x80 | 0x7f, ioaddr + 0x30);
2126                        if (((inw(ioaddr + 0x30) & 1) == 0)
2127                            && (inb(ioaddr + 0x32) != 0))
2128                                break;
2129                }
2130
2131                if (w > 10000) {
2132                        outb(inb(ioaddr + 0x37) | 0x08, ioaddr + 0x37); /* do a software reset */
2133                        msleep(500);    /* oh my.. */
2134                        outb(inb(ioaddr + 0x37) & ~0x08,
2135                                ioaddr + 0x37);
2136                        udelay(1);
2137                        outw(0x80, ioaddr + 0x30);
2138                        for (w = 0; w < 10000; w++) {
2139                                if ((inw(ioaddr + 0x30) & 1) == 0)
2140                                        break;
2141                        }
2142                }
2143        }
2144#endif
2145        if (vend == NEC_VERSA_SUBID1 || vend == NEC_VERSA_SUBID2) {
2146                /* turn on external amp? */
2147                outw(0xf9ff, ioaddr + 0x64);
2148                outw(inw(ioaddr + 0x68) | 0x600, ioaddr + 0x68);
2149                outw(0x0209, ioaddr + 0x60);
2150        }
2151
2152        /* restore.. */
2153        outw(save_ringbus_a, ioaddr + 0x36);
2154
2155        /* Turn on the 978 docking chip.
2156           First frob the "master output enable" bit,
2157           then set most of the playback volume control registers to max. */
2158        outb(inb(ioaddr+0xc0)|(1<<5), ioaddr+0xc0);
2159        outb(0xff, ioaddr+0xc3);
2160        outb(0xff, ioaddr+0xc4);
2161        outb(0xff, ioaddr+0xc6);
2162        outb(0xff, ioaddr+0xc8);
2163        outb(0x3f, ioaddr+0xcf);
2164        outb(0x3f, ioaddr+0xd0);
2165}
2166
2167static void snd_es1968_reset(struct es1968 *chip)
2168{
2169        /* Reset */
2170        outw(ESM_RESET_MAESTRO | ESM_RESET_DIRECTSOUND,
2171             chip->io_port + ESM_PORT_HOST_IRQ);
2172        udelay(10);
2173        outw(0x0000, chip->io_port + ESM_PORT_HOST_IRQ);
2174        udelay(10);
2175}
2176
2177/*
2178 * initialize maestro chip
2179 */
2180static void snd_es1968_chip_init(struct es1968 *chip)
2181{
2182        struct pci_dev *pci = chip->pci;
2183        int i;
2184        unsigned long iobase  = chip->io_port;
2185        u16 w;
2186        u32 n;
2187
2188        /* We used to muck around with pci config space that
2189         * we had no business messing with.  We don't know enough
2190         * about the machine to know which DMA mode is appropriate, 
2191         * etc.  We were guessing wrong on some machines and making
2192         * them unhappy.  We now trust in the BIOS to do things right,
2193         * which almost certainly means a new host of problems will
2194         * arise with broken BIOS implementations.  screw 'em. 
2195         * We're already intolerant of machines that don't assign
2196         * IRQs.
2197         */
2198        
2199        /* Config Reg A */
2200        pci_read_config_word(pci, ESM_CONFIG_A, &w);
2201
2202        w &= ~DMA_CLEAR;        /* Clear DMA bits */
2203        w &= ~(PIC_SNOOP1 | PIC_SNOOP2);        /* Clear Pic Snoop Mode Bits */
2204        w &= ~SAFEGUARD;        /* Safeguard off */
2205        w |= POST_WRITE;        /* Posted write */
2206        w |= PCI_TIMING;        /* PCI timing on */
2207        /* XXX huh?  claims to be reserved.. */
2208        w &= ~SWAP_LR;          /* swap left/right 
2209                                   seems to only have effect on SB
2210                                   Emulation */
2211        w &= ~SUBTR_DECODE;     /* Subtractive decode off */
2212
2213        pci_write_config_word(pci, ESM_CONFIG_A, w);
2214
2215        /* Config Reg B */
2216
2217        pci_read_config_word(pci, ESM_CONFIG_B, &w);
2218
2219        w &= ~(1 << 15);        /* Turn off internal clock multiplier */
2220        /* XXX how do we know which to use? */
2221        w &= ~(1 << 14);        /* External clock */
2222
2223        w &= ~SPDIF_CONFB;      /* disable S/PDIF output */
2224        w |= HWV_CONFB;         /* HWV on */
2225        w |= DEBOUNCE;          /* Debounce off: easier to push the HW buttons */
2226        w &= ~GPIO_CONFB;       /* GPIO 4:5 */
2227        w |= CHI_CONFB;         /* Disconnect from the CHI.  Enabling this made a dell 7500 work. */
2228        w &= ~IDMA_CONFB;       /* IDMA off (undocumented) */
2229        w &= ~MIDI_FIX;         /* MIDI fix off (undoc) */
2230        w &= ~(1 << 1);         /* reserved, always write 0 */
2231        w &= ~IRQ_TO_ISA;       /* IRQ to ISA off (undoc) */
2232
2233        pci_write_config_word(pci, ESM_CONFIG_B, w);
2234
2235        /* DDMA off */
2236
2237        pci_read_config_word(pci, ESM_DDMA, &w);
2238        w &= ~(1 << 0);
2239        pci_write_config_word(pci, ESM_DDMA, w);
2240
2241        /*
2242         *      Legacy mode
2243         */
2244
2245        pci_read_config_word(pci, ESM_LEGACY_AUDIO_CONTROL, &w);
2246
2247        w |= ESS_DISABLE_AUDIO; /* Disable Legacy Audio */
2248        w &= ~ESS_ENABLE_SERIAL_IRQ;    /* Disable SIRQ */
2249        w &= ~(0x1f);           /* disable mpu irq/io, game port, fm, SB */
2250
2251        pci_write_config_word(pci, ESM_LEGACY_AUDIO_CONTROL, w);
2252
2253        /* Set up 978 docking control chip. */
2254        pci_read_config_word(pci, 0x58, &w);
2255        w|=1<<2;        /* Enable 978. */
2256        w|=1<<3;        /* Turn on 978 hardware volume control. */
2257        w&=~(1<<11);    /* Turn on 978 mixer volume control. */
2258        pci_write_config_word(pci, 0x58, w);
2259        
2260        /* Sound Reset */
2261
2262        snd_es1968_reset(chip);
2263
2264        /*
2265         *      Ring Bus Setup
2266         */
2267
2268        /* setup usual 0x34 stuff.. 0x36 may be chip specific */
2269        outw(0xC090, iobase + ESM_RING_BUS_DEST); /* direct sound, stereo */
2270        udelay(20);
2271        outw(0x3000, iobase + ESM_RING_BUS_CONTR_A); /* enable ringbus/serial */
2272        udelay(20);
2273
2274        /*
2275         *      Reset the CODEC
2276         */
2277         
2278        snd_es1968_ac97_reset(chip);
2279
2280        /* Ring Bus Control B */
2281
2282        n = inl(iobase + ESM_RING_BUS_CONTR_B);
2283        n &= ~RINGB_EN_SPDIF;   /* SPDIF off */
2284        //w |= RINGB_EN_2CODEC; /* enable 2nd codec */
2285        outl(n, iobase + ESM_RING_BUS_CONTR_B);
2286
2287        /* Set hardware volume control registers to midpoints.
2288           We can tell which button was pushed based on how they change. */
2289        outb(0x88, iobase+0x1c);
2290        outb(0x88, iobase+0x1d);
2291        outb(0x88, iobase+0x1e);
2292        outb(0x88, iobase+0x1f);
2293
2294        /* it appears some maestros (dell 7500) only work if these are set,
2295           regardless of whether we use the assp or not. */
2296
2297        outb(0, iobase + ASSP_CONTROL_B);
2298        outb(3, iobase + ASSP_CONTROL_A);       /* M: Reserved bits... */
2299        outb(0, iobase + ASSP_CONTROL_C);       /* M: Disable ASSP, ASSP IRQ's and FM Port */
2300
2301        /*
2302         * set up wavecache
2303         */
2304        for (i = 0; i < 16; i++) {
2305                /* Write 0 into the buffer area 0x1E0->1EF */
2306                outw(0x01E0 + i, iobase + WC_INDEX);
2307                outw(0x0000, iobase + WC_DATA);
2308
2309                /* The 1.10 test program seem to write 0 into the buffer area
2310                 * 0x1D0-0x1DF too.*/
2311                outw(0x01D0 + i, iobase + WC_INDEX);
2312                outw(0x0000, iobase + WC_DATA);
2313        }
2314        wave_set_register(chip, IDR7_WAVE_ROMRAM,
2315                          (wave_get_register(chip, IDR7_WAVE_ROMRAM) & 0xFF00));
2316        wave_set_register(chip, IDR7_WAVE_ROMRAM,
2317                          wave_get_register(chip, IDR7_WAVE_ROMRAM) | 0x100);
2318        wave_set_register(chip, IDR7_WAVE_ROMRAM,
2319                          wave_get_register(chip, IDR7_WAVE_ROMRAM) & ~0x200);
2320        wave_set_register(chip, IDR7_WAVE_ROMRAM,
2321                          wave_get_register(chip, IDR7_WAVE_ROMRAM) | ~0x400);
2322
2323
2324        maestro_write(chip, IDR2_CRAM_DATA, 0x0000);
2325        /* Now back to the DirectSound stuff */
2326        /* audio serial configuration.. ? */
2327        maestro_write(chip, 0x08, 0xB004);
2328        maestro_write(chip, 0x09, 0x001B);
2329        maestro_write(chip, 0x0A, 0x8000);
2330        maestro_write(chip, 0x0B, 0x3F37);
2331        maestro_write(chip, 0x0C, 0x0098);
2332
2333        /* parallel in, has something to do with recording :) */
2334        maestro_write(chip, 0x0C,
2335                      (maestro_read(chip, 0x0C) & ~0xF000) | 0x8000);
2336        /* parallel out */
2337        maestro_write(chip, 0x0C,
2338                      (maestro_read(chip, 0x0C) & ~0x0F00) | 0x0500);
2339
2340        maestro_write(chip, 0x0D, 0x7632);
2341
2342        /* Wave cache control on - test off, sg off, 
2343           enable, enable extra chans 1Mb */
2344
2345        w = inw(iobase + WC_CONTROL);
2346
2347        w &= ~0xFA00;           /* Seems to be reserved? I don't know */
2348        w |= 0xA000;            /* reserved... I don't know */
2349        w &= ~0x0200;           /* Channels 56,57,58,59 as Extra Play,Rec Channel enable
2350                                   Seems to crash the Computer if enabled... */
2351        w |= 0x0100;            /* Wave Cache Operation Enabled */
2352        w |= 0x0080;            /* Channels 60/61 as Placback/Record enabled */
2353        w &= ~0x0060;           /* Clear Wavtable Size */
2354        w |= 0x0020;            /* Wavetable Size : 1MB */
2355        /* Bit 4 is reserved */
2356        w &= ~0x000C;           /* DMA Stuff? I don't understand what the datasheet means */
2357        /* Bit 1 is reserved */
2358        w &= ~0x0001;           /* Test Mode off */
2359
2360        outw(w, iobase + WC_CONTROL);
2361
2362        /* Now clear the APU control ram */
2363        for (i = 0; i < NR_APUS; i++) {
2364                for (w = 0; w < NR_APU_REGS; w++)
2365                        apu_set_register(chip, i, w, 0);
2366
2367        }
2368}
2369
2370/* Enable IRQ's */
2371static void snd_es1968_start_irq(struct es1968 *chip)
2372{
2373        unsigned short w;
2374        w = ESM_HIRQ_DSIE | ESM_HIRQ_HW_VOLUME;
2375        if (chip->rmidi)
2376                w |= ESM_HIRQ_MPU401;
2377        outb(w, chip->io_port + 0x1A);
2378        outw(w, chip->io_port + ESM_PORT_HOST_IRQ);
2379}
2380
2381#ifdef CONFIG_PM_SLEEP
2382/*
2383 * PM support
2384 */
2385static int es1968_suspend(struct device *dev)
2386{
2387        struct pci_dev *pci = to_pci_dev(dev);
2388        struct snd_card *card = dev_get_drvdata(dev);
2389        struct es1968 *chip = card->private_data;
2390
2391        if (! chip->do_pm)
2392                return 0;
2393
2394        chip->in_suspend = 1;
2395        cancel_work_sync(&chip->hwvol_work);
2396        snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2397        snd_pcm_suspend_all(chip->pcm);
2398        snd_ac97_suspend(chip->ac97);
2399        snd_es1968_bob_stop(chip);
2400
2401        pci_disable_device(pci);
2402        pci_save_state(pci);
2403        pci_set_power_state(pci, PCI_D3hot);
2404        return 0;
2405}
2406
2407static int es1968_resume(struct device *dev)
2408{
2409        struct pci_dev *pci = to_pci_dev(dev);
2410        struct snd_card *card = dev_get_drvdata(dev);
2411        struct es1968 *chip = card->private_data;
2412        struct esschan *es;
2413
2414        if (! chip->do_pm)
2415                return 0;
2416
2417        /* restore all our config */
2418        pci_set_power_state(pci, PCI_D0);
2419        pci_restore_state(pci);
2420        if (pci_enable_device(pci) < 0) {
2421                printk(KERN_ERR "es1968: pci_enable_device failed, "
2422                       "disabling device\n");
2423                snd_card_disconnect(card);
2424                return -EIO;
2425        }
2426        pci_set_master(pci);
2427
2428        snd_es1968_chip_init(chip);
2429
2430        /* need to restore the base pointers.. */ 
2431        if (chip->dma.addr) {
2432                /* set PCMBAR */
2433                wave_set_register(chip, 0x01FC, chip->dma.addr >> 12);
2434        }
2435
2436        snd_es1968_start_irq(chip);
2437
2438        /* restore ac97 state */
2439        snd_ac97_resume(chip->ac97);
2440
2441        list_for_each_entry(es, &chip->substream_list, list) {
2442                switch (es->mode) {
2443                case ESM_MODE_PLAY:
2444                        snd_es1968_playback_setup(chip, es, es->substream->runtime);
2445                        break;
2446                case ESM_MODE_CAPTURE:
2447                        snd_es1968_capture_setup(chip, es, es->substream->runtime);
2448                        break;
2449                }
2450        }
2451
2452        /* start timer again */
2453        if (chip->bobclient)
2454                snd_es1968_bob_start(chip);
2455
2456        snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2457        chip->in_suspend = 0;
2458        return 0;
2459}
2460
2461static SIMPLE_DEV_PM_OPS(es1968_pm, es1968_suspend, es1968_resume);
2462#define ES1968_PM_OPS   &es1968_pm
2463#else
2464#define ES1968_PM_OPS   NULL
2465#endif /* CONFIG_PM_SLEEP */
2466
2467#ifdef SUPPORT_JOYSTICK
2468#define JOYSTICK_ADDR   0x200
2469static int snd_es1968_create_gameport(struct es1968 *chip, int dev)
2470{
2471        struct gameport *gp;
2472        struct resource *r;
2473        u16 val;
2474
2475        if (!joystick[dev])
2476                return -ENODEV;
2477
2478        r = request_region(JOYSTICK_ADDR, 8, "ES1968 gameport");
2479        if (!r)
2480                return -EBUSY;
2481
2482        chip->gameport = gp = gameport_allocate_port();
2483        if (!gp) {
2484                printk(KERN_ERR "es1968: cannot allocate memory for gameport\n");
2485                release_and_free_resource(r);
2486                return -ENOMEM;
2487        }
2488
2489        pci_read_config_word(chip->pci, ESM_LEGACY_AUDIO_CONTROL, &val);
2490        pci_write_config_word(chip->pci, ESM_LEGACY_AUDIO_CONTROL, val | 0x04);
2491
2492        gameport_set_name(gp, "ES1968 Gameport");
2493        gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
2494        gameport_set_dev_parent(gp, &chip->pci->dev);
2495        gp->io = JOYSTICK_ADDR;
2496        gameport_set_port_data(gp, r);
2497
2498        gameport_register_port(gp);
2499
2500        return 0;
2501}
2502
2503static void snd_es1968_free_gameport(struct es1968 *chip)
2504{
2505        if (chip->gameport) {
2506                struct resource *r = gameport_get_port_data(chip->gameport);
2507
2508                gameport_unregister_port(chip->gameport);
2509                chip->gameport = NULL;
2510
2511                release_and_free_resource(r);
2512        }
2513}
2514#else
2515static inline int snd_es1968_create_gameport(struct es1968 *chip, int dev) { return -ENOSYS; }
2516static inline void snd_es1968_free_gameport(struct es1968 *chip) { }
2517#endif
2518
2519#ifdef CONFIG_SND_ES1968_INPUT
2520static int snd_es1968_input_register(struct es1968 *chip)
2521{
2522        struct input_dev *input_dev;
2523        int err;
2524
2525        input_dev = input_allocate_device();
2526        if (!input_dev)
2527                return -ENOMEM;
2528
2529        snprintf(chip->phys, sizeof(chip->phys), "pci-%s/input0",
2530                 pci_name(chip->pci));
2531
2532        input_dev->name = chip->card->driver;
2533        input_dev->phys = chip->phys;
2534        input_dev->id.bustype = BUS_PCI;
2535        input_dev->id.vendor  = chip->pci->vendor;
2536        input_dev->id.product = chip->pci->device;
2537        input_dev->dev.parent = &chip->pci->dev;
2538
2539        __set_bit(EV_KEY, input_dev->evbit);
2540        __set_bit(KEY_MUTE, input_dev->keybit);
2541        __set_bit(KEY_VOLUMEDOWN, input_dev->keybit);
2542        __set_bit(KEY_VOLUMEUP, input_dev->keybit);
2543
2544        err = input_register_device(input_dev);
2545        if (err) {
2546                input_free_device(input_dev);
2547                return err;
2548        }
2549
2550        chip->input_dev = input_dev;
2551        return 0;
2552}
2553#endif /* CONFIG_SND_ES1968_INPUT */
2554
2555#ifdef CONFIG_SND_ES1968_RADIO
2556#define GPIO_DATA       0x60
2557#define IO_MASK         4      /* mask      register offset from GPIO_DATA
2558                                bits 1=unmask write to given bit */
2559#define IO_DIR          8      /* direction register offset from GPIO_DATA
2560                                bits 0/1=read/write direction */
2561
2562/* GPIO to TEA575x maps */
2563struct snd_es1968_tea575x_gpio {
2564        u8 data, clk, wren, most;
2565        char *name;
2566};
2567
2568static struct snd_es1968_tea575x_gpio snd_es1968_tea575x_gpios[] = {
2569        { .data = 6, .clk = 7, .wren = 8, .most = 9, .name = "SF64-PCE2" },
2570        { .data = 7, .clk = 8, .wren = 6, .most = 10, .name = "M56VAP" },
2571};
2572
2573#define get_tea575x_gpio(chip) \
2574        (&snd_es1968_tea575x_gpios[(chip)->tea575x_tuner])
2575
2576
2577static void snd_es1968_tea575x_set_pins(struct snd_tea575x *tea, u8 pins)
2578{
2579        struct es1968 *chip = tea->private_data;
2580        struct snd_es1968_tea575x_gpio gpio = *get_tea575x_gpio(chip);
2581        u16 val = 0;
2582
2583        val |= (pins & TEA575X_DATA) ? (1 << gpio.data) : 0;
2584        val |= (pins & TEA575X_CLK)  ? (1 << gpio.clk)  : 0;
2585        val |= (pins & TEA575X_WREN) ? (1 << gpio.wren) : 0;
2586
2587        outw(val, chip->io_port + GPIO_DATA);
2588}
2589
2590static u8 snd_es1968_tea575x_get_pins(struct snd_tea575x *tea)
2591{
2592        struct es1968 *chip = tea->private_data;
2593        struct snd_es1968_tea575x_gpio gpio = *get_tea575x_gpio(chip);
2594        u16 val = inw(chip->io_port + GPIO_DATA);
2595        u8 ret = 0;
2596
2597        if (val & (1 << gpio.data))
2598                ret |= TEA575X_DATA;
2599        if (val & (1 << gpio.most))
2600                ret |= TEA575X_MOST;
2601
2602        return ret;
2603}
2604
2605static void snd_es1968_tea575x_set_direction(struct snd_tea575x *tea, bool output)
2606{
2607        struct es1968 *chip = tea->private_data;
2608        unsigned long io = chip->io_port + GPIO_DATA;
2609        u16 odir = inw(io + IO_DIR);
2610        struct snd_es1968_tea575x_gpio gpio = *get_tea575x_gpio(chip);
2611
2612        if (output) {
2613                outw(~((1 << gpio.data) | (1 << gpio.clk) | (1 << gpio.wren)),
2614                        io + IO_MASK);
2615                outw(odir | (1 << gpio.data) | (1 << gpio.clk) | (1 << gpio.wren),
2616                        io + IO_DIR);
2617        } else {
2618                outw(~((1 << gpio.clk) | (1 << gpio.wren) | (1 << gpio.data) | (1 << gpio.most)),
2619                        io + IO_MASK);
2620                outw((odir & ~((1 << gpio.data) | (1 << gpio.most)))
2621                        | (1 << gpio.clk) | (1 << gpio.wren), io + IO_DIR);
2622        }
2623}
2624
2625static struct snd_tea575x_ops snd_es1968_tea_ops = {
2626        .set_pins = snd_es1968_tea575x_set_pins,
2627        .get_pins = snd_es1968_tea575x_get_pins,
2628        .set_direction = snd_es1968_tea575x_set_direction,
2629};
2630#endif
2631
2632static int snd_es1968_free(struct es1968 *chip)
2633{
2634        cancel_work_sync(&chip->hwvol_work);
2635#ifdef CONFIG_SND_ES1968_INPUT
2636        if (chip->input_dev)
2637                input_unregister_device(chip->input_dev);
2638#endif
2639
2640        if (chip->io_port) {
2641                if (chip->irq >= 0)
2642                        synchronize_irq(chip->irq);
2643                outw(1, chip->io_port + 0x04); /* clear WP interrupts */
2644                outw(0, chip->io_port + ESM_PORT_HOST_IRQ); /* disable IRQ */
2645        }
2646
2647#ifdef CONFIG_SND_ES1968_RADIO
2648        snd_tea575x_exit(&chip->tea);
2649        v4l2_device_unregister(&chip->v4l2_dev);
2650#endif
2651
2652        if (chip->irq >= 0)
2653                free_irq(chip->irq, chip);
2654        snd_es1968_free_gameport(chip);
2655        pci_release_regions(chip->pci);
2656        pci_disable_device(chip->pci);
2657        kfree(chip);
2658        return 0;
2659}
2660
2661static int snd_es1968_dev_free(struct snd_device *device)
2662{
2663        struct es1968 *chip = device->device_data;
2664        return snd_es1968_free(chip);
2665}
2666
2667struct ess_device_list {
2668        unsigned short type;    /* chip type */
2669        unsigned short vendor;  /* subsystem vendor id */
2670};
2671
2672static struct ess_device_list pm_whitelist[] = {
2673        { TYPE_MAESTRO2E, 0x0e11 },     /* Compaq Armada */
2674        { TYPE_MAESTRO2E, 0x1028 },
2675        { TYPE_MAESTRO2E, 0x103c },
2676        { TYPE_MAESTRO2E, 0x1179 },
2677        { TYPE_MAESTRO2E, 0x14c0 },     /* HP omnibook 4150 */
2678        { TYPE_MAESTRO2E, 0x1558 },
2679        { TYPE_MAESTRO2E, 0x125d },     /* a PCI card, e.g. Terratec DMX */
2680        { TYPE_MAESTRO2, 0x125d },      /* a PCI card, e.g. SF64-PCE2 */
2681};
2682
2683static struct ess_device_list mpu_blacklist[] = {
2684        { TYPE_MAESTRO2, 0x125d },
2685};
2686
2687static int snd_es1968_create(struct snd_card *card,
2688                             struct pci_dev *pci,
2689                             int total_bufsize,
2690                             int play_streams,
2691                             int capt_streams,
2692                             int chip_type,
2693                             int do_pm,
2694                             int radio_nr,
2695                             struct es1968 **chip_ret)
2696{
2697        static struct snd_device_ops ops = {
2698                .dev_free =     snd_es1968_dev_free,
2699        };
2700        struct es1968 *chip;
2701        int i, err;
2702
2703        *chip_ret = NULL;
2704
2705        /* enable PCI device */
2706        if ((err = pci_enable_device(pci)) < 0)
2707                return err;
2708        /* check, if we can restrict PCI DMA transfers to 28 bits */
2709        if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
2710            pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
2711                snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
2712                pci_disable_device(pci);
2713                return -ENXIO;
2714        }
2715
2716        chip = kzalloc(sizeof(*chip), GFP_KERNEL);
2717        if (! chip) {
2718                pci_disable_device(pci);
2719                return -ENOMEM;
2720        }
2721
2722        /* Set Vars */
2723        chip->type = chip_type;
2724        spin_lock_init(&chip->reg_lock);
2725        spin_lock_init(&chip->substream_lock);
2726        INIT_LIST_HEAD(&chip->buf_list);
2727        INIT_LIST_HEAD(&chip->substream_list);
2728        mutex_init(&chip->memory_mutex);
2729        INIT_WORK(&chip->hwvol_work, es1968_update_hw_volume);
2730        chip->card = card;
2731        chip->pci = pci;
2732        chip->irq = -1;
2733        chip->total_bufsize = total_bufsize;    /* in bytes */
2734        chip->playback_streams = play_streams;
2735        chip->capture_streams = capt_streams;
2736
2737        if ((err = pci_request_regions(pci, "ESS Maestro")) < 0) {
2738                kfree(chip);
2739                pci_disable_device(pci);
2740                return err;
2741        }
2742        chip->io_port = pci_resource_start(pci, 0);
2743        if (request_irq(pci->irq, snd_es1968_interrupt, IRQF_SHARED,
2744                        KBUILD_MODNAME, chip)) {
2745                snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
2746                snd_es1968_free(chip);
2747                return -EBUSY;
2748        }
2749        chip->irq = pci->irq;
2750                
2751        /* Clear Maestro_map */
2752        for (i = 0; i < 32; i++)
2753                chip->maestro_map[i] = 0;
2754
2755        /* Clear Apu Map */
2756        for (i = 0; i < NR_APUS; i++)
2757                chip->apu[i] = ESM_APU_FREE;
2758
2759        /* just to be sure */
2760        pci_set_master(pci);
2761
2762        if (do_pm > 1) {
2763                /* disable power-management if not on the whitelist */
2764                unsigned short vend;
2765                pci_read_config_word(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend);
2766                for (i = 0; i < (int)ARRAY_SIZE(pm_whitelist); i++) {
2767                        if (chip->type == pm_whitelist[i].type &&
2768                            vend == pm_whitelist[i].vendor) {
2769                                do_pm = 1;
2770                                break;
2771                        }
2772                }
2773                if (do_pm > 1) {
2774                        /* not matched; disabling pm */
2775                        printk(KERN_INFO "es1968: not attempting power management.\n");
2776                        do_pm = 0;
2777                }
2778        }
2779        chip->do_pm = do_pm;
2780
2781        snd_es1968_chip_init(chip);
2782
2783        if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2784                snd_es1968_free(chip);
2785                return err;
2786        }
2787
2788        snd_card_set_dev(card, &pci->dev);
2789
2790#ifdef CONFIG_SND_ES1968_RADIO
2791        /* don't play with GPIOs on laptops */
2792        if (chip->pci->subsystem_vendor != 0x125d)
2793                goto no_radio;
2794        err = v4l2_device_register(&pci->dev, &chip->v4l2_dev);
2795        if (err < 0) {
2796                snd_es1968_free(chip);
2797                return err;
2798        }
2799        chip->tea.v4l2_dev = &chip->v4l2_dev;
2800        chip->tea.private_data = chip;
2801        chip->tea.radio_nr = radio_nr;
2802        chip->tea.ops = &snd_es1968_tea_ops;
2803        sprintf(chip->tea.bus_info, "PCI:%s", pci_name(pci));
2804        for (i = 0; i < ARRAY_SIZE(snd_es1968_tea575x_gpios); i++) {
2805                chip->tea575x_tuner = i;
2806                if (!snd_tea575x_init(&chip->tea, THIS_MODULE)) {
2807                        snd_printk(KERN_INFO "es1968: detected TEA575x radio type %s\n",
2808                                   get_tea575x_gpio(chip)->name);
2809                        strlcpy(chip->tea.card, get_tea575x_gpio(chip)->name,
2810                                sizeof(chip->tea.card));
2811                        break;
2812                }
2813        }
2814no_radio:
2815#endif
2816
2817        *chip_ret = chip;
2818
2819        return 0;
2820}
2821
2822
2823/*
2824 */
2825static int snd_es1968_probe(struct pci_dev *pci,
2826                            const struct pci_device_id *pci_id)
2827{
2828        static int dev;
2829        struct snd_card *card;
2830        struct es1968 *chip;
2831        unsigned int i;
2832        int err;
2833
2834        if (dev >= SNDRV_CARDS)
2835                return -ENODEV;
2836        if (!enable[dev]) {
2837                dev++;
2838                return -ENOENT;
2839        }
2840
2841        err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
2842        if (err < 0)
2843                return err;
2844                
2845        if (total_bufsize[dev] < 128)
2846                total_bufsize[dev] = 128;
2847        if (total_bufsize[dev] > 4096)
2848                total_bufsize[dev] = 4096;
2849        if ((err = snd_es1968_create(card, pci,
2850                                     total_bufsize[dev] * 1024, /* in bytes */
2851                                     pcm_substreams_p[dev], 
2852                                     pcm_substreams_c[dev],
2853                                     pci_id->driver_data,
2854                                     use_pm[dev],
2855                                     radio_nr[dev],
2856                                     &chip)) < 0) {
2857                snd_card_free(card);
2858                return err;
2859        }
2860        card->private_data = chip;
2861
2862        switch (chip->type) {
2863        case TYPE_MAESTRO2E:
2864                strcpy(card->driver, "ES1978");
2865                strcpy(card->shortname, "ESS ES1978 (Maestro 2E)");
2866                break;
2867        case TYPE_MAESTRO2:
2868                strcpy(card->driver, "ES1968");
2869                strcpy(card->shortname, "ESS ES1968 (Maestro 2)");
2870                break;
2871        case TYPE_MAESTRO:
2872                strcpy(card->driver, "ESM1");
2873                strcpy(card->shortname, "ESS Maestro 1");
2874                break;
2875        }
2876
2877        if ((err = snd_es1968_pcm(chip, 0)) < 0) {
2878                snd_card_free(card);
2879                return err;
2880        }
2881
2882        if ((err = snd_es1968_mixer(chip)) < 0) {
2883                snd_card_free(card);
2884                return err;
2885        }
2886
2887        if (enable_mpu[dev] == 2) {
2888                /* check the black list */
2889                unsigned short vend;
2890                pci_read_config_word(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend);
2891                for (i = 0; i < ARRAY_SIZE(mpu_blacklist); i++) {
2892                        if (chip->type == mpu_blacklist[i].type &&
2893                            vend == mpu_blacklist[i].vendor) {
2894                                enable_mpu[dev] = 0;
2895                                break;
2896                        }
2897                }
2898        }
2899        if (enable_mpu[dev]) {
2900                if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
2901                                               chip->io_port + ESM_MPU401_PORT,
2902                                               MPU401_INFO_INTEGRATED |
2903                                               MPU401_INFO_IRQ_HOOK,
2904                                               -1, &chip->rmidi)) < 0) {
2905                        printk(KERN_WARNING "es1968: skipping MPU-401 MIDI support..\n");
2906                }
2907        }
2908
2909        snd_es1968_create_gameport(chip, dev);
2910
2911#ifdef CONFIG_SND_ES1968_INPUT
2912        err = snd_es1968_input_register(chip);
2913        if (err)
2914                snd_printk(KERN_WARNING "Input device registration "
2915                        "failed with error %i", err);
2916#endif
2917
2918        snd_es1968_start_irq(chip);
2919
2920        chip->clock = clock[dev];
2921        if (! chip->clock)
2922                es1968_measure_clock(chip);
2923
2924        sprintf(card->longname, "%s at 0x%lx, irq %i",
2925                card->shortname, chip->io_port, chip->irq);
2926
2927        if ((err = snd_card_register(card)) < 0) {
2928                snd_card_free(card);
2929                return err;
2930        }
2931        pci_set_drvdata(pci, card);
2932        dev++;
2933        return 0;
2934}
2935
2936static void snd_es1968_remove(struct pci_dev *pci)
2937{
2938        snd_card_free(pci_get_drvdata(pci));
2939}
2940
2941static struct pci_driver es1968_driver = {
2942        .name = KBUILD_MODNAME,
2943        .id_table = snd_es1968_ids,
2944        .probe = snd_es1968_probe,
2945        .remove = snd_es1968_remove,
2946        .driver = {
2947                .pm = ES1968_PM_OPS,
2948        },
2949};
2950
2951module_pci_driver(es1968_driver);
2952
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