linux/drivers/video/cg6.c
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   1/* cg6.c: CGSIX (GX, GXplus, TGX) frame buffer driver
   2 *
   3 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
   4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
   5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
   6 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
   7 *
   8 * Driver layout based loosely on tgafb.c, see that file for credits.
   9 */
  10
  11#include <linux/module.h>
  12#include <linux/kernel.h>
  13#include <linux/errno.h>
  14#include <linux/string.h>
  15#include <linux/delay.h>
  16#include <linux/init.h>
  17#include <linux/fb.h>
  18#include <linux/mm.h>
  19#include <linux/of_device.h>
  20
  21#include <asm/io.h>
  22#include <asm/fbio.h>
  23
  24#include "sbuslib.h"
  25
  26/*
  27 * Local functions.
  28 */
  29
  30static int cg6_setcolreg(unsigned, unsigned, unsigned, unsigned,
  31                         unsigned, struct fb_info *);
  32static int cg6_blank(int, struct fb_info *);
  33
  34static void cg6_imageblit(struct fb_info *, const struct fb_image *);
  35static void cg6_fillrect(struct fb_info *, const struct fb_fillrect *);
  36static void cg6_copyarea(struct fb_info *info, const struct fb_copyarea *area);
  37static int cg6_sync(struct fb_info *);
  38static int cg6_mmap(struct fb_info *, struct vm_area_struct *);
  39static int cg6_ioctl(struct fb_info *, unsigned int, unsigned long);
  40static int cg6_pan_display(struct fb_var_screeninfo *, struct fb_info *);
  41
  42/*
  43 *  Frame buffer operations
  44 */
  45
  46static struct fb_ops cg6_ops = {
  47        .owner                  = THIS_MODULE,
  48        .fb_setcolreg           = cg6_setcolreg,
  49        .fb_blank               = cg6_blank,
  50        .fb_pan_display         = cg6_pan_display,
  51        .fb_fillrect            = cg6_fillrect,
  52        .fb_copyarea            = cg6_copyarea,
  53        .fb_imageblit           = cg6_imageblit,
  54        .fb_sync                = cg6_sync,
  55        .fb_mmap                = cg6_mmap,
  56        .fb_ioctl               = cg6_ioctl,
  57#ifdef CONFIG_COMPAT
  58        .fb_compat_ioctl        = sbusfb_compat_ioctl,
  59#endif
  60};
  61
  62/* Offset of interesting structures in the OBIO space */
  63/*
  64 * Brooktree is the video dac and is funny to program on the cg6.
  65 * (it's even funnier on the cg3)
  66 * The FBC could be the frame buffer control
  67 * The FHC could is the frame buffer hardware control.
  68 */
  69#define CG6_ROM_OFFSET                  0x0UL
  70#define CG6_BROOKTREE_OFFSET            0x200000UL
  71#define CG6_DHC_OFFSET                  0x240000UL
  72#define CG6_ALT_OFFSET                  0x280000UL
  73#define CG6_FHC_OFFSET                  0x300000UL
  74#define CG6_THC_OFFSET                  0x301000UL
  75#define CG6_FBC_OFFSET                  0x700000UL
  76#define CG6_TEC_OFFSET                  0x701000UL
  77#define CG6_RAM_OFFSET                  0x800000UL
  78
  79/* FHC definitions */
  80#define CG6_FHC_FBID_SHIFT              24
  81#define CG6_FHC_FBID_MASK               255
  82#define CG6_FHC_REV_SHIFT               20
  83#define CG6_FHC_REV_MASK                15
  84#define CG6_FHC_FROP_DISABLE            (1 << 19)
  85#define CG6_FHC_ROW_DISABLE             (1 << 18)
  86#define CG6_FHC_SRC_DISABLE             (1 << 17)
  87#define CG6_FHC_DST_DISABLE             (1 << 16)
  88#define CG6_FHC_RESET                   (1 << 15)
  89#define CG6_FHC_LITTLE_ENDIAN           (1 << 13)
  90#define CG6_FHC_RES_MASK                (3 << 11)
  91#define CG6_FHC_1024                    (0 << 11)
  92#define CG6_FHC_1152                    (1 << 11)
  93#define CG6_FHC_1280                    (2 << 11)
  94#define CG6_FHC_1600                    (3 << 11)
  95#define CG6_FHC_CPU_MASK                (3 << 9)
  96#define CG6_FHC_CPU_SPARC               (0 << 9)
  97#define CG6_FHC_CPU_68020               (1 << 9)
  98#define CG6_FHC_CPU_386                 (2 << 9)
  99#define CG6_FHC_TEST                    (1 << 8)
 100#define CG6_FHC_TEST_X_SHIFT            4
 101#define CG6_FHC_TEST_X_MASK             15
 102#define CG6_FHC_TEST_Y_SHIFT            0
 103#define CG6_FHC_TEST_Y_MASK             15
 104
 105/* FBC mode definitions */
 106#define CG6_FBC_BLIT_IGNORE             0x00000000
 107#define CG6_FBC_BLIT_NOSRC              0x00100000
 108#define CG6_FBC_BLIT_SRC                0x00200000
 109#define CG6_FBC_BLIT_ILLEGAL            0x00300000
 110#define CG6_FBC_BLIT_MASK               0x00300000
 111
 112#define CG6_FBC_VBLANK                  0x00080000
 113
 114#define CG6_FBC_MODE_IGNORE             0x00000000
 115#define CG6_FBC_MODE_COLOR8             0x00020000
 116#define CG6_FBC_MODE_COLOR1             0x00040000
 117#define CG6_FBC_MODE_HRMONO             0x00060000
 118#define CG6_FBC_MODE_MASK               0x00060000
 119
 120#define CG6_FBC_DRAW_IGNORE             0x00000000
 121#define CG6_FBC_DRAW_RENDER             0x00008000
 122#define CG6_FBC_DRAW_PICK               0x00010000
 123#define CG6_FBC_DRAW_ILLEGAL            0x00018000
 124#define CG6_FBC_DRAW_MASK               0x00018000
 125
 126#define CG6_FBC_BWRITE0_IGNORE          0x00000000
 127#define CG6_FBC_BWRITE0_ENABLE          0x00002000
 128#define CG6_FBC_BWRITE0_DISABLE         0x00004000
 129#define CG6_FBC_BWRITE0_ILLEGAL         0x00006000
 130#define CG6_FBC_BWRITE0_MASK            0x00006000
 131
 132#define CG6_FBC_BWRITE1_IGNORE          0x00000000
 133#define CG6_FBC_BWRITE1_ENABLE          0x00000800
 134#define CG6_FBC_BWRITE1_DISABLE         0x00001000
 135#define CG6_FBC_BWRITE1_ILLEGAL         0x00001800
 136#define CG6_FBC_BWRITE1_MASK            0x00001800
 137
 138#define CG6_FBC_BREAD_IGNORE            0x00000000
 139#define CG6_FBC_BREAD_0                 0x00000200
 140#define CG6_FBC_BREAD_1                 0x00000400
 141#define CG6_FBC_BREAD_ILLEGAL           0x00000600
 142#define CG6_FBC_BREAD_MASK              0x00000600
 143
 144#define CG6_FBC_BDISP_IGNORE            0x00000000
 145#define CG6_FBC_BDISP_0                 0x00000080
 146#define CG6_FBC_BDISP_1                 0x00000100
 147#define CG6_FBC_BDISP_ILLEGAL           0x00000180
 148#define CG6_FBC_BDISP_MASK              0x00000180
 149
 150#define CG6_FBC_INDEX_MOD               0x00000040
 151#define CG6_FBC_INDEX_MASK              0x00000030
 152
 153/* THC definitions */
 154#define CG6_THC_MISC_REV_SHIFT          16
 155#define CG6_THC_MISC_REV_MASK           15
 156#define CG6_THC_MISC_RESET              (1 << 12)
 157#define CG6_THC_MISC_VIDEO              (1 << 10)
 158#define CG6_THC_MISC_SYNC               (1 << 9)
 159#define CG6_THC_MISC_VSYNC              (1 << 8)
 160#define CG6_THC_MISC_SYNC_ENAB          (1 << 7)
 161#define CG6_THC_MISC_CURS_RES           (1 << 6)
 162#define CG6_THC_MISC_INT_ENAB           (1 << 5)
 163#define CG6_THC_MISC_INT                (1 << 4)
 164#define CG6_THC_MISC_INIT               0x9f
 165#define CG6_THC_CURSOFF                 ((65536-32) | ((65536-32) << 16))
 166
 167/* The contents are unknown */
 168struct cg6_tec {
 169        int tec_matrix;
 170        int tec_clip;
 171        int tec_vdc;
 172};
 173
 174struct cg6_thc {
 175        u32     thc_pad0[512];
 176        u32     thc_hs;         /* hsync timing */
 177        u32     thc_hsdvs;
 178        u32     thc_hd;
 179        u32     thc_vs;         /* vsync timing */
 180        u32     thc_vd;
 181        u32     thc_refresh;
 182        u32     thc_misc;
 183        u32     thc_pad1[56];
 184        u32     thc_cursxy;     /* cursor x,y position (16 bits each) */
 185        u32     thc_cursmask[32];       /* cursor mask bits */
 186        u32     thc_cursbits[32];       /* what to show where mask enabled */
 187};
 188
 189struct cg6_fbc {
 190        u32     xxx0[1];
 191        u32     mode;
 192        u32     clip;
 193        u32     xxx1[1];
 194        u32     s;
 195        u32     draw;
 196        u32     blit;
 197        u32     font;
 198        u32     xxx2[24];
 199        u32     x0, y0, z0, color0;
 200        u32     x1, y1, z1, color1;
 201        u32     x2, y2, z2, color2;
 202        u32     x3, y3, z3, color3;
 203        u32     offx, offy;
 204        u32     xxx3[2];
 205        u32     incx, incy;
 206        u32     xxx4[2];
 207        u32     clipminx, clipminy;
 208        u32     xxx5[2];
 209        u32     clipmaxx, clipmaxy;
 210        u32     xxx6[2];
 211        u32     fg;
 212        u32     bg;
 213        u32     alu;
 214        u32     pm;
 215        u32     pixelm;
 216        u32     xxx7[2];
 217        u32     patalign;
 218        u32     pattern[8];
 219        u32     xxx8[432];
 220        u32     apointx, apointy, apointz;
 221        u32     xxx9[1];
 222        u32     rpointx, rpointy, rpointz;
 223        u32     xxx10[5];
 224        u32     pointr, pointg, pointb, pointa;
 225        u32     alinex, aliney, alinez;
 226        u32     xxx11[1];
 227        u32     rlinex, rliney, rlinez;
 228        u32     xxx12[5];
 229        u32     liner, lineg, lineb, linea;
 230        u32     atrix, atriy, atriz;
 231        u32     xxx13[1];
 232        u32     rtrix, rtriy, rtriz;
 233        u32     xxx14[5];
 234        u32     trir, trig, trib, tria;
 235        u32     aquadx, aquady, aquadz;
 236        u32     xxx15[1];
 237        u32     rquadx, rquady, rquadz;
 238        u32     xxx16[5];
 239        u32     quadr, quadg, quadb, quada;
 240        u32     arectx, arecty, arectz;
 241        u32     xxx17[1];
 242        u32     rrectx, rrecty, rrectz;
 243        u32     xxx18[5];
 244        u32     rectr, rectg, rectb, recta;
 245};
 246
 247struct bt_regs {
 248        u32     addr;
 249        u32     color_map;
 250        u32     control;
 251        u32     cursor;
 252};
 253
 254struct cg6_par {
 255        spinlock_t              lock;
 256        struct bt_regs          __iomem *bt;
 257        struct cg6_fbc          __iomem *fbc;
 258        struct cg6_thc          __iomem *thc;
 259        struct cg6_tec          __iomem *tec;
 260        u32                     __iomem *fhc;
 261
 262        u32                     flags;
 263#define CG6_FLAG_BLANKED        0x00000001
 264
 265        unsigned long           which_io;
 266};
 267
 268static int cg6_sync(struct fb_info *info)
 269{
 270        struct cg6_par *par = (struct cg6_par *)info->par;
 271        struct cg6_fbc __iomem *fbc = par->fbc;
 272        int limit = 10000;
 273
 274        do {
 275                if (!(sbus_readl(&fbc->s) & 0x10000000))
 276                        break;
 277                udelay(10);
 278        } while (--limit > 0);
 279
 280        return 0;
 281}
 282
 283static void cg6_switch_from_graph(struct cg6_par *par)
 284{
 285        struct cg6_thc __iomem *thc = par->thc;
 286        unsigned long flags;
 287
 288        spin_lock_irqsave(&par->lock, flags);
 289
 290        /* Hide the cursor. */
 291        sbus_writel(CG6_THC_CURSOFF, &thc->thc_cursxy);
 292
 293        spin_unlock_irqrestore(&par->lock, flags);
 294}
 295
 296static int cg6_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
 297{
 298        struct cg6_par *par = (struct cg6_par *)info->par;
 299
 300        /* We just use this to catch switches out of
 301         * graphics mode.
 302         */
 303        cg6_switch_from_graph(par);
 304
 305        if (var->xoffset || var->yoffset || var->vmode)
 306                return -EINVAL;
 307        return 0;
 308}
 309
 310/**
 311 *      cg6_fillrect -  Draws a rectangle on the screen.
 312 *
 313 *      @info: frame buffer structure that represents a single frame buffer
 314 *      @rect: structure defining the rectagle and operation.
 315 */
 316static void cg6_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 317{
 318        struct cg6_par *par = (struct cg6_par *)info->par;
 319        struct cg6_fbc __iomem *fbc = par->fbc;
 320        unsigned long flags;
 321        s32 val;
 322
 323        /* CG6 doesn't handle ROP_XOR */
 324
 325        spin_lock_irqsave(&par->lock, flags);
 326
 327        cg6_sync(info);
 328
 329        sbus_writel(rect->color, &fbc->fg);
 330        sbus_writel(~(u32)0, &fbc->pixelm);
 331        sbus_writel(0xea80ff00, &fbc->alu);
 332        sbus_writel(0, &fbc->s);
 333        sbus_writel(0, &fbc->clip);
 334        sbus_writel(~(u32)0, &fbc->pm);
 335        sbus_writel(rect->dy, &fbc->arecty);
 336        sbus_writel(rect->dx, &fbc->arectx);
 337        sbus_writel(rect->dy + rect->height, &fbc->arecty);
 338        sbus_writel(rect->dx + rect->width, &fbc->arectx);
 339        do {
 340                val = sbus_readl(&fbc->draw);
 341        } while (val < 0 && (val & 0x20000000));
 342        spin_unlock_irqrestore(&par->lock, flags);
 343}
 344
 345/**
 346 *      cg6_copyarea - Copies one area of the screen to another area.
 347 *
 348 *      @info: frame buffer structure that represents a single frame buffer
 349 *      @area: Structure providing the data to copy the framebuffer contents
 350 *              from one region to another.
 351 *
 352 *      This drawing operation copies a rectangular area from one area of the
 353 *      screen to another area.
 354 */
 355static void cg6_copyarea(struct fb_info *info, const struct fb_copyarea *area)
 356{
 357        struct cg6_par *par = (struct cg6_par *)info->par;
 358        struct cg6_fbc __iomem *fbc = par->fbc;
 359        unsigned long flags;
 360        int i;
 361
 362        spin_lock_irqsave(&par->lock, flags);
 363
 364        cg6_sync(info);
 365
 366        sbus_writel(0xff, &fbc->fg);
 367        sbus_writel(0x00, &fbc->bg);
 368        sbus_writel(~0, &fbc->pixelm);
 369        sbus_writel(0xe880cccc, &fbc->alu);
 370        sbus_writel(0, &fbc->s);
 371        sbus_writel(0, &fbc->clip);
 372
 373        sbus_writel(area->sy, &fbc->y0);
 374        sbus_writel(area->sx, &fbc->x0);
 375        sbus_writel(area->sy + area->height - 1, &fbc->y1);
 376        sbus_writel(area->sx + area->width - 1, &fbc->x1);
 377        sbus_writel(area->dy, &fbc->y2);
 378        sbus_writel(area->dx, &fbc->x2);
 379        sbus_writel(area->dy + area->height - 1, &fbc->y3);
 380        sbus_writel(area->dx + area->width - 1, &fbc->x3);
 381        do {
 382                i = sbus_readl(&fbc->blit);
 383        } while (i < 0 && (i & 0x20000000));
 384        spin_unlock_irqrestore(&par->lock, flags);
 385}
 386
 387/**
 388 *      cg6_imageblit - Copies a image from system memory to the screen.
 389 *
 390 *      @info: frame buffer structure that represents a single frame buffer
 391 *      @image: structure defining the image.
 392 */
 393static void cg6_imageblit(struct fb_info *info, const struct fb_image *image)
 394{
 395        struct cg6_par *par = (struct cg6_par *)info->par;
 396        struct cg6_fbc __iomem *fbc = par->fbc;
 397        const u8 *data = image->data;
 398        unsigned long flags;
 399        u32 x, y;
 400        int i, width;
 401
 402        if (image->depth > 1) {
 403                cfb_imageblit(info, image);
 404                return;
 405        }
 406
 407        spin_lock_irqsave(&par->lock, flags);
 408
 409        cg6_sync(info);
 410
 411        sbus_writel(image->fg_color, &fbc->fg);
 412        sbus_writel(image->bg_color, &fbc->bg);
 413        sbus_writel(0x140000, &fbc->mode);
 414        sbus_writel(0xe880fc30, &fbc->alu);
 415        sbus_writel(~(u32)0, &fbc->pixelm);
 416        sbus_writel(0, &fbc->s);
 417        sbus_writel(0, &fbc->clip);
 418        sbus_writel(0xff, &fbc->pm);
 419        sbus_writel(32, &fbc->incx);
 420        sbus_writel(0, &fbc->incy);
 421
 422        x = image->dx;
 423        y = image->dy;
 424        for (i = 0; i < image->height; i++) {
 425                width = image->width;
 426
 427                while (width >= 32) {
 428                        u32 val;
 429
 430                        sbus_writel(y, &fbc->y0);
 431                        sbus_writel(x, &fbc->x0);
 432                        sbus_writel(x + 32 - 1, &fbc->x1);
 433
 434                        val = ((u32)data[0] << 24) |
 435                              ((u32)data[1] << 16) |
 436                              ((u32)data[2] <<  8) |
 437                              ((u32)data[3] <<  0);
 438                        sbus_writel(val, &fbc->font);
 439
 440                        data += 4;
 441                        x += 32;
 442                        width -= 32;
 443                }
 444                if (width) {
 445                        u32 val;
 446
 447                        sbus_writel(y, &fbc->y0);
 448                        sbus_writel(x, &fbc->x0);
 449                        sbus_writel(x + width - 1, &fbc->x1);
 450                        if (width <= 8) {
 451                                val = (u32) data[0] << 24;
 452                                data += 1;
 453                        } else if (width <= 16) {
 454                                val = ((u32) data[0] << 24) |
 455                                      ((u32) data[1] << 16);
 456                                data += 2;
 457                        } else {
 458                                val = ((u32) data[0] << 24) |
 459                                      ((u32) data[1] << 16) |
 460                                      ((u32) data[2] <<  8);
 461                                data += 3;
 462                        }
 463                        sbus_writel(val, &fbc->font);
 464                }
 465
 466                y += 1;
 467                x = image->dx;
 468        }
 469
 470        spin_unlock_irqrestore(&par->lock, flags);
 471}
 472
 473/**
 474 *      cg6_setcolreg - Sets a color register.
 475 *
 476 *      @regno: boolean, 0 copy local, 1 get_user() function
 477 *      @red: frame buffer colormap structure
 478 *      @green: The green value which can be up to 16 bits wide
 479 *      @blue:  The blue value which can be up to 16 bits wide.
 480 *      @transp: If supported the alpha value which can be up to 16 bits wide.
 481 *      @info: frame buffer info structure
 482 */
 483static int cg6_setcolreg(unsigned regno,
 484                         unsigned red, unsigned green, unsigned blue,
 485                         unsigned transp, struct fb_info *info)
 486{
 487        struct cg6_par *par = (struct cg6_par *)info->par;
 488        struct bt_regs __iomem *bt = par->bt;
 489        unsigned long flags;
 490
 491        if (regno >= 256)
 492                return 1;
 493
 494        red >>= 8;
 495        green >>= 8;
 496        blue >>= 8;
 497
 498        spin_lock_irqsave(&par->lock, flags);
 499
 500        sbus_writel((u32)regno << 24, &bt->addr);
 501        sbus_writel((u32)red << 24, &bt->color_map);
 502        sbus_writel((u32)green << 24, &bt->color_map);
 503        sbus_writel((u32)blue << 24, &bt->color_map);
 504
 505        spin_unlock_irqrestore(&par->lock, flags);
 506
 507        return 0;
 508}
 509
 510/**
 511 *      cg6_blank - Blanks the display.
 512 *
 513 *      @blank_mode: the blank mode we want.
 514 *      @info: frame buffer structure that represents a single frame buffer
 515 */
 516static int cg6_blank(int blank, struct fb_info *info)
 517{
 518        struct cg6_par *par = (struct cg6_par *)info->par;
 519        struct cg6_thc __iomem *thc = par->thc;
 520        unsigned long flags;
 521        u32 val;
 522
 523        spin_lock_irqsave(&par->lock, flags);
 524        val = sbus_readl(&thc->thc_misc);
 525
 526        switch (blank) {
 527        case FB_BLANK_UNBLANK: /* Unblanking */
 528                val |= CG6_THC_MISC_VIDEO;
 529                par->flags &= ~CG6_FLAG_BLANKED;
 530                break;
 531
 532        case FB_BLANK_NORMAL: /* Normal blanking */
 533        case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */
 534        case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */
 535        case FB_BLANK_POWERDOWN: /* Poweroff */
 536                val &= ~CG6_THC_MISC_VIDEO;
 537                par->flags |= CG6_FLAG_BLANKED;
 538                break;
 539        }
 540
 541        sbus_writel(val, &thc->thc_misc);
 542        spin_unlock_irqrestore(&par->lock, flags);
 543
 544        return 0;
 545}
 546
 547static struct sbus_mmap_map cg6_mmap_map[] = {
 548        {
 549                .voff   = CG6_FBC,
 550                .poff   = CG6_FBC_OFFSET,
 551                .size   = PAGE_SIZE
 552        },
 553        {
 554                .voff   = CG6_TEC,
 555                .poff   = CG6_TEC_OFFSET,
 556                .size   = PAGE_SIZE
 557        },
 558        {
 559                .voff   = CG6_BTREGS,
 560                .poff   = CG6_BROOKTREE_OFFSET,
 561                .size   = PAGE_SIZE
 562        },
 563        {
 564                .voff   = CG6_FHC,
 565                .poff   = CG6_FHC_OFFSET,
 566                .size   = PAGE_SIZE
 567        },
 568        {
 569                .voff   = CG6_THC,
 570                .poff   = CG6_THC_OFFSET,
 571                .size   = PAGE_SIZE
 572        },
 573        {
 574                .voff   = CG6_ROM,
 575                .poff   = CG6_ROM_OFFSET,
 576                .size   = 0x10000
 577        },
 578        {
 579                .voff   = CG6_RAM,
 580                .poff   = CG6_RAM_OFFSET,
 581                .size   = SBUS_MMAP_FBSIZE(1)
 582        },
 583        {
 584                .voff   = CG6_DHC,
 585                .poff   = CG6_DHC_OFFSET,
 586                .size   = 0x40000
 587        },
 588        { .size = 0 }
 589};
 590
 591static int cg6_mmap(struct fb_info *info, struct vm_area_struct *vma)
 592{
 593        struct cg6_par *par = (struct cg6_par *)info->par;
 594
 595        return sbusfb_mmap_helper(cg6_mmap_map,
 596                                  info->fix.smem_start, info->fix.smem_len,
 597                                  par->which_io, vma);
 598}
 599
 600static int cg6_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
 601{
 602        return sbusfb_ioctl_helper(cmd, arg, info,
 603                                   FBTYPE_SUNFAST_COLOR, 8, info->fix.smem_len);
 604}
 605
 606/*
 607 *  Initialisation
 608 */
 609
 610static void cg6_init_fix(struct fb_info *info, int linebytes)
 611{
 612        struct cg6_par *par = (struct cg6_par *)info->par;
 613        const char *cg6_cpu_name, *cg6_card_name;
 614        u32 conf;
 615
 616        conf = sbus_readl(par->fhc);
 617        switch (conf & CG6_FHC_CPU_MASK) {
 618        case CG6_FHC_CPU_SPARC:
 619                cg6_cpu_name = "sparc";
 620                break;
 621        case CG6_FHC_CPU_68020:
 622                cg6_cpu_name = "68020";
 623                break;
 624        default:
 625                cg6_cpu_name = "i386";
 626                break;
 627        };
 628        if (((conf >> CG6_FHC_REV_SHIFT) & CG6_FHC_REV_MASK) >= 11) {
 629                if (info->fix.smem_len <= 0x100000)
 630                        cg6_card_name = "TGX";
 631                else
 632                        cg6_card_name = "TGX+";
 633        } else {
 634                if (info->fix.smem_len <= 0x100000)
 635                        cg6_card_name = "GX";
 636                else
 637                        cg6_card_name = "GX+";
 638        }
 639
 640        sprintf(info->fix.id, "%s %s", cg6_card_name, cg6_cpu_name);
 641        info->fix.id[sizeof(info->fix.id) - 1] = 0;
 642
 643        info->fix.type = FB_TYPE_PACKED_PIXELS;
 644        info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
 645
 646        info->fix.line_length = linebytes;
 647
 648        info->fix.accel = FB_ACCEL_SUN_CGSIX;
 649}
 650
 651/* Initialize Brooktree DAC */
 652static void cg6_bt_init(struct cg6_par *par)
 653{
 654        struct bt_regs __iomem *bt = par->bt;
 655
 656        sbus_writel(0x04 << 24, &bt->addr);      /* color planes */
 657        sbus_writel(0xff << 24, &bt->control);
 658        sbus_writel(0x05 << 24, &bt->addr);
 659        sbus_writel(0x00 << 24, &bt->control);
 660        sbus_writel(0x06 << 24, &bt->addr);      /* overlay plane */
 661        sbus_writel(0x73 << 24, &bt->control);
 662        sbus_writel(0x07 << 24, &bt->addr);
 663        sbus_writel(0x00 << 24, &bt->control);
 664}
 665
 666static void cg6_chip_init(struct fb_info *info)
 667{
 668        struct cg6_par *par = (struct cg6_par *)info->par;
 669        struct cg6_tec __iomem *tec = par->tec;
 670        struct cg6_fbc __iomem *fbc = par->fbc;
 671        struct cg6_thc __iomem *thc = par->thc;
 672        u32 rev, conf, mode;
 673        int i;
 674
 675        /* Hide the cursor. */
 676        sbus_writel(CG6_THC_CURSOFF, &thc->thc_cursxy);
 677
 678        /* Turn off stuff in the Transform Engine. */
 679        sbus_writel(0, &tec->tec_matrix);
 680        sbus_writel(0, &tec->tec_clip);
 681        sbus_writel(0, &tec->tec_vdc);
 682
 683        /* Take care of bugs in old revisions. */
 684        rev = (sbus_readl(par->fhc) >> CG6_FHC_REV_SHIFT) & CG6_FHC_REV_MASK;
 685        if (rev < 5) {
 686                conf = (sbus_readl(par->fhc) & CG6_FHC_RES_MASK) |
 687                        CG6_FHC_CPU_68020 | CG6_FHC_TEST |
 688                        (11 << CG6_FHC_TEST_X_SHIFT) |
 689                        (11 << CG6_FHC_TEST_Y_SHIFT);
 690                if (rev < 2)
 691                        conf |= CG6_FHC_DST_DISABLE;
 692                sbus_writel(conf, par->fhc);
 693        }
 694
 695        /* Set things in the FBC. Bad things appear to happen if we do
 696         * back to back store/loads on the mode register, so copy it
 697         * out instead. */
 698        mode = sbus_readl(&fbc->mode);
 699        do {
 700                i = sbus_readl(&fbc->s);
 701        } while (i & 0x10000000);
 702        mode &= ~(CG6_FBC_BLIT_MASK | CG6_FBC_MODE_MASK |
 703                  CG6_FBC_DRAW_MASK | CG6_FBC_BWRITE0_MASK |
 704                  CG6_FBC_BWRITE1_MASK | CG6_FBC_BREAD_MASK |
 705                  CG6_FBC_BDISP_MASK);
 706        mode |= (CG6_FBC_BLIT_SRC | CG6_FBC_MODE_COLOR8 |
 707                 CG6_FBC_DRAW_RENDER | CG6_FBC_BWRITE0_ENABLE |
 708                 CG6_FBC_BWRITE1_DISABLE | CG6_FBC_BREAD_0 |
 709                 CG6_FBC_BDISP_0);
 710        sbus_writel(mode, &fbc->mode);
 711
 712        sbus_writel(0, &fbc->clip);
 713        sbus_writel(0, &fbc->offx);
 714        sbus_writel(0, &fbc->offy);
 715        sbus_writel(0, &fbc->clipminx);
 716        sbus_writel(0, &fbc->clipminy);
 717        sbus_writel(info->var.xres - 1, &fbc->clipmaxx);
 718        sbus_writel(info->var.yres - 1, &fbc->clipmaxy);
 719}
 720
 721static void cg6_unmap_regs(struct platform_device *op, struct fb_info *info,
 722                           struct cg6_par *par)
 723{
 724        if (par->fbc)
 725                of_iounmap(&op->resource[0], par->fbc, 4096);
 726        if (par->tec)
 727                of_iounmap(&op->resource[0], par->tec, sizeof(struct cg6_tec));
 728        if (par->thc)
 729                of_iounmap(&op->resource[0], par->thc, sizeof(struct cg6_thc));
 730        if (par->bt)
 731                of_iounmap(&op->resource[0], par->bt, sizeof(struct bt_regs));
 732        if (par->fhc)
 733                of_iounmap(&op->resource[0], par->fhc, sizeof(u32));
 734
 735        if (info->screen_base)
 736                of_iounmap(&op->resource[0], info->screen_base,
 737                           info->fix.smem_len);
 738}
 739
 740static int cg6_probe(struct platform_device *op)
 741{
 742        struct device_node *dp = op->dev.of_node;
 743        struct fb_info *info;
 744        struct cg6_par *par;
 745        int linebytes, err;
 746        int dblbuf;
 747
 748        info = framebuffer_alloc(sizeof(struct cg6_par), &op->dev);
 749
 750        err = -ENOMEM;
 751        if (!info)
 752                goto out_err;
 753        par = info->par;
 754
 755        spin_lock_init(&par->lock);
 756
 757        info->fix.smem_start = op->resource[0].start;
 758        par->which_io = op->resource[0].flags & IORESOURCE_BITS;
 759
 760        sbusfb_fill_var(&info->var, dp, 8);
 761        info->var.red.length = 8;
 762        info->var.green.length = 8;
 763        info->var.blue.length = 8;
 764
 765        linebytes = of_getintprop_default(dp, "linebytes",
 766                                          info->var.xres);
 767        info->fix.smem_len = PAGE_ALIGN(linebytes * info->var.yres);
 768
 769        dblbuf = of_getintprop_default(dp, "dblbuf", 0);
 770        if (dblbuf)
 771                info->fix.smem_len *= 4;
 772
 773        par->fbc = of_ioremap(&op->resource[0], CG6_FBC_OFFSET,
 774                                4096, "cgsix fbc");
 775        par->tec = of_ioremap(&op->resource[0], CG6_TEC_OFFSET,
 776                                sizeof(struct cg6_tec), "cgsix tec");
 777        par->thc = of_ioremap(&op->resource[0], CG6_THC_OFFSET,
 778                                sizeof(struct cg6_thc), "cgsix thc");
 779        par->bt = of_ioremap(&op->resource[0], CG6_BROOKTREE_OFFSET,
 780                                sizeof(struct bt_regs), "cgsix dac");
 781        par->fhc = of_ioremap(&op->resource[0], CG6_FHC_OFFSET,
 782                                sizeof(u32), "cgsix fhc");
 783
 784        info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_IMAGEBLIT |
 785                        FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT |
 786                        FBINFO_READS_FAST;
 787        info->fbops = &cg6_ops;
 788
 789        info->screen_base = of_ioremap(&op->resource[0], CG6_RAM_OFFSET,
 790                                        info->fix.smem_len, "cgsix ram");
 791        if (!par->fbc || !par->tec || !par->thc ||
 792            !par->bt || !par->fhc || !info->screen_base)
 793                goto out_unmap_regs;
 794
 795        info->var.accel_flags = FB_ACCELF_TEXT;
 796
 797        cg6_bt_init(par);
 798        cg6_chip_init(info);
 799        cg6_blank(FB_BLANK_UNBLANK, info);
 800
 801        if (fb_alloc_cmap(&info->cmap, 256, 0))
 802                goto out_unmap_regs;
 803
 804        fb_set_cmap(&info->cmap, info);
 805        cg6_init_fix(info, linebytes);
 806
 807        err = register_framebuffer(info);
 808        if (err < 0)
 809                goto out_dealloc_cmap;
 810
 811        dev_set_drvdata(&op->dev, info);
 812
 813        printk(KERN_INFO "%s: CGsix [%s] at %lx:%lx\n",
 814               dp->full_name, info->fix.id,
 815               par->which_io, info->fix.smem_start);
 816
 817        return 0;
 818
 819out_dealloc_cmap:
 820        fb_dealloc_cmap(&info->cmap);
 821
 822out_unmap_regs:
 823        cg6_unmap_regs(op, info, par);
 824        framebuffer_release(info);
 825
 826out_err:
 827        return err;
 828}
 829
 830static int cg6_remove(struct platform_device *op)
 831{
 832        struct fb_info *info = dev_get_drvdata(&op->dev);
 833        struct cg6_par *par = info->par;
 834
 835        unregister_framebuffer(info);
 836        fb_dealloc_cmap(&info->cmap);
 837
 838        cg6_unmap_regs(op, info, par);
 839
 840        framebuffer_release(info);
 841
 842        dev_set_drvdata(&op->dev, NULL);
 843
 844        return 0;
 845}
 846
 847static const struct of_device_id cg6_match[] = {
 848        {
 849                .name = "cgsix",
 850        },
 851        {
 852                .name = "cgthree+",
 853        },
 854        {},
 855};
 856MODULE_DEVICE_TABLE(of, cg6_match);
 857
 858static struct platform_driver cg6_driver = {
 859        .driver = {
 860                .name = "cg6",
 861                .owner = THIS_MODULE,
 862                .of_match_table = cg6_match,
 863        },
 864        .probe          = cg6_probe,
 865        .remove         = cg6_remove,
 866};
 867
 868static int __init cg6_init(void)
 869{
 870        if (fb_get_options("cg6fb", NULL))
 871                return -ENODEV;
 872
 873        return platform_driver_register(&cg6_driver);
 874}
 875
 876static void __exit cg6_exit(void)
 877{
 878        platform_driver_unregister(&cg6_driver);
 879}
 880
 881module_init(cg6_init);
 882module_exit(cg6_exit);
 883
 884MODULE_DESCRIPTION("framebuffer driver for CGsix chipsets");
 885MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
 886MODULE_VERSION("2.0");
 887MODULE_LICENSE("GPL");
 888
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