linux/drivers/rtc/rtc-stmp3xxx.c
<<
>>
Prefs
   1/*
   2 * Freescale STMP37XX/STMP378X Real Time Clock driver
   3 *
   4 * Copyright (c) 2007 Sigmatel, Inc.
   5 * Peter Hartley, <peter.hartley@sigmatel.com>
   6 *
   7 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
   8 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
   9 * Copyright 2011 Wolfram Sang, Pengutronix e.K.
  10 */
  11
  12/*
  13 * The code contained herein is licensed under the GNU General Public
  14 * License. You may obtain a copy of the GNU General Public License
  15 * Version 2 or later at the following locations:
  16 *
  17 * http://www.opensource.org/licenses/gpl-license.html
  18 * http://www.gnu.org/copyleft/gpl.html
  19 */
  20#include <linux/kernel.h>
  21#include <linux/module.h>
  22#include <linux/io.h>
  23#include <linux/init.h>
  24#include <linux/platform_device.h>
  25#include <linux/interrupt.h>
  26#include <linux/delay.h>
  27#include <linux/rtc.h>
  28#include <linux/slab.h>
  29#include <linux/of_device.h>
  30#include <linux/of.h>
  31#include <linux/stmp_device.h>
  32#include <linux/stmp3xxx_rtc_wdt.h>
  33
  34#define STMP3XXX_RTC_CTRL                       0x0
  35#define STMP3XXX_RTC_CTRL_SET                   0x4
  36#define STMP3XXX_RTC_CTRL_CLR                   0x8
  37#define STMP3XXX_RTC_CTRL_ALARM_IRQ_EN          0x00000001
  38#define STMP3XXX_RTC_CTRL_ONEMSEC_IRQ_EN        0x00000002
  39#define STMP3XXX_RTC_CTRL_ALARM_IRQ             0x00000004
  40#define STMP3XXX_RTC_CTRL_WATCHDOGEN            0x00000010
  41
  42#define STMP3XXX_RTC_STAT                       0x10
  43#define STMP3XXX_RTC_STAT_STALE_SHIFT           16
  44#define STMP3XXX_RTC_STAT_RTC_PRESENT           0x80000000
  45
  46#define STMP3XXX_RTC_SECONDS                    0x30
  47
  48#define STMP3XXX_RTC_ALARM                      0x40
  49
  50#define STMP3XXX_RTC_WATCHDOG                   0x50
  51
  52#define STMP3XXX_RTC_PERSISTENT0                0x60
  53#define STMP3XXX_RTC_PERSISTENT0_SET            0x64
  54#define STMP3XXX_RTC_PERSISTENT0_CLR            0x68
  55#define STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN  0x00000002
  56#define STMP3XXX_RTC_PERSISTENT0_ALARM_EN       0x00000004
  57#define STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE     0x00000080
  58
  59#define STMP3XXX_RTC_PERSISTENT1                0x70
  60/* missing bitmask in headers */
  61#define STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER  0x80000000
  62
  63struct stmp3xxx_rtc_data {
  64        struct rtc_device *rtc;
  65        void __iomem *io;
  66        int irq_alarm;
  67};
  68
  69#if IS_ENABLED(CONFIG_STMP3XXX_RTC_WATCHDOG)
  70/**
  71 * stmp3xxx_wdt_set_timeout - configure the watchdog inside the STMP3xxx RTC
  72 * @dev: the parent device of the watchdog (= the RTC)
  73 * @timeout: the desired value for the timeout register of the watchdog.
  74 *           0 disables the watchdog
  75 *
  76 * The watchdog needs one register and two bits which are in the RTC domain.
  77 * To handle the resource conflict, the RTC driver will create another
  78 * platform_device for the watchdog driver as a child of the RTC device.
  79 * The watchdog driver is passed the below accessor function via platform_data
  80 * to configure the watchdog. Locking is not needed because accessing SET/CLR
  81 * registers is atomic.
  82 */
  83
  84static void stmp3xxx_wdt_set_timeout(struct device *dev, u32 timeout)
  85{
  86        struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
  87
  88        if (timeout) {
  89                writel(timeout, rtc_data->io + STMP3XXX_RTC_WATCHDOG);
  90                writel(STMP3XXX_RTC_CTRL_WATCHDOGEN,
  91                       rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_SET);
  92                writel(STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER,
  93                       rtc_data->io + STMP3XXX_RTC_PERSISTENT1 + STMP_OFFSET_REG_SET);
  94        } else {
  95                writel(STMP3XXX_RTC_CTRL_WATCHDOGEN,
  96                       rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_CLR);
  97                writel(STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER,
  98                       rtc_data->io + STMP3XXX_RTC_PERSISTENT1 + STMP_OFFSET_REG_CLR);
  99        }
 100}
 101
 102static struct stmp3xxx_wdt_pdata wdt_pdata = {
 103        .wdt_set_timeout = stmp3xxx_wdt_set_timeout,
 104};
 105
 106static void stmp3xxx_wdt_register(struct platform_device *rtc_pdev)
 107{
 108        struct platform_device *wdt_pdev =
 109                platform_device_alloc("stmp3xxx_rtc_wdt", rtc_pdev->id);
 110
 111        if (wdt_pdev) {
 112                wdt_pdev->dev.parent = &rtc_pdev->dev;
 113                wdt_pdev->dev.platform_data = &wdt_pdata;
 114                platform_device_add(wdt_pdev);
 115        }
 116}
 117#else
 118static void stmp3xxx_wdt_register(struct platform_device *rtc_pdev)
 119{
 120}
 121#endif /* CONFIG_STMP3XXX_RTC_WATCHDOG */
 122
 123static int stmp3xxx_wait_time(struct stmp3xxx_rtc_data *rtc_data)
 124{
 125        int timeout = 5000; /* 3ms according to i.MX28 Ref Manual */
 126        /*
 127         * The i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
 128         * states:
 129         * | The order in which registers are updated is
 130         * | Persistent 0, 1, 2, 3, 4, 5, Alarm, Seconds.
 131         * | (This list is in bitfield order, from LSB to MSB, as they would
 132         * | appear in the STALE_REGS and NEW_REGS bitfields of the HW_RTC_STAT
 133         * | register. For example, the Seconds register corresponds to
 134         * | STALE_REGS or NEW_REGS containing 0x80.)
 135         */
 136        do {
 137                if (!(readl(rtc_data->io + STMP3XXX_RTC_STAT) &
 138                                (0x80 << STMP3XXX_RTC_STAT_STALE_SHIFT)))
 139                        return 0;
 140                udelay(1);
 141        } while (--timeout > 0);
 142        return (readl(rtc_data->io + STMP3XXX_RTC_STAT) &
 143                (0x80 << STMP3XXX_RTC_STAT_STALE_SHIFT)) ? -ETIME : 0;
 144}
 145
 146/* Time read/write */
 147static int stmp3xxx_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
 148{
 149        int ret;
 150        struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
 151
 152        ret = stmp3xxx_wait_time(rtc_data);
 153        if (ret)
 154                return ret;
 155
 156        rtc_time_to_tm(readl(rtc_data->io + STMP3XXX_RTC_SECONDS), rtc_tm);
 157        return 0;
 158}
 159
 160static int stmp3xxx_rtc_set_mmss(struct device *dev, unsigned long t)
 161{
 162        struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
 163
 164        writel(t, rtc_data->io + STMP3XXX_RTC_SECONDS);
 165        return stmp3xxx_wait_time(rtc_data);
 166}
 167
 168/* interrupt(s) handler */
 169static irqreturn_t stmp3xxx_rtc_interrupt(int irq, void *dev_id)
 170{
 171        struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev_id);
 172        u32 status = readl(rtc_data->io + STMP3XXX_RTC_CTRL);
 173
 174        if (status & STMP3XXX_RTC_CTRL_ALARM_IRQ) {
 175                writel(STMP3XXX_RTC_CTRL_ALARM_IRQ,
 176                                rtc_data->io + STMP3XXX_RTC_CTRL_CLR);
 177                rtc_update_irq(rtc_data->rtc, 1, RTC_AF | RTC_IRQF);
 178                return IRQ_HANDLED;
 179        }
 180
 181        return IRQ_NONE;
 182}
 183
 184static int stmp3xxx_alarm_irq_enable(struct device *dev, unsigned int enabled)
 185{
 186        struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
 187
 188        if (enabled) {
 189                writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
 190                                STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN,
 191                                rtc_data->io + STMP3XXX_RTC_PERSISTENT0_SET);
 192                writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
 193                                rtc_data->io + STMP3XXX_RTC_CTRL_SET);
 194        } else {
 195                writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
 196                                STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN,
 197                                rtc_data->io + STMP3XXX_RTC_PERSISTENT0_CLR);
 198                writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
 199                                rtc_data->io + STMP3XXX_RTC_CTRL_CLR);
 200        }
 201        return 0;
 202}
 203
 204static int stmp3xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
 205{
 206        struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
 207
 208        rtc_time_to_tm(readl(rtc_data->io + STMP3XXX_RTC_ALARM), &alm->time);
 209        return 0;
 210}
 211
 212static int stmp3xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
 213{
 214        unsigned long t;
 215        struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
 216
 217        rtc_tm_to_time(&alm->time, &t);
 218        writel(t, rtc_data->io + STMP3XXX_RTC_ALARM);
 219
 220        stmp3xxx_alarm_irq_enable(dev, alm->enabled);
 221
 222        return 0;
 223}
 224
 225static struct rtc_class_ops stmp3xxx_rtc_ops = {
 226        .alarm_irq_enable =
 227                          stmp3xxx_alarm_irq_enable,
 228        .read_time      = stmp3xxx_rtc_gettime,
 229        .set_mmss       = stmp3xxx_rtc_set_mmss,
 230        .read_alarm     = stmp3xxx_rtc_read_alarm,
 231        .set_alarm      = stmp3xxx_rtc_set_alarm,
 232};
 233
 234static int stmp3xxx_rtc_remove(struct platform_device *pdev)
 235{
 236        struct stmp3xxx_rtc_data *rtc_data = platform_get_drvdata(pdev);
 237
 238        if (!rtc_data)
 239                return 0;
 240
 241        writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
 242                        rtc_data->io + STMP3XXX_RTC_CTRL_CLR);
 243
 244        return 0;
 245}
 246
 247static int stmp3xxx_rtc_probe(struct platform_device *pdev)
 248{
 249        struct stmp3xxx_rtc_data *rtc_data;
 250        struct resource *r;
 251        int err;
 252
 253        rtc_data = devm_kzalloc(&pdev->dev, sizeof(*rtc_data), GFP_KERNEL);
 254        if (!rtc_data)
 255                return -ENOMEM;
 256
 257        r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 258        if (!r) {
 259                dev_err(&pdev->dev, "failed to get resource\n");
 260                return -ENXIO;
 261        }
 262
 263        rtc_data->io = devm_ioremap(&pdev->dev, r->start, resource_size(r));
 264        if (!rtc_data->io) {
 265                dev_err(&pdev->dev, "ioremap failed\n");
 266                return -EIO;
 267        }
 268
 269        rtc_data->irq_alarm = platform_get_irq(pdev, 0);
 270
 271        if (!(readl(STMP3XXX_RTC_STAT + rtc_data->io) &
 272                        STMP3XXX_RTC_STAT_RTC_PRESENT)) {
 273                dev_err(&pdev->dev, "no device onboard\n");
 274                return -ENODEV;
 275        }
 276
 277        platform_set_drvdata(pdev, rtc_data);
 278
 279        err = stmp_reset_block(rtc_data->io);
 280        if (err) {
 281                dev_err(&pdev->dev, "stmp_reset_block failed: %d\n", err);
 282                return err;
 283        }
 284
 285        writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
 286                        STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN |
 287                        STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE,
 288                        rtc_data->io + STMP3XXX_RTC_PERSISTENT0_CLR);
 289
 290        writel(STMP3XXX_RTC_CTRL_ONEMSEC_IRQ_EN |
 291                        STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
 292                        rtc_data->io + STMP3XXX_RTC_CTRL_CLR);
 293
 294        rtc_data->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
 295                                &stmp3xxx_rtc_ops, THIS_MODULE);
 296        if (IS_ERR(rtc_data->rtc))
 297                return PTR_ERR(rtc_data->rtc);
 298
 299        err = devm_request_irq(&pdev->dev, rtc_data->irq_alarm,
 300                        stmp3xxx_rtc_interrupt, 0, "RTC alarm", &pdev->dev);
 301        if (err) {
 302                dev_err(&pdev->dev, "Cannot claim IRQ%d\n",
 303                        rtc_data->irq_alarm);
 304                return err;
 305        }
 306
 307        stmp3xxx_wdt_register(pdev);
 308        return 0;
 309}
 310
 311#ifdef CONFIG_PM_SLEEP
 312static int stmp3xxx_rtc_suspend(struct device *dev)
 313{
 314        return 0;
 315}
 316
 317static int stmp3xxx_rtc_resume(struct device *dev)
 318{
 319        struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
 320
 321        stmp_reset_block(rtc_data->io);
 322        writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
 323                        STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN |
 324                        STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE,
 325                        rtc_data->io + STMP3XXX_RTC_PERSISTENT0_CLR);
 326        return 0;
 327}
 328#endif
 329
 330static SIMPLE_DEV_PM_OPS(stmp3xxx_rtc_pm_ops, stmp3xxx_rtc_suspend,
 331                        stmp3xxx_rtc_resume);
 332
 333static const struct of_device_id rtc_dt_ids[] = {
 334        { .compatible = "fsl,stmp3xxx-rtc", },
 335        { /* sentinel */ }
 336};
 337MODULE_DEVICE_TABLE(of, rtc_dt_ids);
 338
 339static struct platform_driver stmp3xxx_rtcdrv = {
 340        .probe          = stmp3xxx_rtc_probe,
 341        .remove         = stmp3xxx_rtc_remove,
 342        .driver         = {
 343                .name   = "stmp3xxx-rtc",
 344                .owner  = THIS_MODULE,
 345                .pm     = &stmp3xxx_rtc_pm_ops,
 346                .of_match_table = of_match_ptr(rtc_dt_ids),
 347        },
 348};
 349
 350module_platform_driver(stmp3xxx_rtcdrv);
 351
 352MODULE_DESCRIPTION("STMP3xxx RTC Driver");
 353MODULE_AUTHOR("dmitry pervushin <dpervushin@embeddedalley.com> and "
 354                "Wolfram Sang <w.sang@pengutronix.de>");
 355MODULE_LICENSE("GPL");
 356
lxr.linux.no kindly hosted by Redpill Linpro AS, provider of Linux consulting and operations services since 1995.