linux/drivers/regulator/ab8500.c
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   1/*
   2 * Copyright (C) ST-Ericsson SA 2010
   3 *
   4 * License Terms: GNU General Public License v2
   5 *
   6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
   7 *          Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
   8 *          Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
   9 *
  10 * AB8500 peripheral regulators
  11 *
  12 * AB8500 supports the following regulators:
  13 *   VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  14 *
  15 * AB8505 supports the following regulators:
  16 *   VAUX1/2/3/4/5/6, VINTCORE, VADC, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  17 */
  18#include <linux/init.h>
  19#include <linux/kernel.h>
  20#include <linux/module.h>
  21#include <linux/err.h>
  22#include <linux/platform_device.h>
  23#include <linux/mfd/abx500.h>
  24#include <linux/mfd/abx500/ab8500.h>
  25#include <linux/of.h>
  26#include <linux/regulator/of_regulator.h>
  27#include <linux/regulator/driver.h>
  28#include <linux/regulator/machine.h>
  29#include <linux/regulator/ab8500.h>
  30#include <linux/slab.h>
  31
  32/**
  33 * struct ab8500_shared_mode - is used when mode is shared between
  34 * two regulators.
  35 * @shared_regulator: pointer to the other sharing regulator
  36 * @lp_mode_req: low power mode requested by this regulator
  37 */
  38struct ab8500_shared_mode {
  39        struct ab8500_regulator_info *shared_regulator;
  40        bool lp_mode_req;
  41};
  42
  43/**
  44 * struct ab8500_regulator_info - ab8500 regulator information
  45 * @dev: device pointer
  46 * @desc: regulator description
  47 * @regulator_dev: regulator device
  48 * @shared_mode: used when mode is shared between two regulators
  49 * @load_lp_uA: maximum load in idle (low power) mode
  50 * @update_bank: bank to control on/off
  51 * @update_reg: register to control on/off
  52 * @update_mask: mask to enable/disable and set mode of regulator
  53 * @update_val: bits holding the regulator current mode
  54 * @update_val_idle: bits to enable the regulator in idle (low power) mode
  55 * @update_val_normal: bits to enable the regulator in normal (high power) mode
  56 * @mode_bank: bank with location of mode register
  57 * @mode_reg: mode register
  58 * @mode_mask: mask for setting mode
  59 * @mode_val_idle: mode setting for low power
  60 * @mode_val_normal: mode setting for normal power
  61 * @voltage_bank: bank to control regulator voltage
  62 * @voltage_reg: register to control regulator voltage
  63 * @voltage_mask: mask to control regulator voltage
  64 */
  65struct ab8500_regulator_info {
  66        struct device           *dev;
  67        struct regulator_desc   desc;
  68        struct regulator_dev    *regulator;
  69        struct ab8500_shared_mode *shared_mode;
  70        int load_lp_uA;
  71        u8 update_bank;
  72        u8 update_reg;
  73        u8 update_mask;
  74        u8 update_val;
  75        u8 update_val_idle;
  76        u8 update_val_normal;
  77        u8 mode_bank;
  78        u8 mode_reg;
  79        u8 mode_mask;
  80        u8 mode_val_idle;
  81        u8 mode_val_normal;
  82        u8 voltage_bank;
  83        u8 voltage_reg;
  84        u8 voltage_mask;
  85        struct {
  86                u8 voltage_limit;
  87                u8 voltage_bank;
  88                u8 voltage_reg;
  89                u8 voltage_mask;
  90        } expand_register;
  91};
  92
  93/* voltage tables for the vauxn/vintcore supplies */
  94static const unsigned int ldo_vauxn_voltages[] = {
  95        1100000,
  96        1200000,
  97        1300000,
  98        1400000,
  99        1500000,
 100        1800000,
 101        1850000,
 102        1900000,
 103        2500000,
 104        2650000,
 105        2700000,
 106        2750000,
 107        2800000,
 108        2900000,
 109        3000000,
 110        3300000,
 111};
 112
 113static const unsigned int ldo_vaux3_voltages[] = {
 114        1200000,
 115        1500000,
 116        1800000,
 117        2100000,
 118        2500000,
 119        2750000,
 120        2790000,
 121        2910000,
 122};
 123
 124static const unsigned int ldo_vaux56_voltages[] = {
 125        1800000,
 126        1050000,
 127        1100000,
 128        1200000,
 129        1500000,
 130        2200000,
 131        2500000,
 132        2790000,
 133};
 134
 135static const unsigned int ldo_vaux3_ab8540_voltages[] = {
 136        1200000,
 137        1500000,
 138        1800000,
 139        2100000,
 140        2500000,
 141        2750000,
 142        2790000,
 143        2910000,
 144        3050000,
 145};
 146
 147static const unsigned int ldo_vaux56_ab8540_voltages[] = {
 148        750000, 760000, 770000, 780000, 790000, 800000,
 149        810000, 820000, 830000, 840000, 850000, 860000,
 150        870000, 880000, 890000, 900000, 910000, 920000,
 151        930000, 940000, 950000, 960000, 970000, 980000,
 152        990000, 1000000, 1010000, 1020000, 1030000,
 153        1040000, 1050000, 1060000, 1070000, 1080000,
 154        1090000, 1100000, 1110000, 1120000, 1130000,
 155        1140000, 1150000, 1160000, 1170000, 1180000,
 156        1190000, 1200000, 1210000, 1220000, 1230000,
 157        1240000, 1250000, 1260000, 1270000, 1280000,
 158        1290000, 1300000, 1310000, 1320000, 1330000,
 159        1340000, 1350000, 1360000, 1800000, 2790000,
 160};
 161
 162static const unsigned int ldo_vintcore_voltages[] = {
 163        1200000,
 164        1225000,
 165        1250000,
 166        1275000,
 167        1300000,
 168        1325000,
 169        1350000,
 170};
 171
 172static const unsigned int ldo_sdio_voltages[] = {
 173        1160000,
 174        1050000,
 175        1100000,
 176        1500000,
 177        1800000,
 178        2200000,
 179        2910000,
 180        3050000,
 181};
 182
 183static const unsigned int fixed_1200000_voltage[] = {
 184        1200000,
 185};
 186
 187static const unsigned int fixed_1800000_voltage[] = {
 188        1800000,
 189};
 190
 191static const unsigned int fixed_2000000_voltage[] = {
 192        2000000,
 193};
 194
 195static const unsigned int fixed_2050000_voltage[] = {
 196        2050000,
 197};
 198
 199static const unsigned int fixed_3300000_voltage[] = {
 200        3300000,
 201};
 202
 203static const unsigned int ldo_vana_voltages[] = {
 204        1050000,
 205        1075000,
 206        1100000,
 207        1125000,
 208        1150000,
 209        1175000,
 210        1200000,
 211        1225000,
 212};
 213
 214static const unsigned int ldo_vaudio_voltages[] = {
 215        2000000,
 216        2100000,
 217        2200000,
 218        2300000,
 219        2400000,
 220        2500000,
 221        2600000,
 222        2600000,        /* Duplicated in Vaudio and IsoUicc Control register. */
 223};
 224
 225static const unsigned int ldo_vdmic_voltages[] = {
 226        1800000,
 227        1900000,
 228        2000000,
 229        2850000,
 230};
 231
 232static DEFINE_MUTEX(shared_mode_mutex);
 233static struct ab8500_shared_mode ldo_anamic1_shared;
 234static struct ab8500_shared_mode ldo_anamic2_shared;
 235static struct ab8500_shared_mode ab8540_ldo_anamic1_shared;
 236static struct ab8500_shared_mode ab8540_ldo_anamic2_shared;
 237
 238static int ab8500_regulator_enable(struct regulator_dev *rdev)
 239{
 240        int ret;
 241        struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 242
 243        if (info == NULL) {
 244                dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 245                return -EINVAL;
 246        }
 247
 248        ret = abx500_mask_and_set_register_interruptible(info->dev,
 249                info->update_bank, info->update_reg,
 250                info->update_mask, info->update_val);
 251        if (ret < 0) {
 252                dev_err(rdev_get_dev(rdev),
 253                        "couldn't set enable bits for regulator\n");
 254                return ret;
 255        }
 256
 257        dev_vdbg(rdev_get_dev(rdev),
 258                "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 259                info->desc.name, info->update_bank, info->update_reg,
 260                info->update_mask, info->update_val);
 261
 262        return ret;
 263}
 264
 265static int ab8500_regulator_disable(struct regulator_dev *rdev)
 266{
 267        int ret;
 268        struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 269
 270        if (info == NULL) {
 271                dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 272                return -EINVAL;
 273        }
 274
 275        ret = abx500_mask_and_set_register_interruptible(info->dev,
 276                info->update_bank, info->update_reg,
 277                info->update_mask, 0x0);
 278        if (ret < 0) {
 279                dev_err(rdev_get_dev(rdev),
 280                        "couldn't set disable bits for regulator\n");
 281                return ret;
 282        }
 283
 284        dev_vdbg(rdev_get_dev(rdev),
 285                "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 286                info->desc.name, info->update_bank, info->update_reg,
 287                info->update_mask, 0x0);
 288
 289        return ret;
 290}
 291
 292static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
 293{
 294        int ret;
 295        struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 296        u8 regval;
 297
 298        if (info == NULL) {
 299                dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 300                return -EINVAL;
 301        }
 302
 303        ret = abx500_get_register_interruptible(info->dev,
 304                info->update_bank, info->update_reg, &regval);
 305        if (ret < 0) {
 306                dev_err(rdev_get_dev(rdev),
 307                        "couldn't read 0x%x register\n", info->update_reg);
 308                return ret;
 309        }
 310
 311        dev_vdbg(rdev_get_dev(rdev),
 312                "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 313                " 0x%x\n",
 314                info->desc.name, info->update_bank, info->update_reg,
 315                info->update_mask, regval);
 316
 317        if (regval & info->update_mask)
 318                return 1;
 319        else
 320                return 0;
 321}
 322
 323static unsigned int ab8500_regulator_get_optimum_mode(
 324                struct regulator_dev *rdev, int input_uV,
 325                int output_uV, int load_uA)
 326{
 327        unsigned int mode;
 328
 329        struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 330
 331        if (info == NULL) {
 332                dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 333                return -EINVAL;
 334        }
 335
 336        if (load_uA <= info->load_lp_uA)
 337                mode = REGULATOR_MODE_IDLE;
 338        else
 339                mode = REGULATOR_MODE_NORMAL;
 340
 341        return mode;
 342}
 343
 344static int ab8500_regulator_set_mode(struct regulator_dev *rdev,
 345                                     unsigned int mode)
 346{
 347        int ret = 0;
 348        u8 bank, reg, mask, val;
 349        bool lp_mode_req = false;
 350        struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 351
 352        if (info == NULL) {
 353                dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 354                return -EINVAL;
 355        }
 356
 357        if (info->mode_mask) {
 358                bank = info->mode_bank;
 359                reg = info->mode_reg;
 360                mask = info->mode_mask;
 361        } else {
 362                bank = info->update_bank;
 363                reg = info->update_reg;
 364                mask = info->update_mask;
 365        }
 366
 367        if (info->shared_mode)
 368                mutex_lock(&shared_mode_mutex);
 369
 370        switch (mode) {
 371        case REGULATOR_MODE_NORMAL:
 372                if (info->shared_mode)
 373                        lp_mode_req = false;
 374
 375                if (info->mode_mask)
 376                        val = info->mode_val_normal;
 377                else
 378                        val = info->update_val_normal;
 379                break;
 380        case REGULATOR_MODE_IDLE:
 381                if (info->shared_mode) {
 382                        struct ab8500_regulator_info *shared_regulator;
 383
 384                        shared_regulator = info->shared_mode->shared_regulator;
 385                        if (!shared_regulator->shared_mode->lp_mode_req) {
 386                                /* Other regulator prevent LP mode */
 387                                info->shared_mode->lp_mode_req = true;
 388                                goto out_unlock;
 389                        }
 390
 391                        lp_mode_req = true;
 392                }
 393
 394                if (info->mode_mask)
 395                        val = info->mode_val_idle;
 396                else
 397                        val = info->update_val_idle;
 398                break;
 399        default:
 400                ret = -EINVAL;
 401                goto out_unlock;
 402        }
 403
 404        if (info->mode_mask || ab8500_regulator_is_enabled(rdev)) {
 405                ret = abx500_mask_and_set_register_interruptible(info->dev,
 406                        bank, reg, mask, val);
 407                if (ret < 0) {
 408                        dev_err(rdev_get_dev(rdev),
 409                                "couldn't set regulator mode\n");
 410                        goto out_unlock;
 411                }
 412
 413                dev_vdbg(rdev_get_dev(rdev),
 414                        "%s-set_mode (bank, reg, mask, value): "
 415                        "0x%x, 0x%x, 0x%x, 0x%x\n",
 416                        info->desc.name, bank, reg,
 417                        mask, val);
 418        }
 419
 420        if (!info->mode_mask)
 421                info->update_val = val;
 422
 423        if (info->shared_mode)
 424                info->shared_mode->lp_mode_req = lp_mode_req;
 425
 426out_unlock:
 427        if (info->shared_mode)
 428                mutex_unlock(&shared_mode_mutex);
 429
 430        return ret;
 431}
 432
 433static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev)
 434{
 435        struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 436        int ret;
 437        u8 val;
 438        u8 val_normal;
 439        u8 val_idle;
 440
 441        if (info == NULL) {
 442                dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 443                return -EINVAL;
 444        }
 445
 446        /* Need special handling for shared mode */
 447        if (info->shared_mode) {
 448                if (info->shared_mode->lp_mode_req)
 449                        return REGULATOR_MODE_IDLE;
 450                else
 451                        return REGULATOR_MODE_NORMAL;
 452        }
 453
 454        if (info->mode_mask) {
 455                /* Dedicated register for handling mode */
 456                ret = abx500_get_register_interruptible(info->dev,
 457                info->mode_bank, info->mode_reg, &val);
 458                val = val & info->mode_mask;
 459
 460                val_normal = info->mode_val_normal;
 461                val_idle = info->mode_val_idle;
 462        } else {
 463                /* Mode register same as enable register */
 464                val = info->update_val;
 465                val_normal = info->update_val_normal;
 466                val_idle = info->update_val_idle;
 467        }
 468
 469        if (val == val_normal)
 470                ret = REGULATOR_MODE_NORMAL;
 471        else if (val == val_idle)
 472                ret = REGULATOR_MODE_IDLE;
 473        else
 474                ret = -EINVAL;
 475
 476        return ret;
 477}
 478
 479static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
 480{
 481        int ret, voltage_shift;
 482        struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 483        u8 regval;
 484
 485        if (info == NULL) {
 486                dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 487                return -EINVAL;
 488        }
 489
 490        voltage_shift = ffs(info->voltage_mask) - 1;
 491
 492        ret = abx500_get_register_interruptible(info->dev,
 493                        info->voltage_bank, info->voltage_reg, &regval);
 494        if (ret < 0) {
 495                dev_err(rdev_get_dev(rdev),
 496                        "couldn't read voltage reg for regulator\n");
 497                return ret;
 498        }
 499
 500        dev_vdbg(rdev_get_dev(rdev),
 501                "%s-get_voltage (bank, reg, mask, shift, value): "
 502                "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
 503                info->desc.name, info->voltage_bank,
 504                info->voltage_reg, info->voltage_mask,
 505                voltage_shift, regval);
 506
 507        return (regval & info->voltage_mask) >> voltage_shift;
 508}
 509
 510static int ab8540_aux3_regulator_get_voltage_sel(struct regulator_dev *rdev)
 511{
 512        int ret, voltage_shift;
 513        struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 514        u8 regval, regval_expand;
 515
 516        if (info == NULL) {
 517                dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 518                return -EINVAL;
 519        }
 520
 521        ret = abx500_get_register_interruptible(info->dev,
 522                        info->expand_register.voltage_bank,
 523                        info->expand_register.voltage_reg, &regval_expand);
 524        if (ret < 0) {
 525                dev_err(rdev_get_dev(rdev),
 526                        "couldn't read voltage expand reg for regulator\n");
 527                return ret;
 528        }
 529
 530        dev_vdbg(rdev_get_dev(rdev),
 531                 "%s-get_voltage expand (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 532                 info->desc.name, info->expand_register.voltage_bank,
 533                 info->expand_register.voltage_reg,
 534                 info->expand_register.voltage_mask, regval_expand);
 535
 536        if (regval_expand & info->expand_register.voltage_mask)
 537                return info->expand_register.voltage_limit;
 538
 539        ret = abx500_get_register_interruptible(info->dev,
 540                        info->voltage_bank, info->voltage_reg, &regval);
 541        if (ret < 0) {
 542                dev_err(rdev_get_dev(rdev),
 543                        "couldn't read voltage reg for regulator\n");
 544                return ret;
 545        }
 546
 547        dev_vdbg(rdev_get_dev(rdev),
 548                 "%s-get_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 549                 info->desc.name, info->voltage_bank, info->voltage_reg,
 550                 info->voltage_mask, regval);
 551
 552        voltage_shift = ffs(info->voltage_mask) - 1;
 553
 554        return (regval & info->voltage_mask) >> voltage_shift;
 555}
 556
 557static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
 558                                            unsigned selector)
 559{
 560        int ret, voltage_shift;
 561        struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 562        u8 regval;
 563
 564        if (info == NULL) {
 565                dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 566                return -EINVAL;
 567        }
 568
 569        voltage_shift = ffs(info->voltage_mask) - 1;
 570
 571        /* set the registers for the request */
 572        regval = (u8)selector << voltage_shift;
 573        ret = abx500_mask_and_set_register_interruptible(info->dev,
 574                        info->voltage_bank, info->voltage_reg,
 575                        info->voltage_mask, regval);
 576        if (ret < 0)
 577                dev_err(rdev_get_dev(rdev),
 578                "couldn't set voltage reg for regulator\n");
 579
 580        dev_vdbg(rdev_get_dev(rdev),
 581                "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 582                " 0x%x\n",
 583                info->desc.name, info->voltage_bank, info->voltage_reg,
 584                info->voltage_mask, regval);
 585
 586        return ret;
 587}
 588
 589static int ab8540_aux3_regulator_set_voltage_sel(struct regulator_dev *rdev,
 590                                                unsigned selector)
 591{
 592        int ret;
 593        struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 594        u8 regval, regval_expand;
 595
 596        if (info == NULL) {
 597                dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 598                return -EINVAL;
 599        }
 600
 601        if (selector < info->expand_register.voltage_limit) {
 602                int voltage_shift = ffs(info->voltage_mask) - 1;
 603
 604                regval = (u8)selector << voltage_shift;
 605                ret = abx500_mask_and_set_register_interruptible(info->dev,
 606                                        info->voltage_bank, info->voltage_reg,
 607                                        info->voltage_mask, regval);
 608                if (ret < 0) {
 609                        dev_err(rdev_get_dev(rdev),
 610                                "couldn't set voltage reg for regulator\n");
 611                        return ret;
 612                }
 613
 614                dev_vdbg(rdev_get_dev(rdev),
 615                         "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 616                         info->desc.name, info->voltage_bank, info->voltage_reg,
 617                         info->voltage_mask, regval);
 618
 619                regval_expand = 0;
 620        } else {
 621                regval_expand = info->expand_register.voltage_mask;
 622        }
 623
 624        ret = abx500_mask_and_set_register_interruptible(info->dev,
 625                                info->expand_register.voltage_bank,
 626                                info->expand_register.voltage_reg,
 627                                info->expand_register.voltage_mask,
 628                                regval_expand);
 629        if (ret < 0) {
 630                dev_err(rdev_get_dev(rdev),
 631                        "couldn't set expand voltage reg for regulator\n");
 632                return ret;
 633        }
 634
 635        dev_vdbg(rdev_get_dev(rdev),
 636                 "%s-set_voltage expand (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 637                 info->desc.name, info->expand_register.voltage_bank,
 638                 info->expand_register.voltage_reg,
 639                 info->expand_register.voltage_mask, regval_expand);
 640
 641        return 0;
 642}
 643
 644static struct regulator_ops ab8500_regulator_volt_mode_ops = {
 645        .enable                 = ab8500_regulator_enable,
 646        .disable                = ab8500_regulator_disable,
 647        .is_enabled             = ab8500_regulator_is_enabled,
 648        .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 649        .set_mode               = ab8500_regulator_set_mode,
 650        .get_mode               = ab8500_regulator_get_mode,
 651        .get_voltage_sel        = ab8500_regulator_get_voltage_sel,
 652        .set_voltage_sel        = ab8500_regulator_set_voltage_sel,
 653        .list_voltage           = regulator_list_voltage_table,
 654};
 655
 656static struct regulator_ops ab8540_aux3_regulator_volt_mode_ops = {
 657        .enable         = ab8500_regulator_enable,
 658        .disable        = ab8500_regulator_disable,
 659        .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 660        .set_mode       = ab8500_regulator_set_mode,
 661        .get_mode       = ab8500_regulator_get_mode,
 662        .is_enabled     = ab8500_regulator_is_enabled,
 663        .get_voltage_sel = ab8540_aux3_regulator_get_voltage_sel,
 664        .set_voltage_sel = ab8540_aux3_regulator_set_voltage_sel,
 665        .list_voltage   = regulator_list_voltage_table,
 666};
 667
 668static struct regulator_ops ab8500_regulator_volt_ops = {
 669        .enable         = ab8500_regulator_enable,
 670        .disable        = ab8500_regulator_disable,
 671        .is_enabled     = ab8500_regulator_is_enabled,
 672        .get_voltage_sel = ab8500_regulator_get_voltage_sel,
 673        .set_voltage_sel = ab8500_regulator_set_voltage_sel,
 674        .list_voltage   = regulator_list_voltage_table,
 675};
 676
 677static struct regulator_ops ab8500_regulator_mode_ops = {
 678        .enable                 = ab8500_regulator_enable,
 679        .disable                = ab8500_regulator_disable,
 680        .is_enabled             = ab8500_regulator_is_enabled,
 681        .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 682        .set_mode               = ab8500_regulator_set_mode,
 683        .get_mode               = ab8500_regulator_get_mode,
 684        .list_voltage           = regulator_list_voltage_table,
 685};
 686
 687static struct regulator_ops ab8500_regulator_ops = {
 688        .enable                 = ab8500_regulator_enable,
 689        .disable                = ab8500_regulator_disable,
 690        .is_enabled             = ab8500_regulator_is_enabled,
 691        .list_voltage           = regulator_list_voltage_table,
 692};
 693
 694static struct regulator_ops ab8500_regulator_anamic_mode_ops = {
 695        .enable         = ab8500_regulator_enable,
 696        .disable        = ab8500_regulator_disable,
 697        .is_enabled     = ab8500_regulator_is_enabled,
 698        .set_mode       = ab8500_regulator_set_mode,
 699        .get_mode       = ab8500_regulator_get_mode,
 700        .list_voltage   = regulator_list_voltage_table,
 701};
 702
 703/* AB8500 regulator information */
 704static struct ab8500_regulator_info
 705                ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
 706        /*
 707         * Variable Voltage Regulators
 708         *   name, min mV, max mV,
 709         *   update bank, reg, mask, enable val
 710         *   volt bank, reg, mask
 711         */
 712        [AB8500_LDO_AUX1] = {
 713                .desc = {
 714                        .name           = "LDO-AUX1",
 715                        .ops            = &ab8500_regulator_volt_mode_ops,
 716                        .type           = REGULATOR_VOLTAGE,
 717                        .id             = AB8500_LDO_AUX1,
 718                        .owner          = THIS_MODULE,
 719                        .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 720                        .volt_table     = ldo_vauxn_voltages,
 721                        .enable_time    = 200,
 722                        .supply_name    = "vin",
 723                },
 724                .load_lp_uA             = 5000,
 725                .update_bank            = 0x04,
 726                .update_reg             = 0x09,
 727                .update_mask            = 0x03,
 728                .update_val             = 0x01,
 729                .update_val_idle        = 0x03,
 730                .update_val_normal      = 0x01,
 731                .voltage_bank           = 0x04,
 732                .voltage_reg            = 0x1f,
 733                .voltage_mask           = 0x0f,
 734        },
 735        [AB8500_LDO_AUX2] = {
 736                .desc = {
 737                        .name           = "LDO-AUX2",
 738                        .ops            = &ab8500_regulator_volt_mode_ops,
 739                        .type           = REGULATOR_VOLTAGE,
 740                        .id             = AB8500_LDO_AUX2,
 741                        .owner          = THIS_MODULE,
 742                        .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 743                        .volt_table     = ldo_vauxn_voltages,
 744                        .enable_time    = 200,
 745                        .supply_name    = "vin",
 746                },
 747                .load_lp_uA             = 5000,
 748                .update_bank            = 0x04,
 749                .update_reg             = 0x09,
 750                .update_mask            = 0x0c,
 751                .update_val             = 0x04,
 752                .update_val_idle        = 0x0c,
 753                .update_val_normal      = 0x04,
 754                .voltage_bank           = 0x04,
 755                .voltage_reg            = 0x20,
 756                .voltage_mask           = 0x0f,
 757        },
 758        [AB8500_LDO_AUX3] = {
 759                .desc = {
 760                        .name           = "LDO-AUX3",
 761                        .ops            = &ab8500_regulator_volt_mode_ops,
 762                        .type           = REGULATOR_VOLTAGE,
 763                        .id             = AB8500_LDO_AUX3,
 764                        .owner          = THIS_MODULE,
 765                        .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
 766                        .volt_table     = ldo_vaux3_voltages,
 767                        .enable_time    = 450,
 768                        .supply_name    = "vin",
 769                },
 770                .load_lp_uA             = 5000,
 771                .update_bank            = 0x04,
 772                .update_reg             = 0x0a,
 773                .update_mask            = 0x03,
 774                .update_val             = 0x01,
 775                .update_val_idle        = 0x03,
 776                .update_val_normal      = 0x01,
 777                .voltage_bank           = 0x04,
 778                .voltage_reg            = 0x21,
 779                .voltage_mask           = 0x07,
 780        },
 781        [AB8500_LDO_INTCORE] = {
 782                .desc = {
 783                        .name           = "LDO-INTCORE",
 784                        .ops            = &ab8500_regulator_volt_mode_ops,
 785                        .type           = REGULATOR_VOLTAGE,
 786                        .id             = AB8500_LDO_INTCORE,
 787                        .owner          = THIS_MODULE,
 788                        .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
 789                        .volt_table     = ldo_vintcore_voltages,
 790                        .enable_time    = 750,
 791                },
 792                .load_lp_uA             = 5000,
 793                .update_bank            = 0x03,
 794                .update_reg             = 0x80,
 795                .update_mask            = 0x44,
 796                .update_val             = 0x44,
 797                .update_val_idle        = 0x44,
 798                .update_val_normal      = 0x04,
 799                .voltage_bank           = 0x03,
 800                .voltage_reg            = 0x80,
 801                .voltage_mask           = 0x38,
 802        },
 803
 804        /*
 805         * Fixed Voltage Regulators
 806         *   name, fixed mV,
 807         *   update bank, reg, mask, enable val
 808         */
 809        [AB8500_LDO_TVOUT] = {
 810                .desc = {
 811                        .name           = "LDO-TVOUT",
 812                        .ops            = &ab8500_regulator_mode_ops,
 813                        .type           = REGULATOR_VOLTAGE,
 814                        .id             = AB8500_LDO_TVOUT,
 815                        .owner          = THIS_MODULE,
 816                        .n_voltages     = 1,
 817                        .volt_table     = fixed_2000000_voltage,
 818                        .enable_time    = 500,
 819                },
 820                .load_lp_uA             = 1000,
 821                .update_bank            = 0x03,
 822                .update_reg             = 0x80,
 823                .update_mask            = 0x82,
 824                .update_val             = 0x02,
 825                .update_val_idle        = 0x82,
 826                .update_val_normal      = 0x02,
 827        },
 828        [AB8500_LDO_AUDIO] = {
 829                .desc = {
 830                        .name           = "LDO-AUDIO",
 831                        .ops            = &ab8500_regulator_ops,
 832                        .type           = REGULATOR_VOLTAGE,
 833                        .id             = AB8500_LDO_AUDIO,
 834                        .owner          = THIS_MODULE,
 835                        .n_voltages     = 1,
 836                        .enable_time    = 140,
 837                        .volt_table     = fixed_2000000_voltage,
 838                },
 839                .update_bank            = 0x03,
 840                .update_reg             = 0x83,
 841                .update_mask            = 0x02,
 842                .update_val             = 0x02,
 843        },
 844        [AB8500_LDO_ANAMIC1] = {
 845                .desc = {
 846                        .name           = "LDO-ANAMIC1",
 847                        .ops            = &ab8500_regulator_ops,
 848                        .type           = REGULATOR_VOLTAGE,
 849                        .id             = AB8500_LDO_ANAMIC1,
 850                        .owner          = THIS_MODULE,
 851                        .n_voltages     = 1,
 852                        .enable_time    = 500,
 853                        .volt_table     = fixed_2050000_voltage,
 854                },
 855                .update_bank            = 0x03,
 856                .update_reg             = 0x83,
 857                .update_mask            = 0x08,
 858                .update_val             = 0x08,
 859        },
 860        [AB8500_LDO_ANAMIC2] = {
 861                .desc = {
 862                        .name           = "LDO-ANAMIC2",
 863                        .ops            = &ab8500_regulator_ops,
 864                        .type           = REGULATOR_VOLTAGE,
 865                        .id             = AB8500_LDO_ANAMIC2,
 866                        .owner          = THIS_MODULE,
 867                        .n_voltages     = 1,
 868                        .enable_time    = 500,
 869                        .volt_table     = fixed_2050000_voltage,
 870                },
 871                .update_bank            = 0x03,
 872                .update_reg             = 0x83,
 873                .update_mask            = 0x10,
 874                .update_val             = 0x10,
 875        },
 876        [AB8500_LDO_DMIC] = {
 877                .desc = {
 878                        .name           = "LDO-DMIC",
 879                        .ops            = &ab8500_regulator_ops,
 880                        .type           = REGULATOR_VOLTAGE,
 881                        .id             = AB8500_LDO_DMIC,
 882                        .owner          = THIS_MODULE,
 883                        .n_voltages     = 1,
 884                        .enable_time    = 420,
 885                        .volt_table     = fixed_1800000_voltage,
 886                },
 887                .update_bank            = 0x03,
 888                .update_reg             = 0x83,
 889                .update_mask            = 0x04,
 890                .update_val             = 0x04,
 891        },
 892
 893        /*
 894         * Regulators with fixed voltage and normal/idle modes
 895         */
 896        [AB8500_LDO_ANA] = {
 897                .desc = {
 898                        .name           = "LDO-ANA",
 899                        .ops            = &ab8500_regulator_mode_ops,
 900                        .type           = REGULATOR_VOLTAGE,
 901                        .id             = AB8500_LDO_ANA,
 902                        .owner          = THIS_MODULE,
 903                        .n_voltages     = 1,
 904                        .enable_time    = 140,
 905                        .volt_table     = fixed_1200000_voltage,
 906                },
 907                .load_lp_uA             = 1000,
 908                .update_bank            = 0x04,
 909                .update_reg             = 0x06,
 910                .update_mask            = 0x0c,
 911                .update_val             = 0x04,
 912                .update_val_idle        = 0x0c,
 913                .update_val_normal      = 0x04,
 914        },
 915};
 916
 917/* AB8505 regulator information */
 918static struct ab8500_regulator_info
 919                ab8505_regulator_info[AB8505_NUM_REGULATORS] = {
 920        /*
 921         * Variable Voltage Regulators
 922         *   name, min mV, max mV,
 923         *   update bank, reg, mask, enable val
 924         *   volt bank, reg, mask
 925         */
 926        [AB8505_LDO_AUX1] = {
 927                .desc = {
 928                        .name           = "LDO-AUX1",
 929                        .ops            = &ab8500_regulator_volt_mode_ops,
 930                        .type           = REGULATOR_VOLTAGE,
 931                        .id             = AB8505_LDO_AUX1,
 932                        .owner          = THIS_MODULE,
 933                        .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 934                        .volt_table     = ldo_vauxn_voltages,
 935                },
 936                .load_lp_uA             = 5000,
 937                .update_bank            = 0x04,
 938                .update_reg             = 0x09,
 939                .update_mask            = 0x03,
 940                .update_val             = 0x01,
 941                .update_val_idle        = 0x03,
 942                .update_val_normal      = 0x01,
 943                .voltage_bank           = 0x04,
 944                .voltage_reg            = 0x1f,
 945                .voltage_mask           = 0x0f,
 946        },
 947        [AB8505_LDO_AUX2] = {
 948                .desc = {
 949                        .name           = "LDO-AUX2",
 950                        .ops            = &ab8500_regulator_volt_mode_ops,
 951                        .type           = REGULATOR_VOLTAGE,
 952                        .id             = AB8505_LDO_AUX2,
 953                        .owner          = THIS_MODULE,
 954                        .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 955                        .volt_table     = ldo_vauxn_voltages,
 956                },
 957                .load_lp_uA             = 5000,
 958                .update_bank            = 0x04,
 959                .update_reg             = 0x09,
 960                .update_mask            = 0x0c,
 961                .update_val             = 0x04,
 962                .update_val_idle        = 0x0c,
 963                .update_val_normal      = 0x04,
 964                .voltage_bank           = 0x04,
 965                .voltage_reg            = 0x20,
 966                .voltage_mask           = 0x0f,
 967        },
 968        [AB8505_LDO_AUX3] = {
 969                .desc = {
 970                        .name           = "LDO-AUX3",
 971                        .ops            = &ab8500_regulator_volt_mode_ops,
 972                        .type           = REGULATOR_VOLTAGE,
 973                        .id             = AB8505_LDO_AUX3,
 974                        .owner          = THIS_MODULE,
 975                        .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
 976                        .volt_table     = ldo_vaux3_voltages,
 977                },
 978                .load_lp_uA             = 5000,
 979                .update_bank            = 0x04,
 980                .update_reg             = 0x0a,
 981                .update_mask            = 0x03,
 982                .update_val             = 0x01,
 983                .update_val_idle        = 0x03,
 984                .update_val_normal      = 0x01,
 985                .voltage_bank           = 0x04,
 986                .voltage_reg            = 0x21,
 987                .voltage_mask           = 0x07,
 988        },
 989        [AB8505_LDO_AUX4] = {
 990                .desc = {
 991                        .name           = "LDO-AUX4",
 992                        .ops            = &ab8500_regulator_volt_mode_ops,
 993                        .type           = REGULATOR_VOLTAGE,
 994                        .id             = AB8505_LDO_AUX4,
 995                        .owner          = THIS_MODULE,
 996                        .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 997                        .volt_table     = ldo_vauxn_voltages,
 998                },
 999                .load_lp_uA             = 5000,
1000                /* values for Vaux4Regu register */
1001                .update_bank            = 0x04,
1002                .update_reg             = 0x2e,
1003                .update_mask            = 0x03,
1004                .update_val             = 0x01,
1005                .update_val_idle        = 0x03,
1006                .update_val_normal      = 0x01,
1007                /* values for Vaux4SEL register */
1008                .voltage_bank           = 0x04,
1009                .voltage_reg            = 0x2f,
1010                .voltage_mask           = 0x0f,
1011        },
1012        [AB8505_LDO_AUX5] = {
1013                .desc = {
1014                        .name           = "LDO-AUX5",
1015                        .ops            = &ab8500_regulator_volt_mode_ops,
1016                        .type           = REGULATOR_VOLTAGE,
1017                        .id             = AB8505_LDO_AUX5,
1018                        .owner          = THIS_MODULE,
1019                        .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
1020                        .volt_table     = ldo_vaux56_voltages,
1021                },
1022                .load_lp_uA             = 2000,
1023                /* values for CtrlVaux5 register */
1024                .update_bank            = 0x01,
1025                .update_reg             = 0x55,
1026                .update_mask            = 0x18,
1027                .update_val             = 0x10,
1028                .update_val_idle        = 0x18,
1029                .update_val_normal      = 0x10,
1030                .voltage_bank           = 0x01,
1031                .voltage_reg            = 0x55,
1032                .voltage_mask           = 0x07,
1033        },
1034        [AB8505_LDO_AUX6] = {
1035                .desc = {
1036                        .name           = "LDO-AUX6",
1037                        .ops            = &ab8500_regulator_volt_mode_ops,
1038                        .type           = REGULATOR_VOLTAGE,
1039                        .id             = AB8505_LDO_AUX6,
1040                        .owner          = THIS_MODULE,
1041                        .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
1042                        .volt_table     = ldo_vaux56_voltages,
1043                },
1044                .load_lp_uA             = 2000,
1045                /* values for CtrlVaux6 register */
1046                .update_bank            = 0x01,
1047                .update_reg             = 0x56,
1048                .update_mask            = 0x18,
1049                .update_val             = 0x10,
1050                .update_val_idle        = 0x18,
1051                .update_val_normal      = 0x10,
1052                .voltage_bank           = 0x01,
1053                .voltage_reg            = 0x56,
1054                .voltage_mask           = 0x07,
1055        },
1056        [AB8505_LDO_INTCORE] = {
1057                .desc = {
1058                        .name           = "LDO-INTCORE",
1059                        .ops            = &ab8500_regulator_volt_mode_ops,
1060                        .type           = REGULATOR_VOLTAGE,
1061                        .id             = AB8505_LDO_INTCORE,
1062                        .owner          = THIS_MODULE,
1063                        .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
1064                        .volt_table     = ldo_vintcore_voltages,
1065                },
1066                .load_lp_uA             = 5000,
1067                .update_bank            = 0x03,
1068                .update_reg             = 0x80,
1069                .update_mask            = 0x44,
1070                .update_val             = 0x04,
1071                .update_val_idle        = 0x44,
1072                .update_val_normal      = 0x04,
1073                .voltage_bank           = 0x03,
1074                .voltage_reg            = 0x80,
1075                .voltage_mask           = 0x38,
1076        },
1077
1078        /*
1079         * Fixed Voltage Regulators
1080         *   name, fixed mV,
1081         *   update bank, reg, mask, enable val
1082         */
1083        [AB8505_LDO_ADC] = {
1084                .desc = {
1085                        .name           = "LDO-ADC",
1086                        .ops            = &ab8500_regulator_mode_ops,
1087                        .type           = REGULATOR_VOLTAGE,
1088                        .id             = AB8505_LDO_ADC,
1089                        .owner          = THIS_MODULE,
1090                        .n_voltages     = 1,
1091                        .volt_table     = fixed_2000000_voltage,
1092                        .enable_time    = 10000,
1093                },
1094                .load_lp_uA             = 1000,
1095                .update_bank            = 0x03,
1096                .update_reg             = 0x80,
1097                .update_mask            = 0x82,
1098                .update_val             = 0x02,
1099                .update_val_idle        = 0x82,
1100                .update_val_normal      = 0x02,
1101        },
1102        [AB8505_LDO_USB] = {
1103                .desc = {
1104                        .name           = "LDO-USB",
1105                        .ops            = &ab8500_regulator_mode_ops,
1106                        .type           = REGULATOR_VOLTAGE,
1107                        .id             = AB8505_LDO_USB,
1108                        .owner          = THIS_MODULE,
1109                        .n_voltages     = 1,
1110                        .volt_table     = fixed_3300000_voltage,
1111                },
1112                .update_bank            = 0x03,
1113                .update_reg             = 0x82,
1114                .update_mask            = 0x03,
1115                .update_val             = 0x01,
1116                .update_val_idle        = 0x03,
1117                .update_val_normal      = 0x01,
1118        },
1119        [AB8505_LDO_AUDIO] = {
1120                .desc = {
1121                        .name           = "LDO-AUDIO",
1122                        .ops            = &ab8500_regulator_volt_ops,
1123                        .type           = REGULATOR_VOLTAGE,
1124                        .id             = AB8505_LDO_AUDIO,
1125                        .owner          = THIS_MODULE,
1126                        .n_voltages     = ARRAY_SIZE(ldo_vaudio_voltages),
1127                        .volt_table     = ldo_vaudio_voltages,
1128                },
1129                .update_bank            = 0x03,
1130                .update_reg             = 0x83,
1131                .update_mask            = 0x02,
1132                .update_val             = 0x02,
1133                .voltage_bank           = 0x01,
1134                .voltage_reg            = 0x57,
1135                .voltage_mask           = 0x70,
1136        },
1137        [AB8505_LDO_ANAMIC1] = {
1138                .desc = {
1139                        .name           = "LDO-ANAMIC1",
1140                        .ops            = &ab8500_regulator_anamic_mode_ops,
1141                        .type           = REGULATOR_VOLTAGE,
1142                        .id             = AB8505_LDO_ANAMIC1,
1143                        .owner          = THIS_MODULE,
1144                        .n_voltages     = 1,
1145                        .volt_table     = fixed_2050000_voltage,
1146                },
1147                .shared_mode            = &ldo_anamic1_shared,
1148                .update_bank            = 0x03,
1149                .update_reg             = 0x83,
1150                .update_mask            = 0x08,
1151                .update_val             = 0x08,
1152                .mode_bank              = 0x01,
1153                .mode_reg               = 0x54,
1154                .mode_mask              = 0x04,
1155                .mode_val_idle          = 0x04,
1156                .mode_val_normal        = 0x00,
1157        },
1158        [AB8505_LDO_ANAMIC2] = {
1159                .desc = {
1160                        .name           = "LDO-ANAMIC2",
1161                        .ops            = &ab8500_regulator_anamic_mode_ops,
1162                        .type           = REGULATOR_VOLTAGE,
1163                        .id             = AB8505_LDO_ANAMIC2,
1164                        .owner          = THIS_MODULE,
1165                        .n_voltages     = 1,
1166                        .volt_table     = fixed_2050000_voltage,
1167                },
1168                .shared_mode            = &ldo_anamic2_shared,
1169                .update_bank            = 0x03,
1170                .update_reg             = 0x83,
1171                .update_mask            = 0x10,
1172                .update_val             = 0x10,
1173                .mode_bank              = 0x01,
1174                .mode_reg               = 0x54,
1175                .mode_mask              = 0x04,
1176                .mode_val_idle          = 0x04,
1177                .mode_val_normal        = 0x00,
1178        },
1179        [AB8505_LDO_AUX8] = {
1180                .desc = {
1181                        .name           = "LDO-AUX8",
1182                        .ops            = &ab8500_regulator_ops,
1183                        .type           = REGULATOR_VOLTAGE,
1184                        .id             = AB8505_LDO_AUX8,
1185                        .owner          = THIS_MODULE,
1186                        .n_voltages     = 1,
1187                        .volt_table     = fixed_1800000_voltage,
1188                },
1189                .update_bank            = 0x03,
1190                .update_reg             = 0x83,
1191                .update_mask            = 0x04,
1192                .update_val             = 0x04,
1193        },
1194        /*
1195         * Regulators with fixed voltage and normal/idle modes
1196         */
1197        [AB8505_LDO_ANA] = {
1198                .desc = {
1199                        .name           = "LDO-ANA",
1200                        .ops            = &ab8500_regulator_volt_mode_ops,
1201                        .type           = REGULATOR_VOLTAGE,
1202                        .id             = AB8505_LDO_ANA,
1203                        .owner          = THIS_MODULE,
1204                        .n_voltages     = ARRAY_SIZE(ldo_vana_voltages),
1205                        .volt_table     = ldo_vana_voltages,
1206                },
1207                .load_lp_uA             = 1000,
1208                .update_bank            = 0x04,
1209                .update_reg             = 0x06,
1210                .update_mask            = 0x0c,
1211                .update_val             = 0x04,
1212                .update_val_idle        = 0x0c,
1213                .update_val_normal      = 0x04,
1214                .voltage_bank           = 0x04,
1215                .voltage_reg            = 0x29,
1216                .voltage_mask           = 0x7,
1217        },
1218};
1219
1220/* AB9540 regulator information */
1221static struct ab8500_regulator_info
1222                ab9540_regulator_info[AB9540_NUM_REGULATORS] = {
1223        /*
1224         * Variable Voltage Regulators
1225         *   name, min mV, max mV,
1226         *   update bank, reg, mask, enable val
1227         *   volt bank, reg, mask
1228         */
1229        [AB9540_LDO_AUX1] = {
1230                .desc = {
1231                        .name           = "LDO-AUX1",
1232                        .ops            = &ab8500_regulator_volt_mode_ops,
1233                        .type           = REGULATOR_VOLTAGE,
1234                        .id             = AB9540_LDO_AUX1,
1235                        .owner          = THIS_MODULE,
1236                        .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1237                        .volt_table     = ldo_vauxn_voltages,
1238                },
1239                .load_lp_uA             = 5000,
1240                .update_bank            = 0x04,
1241                .update_reg             = 0x09,
1242                .update_mask            = 0x03,
1243                .update_val             = 0x01,
1244                .update_val_idle        = 0x03,
1245                .update_val_normal      = 0x01,
1246                .voltage_bank           = 0x04,
1247                .voltage_reg            = 0x1f,
1248                .voltage_mask           = 0x0f,
1249        },
1250        [AB9540_LDO_AUX2] = {
1251                .desc = {
1252                        .name           = "LDO-AUX2",
1253                        .ops            = &ab8500_regulator_volt_mode_ops,
1254                        .type           = REGULATOR_VOLTAGE,
1255                        .id             = AB9540_LDO_AUX2,
1256                        .owner          = THIS_MODULE,
1257                        .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1258                        .volt_table     = ldo_vauxn_voltages,
1259                },
1260                .load_lp_uA             = 5000,
1261                .update_bank            = 0x04,
1262                .update_reg             = 0x09,
1263                .update_mask            = 0x0c,
1264                .update_val             = 0x04,
1265                .update_val_idle        = 0x0c,
1266                .update_val_normal      = 0x04,
1267                .voltage_bank           = 0x04,
1268                .voltage_reg            = 0x20,
1269                .voltage_mask           = 0x0f,
1270        },
1271        [AB9540_LDO_AUX3] = {
1272                .desc = {
1273                        .name           = "LDO-AUX3",
1274                        .ops            = &ab8500_regulator_volt_mode_ops,
1275                        .type           = REGULATOR_VOLTAGE,
1276                        .id             = AB9540_LDO_AUX3,
1277                        .owner          = THIS_MODULE,
1278                        .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
1279                        .volt_table     = ldo_vaux3_voltages,
1280                },
1281                .load_lp_uA             = 5000,
1282                .update_bank            = 0x04,
1283                .update_reg             = 0x0a,
1284                .update_mask            = 0x03,
1285                .update_val             = 0x01,
1286                .update_val_idle        = 0x03,
1287                .update_val_normal      = 0x01,
1288                .voltage_bank           = 0x04,
1289                .voltage_reg            = 0x21,
1290                .voltage_mask           = 0x07,
1291        },
1292        [AB9540_LDO_AUX4] = {
1293                .desc = {
1294                        .name           = "LDO-AUX4",
1295                        .ops            = &ab8500_regulator_volt_mode_ops,
1296                        .type           = REGULATOR_VOLTAGE,
1297                        .id             = AB9540_LDO_AUX4,
1298                        .owner          = THIS_MODULE,
1299                        .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1300                        .volt_table     = ldo_vauxn_voltages,
1301                },
1302                .load_lp_uA             = 5000,
1303                /* values for Vaux4Regu register */
1304                .update_bank            = 0x04,
1305                .update_reg             = 0x2e,
1306                .update_mask            = 0x03,
1307                .update_val             = 0x01,
1308                .update_val_idle        = 0x03,
1309                .update_val_normal      = 0x01,
1310                /* values for Vaux4SEL register */
1311                .voltage_bank           = 0x04,
1312                .voltage_reg            = 0x2f,
1313                .voltage_mask           = 0x0f,
1314        },
1315        [AB9540_LDO_INTCORE] = {
1316                .desc = {
1317                        .name           = "LDO-INTCORE",
1318                        .ops            = &ab8500_regulator_volt_mode_ops,
1319                        .type           = REGULATOR_VOLTAGE,
1320                        .id             = AB9540_LDO_INTCORE,
1321                        .owner          = THIS_MODULE,
1322                        .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
1323                        .volt_table     = ldo_vintcore_voltages,
1324                },
1325                .load_lp_uA             = 5000,
1326                .update_bank            = 0x03,
1327                .update_reg             = 0x80,
1328                .update_mask            = 0x44,
1329                .update_val             = 0x44,
1330                .update_val_idle        = 0x44,
1331                .update_val_normal      = 0x04,
1332                .voltage_bank           = 0x03,
1333                .voltage_reg            = 0x80,
1334                .voltage_mask           = 0x38,
1335        },
1336
1337        /*
1338         * Fixed Voltage Regulators
1339         *   name, fixed mV,
1340         *   update bank, reg, mask, enable val
1341         */
1342        [AB9540_LDO_TVOUT] = {
1343                .desc = {
1344                        .name           = "LDO-TVOUT",
1345                        .ops            = &ab8500_regulator_mode_ops,
1346                        .type           = REGULATOR_VOLTAGE,
1347                        .id             = AB9540_LDO_TVOUT,
1348                        .owner          = THIS_MODULE,
1349                        .n_voltages     = 1,
1350                        .volt_table     = fixed_2000000_voltage,
1351                        .enable_time    = 10000,
1352                },
1353                .load_lp_uA             = 1000,
1354                .update_bank            = 0x03,
1355                .update_reg             = 0x80,
1356                .update_mask            = 0x82,
1357                .update_val             = 0x02,
1358                .update_val_idle        = 0x82,
1359                .update_val_normal      = 0x02,
1360        },
1361        [AB9540_LDO_USB] = {
1362                .desc = {
1363                        .name           = "LDO-USB",
1364                        .ops            = &ab8500_regulator_ops,
1365                        .type           = REGULATOR_VOLTAGE,
1366                        .id             = AB9540_LDO_USB,
1367                        .owner          = THIS_MODULE,
1368                        .n_voltages     = 1,
1369                        .volt_table     = fixed_3300000_voltage,
1370                },
1371                .update_bank            = 0x03,
1372                .update_reg             = 0x82,
1373                .update_mask            = 0x03,
1374                .update_val             = 0x01,
1375                .update_val_idle        = 0x03,
1376                .update_val_normal      = 0x01,
1377        },
1378        [AB9540_LDO_AUDIO] = {
1379                .desc = {
1380                        .name           = "LDO-AUDIO",
1381                        .ops            = &ab8500_regulator_ops,
1382                        .type           = REGULATOR_VOLTAGE,
1383                        .id             = AB9540_LDO_AUDIO,
1384                        .owner          = THIS_MODULE,
1385                        .n_voltages     = 1,
1386                        .volt_table     = fixed_2000000_voltage,
1387                },
1388                .update_bank            = 0x03,
1389                .update_reg             = 0x83,
1390                .update_mask            = 0x02,
1391                .update_val             = 0x02,
1392        },
1393        [AB9540_LDO_ANAMIC1] = {
1394                .desc = {
1395                        .name           = "LDO-ANAMIC1",
1396                        .ops            = &ab8500_regulator_ops,
1397                        .type           = REGULATOR_VOLTAGE,
1398                        .id             = AB9540_LDO_ANAMIC1,
1399                        .owner          = THIS_MODULE,
1400                        .n_voltages     = 1,
1401                        .volt_table     = fixed_2050000_voltage,
1402                },
1403                .update_bank            = 0x03,
1404                .update_reg             = 0x83,
1405                .update_mask            = 0x08,
1406                .update_val             = 0x08,
1407        },
1408        [AB9540_LDO_ANAMIC2] = {
1409                .desc = {
1410                        .name           = "LDO-ANAMIC2",
1411                        .ops            = &ab8500_regulator_ops,
1412                        .type           = REGULATOR_VOLTAGE,
1413                        .id             = AB9540_LDO_ANAMIC2,
1414                        .owner          = THIS_MODULE,
1415                        .n_voltages     = 1,
1416                        .volt_table     = fixed_2050000_voltage,
1417                },
1418                .update_bank            = 0x03,
1419                .update_reg             = 0x83,
1420                .update_mask            = 0x10,
1421                .update_val             = 0x10,
1422        },
1423        [AB9540_LDO_DMIC] = {
1424                .desc = {
1425                        .name           = "LDO-DMIC",
1426                        .ops            = &ab8500_regulator_ops,
1427                        .type           = REGULATOR_VOLTAGE,
1428                        .id             = AB9540_LDO_DMIC,
1429                        .owner          = THIS_MODULE,
1430                        .n_voltages     = 1,
1431                        .volt_table     = fixed_1800000_voltage,
1432                },
1433                .update_bank            = 0x03,
1434                .update_reg             = 0x83,
1435                .update_mask            = 0x04,
1436                .update_val             = 0x04,
1437        },
1438
1439        /*
1440         * Regulators with fixed voltage and normal/idle modes
1441         */
1442        [AB9540_LDO_ANA] = {
1443                .desc = {
1444                        .name           = "LDO-ANA",
1445                        .ops            = &ab8500_regulator_mode_ops,
1446                        .type           = REGULATOR_VOLTAGE,
1447                        .id             = AB9540_LDO_ANA,
1448                        .owner          = THIS_MODULE,
1449                        .n_voltages     = 1,
1450                        .volt_table     = fixed_1200000_voltage,
1451                },
1452                .load_lp_uA             = 1000,
1453                .update_bank            = 0x04,
1454                .update_reg             = 0x06,
1455                .update_mask            = 0x0c,
1456                .update_val             = 0x08,
1457                .update_val_idle        = 0x0c,
1458                .update_val_normal      = 0x08,
1459        },
1460};
1461
1462/* AB8540 regulator information */
1463static struct ab8500_regulator_info
1464                ab8540_regulator_info[AB8540_NUM_REGULATORS] = {
1465        /*
1466         * Variable Voltage Regulators
1467         *   name, min mV, max mV,
1468         *   update bank, reg, mask, enable val
1469         *   volt bank, reg, mask
1470         */
1471        [AB8540_LDO_AUX1] = {
1472                .desc = {
1473                        .name           = "LDO-AUX1",
1474                        .ops            = &ab8500_regulator_volt_mode_ops,
1475                        .type           = REGULATOR_VOLTAGE,
1476                        .id             = AB8540_LDO_AUX1,
1477                        .owner          = THIS_MODULE,
1478                        .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1479                        .volt_table     = ldo_vauxn_voltages,
1480                },
1481                .load_lp_uA             = 5000,
1482                .update_bank            = 0x04,
1483                .update_reg             = 0x09,
1484                .update_mask            = 0x03,
1485                .update_val             = 0x01,
1486                .update_val_idle        = 0x03,
1487                .update_val_normal      = 0x01,
1488                .voltage_bank           = 0x04,
1489                .voltage_reg            = 0x1f,
1490                .voltage_mask           = 0x0f,
1491        },
1492        [AB8540_LDO_AUX2] = {
1493                .desc = {
1494                        .name           = "LDO-AUX2",
1495                        .ops            = &ab8500_regulator_volt_mode_ops,
1496                        .type           = REGULATOR_VOLTAGE,
1497                        .id             = AB8540_LDO_AUX2,
1498                        .owner          = THIS_MODULE,
1499                        .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1500                        .volt_table     = ldo_vauxn_voltages,
1501                },
1502                .load_lp_uA             = 5000,
1503                .update_bank            = 0x04,
1504                .update_reg             = 0x09,
1505                .update_mask            = 0x0c,
1506                .update_val             = 0x04,
1507                .update_val_idle        = 0x0c,
1508                .update_val_normal      = 0x04,
1509                .voltage_bank           = 0x04,
1510                .voltage_reg            = 0x20,
1511                .voltage_mask           = 0x0f,
1512        },
1513        [AB8540_LDO_AUX3] = {
1514                .desc = {
1515                        .name           = "LDO-AUX3",
1516                        .ops            = &ab8540_aux3_regulator_volt_mode_ops,
1517                        .type           = REGULATOR_VOLTAGE,
1518                        .id             = AB8540_LDO_AUX3,
1519                        .owner          = THIS_MODULE,
1520                        .n_voltages     = ARRAY_SIZE(ldo_vaux3_ab8540_voltages),
1521                        .volt_table     = ldo_vaux3_ab8540_voltages,
1522                },
1523                .load_lp_uA             = 5000,
1524                .update_bank            = 0x04,
1525                .update_reg             = 0x0a,
1526                .update_mask            = 0x03,
1527                .update_val             = 0x01,
1528                .update_val_idle        = 0x03,
1529                .update_val_normal      = 0x01,
1530                .voltage_bank           = 0x04,
1531                .voltage_reg            = 0x21,
1532                .voltage_mask           = 0x07,
1533                .expand_register = {
1534                        .voltage_limit          = 8,
1535                        .voltage_bank           = 0x04,
1536                        .voltage_reg            = 0x01,
1537                        .voltage_mask           = 0x10,
1538                }
1539        },
1540        [AB8540_LDO_AUX4] = {
1541                .desc = {
1542                        .name           = "LDO-AUX4",
1543                        .ops            = &ab8500_regulator_volt_mode_ops,
1544                        .type           = REGULATOR_VOLTAGE,
1545                        .id             = AB8540_LDO_AUX4,
1546                        .owner          = THIS_MODULE,
1547                        .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1548                        .volt_table     = ldo_vauxn_voltages,
1549                },
1550                .load_lp_uA             = 5000,
1551                /* values for Vaux4Regu register */
1552                .update_bank            = 0x04,
1553                .update_reg             = 0x2e,
1554                .update_mask            = 0x03,
1555                .update_val             = 0x01,
1556                .update_val_idle        = 0x03,
1557                .update_val_normal      = 0x01,
1558                /* values for Vaux4SEL register */
1559                .voltage_bank           = 0x04,
1560                .voltage_reg            = 0x2f,
1561                .voltage_mask           = 0x0f,
1562        },
1563        [AB8540_LDO_AUX5] = {
1564                .desc = {
1565                        .name           = "LDO-AUX5",
1566                        .ops            = &ab8500_regulator_volt_mode_ops,
1567                        .type           = REGULATOR_VOLTAGE,
1568                        .id             = AB8540_LDO_AUX5,
1569                        .owner          = THIS_MODULE,
1570                        .n_voltages     = ARRAY_SIZE(ldo_vaux56_ab8540_voltages),
1571                        .volt_table     = ldo_vaux56_ab8540_voltages,
1572                },
1573                .load_lp_uA             = 20000,
1574                /* values for Vaux5Regu register */
1575                .update_bank            = 0x04,
1576                .update_reg             = 0x32,
1577                .update_mask            = 0x03,
1578                .update_val             = 0x01,
1579                .update_val_idle        = 0x03,
1580                .update_val_normal      = 0x01,
1581                /* values for Vaux5SEL register */
1582                .voltage_bank           = 0x04,
1583                .voltage_reg            = 0x33,
1584                .voltage_mask           = 0x3f,
1585        },
1586        [AB8540_LDO_AUX6] = {
1587                .desc = {
1588                        .name           = "LDO-AUX6",
1589                        .ops            = &ab8500_regulator_volt_mode_ops,
1590                        .type           = REGULATOR_VOLTAGE,
1591                        .id             = AB8540_LDO_AUX6,
1592                        .owner          = THIS_MODULE,
1593                        .n_voltages     = ARRAY_SIZE(ldo_vaux56_ab8540_voltages),
1594                        .volt_table     = ldo_vaux56_ab8540_voltages,
1595                },
1596                .load_lp_uA             = 20000,
1597                /* values for Vaux6Regu register */
1598                .update_bank            = 0x04,
1599                .update_reg             = 0x35,
1600                .update_mask            = 0x03,
1601                .update_val             = 0x01,
1602                .update_val_idle        = 0x03,
1603                .update_val_normal      = 0x01,
1604                /* values for Vaux6SEL register */
1605                .voltage_bank           = 0x04,
1606                .voltage_reg            = 0x36,
1607                .voltage_mask           = 0x3f,
1608        },
1609        [AB8540_LDO_INTCORE] = {
1610                .desc = {
1611                        .name           = "LDO-INTCORE",
1612                        .ops            = &ab8500_regulator_volt_mode_ops,
1613                        .type           = REGULATOR_VOLTAGE,
1614                        .id             = AB8540_LDO_INTCORE,
1615                        .owner          = THIS_MODULE,
1616                        .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
1617                        .volt_table     = ldo_vintcore_voltages,
1618                },
1619                .load_lp_uA             = 5000,
1620                .update_bank            = 0x03,
1621                .update_reg             = 0x80,
1622                .update_mask            = 0x44,
1623                .update_val             = 0x44,
1624                .update_val_idle        = 0x44,
1625                .update_val_normal      = 0x04,
1626                .voltage_bank           = 0x03,
1627                .voltage_reg            = 0x80,
1628                .voltage_mask           = 0x38,
1629        },
1630
1631        /*
1632         * Fixed Voltage Regulators
1633         *   name, fixed mV,
1634         *   update bank, reg, mask, enable val
1635         */
1636        [AB8540_LDO_TVOUT] = {
1637                .desc = {
1638                        .name           = "LDO-TVOUT",
1639                        .ops            = &ab8500_regulator_mode_ops,
1640                        .type           = REGULATOR_VOLTAGE,
1641                        .id             = AB8540_LDO_TVOUT,
1642                        .owner          = THIS_MODULE,
1643                        .n_voltages     = 1,
1644                        .volt_table     = fixed_2000000_voltage,
1645                        .enable_time    = 10000,
1646                },
1647                .load_lp_uA             = 1000,
1648                .update_bank            = 0x03,
1649                .update_reg             = 0x80,
1650                .update_mask            = 0x82,
1651                .update_val             = 0x02,
1652                .update_val_idle        = 0x82,
1653                .update_val_normal      = 0x02,
1654        },
1655        [AB8540_LDO_AUDIO] = {
1656                .desc = {
1657                        .name           = "LDO-AUDIO",
1658                        .ops            = &ab8500_regulator_ops,
1659                        .type           = REGULATOR_VOLTAGE,
1660                        .id             = AB8540_LDO_AUDIO,
1661                        .owner          = THIS_MODULE,
1662                        .n_voltages     = 1,
1663                        .volt_table     = fixed_2000000_voltage,
1664                },
1665                .update_bank            = 0x03,
1666                .update_reg             = 0x83,
1667                .update_mask            = 0x02,
1668                .update_val             = 0x02,
1669        },
1670        [AB8540_LDO_ANAMIC1] = {
1671                .desc = {
1672                        .name           = "LDO-ANAMIC1",
1673                        .ops            = &ab8500_regulator_anamic_mode_ops,
1674                        .type           = REGULATOR_VOLTAGE,
1675                        .id             = AB8540_LDO_ANAMIC1,
1676                        .owner          = THIS_MODULE,
1677                        .n_voltages     = 1,
1678                        .volt_table     = fixed_2050000_voltage,
1679                },
1680                .shared_mode            = &ab8540_ldo_anamic1_shared,
1681                .update_bank            = 0x03,
1682                .update_reg             = 0x83,
1683                .update_mask            = 0x08,
1684                .update_val             = 0x08,
1685                .mode_bank              = 0x03,
1686                .mode_reg               = 0x83,
1687                .mode_mask              = 0x20,
1688                .mode_val_idle          = 0x20,
1689                .mode_val_normal        = 0x00,
1690        },
1691        [AB8540_LDO_ANAMIC2] = {
1692                .desc = {
1693                        .name           = "LDO-ANAMIC2",
1694                        .ops            = &ab8500_regulator_anamic_mode_ops,
1695                        .type           = REGULATOR_VOLTAGE,
1696                        .id             = AB8540_LDO_ANAMIC2,
1697                        .owner          = THIS_MODULE,
1698                        .n_voltages     = 1,
1699                        .volt_table     = fixed_2050000_voltage,
1700                },
1701                .shared_mode            = &ab8540_ldo_anamic2_shared,
1702                .update_bank            = 0x03,
1703                .update_reg             = 0x83,
1704                .update_mask            = 0x10,
1705                .update_val             = 0x10,
1706                .mode_bank              = 0x03,
1707                .mode_reg               = 0x83,
1708                .mode_mask              = 0x20,
1709                .mode_val_idle          = 0x20,
1710                .mode_val_normal        = 0x00,
1711        },
1712        [AB8540_LDO_DMIC] = {
1713                .desc = {
1714                        .name           = "LDO-DMIC",
1715                        .ops            = &ab8500_regulator_volt_mode_ops,
1716                        .type           = REGULATOR_VOLTAGE,
1717                        .id             = AB8540_LDO_DMIC,
1718                        .owner          = THIS_MODULE,
1719                        .n_voltages     = ARRAY_SIZE(ldo_vdmic_voltages),
1720                        .volt_table     = ldo_vdmic_voltages,
1721                },
1722                .load_lp_uA             = 1000,
1723                .update_bank            = 0x03,
1724                .update_reg             = 0x83,
1725                .update_mask            = 0x04,
1726                .update_val             = 0x04,
1727                .voltage_bank           = 0x03,
1728                .voltage_reg            = 0x83,
1729                .voltage_mask           = 0xc0,
1730        },
1731
1732        /*
1733         * Regulators with fixed voltage and normal/idle modes
1734         */
1735        [AB8540_LDO_ANA] = {
1736                .desc = {
1737                        .name           = "LDO-ANA",
1738                        .ops            = &ab8500_regulator_mode_ops,
1739                        .type           = REGULATOR_VOLTAGE,
1740                        .id             = AB8540_LDO_ANA,
1741                        .owner          = THIS_MODULE,
1742                        .n_voltages     = 1,
1743                        .volt_table     = fixed_1200000_voltage,
1744                },
1745                .load_lp_uA             = 1000,
1746                .update_bank            = 0x04,
1747                .update_reg             = 0x06,
1748                .update_mask            = 0x0c,
1749                .update_val             = 0x04,
1750                .update_val_idle        = 0x0c,
1751                .update_val_normal      = 0x04,
1752        },
1753        [AB8540_LDO_SDIO] = {
1754                .desc = {
1755                        .name           = "LDO-SDIO",
1756                        .ops            = &ab8500_regulator_volt_mode_ops,
1757                        .type           = REGULATOR_VOLTAGE,
1758                        .id             = AB8540_LDO_SDIO,
1759                        .owner          = THIS_MODULE,
1760                        .n_voltages     = ARRAY_SIZE(ldo_sdio_voltages),
1761                        .volt_table     = ldo_sdio_voltages,
1762                },
1763                .load_lp_uA             = 5000,
1764                .update_bank            = 0x03,
1765                .update_reg             = 0x88,
1766                .update_mask            = 0x30,
1767                .update_val             = 0x10,
1768                .update_val_idle        = 0x30,
1769                .update_val_normal      = 0x10,
1770                .voltage_bank           = 0x03,
1771                .voltage_reg            = 0x88,
1772                .voltage_mask           = 0x07,
1773        },
1774};
1775
1776static struct ab8500_shared_mode ldo_anamic1_shared = {
1777        .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC2],
1778};
1779
1780static struct ab8500_shared_mode ldo_anamic2_shared = {
1781        .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC1],
1782};
1783
1784static struct ab8500_shared_mode ab8540_ldo_anamic1_shared = {
1785        .shared_regulator = &ab8540_regulator_info[AB8540_LDO_ANAMIC2],
1786};
1787
1788static struct ab8500_shared_mode ab8540_ldo_anamic2_shared = {
1789        .shared_regulator = &ab8540_regulator_info[AB8540_LDO_ANAMIC1],
1790};
1791
1792struct ab8500_reg_init {
1793        u8 bank;
1794        u8 addr;
1795        u8 mask;
1796};
1797
1798#define REG_INIT(_id, _bank, _addr, _mask)      \
1799        [_id] = {                               \
1800                .bank = _bank,                  \
1801                .addr = _addr,                  \
1802                .mask = _mask,                  \
1803        }
1804
1805/* AB8500 register init */
1806static struct ab8500_reg_init ab8500_reg_init[] = {
1807        /*
1808         * 0x30, VanaRequestCtrl
1809         * 0xc0, VextSupply1RequestCtrl
1810         */
1811        REG_INIT(AB8500_REGUREQUESTCTRL2,       0x03, 0x04, 0xf0),
1812        /*
1813         * 0x03, VextSupply2RequestCtrl
1814         * 0x0c, VextSupply3RequestCtrl
1815         * 0x30, Vaux1RequestCtrl
1816         * 0xc0, Vaux2RequestCtrl
1817         */
1818        REG_INIT(AB8500_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
1819        /*
1820         * 0x03, Vaux3RequestCtrl
1821         * 0x04, SwHPReq
1822         */
1823        REG_INIT(AB8500_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
1824        /*
1825         * 0x08, VanaSysClkReq1HPValid
1826         * 0x20, Vaux1SysClkReq1HPValid
1827         * 0x40, Vaux2SysClkReq1HPValid
1828         * 0x80, Vaux3SysClkReq1HPValid
1829         */
1830        REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
1831        /*
1832         * 0x10, VextSupply1SysClkReq1HPValid
1833         * 0x20, VextSupply2SysClkReq1HPValid
1834         * 0x40, VextSupply3SysClkReq1HPValid
1835         */
1836        REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
1837        /*
1838         * 0x08, VanaHwHPReq1Valid
1839         * 0x20, Vaux1HwHPReq1Valid
1840         * 0x40, Vaux2HwHPReq1Valid
1841         * 0x80, Vaux3HwHPReq1Valid
1842         */
1843        REG_INIT(AB8500_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xe8),
1844        /*
1845         * 0x01, VextSupply1HwHPReq1Valid
1846         * 0x02, VextSupply2HwHPReq1Valid
1847         * 0x04, VextSupply3HwHPReq1Valid
1848         */
1849        REG_INIT(AB8500_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x07),
1850        /*
1851         * 0x08, VanaHwHPReq2Valid
1852         * 0x20, Vaux1HwHPReq2Valid
1853         * 0x40, Vaux2HwHPReq2Valid
1854         * 0x80, Vaux3HwHPReq2Valid
1855         */
1856        REG_INIT(AB8500_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xe8),
1857        /*
1858         * 0x01, VextSupply1HwHPReq2Valid
1859         * 0x02, VextSupply2HwHPReq2Valid
1860         * 0x04, VextSupply3HwHPReq2Valid
1861         */
1862        REG_INIT(AB8500_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x07),
1863        /*
1864         * 0x20, VanaSwHPReqValid
1865         * 0x80, Vaux1SwHPReqValid
1866         */
1867        REG_INIT(AB8500_REGUSWHPREQVALID1,      0x03, 0x0d, 0xa0),
1868        /*
1869         * 0x01, Vaux2SwHPReqValid
1870         * 0x02, Vaux3SwHPReqValid
1871         * 0x04, VextSupply1SwHPReqValid
1872         * 0x08, VextSupply2SwHPReqValid
1873         * 0x10, VextSupply3SwHPReqValid
1874         */
1875        REG_INIT(AB8500_REGUSWHPREQVALID2,      0x03, 0x0e, 0x1f),
1876        /*
1877         * 0x02, SysClkReq2Valid1
1878         * 0x04, SysClkReq3Valid1
1879         * 0x08, SysClkReq4Valid1
1880         * 0x10, SysClkReq5Valid1
1881         * 0x20, SysClkReq6Valid1
1882         * 0x40, SysClkReq7Valid1
1883         * 0x80, SysClkReq8Valid1
1884         */
1885        REG_INIT(AB8500_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xfe),
1886        /*
1887         * 0x02, SysClkReq2Valid2
1888         * 0x04, SysClkReq3Valid2
1889         * 0x08, SysClkReq4Valid2
1890         * 0x10, SysClkReq5Valid2
1891         * 0x20, SysClkReq6Valid2
1892         * 0x40, SysClkReq7Valid2
1893         * 0x80, SysClkReq8Valid2
1894         */
1895        REG_INIT(AB8500_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xfe),
1896        /*
1897         * 0x02, VTVoutEna
1898         * 0x04, Vintcore12Ena
1899         * 0x38, Vintcore12Sel
1900         * 0x40, Vintcore12LP
1901         * 0x80, VTVoutLP
1902         */
1903        REG_INIT(AB8500_REGUMISC1,              0x03, 0x80, 0xfe),
1904        /*
1905         * 0x02, VaudioEna
1906         * 0x04, VdmicEna
1907         * 0x08, Vamic1Ena
1908         * 0x10, Vamic2Ena
1909         */
1910        REG_INIT(AB8500_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
1911        /*
1912         * 0x01, Vamic1_dzout
1913         * 0x02, Vamic2_dzout
1914         */
1915        REG_INIT(AB8500_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
1916        /*
1917         * 0x03, VpllRegu (NOTE! PRCMU register bits)
1918         * 0x0c, VanaRegu
1919         */
1920        REG_INIT(AB8500_VPLLVANAREGU,           0x04, 0x06, 0x0f),
1921        /*
1922         * 0x01, VrefDDREna
1923         * 0x02, VrefDDRSleepMode
1924         */
1925        REG_INIT(AB8500_VREFDDR,                0x04, 0x07, 0x03),
1926        /*
1927         * 0x03, VextSupply1Regu
1928         * 0x0c, VextSupply2Regu
1929         * 0x30, VextSupply3Regu
1930         * 0x40, ExtSupply2Bypass
1931         * 0x80, ExtSupply3Bypass
1932         */
1933        REG_INIT(AB8500_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
1934        /*
1935         * 0x03, Vaux1Regu
1936         * 0x0c, Vaux2Regu
1937         */
1938        REG_INIT(AB8500_VAUX12REGU,             0x04, 0x09, 0x0f),
1939        /*
1940         * 0x03, Vaux3Regu
1941         */
1942        REG_INIT(AB8500_VRF1VAUX3REGU,          0x04, 0x0a, 0x03),
1943        /*
1944         * 0x0f, Vaux1Sel
1945         */
1946        REG_INIT(AB8500_VAUX1SEL,               0x04, 0x1f, 0x0f),
1947        /*
1948         * 0x0f, Vaux2Sel
1949         */
1950        REG_INIT(AB8500_VAUX2SEL,               0x04, 0x20, 0x0f),
1951        /*
1952         * 0x07, Vaux3Sel
1953         */
1954        REG_INIT(AB8500_VRF1VAUX3SEL,           0x04, 0x21, 0x07),
1955        /*
1956         * 0x01, VextSupply12LP
1957         */
1958        REG_INIT(AB8500_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
1959        /*
1960         * 0x04, Vaux1Disch
1961         * 0x08, Vaux2Disch
1962         * 0x10, Vaux3Disch
1963         * 0x20, Vintcore12Disch
1964         * 0x40, VTVoutDisch
1965         * 0x80, VaudioDisch
1966         */
1967        REG_INIT(AB8500_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
1968        /*
1969         * 0x02, VanaDisch
1970         * 0x04, VdmicPullDownEna
1971         * 0x10, VdmicDisch
1972         */
1973        REG_INIT(AB8500_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
1974};
1975
1976/* AB8505 register init */
1977static struct ab8500_reg_init ab8505_reg_init[] = {
1978        /*
1979         * 0x03, VarmRequestCtrl
1980         * 0x0c, VsmpsCRequestCtrl
1981         * 0x30, VsmpsARequestCtrl
1982         * 0xc0, VsmpsBRequestCtrl
1983         */
1984        REG_INIT(AB8505_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
1985        /*
1986         * 0x03, VsafeRequestCtrl
1987         * 0x0c, VpllRequestCtrl
1988         * 0x30, VanaRequestCtrl
1989         */
1990        REG_INIT(AB8505_REGUREQUESTCTRL2,       0x03, 0x04, 0x3f),
1991        /*
1992         * 0x30, Vaux1RequestCtrl
1993         * 0xc0, Vaux2RequestCtrl
1994         */
1995        REG_INIT(AB8505_REGUREQUESTCTRL3,       0x03, 0x05, 0xf0),
1996        /*
1997         * 0x03, Vaux3RequestCtrl
1998         * 0x04, SwHPReq
1999         */
2000        REG_INIT(AB8505_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
2001        /*
2002         * 0x01, VsmpsASysClkReq1HPValid
2003         * 0x02, VsmpsBSysClkReq1HPValid
2004         * 0x04, VsafeSysClkReq1HPValid
2005         * 0x08, VanaSysClkReq1HPValid
2006         * 0x10, VpllSysClkReq1HPValid
2007         * 0x20, Vaux1SysClkReq1HPValid
2008         * 0x40, Vaux2SysClkReq1HPValid
2009         * 0x80, Vaux3SysClkReq1HPValid
2010         */
2011        REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
2012        /*
2013         * 0x01, VsmpsCSysClkReq1HPValid
2014         * 0x02, VarmSysClkReq1HPValid
2015         * 0x04, VbbSysClkReq1HPValid
2016         * 0x08, VsmpsMSysClkReq1HPValid
2017         */
2018        REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x0f),
2019        /*
2020         * 0x01, VsmpsAHwHPReq1Valid
2021         * 0x02, VsmpsBHwHPReq1Valid
2022         * 0x04, VsafeHwHPReq1Valid
2023         * 0x08, VanaHwHPReq1Valid
2024         * 0x10, VpllHwHPReq1Valid
2025         * 0x20, Vaux1HwHPReq1Valid
2026         * 0x40, Vaux2HwHPReq1Valid
2027         * 0x80, Vaux3HwHPReq1Valid
2028         */
2029        REG_INIT(AB8505_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
2030        /*
2031         * 0x08, VsmpsMHwHPReq1Valid
2032         */
2033        REG_INIT(AB8505_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x08),
2034        /*
2035         * 0x01, VsmpsAHwHPReq2Valid
2036         * 0x02, VsmpsBHwHPReq2Valid
2037         * 0x04, VsafeHwHPReq2Valid
2038         * 0x08, VanaHwHPReq2Valid
2039         * 0x10, VpllHwHPReq2Valid
2040         * 0x20, Vaux1HwHPReq2Valid
2041         * 0x40, Vaux2HwHPReq2Valid
2042         * 0x80, Vaux3HwHPReq2Valid
2043         */
2044        REG_INIT(AB8505_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
2045        /*
2046         * 0x08, VsmpsMHwHPReq2Valid
2047         */
2048        REG_INIT(AB8505_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x08),
2049        /*
2050         * 0x01, VsmpsCSwHPReqValid
2051         * 0x02, VarmSwHPReqValid
2052         * 0x04, VsmpsASwHPReqValid
2053         * 0x08, VsmpsBSwHPReqValid
2054         * 0x10, VsafeSwHPReqValid
2055         * 0x20, VanaSwHPReqValid
2056         * 0x40, VpllSwHPReqValid
2057         * 0x80, Vaux1SwHPReqValid
2058         */
2059        REG_INIT(AB8505_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
2060        /*
2061         * 0x01, Vaux2SwHPReqValid
2062         * 0x02, Vaux3SwHPReqValid
2063         * 0x20, VsmpsMSwHPReqValid
2064         */
2065        REG_INIT(AB8505_REGUSWHPREQVALID2,      0x03, 0x0e, 0x23),
2066        /*
2067         * 0x02, SysClkReq2Valid1
2068         * 0x04, SysClkReq3Valid1
2069         * 0x08, SysClkReq4Valid1
2070         */
2071        REG_INIT(AB8505_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0x0e),
2072        /*
2073         * 0x02, SysClkReq2Valid2
2074         * 0x04, SysClkReq3Valid2
2075         * 0x08, SysClkReq4Valid2
2076         */
2077        REG_INIT(AB8505_REGUSYSCLKREQVALID2,    0x03, 0x10, 0x0e),
2078        /*
2079         * 0x01, Vaux4SwHPReqValid
2080         * 0x02, Vaux4HwHPReq2Valid
2081         * 0x04, Vaux4HwHPReq1Valid
2082         * 0x08, Vaux4SysClkReq1HPValid
2083         */
2084        REG_INIT(AB8505_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
2085        /*
2086         * 0x02, VadcEna
2087         * 0x04, VintCore12Ena
2088         * 0x38, VintCore12Sel
2089         * 0x40, VintCore12LP
2090         * 0x80, VadcLP
2091         */
2092        REG_INIT(AB8505_REGUMISC1,              0x03, 0x80, 0xfe),
2093        /*
2094         * 0x02, VaudioEna
2095         * 0x04, VdmicEna
2096         * 0x08, Vamic1Ena
2097         * 0x10, Vamic2Ena
2098         */
2099        REG_INIT(AB8505_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
2100        /*
2101         * 0x01, Vamic1_dzout
2102         * 0x02, Vamic2_dzout
2103         */
2104        REG_INIT(AB8505_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
2105        /*
2106         * 0x03, VsmpsARegu
2107         * 0x0c, VsmpsASelCtrl
2108         * 0x10, VsmpsAAutoMode
2109         * 0x20, VsmpsAPWMMode
2110         */
2111        REG_INIT(AB8505_VSMPSAREGU,             0x04, 0x03, 0x3f),
2112        /*
2113         * 0x03, VsmpsBRegu
2114         * 0x0c, VsmpsBSelCtrl
2115         * 0x10, VsmpsBAutoMode
2116         * 0x20, VsmpsBPWMMode
2117         */
2118        REG_INIT(AB8505_VSMPSBREGU,             0x04, 0x04, 0x3f),
2119        /*
2120         * 0x03, VsafeRegu
2121         * 0x0c, VsafeSelCtrl
2122         * 0x10, VsafeAutoMode
2123         * 0x20, VsafePWMMode
2124         */
2125        REG_INIT(AB8505_VSAFEREGU,              0x04, 0x05, 0x3f),
2126        /*
2127         * 0x03, VpllRegu (NOTE! PRCMU register bits)
2128         * 0x0c, VanaRegu
2129         */
2130        REG_INIT(AB8505_VPLLVANAREGU,           0x04, 0x06, 0x0f),
2131        /*
2132         * 0x03, VextSupply1Regu
2133         * 0x0c, VextSupply2Regu
2134         * 0x30, VextSupply3Regu
2135         * 0x40, ExtSupply2Bypass
2136         * 0x80, ExtSupply3Bypass
2137         */
2138        REG_INIT(AB8505_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
2139        /*
2140         * 0x03, Vaux1Regu
2141         * 0x0c, Vaux2Regu
2142         */
2143        REG_INIT(AB8505_VAUX12REGU,             0x04, 0x09, 0x0f),
2144        /*
2145         * 0x0f, Vaux3Regu
2146         */
2147        REG_INIT(AB8505_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
2148        /*
2149         * 0x3f, VsmpsASel1
2150         */
2151        REG_INIT(AB8505_VSMPSASEL1,             0x04, 0x13, 0x3f),
2152        /*
2153         * 0x3f, VsmpsASel2
2154         */
2155        REG_INIT(AB8505_VSMPSASEL2,             0x04, 0x14, 0x3f),
2156        /*
2157         * 0x3f, VsmpsASel3
2158         */
2159        REG_INIT(AB8505_VSMPSASEL3,             0x04, 0x15, 0x3f),
2160        /*
2161         * 0x3f, VsmpsBSel1
2162         */
2163        REG_INIT(AB8505_VSMPSBSEL1,             0x04, 0x17, 0x3f),
2164        /*
2165         * 0x3f, VsmpsBSel2
2166         */
2167        REG_INIT(AB8505_VSMPSBSEL2,             0x04, 0x18, 0x3f),
2168        /*
2169         * 0x3f, VsmpsBSel3
2170         */
2171        REG_INIT(AB8505_VSMPSBSEL3,             0x04, 0x19, 0x3f),
2172        /*
2173         * 0x7f, VsafeSel1
2174         */
2175        REG_INIT(AB8505_VSAFESEL1,              0x04, 0x1b, 0x7f),
2176        /*
2177         * 0x3f, VsafeSel2
2178         */
2179        REG_INIT(AB8505_VSAFESEL2,              0x04, 0x1c, 0x7f),
2180        /*
2181         * 0x3f, VsafeSel3
2182         */
2183        REG_INIT(AB8505_VSAFESEL3,              0x04, 0x1d, 0x7f),
2184        /*
2185         * 0x0f, Vaux1Sel
2186         */
2187        REG_INIT(AB8505_VAUX1SEL,               0x04, 0x1f, 0x0f),
2188        /*
2189         * 0x0f, Vaux2Sel
2190         */
2191        REG_INIT(AB8505_VAUX2SEL,               0x04, 0x20, 0x0f),
2192        /*
2193         * 0x07, Vaux3Sel
2194         * 0x30, VRF1Sel
2195         */
2196        REG_INIT(AB8505_VRF1VAUX3SEL,           0x04, 0x21, 0x37),
2197        /*
2198         * 0x03, Vaux4RequestCtrl
2199         */
2200        REG_INIT(AB8505_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
2201        /*
2202         * 0x03, Vaux4Regu
2203         */
2204        REG_INIT(AB8505_VAUX4REGU,              0x04, 0x2e, 0x03),
2205        /*
2206         * 0x0f, Vaux4Sel
2207         */
2208        REG_INIT(AB8505_VAUX4SEL,               0x04, 0x2f, 0x0f),
2209        /*
2210         * 0x04, Vaux1Disch
2211         * 0x08, Vaux2Disch
2212         * 0x10, Vaux3Disch
2213         * 0x20, Vintcore12Disch
2214         * 0x40, VTVoutDisch
2215         * 0x80, VaudioDisch
2216         */
2217        REG_INIT(AB8505_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
2218        /*
2219         * 0x02, VanaDisch
2220         * 0x04, VdmicPullDownEna
2221         * 0x10, VdmicDisch
2222         */
2223        REG_INIT(AB8505_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
2224        /*
2225         * 0x01, Vaux4Disch
2226         */
2227        REG_INIT(AB8505_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
2228        /*
2229         * 0x07, Vaux5Sel
2230         * 0x08, Vaux5LP
2231         * 0x10, Vaux5Ena
2232         * 0x20, Vaux5Disch
2233         * 0x40, Vaux5DisSfst
2234         * 0x80, Vaux5DisPulld
2235         */
2236        REG_INIT(AB8505_CTRLVAUX5,              0x01, 0x55, 0xff),
2237        /*
2238         * 0x07, Vaux6Sel
2239         * 0x08, Vaux6LP
2240         * 0x10, Vaux6Ena
2241         * 0x80, Vaux6DisPulld
2242         */
2243        REG_INIT(AB8505_CTRLVAUX6,              0x01, 0x56, 0x9f),
2244};
2245
2246/* AB9540 register init */
2247static struct ab8500_reg_init ab9540_reg_init[] = {
2248        /*
2249         * 0x03, VarmRequestCtrl
2250         * 0x0c, VapeRequestCtrl
2251         * 0x30, Vsmps1RequestCtrl
2252         * 0xc0, Vsmps2RequestCtrl
2253         */
2254        REG_INIT(AB9540_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
2255        /*
2256         * 0x03, Vsmps3RequestCtrl
2257         * 0x0c, VpllRequestCtrl
2258         * 0x30, VanaRequestCtrl
2259         * 0xc0, VextSupply1RequestCtrl
2260         */
2261        REG_INIT(AB9540_REGUREQUESTCTRL2,       0x03, 0x04, 0xff),
2262        /*
2263         * 0x03, VextSupply2RequestCtrl
2264         * 0x0c, VextSupply3RequestCtrl
2265         * 0x30, Vaux1RequestCtrl
2266         * 0xc0, Vaux2RequestCtrl
2267         */
2268        REG_INIT(AB9540_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
2269        /*
2270         * 0x03, Vaux3RequestCtrl
2271         * 0x04, SwHPReq
2272         */
2273        REG_INIT(AB9540_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
2274        /*
2275         * 0x01, Vsmps1SysClkReq1HPValid
2276         * 0x02, Vsmps2SysClkReq1HPValid
2277         * 0x04, Vsmps3SysClkReq1HPValid
2278         * 0x08, VanaSysClkReq1HPValid
2279         * 0x10, VpllSysClkReq1HPValid
2280         * 0x20, Vaux1SysClkReq1HPValid
2281         * 0x40, Vaux2SysClkReq1HPValid
2282         * 0x80, Vaux3SysClkReq1HPValid
2283         */
2284        REG_INIT(AB9540_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
2285        /*
2286         * 0x01, VapeSysClkReq1HPValid
2287         * 0x02, VarmSysClkReq1HPValid
2288         * 0x04, VbbSysClkReq1HPValid
2289         * 0x08, VmodSysClkReq1HPValid
2290         * 0x10, VextSupply1SysClkReq1HPValid
2291         * 0x20, VextSupply2SysClkReq1HPValid
2292         * 0x40, VextSupply3SysClkReq1HPValid
2293         */
2294        REG_INIT(AB9540_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x7f),
2295        /*
2296         * 0x01, Vsmps1HwHPReq1Valid
2297         * 0x02, Vsmps2HwHPReq1Valid
2298         * 0x04, Vsmps3HwHPReq1Valid
2299         * 0x08, VanaHwHPReq1Valid
2300         * 0x10, VpllHwHPReq1Valid
2301         * 0x20, Vaux1HwHPReq1Valid
2302         * 0x40, Vaux2HwHPReq1Valid
2303         * 0x80, Vaux3HwHPReq1Valid
2304         */
2305        REG_INIT(AB9540_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
2306        /*
2307         * 0x01, VextSupply1HwHPReq1Valid
2308         * 0x02, VextSupply2HwHPReq1Valid
2309         * 0x04, VextSupply3HwHPReq1Valid
2310         * 0x08, VmodHwHPReq1Valid
2311         */
2312        REG_INIT(AB9540_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x0f),
2313        /*
2314         * 0x01, Vsmps1HwHPReq2Valid
2315         * 0x02, Vsmps2HwHPReq2Valid
2316         * 0x03, Vsmps3HwHPReq2Valid
2317         * 0x08, VanaHwHPReq2Valid
2318         * 0x10, VpllHwHPReq2Valid
2319         * 0x20, Vaux1HwHPReq2Valid
2320         * 0x40, Vaux2HwHPReq2Valid
2321         * 0x80, Vaux3HwHPReq2Valid
2322         */
2323        REG_INIT(AB9540_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
2324        /*
2325         * 0x01, VextSupply1HwHPReq2Valid
2326         * 0x02, VextSupply2HwHPReq2Valid
2327         * 0x04, VextSupply3HwHPReq2Valid
2328         * 0x08, VmodHwHPReq2Valid
2329         */
2330        REG_INIT(AB9540_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x0f),
2331        /*
2332         * 0x01, VapeSwHPReqValid
2333         * 0x02, VarmSwHPReqValid
2334         * 0x04, Vsmps1SwHPReqValid
2335         * 0x08, Vsmps2SwHPReqValid
2336         * 0x10, Vsmps3SwHPReqValid
2337         * 0x20, VanaSwHPReqValid
2338         * 0x40, VpllSwHPReqValid
2339         * 0x80, Vaux1SwHPReqValid
2340         */
2341        REG_INIT(AB9540_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
2342        /*
2343         * 0x01, Vaux2SwHPReqValid
2344         * 0x02, Vaux3SwHPReqValid
2345         * 0x04, VextSupply1SwHPReqValid
2346         * 0x08, VextSupply2SwHPReqValid
2347         * 0x10, VextSupply3SwHPReqValid
2348         * 0x20, VmodSwHPReqValid
2349         */
2350        REG_INIT(AB9540_REGUSWHPREQVALID2,      0x03, 0x0e, 0x3f),
2351        /*
2352         * 0x02, SysClkReq2Valid1
2353         * ...
2354         * 0x80, SysClkReq8Valid1
2355         */
2356        REG_INIT(AB9540_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xfe),
2357        /*
2358         * 0x02, SysClkReq2Valid2
2359         * ...
2360         * 0x80, SysClkReq8Valid2
2361         */
2362        REG_INIT(AB9540_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xfe),
2363        /*
2364         * 0x01, Vaux4SwHPReqValid
2365         * 0x02, Vaux4HwHPReq2Valid
2366         * 0x04, Vaux4HwHPReq1Valid
2367         * 0x08, Vaux4SysClkReq1HPValid
2368         */
2369        REG_INIT(AB9540_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
2370        /*
2371         * 0x02, VTVoutEna
2372         * 0x04, Vintcore12Ena
2373         * 0x38, Vintcore12Sel
2374         * 0x40, Vintcore12LP
2375         * 0x80, VTVoutLP
2376         */
2377        REG_INIT(AB9540_REGUMISC1,              0x03, 0x80, 0xfe),
2378        /*
2379         * 0x02, VaudioEna
2380         * 0x04, VdmicEna
2381         * 0x08, Vamic1Ena
2382         * 0x10, Vamic2Ena
2383         */
2384        REG_INIT(AB9540_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
2385        /*
2386         * 0x01, Vamic1_dzout
2387         * 0x02, Vamic2_dzout
2388         */
2389        REG_INIT(AB9540_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
2390        /*
2391         * 0x03, Vsmps1Regu
2392         * 0x0c, Vsmps1SelCtrl
2393         * 0x10, Vsmps1AutoMode
2394         * 0x20, Vsmps1PWMMode
2395         */
2396        REG_INIT(AB9540_VSMPS1REGU,             0x04, 0x03, 0x3f),
2397        /*
2398         * 0x03, Vsmps2Regu
2399         * 0x0c, Vsmps2SelCtrl
2400         * 0x10, Vsmps2AutoMode
2401         * 0x20, Vsmps2PWMMode
2402         */
2403        REG_INIT(AB9540_VSMPS2REGU,             0x04, 0x04, 0x3f),
2404        /*
2405         * 0x03, Vsmps3Regu
2406         * 0x0c, Vsmps3SelCtrl
2407         * NOTE! PRCMU register
2408         */
2409        REG_INIT(AB9540_VSMPS3REGU,             0x04, 0x05, 0x0f),
2410        /*
2411         * 0x03, VpllRegu
2412         * 0x0c, VanaRegu
2413         */
2414        REG_INIT(AB9540_VPLLVANAREGU,           0x04, 0x06, 0x0f),
2415        /*
2416         * 0x03, VextSupply1Regu
2417         * 0x0c, VextSupply2Regu
2418         * 0x30, VextSupply3Regu
2419         * 0x40, ExtSupply2Bypass
2420         * 0x80, ExtSupply3Bypass
2421         */
2422        REG_INIT(AB9540_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
2423        /*
2424         * 0x03, Vaux1Regu
2425         * 0x0c, Vaux2Regu
2426         */
2427        REG_INIT(AB9540_VAUX12REGU,             0x04, 0x09, 0x0f),
2428        /*
2429         * 0x0c, Vrf1Regu
2430         * 0x03, Vaux3Regu
2431         */
2432        REG_INIT(AB9540_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
2433        /*
2434         * 0x3f, Vsmps1Sel1
2435         */
2436        REG_INIT(AB9540_VSMPS1SEL1,             0x04, 0x13, 0x3f),
2437        /*
2438         * 0x3f, Vsmps1Sel2
2439         */
2440        REG_INIT(AB9540_VSMPS1SEL2,             0x04, 0x14, 0x3f),
2441        /*
2442         * 0x3f, Vsmps1Sel3
2443         */
2444        REG_INIT(AB9540_VSMPS1SEL3,             0x04, 0x15, 0x3f),
2445        /*
2446         * 0x3f, Vsmps2Sel1
2447         */
2448        REG_INIT(AB9540_VSMPS2SEL1,             0x04, 0x17, 0x3f),
2449        /*
2450         * 0x3f, Vsmps2Sel2
2451         */
2452        REG_INIT(AB9540_VSMPS2SEL2,             0x04, 0x18, 0x3f),
2453        /*
2454         * 0x3f, Vsmps2Sel3
2455         */
2456        REG_INIT(AB9540_VSMPS2SEL3,             0x04, 0x19, 0x3f),
2457        /*
2458         * 0x7f, Vsmps3Sel1
2459         * NOTE! PRCMU register
2460         */
2461        REG_INIT(AB9540_VSMPS3SEL1,             0x04, 0x1b, 0x7f),
2462        /*
2463         * 0x7f, Vsmps3Sel2
2464         * NOTE! PRCMU register
2465         */
2466        REG_INIT(AB9540_VSMPS3SEL2,             0x04, 0x1c, 0x7f),
2467        /*
2468         * 0x0f, Vaux1Sel
2469         */
2470        REG_INIT(AB9540_VAUX1SEL,               0x04, 0x1f, 0x0f),
2471        /*
2472         * 0x0f, Vaux2Sel
2473         */
2474        REG_INIT(AB9540_VAUX2SEL,               0x04, 0x20, 0x0f),
2475        /*
2476         * 0x07, Vaux3Sel
2477         * 0x30, Vrf1Sel
2478         */
2479        REG_INIT(AB9540_VRF1VAUX3SEL,           0x04, 0x21, 0x37),
2480        /*
2481         * 0x01, VextSupply12LP
2482         */
2483        REG_INIT(AB9540_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
2484        /*
2485         * 0x03, Vaux4RequestCtrl
2486         */
2487        REG_INIT(AB9540_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
2488        /*
2489         * 0x03, Vaux4Regu
2490         */
2491        REG_INIT(AB9540_VAUX4REGU,              0x04, 0x2e, 0x03),
2492        /*
2493         * 0x08, Vaux4Sel
2494         */
2495        REG_INIT(AB9540_VAUX4SEL,               0x04, 0x2f, 0x0f),
2496        /*
2497         * 0x01, VpllDisch
2498         * 0x02, Vrf1Disch
2499         * 0x04, Vaux1Disch
2500         * 0x08, Vaux2Disch
2501         * 0x10, Vaux3Disch
2502         * 0x20, Vintcore12Disch
2503         * 0x40, VTVoutDisch
2504         * 0x80, VaudioDisch
2505         */
2506        REG_INIT(AB9540_REGUCTRLDISCH,          0x04, 0x43, 0xff),
2507        /*
2508         * 0x01, VsimDisch
2509         * 0x02, VanaDisch
2510         * 0x04, VdmicPullDownEna
2511         * 0x08, VpllPullDownEna
2512         * 0x10, VdmicDisch
2513         */
2514        REG_INIT(AB9540_REGUCTRLDISCH2,         0x04, 0x44, 0x1f),
2515        /*
2516         * 0x01, Vaux4Disch
2517         */
2518        REG_INIT(AB9540_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
2519};
2520
2521/* AB8540 register init */
2522static struct ab8500_reg_init ab8540_reg_init[] = {
2523        /*
2524         * 0x01, VSimSycClkReq1Valid
2525         * 0x02, VSimSycClkReq2Valid
2526         * 0x04, VSimSycClkReq3Valid
2527         * 0x08, VSimSycClkReq4Valid
2528         * 0x10, VSimSycClkReq5Valid
2529         * 0x20, VSimSycClkReq6Valid
2530         * 0x40, VSimSycClkReq7Valid
2531         * 0x80, VSimSycClkReq8Valid
2532         */
2533        REG_INIT(AB8540_VSIMSYSCLKCTRL,         0x02, 0x33, 0xff),
2534        /*
2535         * 0x03, VarmRequestCtrl
2536         * 0x0c, VapeRequestCtrl
2537         * 0x30, Vsmps1RequestCtrl
2538         * 0xc0, Vsmps2RequestCtrl
2539         */
2540        REG_INIT(AB8540_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
2541        /*
2542         * 0x03, Vsmps3RequestCtrl
2543         * 0x0c, VpllRequestCtrl
2544         * 0x30, VanaRequestCtrl
2545         * 0xc0, VextSupply1RequestCtrl
2546         */
2547        REG_INIT(AB8540_REGUREQUESTCTRL2,       0x03, 0x04, 0xff),
2548        /*
2549         * 0x03, VextSupply2RequestCtrl
2550         * 0x0c, VextSupply3RequestCtrl
2551         * 0x30, Vaux1RequestCtrl
2552         * 0xc0, Vaux2RequestCtrl
2553         */
2554        REG_INIT(AB8540_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
2555        /*
2556         * 0x03, Vaux3RequestCtrl
2557         * 0x04, SwHPReq
2558         */
2559        REG_INIT(AB8540_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
2560        /*
2561         * 0x01, Vsmps1SysClkReq1HPValid
2562         * 0x02, Vsmps2SysClkReq1HPValid
2563         * 0x04, Vsmps3SysClkReq1HPValid
2564         * 0x08, VanaSysClkReq1HPValid
2565         * 0x10, VpllSysClkReq1HPValid
2566         * 0x20, Vaux1SysClkReq1HPValid
2567         * 0x40, Vaux2SysClkReq1HPValid
2568         * 0x80, Vaux3SysClkReq1HPValid
2569         */
2570        REG_INIT(AB8540_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
2571        /*
2572         * 0x01, VapeSysClkReq1HPValid
2573         * 0x02, VarmSysClkReq1HPValid
2574         * 0x04, VbbSysClkReq1HPValid
2575         * 0x10, VextSupply1SysClkReq1HPValid
2576         * 0x20, VextSupply2SysClkReq1HPValid
2577         * 0x40, VextSupply3SysClkReq1HPValid
2578         */
2579        REG_INIT(AB8540_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x77),
2580        /*
2581         * 0x01, Vsmps1HwHPReq1Valid
2582         * 0x02, Vsmps2HwHPReq1Valid
2583         * 0x04, Vsmps3HwHPReq1Valid
2584         * 0x08, VanaHwHPReq1Valid
2585         * 0x10, VpllHwHPReq1Valid
2586         * 0x20, Vaux1HwHPReq1Valid
2587         * 0x40, Vaux2HwHPReq1Valid
2588         * 0x80, Vaux3HwHPReq1Valid
2589         */
2590        REG_INIT(AB8540_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
2591        /*
2592         * 0x01, VextSupply1HwHPReq1Valid
2593         * 0x02, VextSupply2HwHPReq1Valid
2594         * 0x04, VextSupply3HwHPReq1Valid
2595         */
2596        REG_INIT(AB8540_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x07),
2597        /*
2598         * 0x01, Vsmps1HwHPReq2Valid
2599         * 0x02, Vsmps2HwHPReq2Valid
2600         * 0x03, Vsmps3HwHPReq2Valid
2601         * 0x08, VanaHwHPReq2Valid
2602         * 0x10, VpllHwHPReq2Valid
2603         * 0x20, Vaux1HwHPReq2Valid
2604         * 0x40, Vaux2HwHPReq2Valid
2605         * 0x80, Vaux3HwHPReq2Valid
2606         */
2607        REG_INIT(AB8540_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
2608        /*
2609         * 0x01, VextSupply1HwHPReq2Valid
2610         * 0x02, VextSupply2HwHPReq2Valid
2611         * 0x04, VextSupply3HwHPReq2Valid
2612         */
2613        REG_INIT(AB8540_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x07),
2614        /*
2615         * 0x01, VapeSwHPReqValid
2616         * 0x02, VarmSwHPReqValid
2617         * 0x04, Vsmps1SwHPReqValid
2618         * 0x08, Vsmps2SwHPReqValid
2619         * 0x10, Vsmps3SwHPReqValid
2620         * 0x20, VanaSwHPReqValid
2621         * 0x40, VpllSwHPReqValid
2622         * 0x80, Vaux1SwHPReqValid
2623         */
2624        REG_INIT(AB8540_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
2625        /*
2626         * 0x01, Vaux2SwHPReqValid
2627         * 0x02, Vaux3SwHPReqValid
2628         * 0x04, VextSupply1SwHPReqValid
2629         * 0x08, VextSupply2SwHPReqValid
2630         * 0x10, VextSupply3SwHPReqValid
2631         */
2632        REG_INIT(AB8540_REGUSWHPREQVALID2,      0x03, 0x0e, 0x1f),
2633        /*
2634         * 0x02, SysClkReq2Valid1
2635         * ...
2636         * 0x80, SysClkReq8Valid1
2637         */
2638        REG_INIT(AB8540_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xff),
2639        /*
2640         * 0x02, SysClkReq2Valid2
2641         * ...
2642         * 0x80, SysClkReq8Valid2
2643         */
2644        REG_INIT(AB8540_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xff),
2645        /*
2646         * 0x01, Vaux4SwHPReqValid
2647         * 0x02, Vaux4HwHPReq2Valid
2648         * 0x04, Vaux4HwHPReq1Valid
2649         * 0x08, Vaux4SysClkReq1HPValid
2650         */
2651        REG_INIT(AB8540_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
2652        /*
2653         * 0x01, Vaux5SwHPReqValid
2654         * 0x02, Vaux5HwHPReq2Valid
2655         * 0x04, Vaux5HwHPReq1Valid
2656         * 0x08, Vaux5SysClkReq1HPValid
2657         */
2658        REG_INIT(AB8540_REGUVAUX5REQVALID,      0x03, 0x12, 0x0f),
2659        /*
2660         * 0x01, Vaux6SwHPReqValid
2661         * 0x02, Vaux6HwHPReq2Valid
2662         * 0x04, Vaux6HwHPReq1Valid
2663         * 0x08, Vaux6SysClkReq1HPValid
2664         */
2665        REG_INIT(AB8540_REGUVAUX6REQVALID,      0x03, 0x13, 0x0f),
2666        /*
2667         * 0x01, VclkbSwHPReqValid
2668         * 0x02, VclkbHwHPReq2Valid
2669         * 0x04, VclkbHwHPReq1Valid
2670         * 0x08, VclkbSysClkReq1HPValid
2671         */
2672        REG_INIT(AB8540_REGUVCLKBREQVALID,      0x03, 0x14, 0x0f),
2673        /*
2674         * 0x01, Vrf1SwHPReqValid
2675         * 0x02, Vrf1HwHPReq2Valid
2676         * 0x04, Vrf1HwHPReq1Valid
2677         * 0x08, Vrf1SysClkReq1HPValid
2678         */
2679        REG_INIT(AB8540_REGUVRF1REQVALID,       0x03, 0x15, 0x0f),
2680        /*
2681         * 0x02, VTVoutEna
2682         * 0x04, Vintcore12Ena
2683         * 0x38, Vintcore12Sel
2684         * 0x40, Vintcore12LP
2685         * 0x80, VTVoutLP
2686         */
2687        REG_INIT(AB8540_REGUMISC1,              0x03, 0x80, 0xfe),
2688        /*
2689         * 0x02, VaudioEna
2690         * 0x04, VdmicEna
2691         * 0x08, Vamic1Ena
2692         * 0x10, Vamic2Ena
2693         * 0x20, Vamic12LP
2694         * 0xC0, VdmicSel
2695         */
2696        REG_INIT(AB8540_VAUDIOSUPPLY,           0x03, 0x83, 0xfe),
2697        /*
2698         * 0x01, Vamic1_dzout
2699         * 0x02, Vamic2_dzout
2700         */
2701        REG_INIT(AB8540_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
2702        /*
2703         * 0x07, VHSICSel
2704         * 0x08, VHSICOffState
2705         * 0x10, VHSIEna
2706         * 0x20, VHSICLP
2707         */
2708        REG_INIT(AB8540_VHSIC,                  0x03, 0x87, 0x3f),
2709        /*
2710         * 0x07, VSDIOSel
2711         * 0x08, VSDIOOffState
2712         * 0x10, VSDIOEna
2713         * 0x20, VSDIOLP
2714         */
2715        REG_INIT(AB8540_VSDIO,                  0x03, 0x88, 0x3f),
2716        /*
2717         * 0x03, Vsmps1Regu
2718         * 0x0c, Vsmps1SelCtrl
2719         * 0x10, Vsmps1AutoMode
2720         * 0x20, Vsmps1PWMMode
2721         */
2722        REG_INIT(AB8540_VSMPS1REGU,             0x04, 0x03, 0x3f),
2723        /*
2724         * 0x03, Vsmps2Regu
2725         * 0x0c, Vsmps2SelCtrl
2726         * 0x10, Vsmps2AutoMode
2727         * 0x20, Vsmps2PWMMode
2728         */
2729        REG_INIT(AB8540_VSMPS2REGU,             0x04, 0x04, 0x3f),
2730        /*
2731         * 0x03, Vsmps3Regu
2732         * 0x0c, Vsmps3SelCtrl
2733         * 0x10, Vsmps3AutoMode
2734         * 0x20, Vsmps3PWMMode
2735         * NOTE! PRCMU register
2736         */
2737        REG_INIT(AB8540_VSMPS3REGU,             0x04, 0x05, 0x0f),
2738        /*
2739         * 0x03, VpllRegu
2740         * 0x0c, VanaRegu
2741         */
2742        REG_INIT(AB8540_VPLLVANAREGU,           0x04, 0x06, 0x0f),
2743        /*
2744         * 0x03, VextSupply1Regu
2745         * 0x0c, VextSupply2Regu
2746         * 0x30, VextSupply3Regu
2747         * 0x40, ExtSupply2Bypass
2748         * 0x80, ExtSupply3Bypass
2749         */
2750        REG_INIT(AB8540_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
2751        /*
2752         * 0x03, Vaux1Regu
2753         * 0x0c, Vaux2Regu
2754         */
2755        REG_INIT(AB8540_VAUX12REGU,             0x04, 0x09, 0x0f),
2756        /*
2757         * 0x0c, VRF1Regu
2758         * 0x03, Vaux3Regu
2759         */
2760        REG_INIT(AB8540_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
2761        /*
2762         * 0x3f, Vsmps1Sel1
2763         */
2764        REG_INIT(AB8540_VSMPS1SEL1,             0x04, 0x13, 0x3f),
2765        /*
2766         * 0x3f, Vsmps1Sel2
2767         */
2768        REG_INIT(AB8540_VSMPS1SEL2,             0x04, 0x14, 0x3f),
2769        /*
2770         * 0x3f, Vsmps1Sel3
2771         */
2772        REG_INIT(AB8540_VSMPS1SEL3,             0x04, 0x15, 0x3f),
2773        /*
2774         * 0x3f, Vsmps2Sel1
2775         */
2776        REG_INIT(AB8540_VSMPS2SEL1,             0x04, 0x17, 0x3f),
2777        /*
2778         * 0x3f, Vsmps2Sel2
2779         */
2780        REG_INIT(AB8540_VSMPS2SEL2,             0x04, 0x18, 0x3f),
2781        /*
2782         * 0x3f, Vsmps2Sel3
2783         */
2784        REG_INIT(AB8540_VSMPS2SEL3,             0x04, 0x19, 0x3f),
2785        /*
2786         * 0x7f, Vsmps3Sel1
2787         * NOTE! PRCMU register
2788         */
2789        REG_INIT(AB8540_VSMPS3SEL1,             0x04, 0x1b, 0x7f),
2790        /*
2791         * 0x7f, Vsmps3Sel2
2792         * NOTE! PRCMU register
2793         */
2794        REG_INIT(AB8540_VSMPS3SEL2,             0x04, 0x1c, 0x7f),
2795        /*
2796         * 0x0f, Vaux1Sel
2797         */
2798        REG_INIT(AB8540_VAUX1SEL,               0x04, 0x1f, 0x0f),
2799        /*
2800         * 0x0f, Vaux2Sel
2801         */
2802        REG_INIT(AB8540_VAUX2SEL,               0x04, 0x20, 0x0f),
2803        /*
2804         * 0x07, Vaux3Sel
2805         * 0x70, Vrf1Sel
2806         */
2807        REG_INIT(AB8540_VRF1VAUX3SEL,           0x04, 0x21, 0x77),
2808        /*
2809         * 0x01, VextSupply12LP
2810         */
2811        REG_INIT(AB8540_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
2812        /*
2813         * 0x07, Vanasel
2814         * 0x30, Vpllsel
2815         */
2816        REG_INIT(AB8540_VANAVPLLSEL,            0x04, 0x29, 0x37),
2817        /*
2818         * 0x03, Vaux4RequestCtrl
2819         */
2820        REG_INIT(AB8540_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
2821        /*
2822         * 0x03, Vaux4Regu
2823         */
2824        REG_INIT(AB8540_VAUX4REGU,              0x04, 0x2e, 0x03),
2825        /*
2826         * 0x0f, Vaux4Sel
2827         */
2828        REG_INIT(AB8540_VAUX4SEL,               0x04, 0x2f, 0x0f),
2829        /*
2830         * 0x03, Vaux5RequestCtrl
2831         */
2832        REG_INIT(AB8540_VAUX5REQCTRL,           0x04, 0x31, 0x03),
2833        /*
2834         * 0x03, Vaux5Regu
2835         */
2836        REG_INIT(AB8540_VAUX5REGU,              0x04, 0x32, 0x03),
2837        /*
2838         * 0x3f, Vaux5Sel
2839         */
2840        REG_INIT(AB8540_VAUX5SEL,               0x04, 0x33, 0x3f),
2841        /*
2842         * 0x03, Vaux6RequestCtrl
2843         */
2844        REG_INIT(AB8540_VAUX6REQCTRL,           0x04, 0x34, 0x03),
2845        /*
2846         * 0x03, Vaux6Regu
2847         */
2848        REG_INIT(AB8540_VAUX6REGU,              0x04, 0x35, 0x03),
2849        /*
2850         * 0x3f, Vaux6Sel
2851         */
2852        REG_INIT(AB8540_VAUX6SEL,               0x04, 0x36, 0x3f),
2853        /*
2854         * 0x03, VCLKBRequestCtrl
2855         */
2856        REG_INIT(AB8540_VCLKBREQCTRL,           0x04, 0x37, 0x03),
2857        /*
2858         * 0x03, VCLKBRegu
2859         */
2860        REG_INIT(AB8540_VCLKBREGU,              0x04, 0x38, 0x03),
2861        /*
2862         * 0x07, VCLKBSel
2863         */
2864        REG_INIT(AB8540_VCLKBSEL,               0x04, 0x39, 0x07),
2865        /*
2866         * 0x03, Vrf1RequestCtrl
2867         */
2868        REG_INIT(AB8540_VRF1REQCTRL,            0x04, 0x3a, 0x03),
2869        /*
2870         * 0x01, VpllDisch
2871         * 0x02, Vrf1Disch
2872         * 0x04, Vaux1Disch
2873         * 0x08, Vaux2Disch
2874         * 0x10, Vaux3Disch
2875         * 0x20, Vintcore12Disch
2876         * 0x40, VTVoutDisch
2877         * 0x80, VaudioDisch
2878         */
2879        REG_INIT(AB8540_REGUCTRLDISCH,          0x04, 0x43, 0xff),
2880        /*
2881         * 0x02, VanaDisch
2882         * 0x04, VdmicPullDownEna
2883         * 0x08, VpllPullDownEna
2884         * 0x10, VdmicDisch
2885         */
2886        REG_INIT(AB8540_REGUCTRLDISCH2,         0x04, 0x44, 0x1e),
2887        /*
2888         * 0x01, Vaux4Disch
2889         */
2890        REG_INIT(AB8540_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
2891        /*
2892         * 0x01, Vaux5Disch
2893         * 0x02, Vaux6Disch
2894         * 0x04, VCLKBDisch
2895         */
2896        REG_INIT(AB8540_REGUCTRLDISCH4,         0x04, 0x49, 0x07),
2897};
2898
2899static struct of_regulator_match ab8500_regulator_match[] = {
2900        { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8500_LDO_AUX1, },
2901        { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8500_LDO_AUX2, },
2902        { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8500_LDO_AUX3, },
2903        { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
2904        { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB8500_LDO_TVOUT, },
2905        { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8500_LDO_AUDIO, },
2906        { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
2907        { .name = "ab8500_ldo_anamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
2908        { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB8500_LDO_DMIC, },
2909        { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8500_LDO_ANA, },
2910};
2911
2912static struct of_regulator_match ab8505_regulator_match[] = {
2913        { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8505_LDO_AUX1, },
2914        { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8505_LDO_AUX2, },
2915        { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8505_LDO_AUX3, },
2916        { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB8505_LDO_AUX4, },
2917        { .name = "ab8500_ldo_aux5",    .driver_data = (void *) AB8505_LDO_AUX5, },
2918        { .name = "ab8500_ldo_aux6",    .driver_data = (void *) AB8505_LDO_AUX6, },
2919        { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8505_LDO_INTCORE, },
2920        { .name = "ab8500_ldo_adc",     .driver_data = (void *) AB8505_LDO_ADC, },
2921        { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8505_LDO_AUDIO, },
2922        { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8505_LDO_ANAMIC1, },
2923        { .name = "ab8500_ldo_anamic2", .driver_data = (void *) AB8505_LDO_ANAMIC2, },
2924        { .name = "ab8500_ldo_aux8",    .driver_data = (void *) AB8505_LDO_AUX8, },
2925        { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8505_LDO_ANA, },
2926};
2927
2928static struct of_regulator_match ab8540_regulator_match[] = {
2929        { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8540_LDO_AUX1, },
2930        { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8540_LDO_AUX2, },
2931        { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8540_LDO_AUX3, },
2932        { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB8540_LDO_AUX4, },
2933        { .name = "ab8500_ldo_aux5",    .driver_data = (void *) AB8540_LDO_AUX5, },
2934        { .name = "ab8500_ldo_aux6",    .driver_data = (void *) AB8540_LDO_AUX6, },
2935        { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8540_LDO_INTCORE, },
2936        { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB8540_LDO_TVOUT, },
2937        { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8540_LDO_AUDIO, },
2938        { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8540_LDO_ANAMIC1, },
2939        { .name = "ab8500_ldo_anamic2", .driver_data = (void *) AB8540_LDO_ANAMIC2, },
2940        { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB8540_LDO_DMIC, },
2941        { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8540_LDO_ANA, },
2942        { .name = "ab8500_ldo_sdio",    .driver_data = (void *) AB8540_LDO_SDIO, },
2943};
2944
2945static struct of_regulator_match ab9540_regulator_match[] = {
2946        { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB9540_LDO_AUX1, },
2947        { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB9540_LDO_AUX2, },
2948        { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB9540_LDO_AUX3, },
2949        { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB9540_LDO_AUX4, },
2950        { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB9540_LDO_INTCORE, },
2951        { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB9540_LDO_TVOUT, },
2952        { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB9540_LDO_AUDIO, },
2953        { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB9540_LDO_ANAMIC1, },
2954        { .name = "ab8500_ldo_anamic2", .driver_data = (void *) AB9540_LDO_ANAMIC2, },
2955        { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB9540_LDO_DMIC, },
2956        { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB9540_LDO_ANA, },
2957};
2958
2959static struct {
2960        struct ab8500_regulator_info *info;
2961        int info_size;
2962        struct ab8500_reg_init *init;
2963        int init_size;
2964        struct of_regulator_match *match;
2965        int match_size;
2966} abx500_regulator;
2967
2968static void abx500_get_regulator_info(struct ab8500 *ab8500)
2969{
2970        if (is_ab9540(ab8500)) {
2971                abx500_regulator.info = ab9540_regulator_info;
2972                abx500_regulator.info_size = ARRAY_SIZE(ab9540_regulator_info);
2973                abx500_regulator.init = ab9540_reg_init;
2974                abx500_regulator.init_size = AB9540_NUM_REGULATOR_REGISTERS;
2975                abx500_regulator.match = ab9540_regulator_match;
2976                abx500_regulator.match_size = ARRAY_SIZE(ab9540_regulator_match);
2977        } else if (is_ab8505(ab8500)) {
2978                abx500_regulator.info = ab8505_regulator_info;
2979                abx500_regulator.info_size = ARRAY_SIZE(ab8505_regulator_info);
2980                abx500_regulator.init = ab8505_reg_init;
2981                abx500_regulator.init_size = AB8505_NUM_REGULATOR_REGISTERS;
2982                abx500_regulator.match = ab8505_regulator_match;
2983                abx500_regulator.match_size = ARRAY_SIZE(ab8505_regulator_match);
2984        } else if (is_ab8540(ab8500)) {
2985                abx500_regulator.info = ab8540_regulator_info;
2986                abx500_regulator.info_size = ARRAY_SIZE(ab8540_regulator_info);
2987                abx500_regulator.init = ab8540_reg_init;
2988                abx500_regulator.init_size = AB8540_NUM_REGULATOR_REGISTERS;
2989                abx500_regulator.match = ab8540_regulator_match;
2990                abx500_regulator.match_size = ARRAY_SIZE(ab8540_regulator_match);
2991        } else {
2992                abx500_regulator.info = ab8500_regulator_info;
2993                abx500_regulator.info_size = ARRAY_SIZE(ab8500_regulator_info);
2994                abx500_regulator.init = ab8500_reg_init;
2995                abx500_regulator.init_size = AB8500_NUM_REGULATOR_REGISTERS;
2996                abx500_regulator.match = ab8500_regulator_match;
2997                abx500_regulator.match_size = ARRAY_SIZE(ab8500_regulator_match);
2998        }
2999}
3000
3001static int ab8500_regulator_init_registers(struct platform_device *pdev,
3002                                           int id, int mask, int value)
3003{
3004        struct ab8500_reg_init *reg_init = abx500_regulator.init;
3005        int err;
3006
3007        BUG_ON(value & ~mask);
3008        BUG_ON(mask & ~reg_init[id].mask);
3009
3010        /* initialize register */
3011        err = abx500_mask_and_set_register_interruptible(
3012                &pdev->dev,
3013                reg_init[id].bank,
3014                reg_init[id].addr,
3015                mask, value);
3016        if (err < 0) {
3017                dev_err(&pdev->dev,
3018                        "Failed to initialize 0x%02x, 0x%02x.\n",
3019                        reg_init[id].bank,
3020                        reg_init[id].addr);
3021                return err;
3022        }
3023        dev_vdbg(&pdev->dev,
3024                 "  init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
3025                 reg_init[id].bank,
3026                 reg_init[id].addr,
3027                 mask, value);
3028
3029        return 0;
3030}
3031
3032static int ab8500_regulator_register(struct platform_device *pdev,
3033                                     struct regulator_init_data *init_data,
3034                                     int id, struct device_node *np)
3035{
3036        struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
3037        struct ab8500_regulator_info *info = NULL;
3038        struct regulator_config config = { };
3039        int err;
3040
3041        /* assign per-regulator data */
3042        info = &abx500_regulator.info[id];
3043        info->dev = &pdev->dev;
3044
3045        config.dev = &pdev->dev;
3046        config.init_data = init_data;
3047        config.driver_data = info;
3048        config.of_node = np;
3049
3050        /* fix for hardware before ab8500v2.0 */
3051        if (is_ab8500_1p1_or_earlier(ab8500)) {
3052                if (info->desc.id == AB8500_LDO_AUX3) {
3053                        info->desc.n_voltages =
3054                                ARRAY_SIZE(ldo_vauxn_voltages);
3055                        info->desc.volt_table = ldo_vauxn_voltages;
3056                        info->voltage_mask = 0xf;
3057                }
3058        }
3059
3060        /* register regulator with framework */
3061        info->regulator = regulator_register(&info->desc, &config);
3062        if (IS_ERR(info->regulator)) {
3063                err = PTR_ERR(info->regulator);
3064                dev_err(&pdev->dev, "failed to register regulator %s\n",
3065                        info->desc.name);
3066                /* when we fail, un-register all earlier regulators */
3067                while (--id >= 0) {
3068                        info = &abx500_regulator.info[id];
3069                        regulator_unregister(info->regulator);
3070                }
3071                return err;
3072        }
3073
3074        return 0;
3075}
3076
3077static int
3078ab8500_regulator_of_probe(struct platform_device *pdev,
3079                          struct device_node *np)
3080{
3081        struct of_regulator_match *match = abx500_regulator.match;
3082        int err, i;
3083
3084        for (i = 0; i < abx500_regulator.info_size; i++) {
3085                err = ab8500_regulator_register(
3086                        pdev, match[i].init_data, i, match[i].of_node);
3087                if (err)
3088                        return err;
3089        }
3090
3091        return 0;
3092}
3093
3094static int ab8500_regulator_probe(struct platform_device *pdev)
3095{
3096        struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
3097        struct device_node *np = pdev->dev.of_node;
3098        struct ab8500_platform_data *ppdata;
3099        struct ab8500_regulator_platform_data *pdata;
3100        int i, err;
3101
3102        if (!ab8500) {
3103                dev_err(&pdev->dev, "null mfd parent\n");
3104                return -EINVAL;
3105        }
3106
3107        abx500_get_regulator_info(ab8500);
3108
3109        if (np) {
3110                err = of_regulator_match(&pdev->dev, np,
3111                                         abx500_regulator.match,
3112                                         abx500_regulator.match_size);
3113                if (err < 0) {
3114                        dev_err(&pdev->dev,
3115                                "Error parsing regulator init data: %d\n", err);
3116                        return err;
3117                }
3118
3119                err = ab8500_regulator_of_probe(pdev, np);
3120                return err;
3121        }
3122
3123        ppdata = dev_get_platdata(ab8500->dev);
3124        if (!ppdata) {
3125                dev_err(&pdev->dev, "null parent pdata\n");
3126                return -EINVAL;
3127        }
3128
3129        pdata = ppdata->regulator;
3130        if (!pdata) {
3131                dev_err(&pdev->dev, "null pdata\n");
3132                return -EINVAL;
3133        }
3134
3135        /* make sure the platform data has the correct size */
3136        if (pdata->num_regulator != abx500_regulator.info_size) {
3137                dev_err(&pdev->dev, "Configuration error: size mismatch.\n");
3138                return -EINVAL;
3139        }
3140
3141        /* initialize debug (initial state is recorded with this call) */
3142        err = ab8500_regulator_debug_init(pdev);
3143        if (err)
3144                return err;
3145
3146        /* initialize registers */
3147        for (i = 0; i < pdata->num_reg_init; i++) {
3148                int id, mask, value;
3149
3150                id = pdata->reg_init[i].id;
3151                mask = pdata->reg_init[i].mask;
3152                value = pdata->reg_init[i].value;
3153
3154                /* check for configuration errors */
3155                BUG_ON(id >= abx500_regulator.init_size);
3156
3157                err = ab8500_regulator_init_registers(pdev, id, mask, value);
3158                if (err < 0)
3159                        return err;
3160        }
3161
3162        /* register all regulators */
3163        for (i = 0; i < abx500_regulator.info_size; i++) {
3164                err = ab8500_regulator_register(pdev, &pdata->regulator[i],
3165                                                i, NULL);
3166                if (err < 0)
3167                        return err;
3168        }
3169
3170        return 0;
3171}
3172
3173static int ab8500_regulator_remove(struct platform_device *pdev)
3174{
3175        int i, err;
3176
3177        for (i = 0; i < abx500_regulator.info_size; i++) {
3178                struct ab8500_regulator_info *info = NULL;
3179                info = &abx500_regulator.info[i];
3180
3181                dev_vdbg(rdev_get_dev(info->regulator),
3182                        "%s-remove\n", info->desc.name);
3183
3184                regulator_unregister(info->regulator);
3185        }
3186
3187        /* remove regulator debug */
3188        err = ab8500_regulator_debug_exit(pdev);
3189        if (err)
3190                return err;
3191
3192        return 0;
3193}
3194
3195static struct platform_driver ab8500_regulator_driver = {
3196        .probe = ab8500_regulator_probe,
3197        .remove = ab8500_regulator_remove,
3198        .driver         = {
3199                .name   = "ab8500-regulator",
3200                .owner  = THIS_MODULE,
3201        },
3202};
3203
3204static int __init ab8500_regulator_init(void)
3205{
3206        int ret;
3207
3208        ret = platform_driver_register(&ab8500_regulator_driver);
3209        if (ret != 0)
3210                pr_err("Failed to register ab8500 regulator: %d\n", ret);
3211
3212        return ret;
3213}
3214subsys_initcall(ab8500_regulator_init);
3215
3216static void __exit ab8500_regulator_exit(void)
3217{
3218        platform_driver_unregister(&ab8500_regulator_driver);
3219}
3220module_exit(ab8500_regulator_exit);
3221
3222MODULE_LICENSE("GPL v2");
3223MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
3224MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
3225MODULE_AUTHOR("Daniel Willerud <daniel.willerud@stericsson.com>");
3226MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
3227MODULE_ALIAS("platform:ab8500-regulator");
3228
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