linux/drivers/pinctrl/pinctrl-ab9540.c
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   1/*
   2 * Copyright (C) ST-Ericsson SA 2012
   3 *
   4 * Author: Patrice Chotard <patrice.chotard@stericsson.com> for ST-Ericsson.
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License version 2 as
   8 * published by the Free Software Foundation.
   9 */
  10
  11#include <linux/kernel.h>
  12#include <linux/gpio.h>
  13#include <linux/pinctrl/pinctrl.h>
  14#include <linux/mfd/abx500/ab8500.h>
  15#include "pinctrl-abx500.h"
  16
  17/* All the pins that can be used for GPIO and some other functions */
  18#define ABX500_GPIO(offset)             (offset)
  19
  20#define AB9540_PIN_R4           ABX500_GPIO(1)
  21#define AB9540_PIN_V3           ABX500_GPIO(2)
  22#define AB9540_PIN_T4           ABX500_GPIO(3)
  23#define AB9540_PIN_T5           ABX500_GPIO(4)
  24/* hole */
  25#define AB9540_PIN_B18          ABX500_GPIO(10)
  26#define AB9540_PIN_C18          ABX500_GPIO(11)
  27/* hole */
  28#define AB9540_PIN_D18          ABX500_GPIO(13)
  29#define AB9540_PIN_B19          ABX500_GPIO(14)
  30#define AB9540_PIN_C19          ABX500_GPIO(15)
  31#define AB9540_PIN_D19          ABX500_GPIO(16)
  32#define AB9540_PIN_R3           ABX500_GPIO(17)
  33#define AB9540_PIN_T2           ABX500_GPIO(18)
  34#define AB9540_PIN_U2           ABX500_GPIO(19)
  35#define AB9540_PIN_V2           ABX500_GPIO(20)
  36#define AB9540_PIN_N17          ABX500_GPIO(21)
  37#define AB9540_PIN_N16          ABX500_GPIO(22)
  38#define AB9540_PIN_M19          ABX500_GPIO(23)
  39#define AB9540_PIN_T3           ABX500_GPIO(24)
  40#define AB9540_PIN_W2           ABX500_GPIO(25)
  41/* hole */
  42#define AB9540_PIN_H4           ABX500_GPIO(27)
  43#define AB9540_PIN_F1           ABX500_GPIO(28)
  44#define AB9540_PIN_F4           ABX500_GPIO(29)
  45#define AB9540_PIN_F2           ABX500_GPIO(30)
  46#define AB9540_PIN_E4           ABX500_GPIO(31)
  47#define AB9540_PIN_F3           ABX500_GPIO(32)
  48/* hole */
  49#define AB9540_PIN_J13          ABX500_GPIO(34)
  50/* hole */
  51#define AB9540_PIN_L17          ABX500_GPIO(40)
  52#define AB9540_PIN_L16          ABX500_GPIO(41)
  53#define AB9540_PIN_W3           ABX500_GPIO(42)
  54#define AB9540_PIN_N4           ABX500_GPIO(50)
  55#define AB9540_PIN_G12          ABX500_GPIO(51)
  56#define AB9540_PIN_E17          ABX500_GPIO(52)
  57#define AB9540_PIN_D11          ABX500_GPIO(53)
  58#define AB9540_PIN_M18          ABX500_GPIO(54)
  59
  60/* indicates the highest GPIO number */
  61#define AB9540_GPIO_MAX_NUMBER  54
  62
  63/*
  64 * The names of the pins are denoted by GPIO number and ball name, even
  65 * though they can be used for other things than GPIO, this is the first
  66 * column in the table of the data sheet and often used on schematics and
  67 * such.
  68 */
  69static const struct pinctrl_pin_desc ab9540_pins[] = {
  70        PINCTRL_PIN(AB9540_PIN_R4, "GPIO1_R4"),
  71        PINCTRL_PIN(AB9540_PIN_V3, "GPIO2_V3"),
  72        PINCTRL_PIN(AB9540_PIN_T4, "GPIO3_T4"),
  73        PINCTRL_PIN(AB9540_PIN_T5, "GPIO4_T5"),
  74        /* hole */
  75        PINCTRL_PIN(AB9540_PIN_B18, "GPIO10_B18"),
  76        PINCTRL_PIN(AB9540_PIN_C18, "GPIO11_C18"),
  77        /* hole */
  78        PINCTRL_PIN(AB9540_PIN_D18, "GPIO13_D18"),
  79        PINCTRL_PIN(AB9540_PIN_B19, "GPIO14_B19"),
  80        PINCTRL_PIN(AB9540_PIN_C19, "GPIO15_C19"),
  81        PINCTRL_PIN(AB9540_PIN_D19, "GPIO16_D19"),
  82        PINCTRL_PIN(AB9540_PIN_R3, "GPIO17_R3"),
  83        PINCTRL_PIN(AB9540_PIN_T2, "GPIO18_T2"),
  84        PINCTRL_PIN(AB9540_PIN_U2, "GPIO19_U2"),
  85        PINCTRL_PIN(AB9540_PIN_V2, "GPIO20_V2"),
  86        PINCTRL_PIN(AB9540_PIN_N17, "GPIO21_N17"),
  87        PINCTRL_PIN(AB9540_PIN_N16, "GPIO22_N16"),
  88        PINCTRL_PIN(AB9540_PIN_M19, "GPIO23_M19"),
  89        PINCTRL_PIN(AB9540_PIN_T3, "GPIO24_T3"),
  90        PINCTRL_PIN(AB9540_PIN_W2, "GPIO25_W2"),
  91        /* hole */
  92        PINCTRL_PIN(AB9540_PIN_H4, "GPIO27_H4"),
  93        PINCTRL_PIN(AB9540_PIN_F1, "GPIO28_F1"),
  94        PINCTRL_PIN(AB9540_PIN_F4, "GPIO29_F4"),
  95        PINCTRL_PIN(AB9540_PIN_F2, "GPIO30_F2"),
  96        PINCTRL_PIN(AB9540_PIN_E4, "GPIO31_E4"),
  97        PINCTRL_PIN(AB9540_PIN_F3, "GPIO32_F3"),
  98        /* hole */
  99        PINCTRL_PIN(AB9540_PIN_J13, "GPIO34_J13"),
 100        /* hole */
 101        PINCTRL_PIN(AB9540_PIN_L17, "GPIO40_L17"),
 102        PINCTRL_PIN(AB9540_PIN_L16, "GPIO41_L16"),
 103        PINCTRL_PIN(AB9540_PIN_W3, "GPIO42_W3"),
 104        PINCTRL_PIN(AB9540_PIN_N4, "GPIO50_N4"),
 105        PINCTRL_PIN(AB9540_PIN_G12, "GPIO51_G12"),
 106        PINCTRL_PIN(AB9540_PIN_E17, "GPIO52_E17"),
 107        PINCTRL_PIN(AB9540_PIN_D11, "GPIO53_D11"),
 108        PINCTRL_PIN(AB9540_PIN_M18, "GPIO60_M18"),
 109};
 110
 111/*
 112 * Maps local GPIO offsets to local pin numbers
 113 */
 114static const struct abx500_pinrange ab9540_pinranges[] = {
 115        ABX500_PINRANGE(1, 4, ABX500_ALT_A),
 116        ABX500_PINRANGE(10, 2, ABX500_DEFAULT),
 117        ABX500_PINRANGE(13, 1, ABX500_DEFAULT),
 118        ABX500_PINRANGE(14, 12, ABX500_ALT_A),
 119        ABX500_PINRANGE(27, 6, ABX500_ALT_A),
 120        ABX500_PINRANGE(34, 1, ABX500_ALT_A),
 121        ABX500_PINRANGE(40, 3, ABX500_ALT_A),
 122        ABX500_PINRANGE(50, 1, ABX500_DEFAULT),
 123        ABX500_PINRANGE(51, 3, ABX500_ALT_A),
 124        ABX500_PINRANGE(54, 1, ABX500_DEFAULT),
 125};
 126
 127/*
 128 * Read the pin group names like this:
 129 * sysclkreq2_d_1 = first groups of pins for sysclkreq2 on default function
 130 *
 131 * The groups are arranged as sets per altfunction column, so we can
 132 * mux in one group at a time by selecting the same altfunction for them
 133 * all. When functions require pins on different altfunctions, you need
 134 * to combine several groups.
 135 */
 136
 137/* default column */
 138static const unsigned sysclkreq2_d_1_pins[] = { AB9540_PIN_R4 };
 139static const unsigned sysclkreq3_d_1_pins[] = { AB9540_PIN_V3 };
 140static const unsigned sysclkreq4_d_1_pins[] = { AB9540_PIN_T4 };
 141static const unsigned sysclkreq6_d_1_pins[] = { AB9540_PIN_T5 };
 142static const unsigned gpio10_d_1_pins[] = { AB9540_PIN_B18 };
 143static const unsigned gpio11_d_1_pins[] = { AB9540_PIN_C18 };
 144static const unsigned gpio13_d_1_pins[] = { AB9540_PIN_D18 };
 145static const unsigned pwmout1_d_1_pins[] = { AB9540_PIN_B19 };
 146static const unsigned pwmout2_d_1_pins[] = { AB9540_PIN_C19 };
 147static const unsigned pwmout3_d_1_pins[] = { AB9540_PIN_D19 };
 148/* audio data interface 1*/
 149static const unsigned adi1_d_1_pins[] = { AB9540_PIN_R3, AB9540_PIN_T2,
 150                                        AB9540_PIN_U2, AB9540_PIN_V2 };
 151/* USBUICC */
 152static const unsigned usbuicc_d_1_pins[] = { AB9540_PIN_N17, AB9540_PIN_N16,
 153                                        AB9540_PIN_M19 };
 154static const unsigned sysclkreq7_d_1_pins[] = { AB9540_PIN_T3 };
 155static const unsigned sysclkreq8_d_1_pins[] = { AB9540_PIN_W2 };
 156/* Digital microphone 1 and 2 */
 157static const unsigned dmic12_d_1_pins[] = { AB9540_PIN_H4, AB9540_PIN_F1 };
 158/* Digital microphone 3 and 4 */
 159static const unsigned dmic34_d_1_pins[] = { AB9540_PIN_F4, AB9540_PIN_F2 };
 160/* Digital microphone 5 and 6 */
 161static const unsigned dmic56_d_1_pins[] = { AB9540_PIN_E4, AB9540_PIN_F3 };
 162static const unsigned extcpena_d_1_pins[] = { AB9540_PIN_J13 };
 163/* modem SDA/SCL */
 164static const unsigned modsclsda_d_1_pins[] = { AB9540_PIN_L17, AB9540_PIN_L16 };
 165static const unsigned sysclkreq5_d_1_pins[] = { AB9540_PIN_W3 };
 166static const unsigned gpio50_d_1_pins[] = { AB9540_PIN_N4 };
 167static const unsigned batremn_d_1_pins[] = { AB9540_PIN_G12 };
 168static const unsigned resethw_d_1_pins[] = { AB9540_PIN_E17 };
 169static const unsigned service_d_1_pins[] = { AB9540_PIN_D11 };
 170static const unsigned gpio60_d_1_pins[] = { AB9540_PIN_M18 };
 171
 172/* Altfunction A column */
 173static const unsigned gpio1_a_1_pins[] = { AB9540_PIN_R4 };
 174static const unsigned gpio2_a_1_pins[] = { AB9540_PIN_V3 };
 175static const unsigned gpio3_a_1_pins[] = { AB9540_PIN_T4 };
 176static const unsigned gpio4_a_1_pins[] = { AB9540_PIN_T5 };
 177static const unsigned hiqclkena_a_1_pins[] = { AB9540_PIN_B18 };
 178static const unsigned pdmclk_a_1_pins[] = { AB9540_PIN_C18 };
 179static const unsigned uartdata_a_1_pins[] = { AB9540_PIN_D18, AB9540_PIN_N4 };
 180static const unsigned gpio14_a_1_pins[] = { AB9540_PIN_B19 };
 181static const unsigned gpio15_a_1_pins[] = { AB9540_PIN_C19 };
 182static const unsigned gpio16_a_1_pins[] = { AB9540_PIN_D19 };
 183static const unsigned gpio17_a_1_pins[] = { AB9540_PIN_R3 };
 184static const unsigned gpio18_a_1_pins[] = { AB9540_PIN_T2 };
 185static const unsigned gpio19_a_1_pins[] = { AB9540_PIN_U2 };
 186static const unsigned gpio20_a_1_pins[] = { AB9540_PIN_V2 };
 187static const unsigned gpio21_a_1_pins[] = { AB9540_PIN_N17 };
 188static const unsigned gpio22_a_1_pins[] = { AB9540_PIN_N16 };
 189static const unsigned gpio23_a_1_pins[] = { AB9540_PIN_M19 };
 190static const unsigned gpio24_a_1_pins[] = { AB9540_PIN_T3 };
 191static const unsigned gpio25_a_1_pins[] = { AB9540_PIN_W2 };
 192static const unsigned gpio27_a_1_pins[] = { AB9540_PIN_H4 };
 193static const unsigned gpio28_a_1_pins[] = { AB9540_PIN_F1 };
 194static const unsigned gpio29_a_1_pins[] = { AB9540_PIN_F4 };
 195static const unsigned gpio30_a_1_pins[] = { AB9540_PIN_F2 };
 196static const unsigned gpio31_a_1_pins[] = { AB9540_PIN_E4 };
 197static const unsigned gpio32_a_1_pins[] = { AB9540_PIN_F3 };
 198static const unsigned gpio34_a_1_pins[] = { AB9540_PIN_J13 };
 199static const unsigned gpio40_a_1_pins[] = { AB9540_PIN_L17 };
 200static const unsigned gpio41_a_1_pins[] = { AB9540_PIN_L16 };
 201static const unsigned gpio42_a_1_pins[] = { AB9540_PIN_W3 };
 202static const unsigned gpio51_a_1_pins[] = { AB9540_PIN_G12 };
 203static const unsigned gpio52_a_1_pins[] = { AB9540_PIN_E17 };
 204static const unsigned gpio53_a_1_pins[] = { AB9540_PIN_D11 };
 205static const unsigned usbuiccpd_a_1_pins[] = { AB9540_PIN_M18 };
 206
 207/* Altfunction B colum */
 208static const unsigned pdmdata_b_1_pins[] = { AB9540_PIN_B18 };
 209static const unsigned pwmextvibra1_b_1_pins[] = { AB9540_PIN_D18 };
 210static const unsigned pwmextvibra2_b_1_pins[] = { AB9540_PIN_N4 };
 211
 212/* Altfunction C column */
 213static const unsigned usbvdat_c_1_pins[] = { AB9540_PIN_D18 };
 214
 215#define AB9540_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins,          \
 216                        .npins = ARRAY_SIZE(a##_pins), .altsetting = b }
 217
 218static const struct abx500_pingroup ab9540_groups[] = {
 219        /* default column */
 220        AB9540_PIN_GROUP(sysclkreq2_d_1, ABX500_DEFAULT),
 221        AB9540_PIN_GROUP(sysclkreq3_d_1, ABX500_DEFAULT),
 222        AB9540_PIN_GROUP(sysclkreq4_d_1, ABX500_DEFAULT),
 223        AB9540_PIN_GROUP(sysclkreq6_d_1, ABX500_DEFAULT),
 224        AB9540_PIN_GROUP(gpio10_d_1, ABX500_DEFAULT),
 225        AB9540_PIN_GROUP(gpio11_d_1, ABX500_DEFAULT),
 226        AB9540_PIN_GROUP(gpio13_d_1, ABX500_DEFAULT),
 227        AB9540_PIN_GROUP(pwmout1_d_1, ABX500_DEFAULT),
 228        AB9540_PIN_GROUP(pwmout2_d_1, ABX500_DEFAULT),
 229        AB9540_PIN_GROUP(pwmout3_d_1, ABX500_DEFAULT),
 230        AB9540_PIN_GROUP(adi1_d_1, ABX500_DEFAULT),
 231        AB9540_PIN_GROUP(usbuicc_d_1, ABX500_DEFAULT),
 232        AB9540_PIN_GROUP(sysclkreq7_d_1, ABX500_DEFAULT),
 233        AB9540_PIN_GROUP(sysclkreq8_d_1, ABX500_DEFAULT),
 234        AB9540_PIN_GROUP(dmic12_d_1, ABX500_DEFAULT),
 235        AB9540_PIN_GROUP(dmic34_d_1, ABX500_DEFAULT),
 236        AB9540_PIN_GROUP(dmic56_d_1, ABX500_DEFAULT),
 237        AB9540_PIN_GROUP(extcpena_d_1, ABX500_DEFAULT),
 238        AB9540_PIN_GROUP(modsclsda_d_1, ABX500_DEFAULT),
 239        AB9540_PIN_GROUP(sysclkreq5_d_1, ABX500_DEFAULT),
 240        AB9540_PIN_GROUP(gpio50_d_1, ABX500_DEFAULT),
 241        AB9540_PIN_GROUP(batremn_d_1, ABX500_DEFAULT),
 242        AB9540_PIN_GROUP(resethw_d_1, ABX500_DEFAULT),
 243        AB9540_PIN_GROUP(service_d_1, ABX500_DEFAULT),
 244        AB9540_PIN_GROUP(gpio60_d_1, ABX500_DEFAULT),
 245
 246        /* Altfunction A column */
 247        AB9540_PIN_GROUP(gpio1_a_1, ABX500_ALT_A),
 248        AB9540_PIN_GROUP(gpio2_a_1, ABX500_ALT_A),
 249        AB9540_PIN_GROUP(gpio3_a_1, ABX500_ALT_A),
 250        AB9540_PIN_GROUP(gpio4_a_1, ABX500_ALT_A),
 251        AB9540_PIN_GROUP(hiqclkena_a_1, ABX500_ALT_A),
 252        AB9540_PIN_GROUP(pdmclk_a_1, ABX500_ALT_A),
 253        AB9540_PIN_GROUP(uartdata_a_1, ABX500_ALT_A),
 254        AB9540_PIN_GROUP(gpio14_a_1, ABX500_ALT_A),
 255        AB9540_PIN_GROUP(gpio15_a_1, ABX500_ALT_A),
 256        AB9540_PIN_GROUP(gpio16_a_1, ABX500_ALT_A),
 257        AB9540_PIN_GROUP(gpio17_a_1, ABX500_ALT_A),
 258        AB9540_PIN_GROUP(gpio18_a_1, ABX500_ALT_A),
 259        AB9540_PIN_GROUP(gpio19_a_1, ABX500_ALT_A),
 260        AB9540_PIN_GROUP(gpio20_a_1, ABX500_ALT_A),
 261        AB9540_PIN_GROUP(gpio21_a_1, ABX500_ALT_A),
 262        AB9540_PIN_GROUP(gpio22_a_1, ABX500_ALT_A),
 263        AB9540_PIN_GROUP(gpio23_a_1, ABX500_ALT_A),
 264        AB9540_PIN_GROUP(gpio24_a_1, ABX500_ALT_A),
 265        AB9540_PIN_GROUP(gpio25_a_1, ABX500_ALT_A),
 266        AB9540_PIN_GROUP(gpio27_a_1, ABX500_ALT_A),
 267        AB9540_PIN_GROUP(gpio28_a_1, ABX500_ALT_A),
 268        AB9540_PIN_GROUP(gpio29_a_1, ABX500_ALT_A),
 269        AB9540_PIN_GROUP(gpio30_a_1, ABX500_ALT_A),
 270        AB9540_PIN_GROUP(gpio31_a_1, ABX500_ALT_A),
 271        AB9540_PIN_GROUP(gpio32_a_1, ABX500_ALT_A),
 272        AB9540_PIN_GROUP(gpio34_a_1, ABX500_ALT_A),
 273        AB9540_PIN_GROUP(gpio40_a_1, ABX500_ALT_A),
 274        AB9540_PIN_GROUP(gpio41_a_1, ABX500_ALT_A),
 275        AB9540_PIN_GROUP(gpio42_a_1, ABX500_ALT_A),
 276        AB9540_PIN_GROUP(gpio51_a_1, ABX500_ALT_A),
 277        AB9540_PIN_GROUP(gpio52_a_1, ABX500_ALT_A),
 278        AB9540_PIN_GROUP(gpio53_a_1, ABX500_ALT_A),
 279        AB9540_PIN_GROUP(usbuiccpd_a_1, ABX500_ALT_A),
 280
 281        /* Altfunction B column */
 282        AB9540_PIN_GROUP(pdmdata_b_1, ABX500_ALT_B),
 283        AB9540_PIN_GROUP(pwmextvibra1_b_1, ABX500_ALT_B),
 284        AB9540_PIN_GROUP(pwmextvibra2_b_1, ABX500_ALT_B),
 285
 286        /* Altfunction C column */
 287        AB9540_PIN_GROUP(usbvdat_c_1, ABX500_ALT_C),
 288};
 289
 290/* We use this macro to define the groups applicable to a function */
 291#define AB9540_FUNC_GROUPS(a, b...)        \
 292static const char * const a##_groups[] = { b };
 293
 294AB9540_FUNC_GROUPS(sysclkreq, "sysclkreq2_d_1", "sysclkreq3_d_1",
 295                "sysclkreq4_d_1", "sysclkreq5_d_1", "sysclkreq6_d_1",
 296                "sysclkreq7_d_1", "sysclkreq8_d_1");
 297AB9540_FUNC_GROUPS(gpio, "gpio1_a_1", "gpio2_a_1", "gpio3_a_1", "gpio4_a_1",
 298                "gpio10_d_1", "gpio11_d_1", "gpio13_d_1", "gpio14_a_1",
 299                "gpio15_a_1", "gpio16_a_1", "gpio17_a_1", "gpio18_a_1",
 300                "gpio19_a_1", "gpio20_a_1", "gpio21_a_1", "gpio22_a_1",
 301                "gpio23_a_1", "gpio24_a_1", "gpio25_a_1", "gpio27_a_1",
 302                "gpio28_a_1", "gpio29_a_1", "gpio30_a_1", "gpio31_a_1",
 303                "gpio32_a_1", "gpio34_a_1", "gpio40_a_1", "gpio41_a_1",
 304                "gpio42_a_1", "gpio50_d_1", "gpio51_a_1", "gpio52_a_1",
 305                "gpio53_a_1", "gpio60_d_1");
 306AB9540_FUNC_GROUPS(pwmout, "pwmout1_d_1", "pwmout2_d_1", "pwmout3_d_1");
 307AB9540_FUNC_GROUPS(adi1, "adi1_d_1");
 308AB9540_FUNC_GROUPS(usbuicc, "usbuicc_d_1", "usbuiccpd_a_1");
 309AB9540_FUNC_GROUPS(dmic, "dmic12_d_1", "dmic34_d_1", "dmic56_d_1");
 310AB9540_FUNC_GROUPS(extcpena, "extcpena_d_1");
 311AB9540_FUNC_GROUPS(modsclsda, "modsclsda_d_1");
 312AB9540_FUNC_GROUPS(batremn, "batremn_d_1");
 313AB9540_FUNC_GROUPS(resethw, "resethw_d_1");
 314AB9540_FUNC_GROUPS(service, "service_d_1");
 315AB9540_FUNC_GROUPS(hiqclkena, "hiqclkena_a_1");
 316AB9540_FUNC_GROUPS(pdm, "pdmdata_b_1", "pdmclk_a_1");
 317AB9540_FUNC_GROUPS(uartdata, "uartdata_a_1");
 318AB9540_FUNC_GROUPS(pwmextvibra, "pwmextvibra1_b_1", "pwmextvibra2_b_1");
 319AB9540_FUNC_GROUPS(usbvdat, "usbvdat_c_1");
 320
 321#define FUNCTION(fname)                                 \
 322        {                                               \
 323                .name = #fname,                         \
 324                .groups = fname##_groups,               \
 325                .ngroups = ARRAY_SIZE(fname##_groups),  \
 326        }
 327
 328static const struct abx500_function ab9540_functions[] = {
 329        FUNCTION(sysclkreq),
 330        FUNCTION(gpio),
 331        FUNCTION(pwmout),
 332        FUNCTION(adi1),
 333        FUNCTION(usbuicc),
 334        FUNCTION(dmic),
 335        FUNCTION(extcpena),
 336        FUNCTION(modsclsda),
 337        FUNCTION(batremn),
 338        FUNCTION(resethw),
 339        FUNCTION(service),
 340        FUNCTION(hiqclkena),
 341        FUNCTION(pdm),
 342        FUNCTION(uartdata),
 343        FUNCTION(pwmextvibra),
 344        FUNCTION(usbvdat),
 345};
 346
 347/*
 348 * this table translates what's is in the AB9540 specification regarding the
 349 * balls alternate functions (as for DB, default, ALT_A, ALT_B and ALT_C).
 350 * ALTERNATE_FUNCTIONS(GPIO_NUMBER, GPIOSEL bit, ALTERNATFUNC bit1,
 351 * ALTERNATEFUNC bit2, ALTA val, ALTB val, ALTC val),
 352 *
 353 * example :
 354 *
 355 *      ALTERNATE_FUNCTIONS(13,     4,      3,      4, 1, 0, 2),
 356 *      means that pin AB9540_PIN_D18 (pin 13) supports 4 mux (default/ALT_A,
 357 *      ALT_B and ALT_C), so GPIOSEL and ALTERNATFUNC registers are used to
 358 *      select the mux. ALTA, ALTB and ALTC val indicates values to write in
 359 *      ALTERNATFUNC register. We need to specifies these values as SOC
 360 *      designers didn't apply the same logic on how to select mux in the
 361 *      ABx500 family.
 362 *
 363 *      As this pins supports at least ALT_B mux, default mux is
 364 *      selected by writing 1 in GPIOSEL bit :
 365 *
 366 *              | GPIOSEL bit=4 | alternatfunc bit2=4 | alternatfunc bit1=3
 367 *      default |       1       |          0          |          0
 368 *      alt_A   |       0       |          0          |          1
 369 *      alt_B   |       0       |          0          |          0
 370 *      alt_C   |       0       |          1          |          0
 371 *
 372 *      ALTERNATE_FUNCTIONS(1,      0, UNUSED, UNUSED),
 373 *      means that pin AB9540_PIN_R4 (pin 1) supports 2 mux, so only GPIOSEL
 374 *      register is used to select the mux. As this pins doesn't support at
 375 *      least ALT_B mux, default mux is by writing 0 in GPIOSEL bit :
 376 *
 377 *              | GPIOSEL bit=0 | alternatfunc bit2=  | alternatfunc bit1=
 378 *      default |       0       |          0          |          0
 379 *      alt_A   |       1       |          0          |          0
 380 */
 381
 382static struct
 383alternate_functions ab9540alternate_functions[AB9540_GPIO_MAX_NUMBER + 1] = {
 384        /* GPIOSEL1 - bits 4-7 are reserved */
 385        ALTERNATE_FUNCTIONS(0, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO0 */
 386        ALTERNATE_FUNCTIONS(1,      0, UNUSED, UNUSED, 0, 0, 0), /* GPIO1, altA controlled by bit 0 */
 387        ALTERNATE_FUNCTIONS(2,      1, UNUSED, UNUSED, 0, 0, 0), /* GPIO2, altA controlled by bit 1 */
 388        ALTERNATE_FUNCTIONS(3,      2, UNUSED, UNUSED, 0, 0, 0), /* GPIO3, altA controlled by bit 2*/
 389        ALTERNATE_FUNCTIONS(4,      3, UNUSED, UNUSED, 0, 0, 0), /* GPIO4, altA controlled by bit 3*/
 390        ALTERNATE_FUNCTIONS(5, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO5 */
 391        ALTERNATE_FUNCTIONS(6, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO6 */
 392        ALTERNATE_FUNCTIONS(7, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO7 */
 393        ALTERNATE_FUNCTIONS(8, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO8 */
 394        /* GPIOSEL2 - bits 0 and 3 are reserved */
 395        ALTERNATE_FUNCTIONS(9, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO9 */
 396        ALTERNATE_FUNCTIONS(10,      1,      0, UNUSED, 1, 0, 0), /* GPIO10, altA and altB controlled by bit 0 */
 397        ALTERNATE_FUNCTIONS(11,      2,      1, UNUSED, 0, 0, 0), /* GPIO11, altA controlled by bit 1 */
 398        ALTERNATE_FUNCTIONS(12, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO12 */
 399        ALTERNATE_FUNCTIONS(13,      4,      3,      4, 1, 0, 2), /* GPIO13, altA altB and altC controlled by bit 3 and 4 */
 400        ALTERNATE_FUNCTIONS(14,      5, UNUSED, UNUSED, 0, 0, 0), /* GPIO14, altA controlled by bit 5 */
 401        ALTERNATE_FUNCTIONS(15,      6, UNUSED, UNUSED, 0, 0, 0), /* GPIO15, altA controlled by bit 6 */
 402        ALTERNATE_FUNCTIONS(16,      7, UNUSED, UNUSED, 0, 0, 0), /* GPIO16, altA controlled by bit 7 */
 403        /* GPIOSEL3 - bit 1-3 reserved
 404         * pins 17 to 20 are special case, only bit 0 is used to select
 405         * alternate function for these 4 pins.
 406         * bits 1 to 3 are reserved
 407         */
 408        ALTERNATE_FUNCTIONS(17,      0, UNUSED, UNUSED, 0, 0, 0), /* GPIO17, altA controlled by bit 0 */
 409        ALTERNATE_FUNCTIONS(18,      0, UNUSED, UNUSED, 0, 0, 0), /* GPIO18, altA controlled by bit 0 */
 410        ALTERNATE_FUNCTIONS(19,      0, UNUSED, UNUSED, 0, 0, 0), /* GPIO19, altA controlled by bit 0 */
 411        ALTERNATE_FUNCTIONS(20,      0, UNUSED, UNUSED, 0, 0, 0), /* GPIO20, altA controlled by bit 0 */
 412        ALTERNATE_FUNCTIONS(21,      4, UNUSED, UNUSED, 0, 0, 0), /* GPIO21, altA controlled by bit 4 */
 413        ALTERNATE_FUNCTIONS(22,      5, UNUSED, UNUSED, 0, 0, 0), /* GPIO22, altA controlled by bit 5 */
 414        ALTERNATE_FUNCTIONS(23,      6, UNUSED, UNUSED, 0, 0, 0), /* GPIO23, altA controlled by bit 6 */
 415        ALTERNATE_FUNCTIONS(24,      7, UNUSED, UNUSED, 0, 0, 0), /* GPIO24, altA controlled by bit 7 */
 416        /* GPIOSEL4 - bit 1 reserved */
 417        ALTERNATE_FUNCTIONS(25,      0, UNUSED, UNUSED, 0, 0, 0), /* GPIO25, altA controlled by bit 0 */
 418        ALTERNATE_FUNCTIONS(26, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO26 */
 419        ALTERNATE_FUNCTIONS(27,      2, UNUSED, UNUSED, 0, 0, 0), /* GPIO27, altA controlled by bit 2 */
 420        ALTERNATE_FUNCTIONS(28,      3, UNUSED, UNUSED, 0, 0, 0), /* GPIO28, altA controlled by bit 3 */
 421        ALTERNATE_FUNCTIONS(29,      4, UNUSED, UNUSED, 0, 0, 0), /* GPIO29, altA controlled by bit 4 */
 422        ALTERNATE_FUNCTIONS(30,      5, UNUSED, UNUSED, 0, 0, 0), /* GPIO30, altA controlled by bit 5 */
 423        ALTERNATE_FUNCTIONS(31,      6, UNUSED, UNUSED, 0, 0, 0), /* GPIO31, altA controlled by bit 6 */
 424        ALTERNATE_FUNCTIONS(32,      7, UNUSED, UNUSED, 0, 0, 0), /* GPIO32, altA controlled by bit 7 */
 425        /* GPIOSEL5 - bit 0, 2-6 are reserved */
 426        ALTERNATE_FUNCTIONS(33, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO33 */
 427        ALTERNATE_FUNCTIONS(34,      1, UNUSED, UNUSED, 0, 0, 0), /* GPIO34, altA controlled by bit 1 */
 428        ALTERNATE_FUNCTIONS(35, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO35 */
 429        ALTERNATE_FUNCTIONS(36, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO36 */
 430        ALTERNATE_FUNCTIONS(37, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO37 */
 431        ALTERNATE_FUNCTIONS(38, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO38 */
 432        ALTERNATE_FUNCTIONS(39, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO39 */
 433        ALTERNATE_FUNCTIONS(40,      7, UNUSED, UNUSED, 0, 0, 0), /* GPIO40, altA controlled by bit 7 */
 434        /* GPIOSEL6 - bit 2-7 are reserved */
 435        ALTERNATE_FUNCTIONS(41,      0, UNUSED, UNUSED, 0, 0, 0), /* GPIO41, altA controlled by bit 0 */
 436        ALTERNATE_FUNCTIONS(42,      1, UNUSED, UNUSED, 0, 0, 0), /* GPIO42, altA controlled by bit 1 */
 437        ALTERNATE_FUNCTIONS(43, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO43 */
 438        ALTERNATE_FUNCTIONS(44, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO44 */
 439        ALTERNATE_FUNCTIONS(45, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO45 */
 440        ALTERNATE_FUNCTIONS(46, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO46 */
 441        ALTERNATE_FUNCTIONS(47, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO47 */
 442        ALTERNATE_FUNCTIONS(48, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO48 */
 443        /*
 444         * GPIOSEL7 - bit 0 and 6-7 are reserved
 445         * special case with GPIO60, wich is located at offset 5 of gpiosel7
 446         * don't know why it has been called GPIO60 in AB9540 datasheet,
 447         * GPIO54 would be logical..., so at SOC point of view we consider
 448         * GPIO60 = GPIO54
 449         */
 450        ALTERNATE_FUNCTIONS(49,      0, UNUSED, UNUSED, 0, 0, 0), /* no GPIO49 */
 451        ALTERNATE_FUNCTIONS(50,      1,      2, UNUSED, 1, 0, 0), /* GPIO50, altA and altB controlled by bit 1 */
 452        ALTERNATE_FUNCTIONS(51,      2, UNUSED, UNUSED, 0, 0, 0), /* GPIO51, altA controlled by bit 2 */
 453        ALTERNATE_FUNCTIONS(52,      3, UNUSED, UNUSED, 0, 0, 0), /* GPIO52, altA controlled by bit 3 */
 454        ALTERNATE_FUNCTIONS(53,      4, UNUSED, UNUSED, 0, 0, 0), /* GPIO53, altA controlled by bit 4 */
 455        ALTERNATE_FUNCTIONS(54,      5, UNUSED, UNUSED, 0, 0, 0), /* GPIO54 = GPIO60, altA controlled by bit 5 */
 456};
 457
 458static struct abx500_gpio_irq_cluster ab9540_gpio_irq_cluster[] = {
 459        GPIO_IRQ_CLUSTER(10, 13, AB8500_INT_GPIO10R),
 460        GPIO_IRQ_CLUSTER(24, 25, AB8500_INT_GPIO24R),
 461        GPIO_IRQ_CLUSTER(40, 41, AB8500_INT_GPIO40R),
 462        GPIO_IRQ_CLUSTER(50, 54, AB9540_INT_GPIO50R),
 463};
 464
 465static struct abx500_pinctrl_soc_data ab9540_soc = {
 466        .gpio_ranges = ab9540_pinranges,
 467        .gpio_num_ranges = ARRAY_SIZE(ab9540_pinranges),
 468        .pins = ab9540_pins,
 469        .npins = ARRAY_SIZE(ab9540_pins),
 470        .functions = ab9540_functions,
 471        .nfunctions = ARRAY_SIZE(ab9540_functions),
 472        .groups = ab9540_groups,
 473        .ngroups = ARRAY_SIZE(ab9540_groups),
 474        .alternate_functions = ab9540alternate_functions,
 475        .gpio_irq_cluster = ab9540_gpio_irq_cluster,
 476        .ngpio_irq_cluster = ARRAY_SIZE(ab9540_gpio_irq_cluster),
 477        .irq_gpio_rising_offset = AB8500_INT_GPIO6R,
 478        .irq_gpio_falling_offset = AB8500_INT_GPIO6F,
 479        .irq_gpio_factor = 1,
 480};
 481
 482void
 483abx500_pinctrl_ab9540_init(struct abx500_pinctrl_soc_data **soc)
 484{
 485        *soc = &ab9540_soc;
 486}
 487
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