linux/drivers/mfd/wm831x-auxadc.c
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v v12/a>2spa	 class="comment">/*2/spa	  v v22/a>2spa	 class="comment"> * wm831x-auxadc.c  --  AUXADC for Wolfs2.1WM831x PMICs2/spa	  v v32/a>2spa	 class="comment"> *2/spa	  v v42/a>2spa	 class="comment"> * Copyright 2009-2011 Wolfs2.1Microelectronics PLC.2/spa	  v v52/a>2spa	 class="comment"> *2/spa	  v v62/a>2spa	 class="comment"> * Author: Mark Brown <broonie@opensource.wolfs2.micro.com>2/spa	  v v72/a>2spa	 class="comment"> *2/spa	  v v82/a>2spa	 class="comment"> *  This program is free software; you ca	 redistribute  it and/or modify it2/spa	  v v92/a>2spa	 class="comment"> *  under  the terms of  the GNU General vPublic License as published by the2/spa	  v lue=a>2spa	 class="comment"> *  Free Software Founda4"
	;  either vers32.12 of the  License, or (at your2/spa	  v 112/a>2spa	 class="comment"> *  .14"
	) any later vers32..2/spa	  v 122/a>2spa	 class="comment"> *2/spa	  v 132/a>2spa	 class="comment"> */2/spa	  v 142/a> v 152/a>#include <linux/kernel.h2/a>> v 162/a>#include <linux/module.h2/a>> v 172/a>#include <linux/delay.h2/a>> v 182/a>#include <linux/mfd/core.h2/a>> v 192/a>#include <linux/slab.h2/a>> v 202/a>#include <linux/list.h2/a>> v 212/a> v 222/a>#include <linux/mfd/wm831x/core.h2/a>> v 232/a>#include <linux/mfd/wm831x/pda4a.h2/a>> v 242/a>#include <linux/mfd/wm831x/irq.h2/a>> v 252/a>#include <linux/mfd/wm831x/auxadc.h2/a>> v 262/a>#include <linux/mfd/wm831x/otp.h2/a>> v 272/a>#include <linux/mfd/wm831x/regulator.h2/a>> v 282/a> v 292/a>structv2a href="+code=wm831x_auxadc_req" class="sref">wm831x_auxadc_req2/a> { v 302/a>        structv2a href="+code=list_head" class="sref">list_head2/a> 2a href="+code=list" class="sref">list2/a>; v 312/a>        enumv2a href="+code=wm831x_auxadc" class="sref">wm831x_auxadc2/a> 2a href="+code=input" class="sref">input2/a>; v 322/a>        intv2a href="+code=val" class="sref">val2/a>; v 332/a>        structv2a href="+code=comple4"
	" class="sref">comple4"
	2/a> 2a href="+code=done" class="sref">done2/a>; v 342/a>}; v 352/a> v 362/a>static intv2a href="+code=wm831x_auxadc_read_irq" class="sref">wm831x_auxadc_read_irq2/a>(structv2a href="+code=wm831x" class="sref">wm831x2/a> *2a href="+code=wm831x" class="sref">wm831x2/a>, v 372/a>                                  enumv2a href="+code=wm831x_auxadc" class="sref">wm831x_auxadc2/a> 2a href="+code=input" class="sref">input2/a>) v 382/a>{ v 392/a>        structv2a href="+code=wm831x_auxadc_req" class="sref">wm831x_auxadc_req2/a> *2a href="+code=req" class="sref">req2/a>; v 402/a>        intv2a href="+code=ret" class="sref">ret2/a>; v 412/a>        2a href="+code=bool" class="sref">bool2/a> 2a href="+code=ena" class="sref">ena2/a> = 2a href="+code=false" class="sref">false2/a>; v 422/a> v 432/a>        2a href="+code=req" class="sref">req2/a> = 2a href="+code=kzalloc" class="sref">kzalloc2/a>(sizeof(*2a href="+code=req" class="sref">req2/a>), 2a href="+code=GFP_KERNEL" class="sref">GFP_KERNEL2/a>); v 442/a>        if (!2a href="+code=req" class="sref">req2/a>) v 452/a>                return -2a href="+code=ENOMEM" class="sref">ENOMEM2/a>; v 462/a> v 472/a>        2a href="+code=init_comple4"
	" class="sref">init_comple4"
	2/a>(&2a href="+code=req" class="sref">req2/a>->2a href="+code=done" class="sref">done2/a>); v 482/a>        2a href="+code=req" class="sref">req2/a>->2a href="+code=input" class="sref">input2/a> = 2a href="+code=input" class="sref">input2/a>; v 492/a>        2a href="+code=req" class="sref">req2/a>->2a href="+code=val" class="sref">val2/a> = -2a href="+code=ETIMEDOUT" class="sref">ETIMEDOUT2/a>; v 502/a> v 512/a>        2a href="+code=mutex_lock" class="sref">mutex_lock2/a>(&2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=auxadc_lock" class="sref">auxadc_lock2/a>); v 522/a> v 532/a>        2spa	 class="comment">/* Enqueue the request */2/spa	  v 542/a>        2a href="+code=list_add" class="sref">list_add2/a>(&2a href="+code=req" class="sref">req2/a>->2a href="+code=list" class="sref">list2/a>, &2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=auxadc_pending" class="sref">auxadc_pending2/a>); v 552/a> v 562/a>        2a href="+code=ena" class="sref">ena2/a> = !2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=auxadc_ac4"ve" class="sref">auxadc_ac4"ve2/a>; v 572/a> v 582/a>        if (2a href="+code=ena" class="sref">ena2/a>) { v 592/a>                2a href="+code=ret" class="sref">ret2/a> = 2a href="+code=wm831x_set_bits" class="sref">wm831x_set_bits2/a>(2a href="+code=wm831x" class="sref">wm831x2/a>, 2a href="+code=WM831X_AUXADC_CONTROL" class="sref">WM831X_AUXADC_CONTROL2/a>, v 602/a>                                      2a href="+code=WM831X_AUX_ENA" class="sref">WM831X_AUX_ENA2/a>, 2a href="+code=WM831X_AUX_ENA" class="sref">WM831X_AUX_ENA2/a>); v 612/a>                if (2a href="+code=ret" class="sref">ret2/a> != 0) { v 622/a>                        2a href="+code=dev_err" class="sref">dev_err2/a>(2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=dev" class="sref">dev2/a>, 2spa	 class="string">"Failed to enable AUXADC: %d\n"2/spa	 , v 632/a>                                2a href="+code=ret" class="sref">ret2/a>); v 642/a>                        goto 2a href="+code=out" class="sref">out2/a>; v 652/a>                } v 662/a>        } v 672/a> v 682/a>        2spa	 class="comment">/* Enable the convers32.1if not already running */2/spa	  v 692/a>        if (!(2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=auxadc_ac4"ve" class="sref">auxadc_ac4"ve2/a> & (1 << 2a href="+code=input" class="sref">input2/a>))) { v 702/a>                2a href="+code=ret" class="sref">ret2/a> = 2a href="+code=wm831x_set_bits" class="sref">wm831x_set_bits2/a>(2a href="+code=wm831x" class="sref">wm831x2/a>, 2a href="+code=WM831X_AUXADC_SOURCE" class="sref">WM831X_AUXADC_SOURCE2/a>, v 712/a>                                      1 << 2a href="+code=input" class="sref">input2/a>, 1 << 2a href="+code=input" class="sref">input2/a>); v 722/a>                if (2a href="+code=ret" class="sref">ret2/a> != 0) { v 732/a>                        2a href="+code=dev_err" class="sref">dev_err2/a>(2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=dev" class="sref">dev2/a>, v 742/a>                                2spa	 class="string">"Failed to set AUXADC source: %d\n"2/spa	 , 2a href="+code=ret" class="sref">ret2/a>); v 752/a>                        goto 2a href="+code=out" class="sref">out2/a>; v 762/a>                } v 772/a> v 782/a>                2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=auxadc_ac4"ve" class="sref">auxadc_ac4"ve2/a> |= 1 << 2a href="+code=input" class="sref">input2/a>; v 792/a>        } v 802/a> v 812/a>        2spa	 class="comment">/* We convert at the fastest rate possible */2/spa	  v 822/a>        if (2a href="+code=ena" class="sref">ena2/a>) { v 832/a>                2a href="+code=ret" class="sref">ret2/a> = 2a href="+code=wm831x_set_bits" class="sref">wm831x_set_bits2/a>(2a href="+code=wm831x" class="sref">wm831x2/a>, 2a href="+code=WM831X_AUXADC_CONTROL" class="sref">WM831X_AUXADC_CONTROL2/a>, v 842/a>                                      2a href="+code=WM831X_AUX_CVT_ENA" class="sref">WM831X_AUX_CVT_ENA2/a> | v 852/a>                                      2a href="+code=WM831X_AUX_RATE_MASK" class="sref">WM831X_AUX_RATE_MASK2/a>, v 862/a>                                      2a href="+code=WM831X_AUX_CVT_ENA" class="sref">WM831X_AUX_CVT_ENA2/a> | v 872/a>                                      2a href="+code=WM831X_AUX_RATE_MASK" class="sref">WM831X_AUX_RATE_MASK2/a>); v 882/a>                if (2a href="+code=ret" class="sref">ret2/a> != 0) { v 892/a>                        2a href="+code=dev_err" class="sref">dev_err2/a>(2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=dev" class="sref">dev2/a>, 2spa	 class="string">"Failed to start AUXADC: %d\n"2/spa	 , v 902/a>                                2a href="+code=ret" class="sref">ret2/a>); v 912/a>                        goto 2a href="+code=out" class="sref">out2/a>; v 922/a>                } v 932/a>        } v 942/a> v 952/a>        2a href="+code=mutex_unlock" class="sref">mutex_unlock2/a>(&2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=auxadc_lock" class="sref">auxadc_lock2/a>); v 962/a> v 972/a>        2spa	 class="comment">/* Wait for a	 interrupt */2/spa	  v 982/a>        2a href="+code=wait_for_comple4"
	_timeout" class="sref">wait_for_comple4"
	_timeout2/a>(&2a href="+code=req" class="sref">req2/a>->2a href="+code=done" class="sref">done2/a>, 2a href="+code=msecs_to_jiffies" class="sref">msecs_to_jiffies2/a>(500)); v 992/a> v1002/a>        2a href="+code=mutex_lock" class="sref">mutex_lock2/a>(&2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=auxadc_lock" class="sref">auxadc_lock2/a>); v1012/a> v1022/a>        2a href="+code=list_del" class="sref">list_del2/a>(&2a href="+code=req" class="sref">req2/a>->2a href="+code=list" class="sref">list2/a>); v1032/a>        2a href="+code=ret" class="sref">ret2/a> = 2a href="+code=req" class="sref">req2/a>->2a href="+code=val" class="sref">val2/a>; v1042/a> v1052/a>2a href="+code=out" class="sref">out2/a>: v1062/a>        2a href="+code=mutex_unlock" class="sref">mutex_unlock2/a>(&2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=auxadc_lock" class="sref">auxadc_lock2/a>); v1072/a> v1082/a>        2a href="+code=kfree" class="sref">kfree2/a>(2a href="+code=req" class="sref">req2/a>); v1092/a> v1102/a>        return 2a href="+code=ret" class="sref">ret2/a>; v1112/a>} v1122/a> v1132/a>static 2a href="+code=irqreturn_t" class="sref">irqreturn_t2/a> 2a href="+code=wm831x_auxadc_irq" class="sref">wm831x_auxadc_irq2/a>(intv2a href="+code=irq" class="sref">irq2/a>, void *2a href="+code=irq_da4a" class="sref">irq_da4a2/a>) v1142/a>{ v1152/a>        structv2a href="+code=wm831x" class="sref">wm831x2/a> *2a href="+code=wm831x" class="sref">wm831x2/a> = 2a href="+code=irq_da4a" class="sref">irq_da4a2/a>; v1162/a>        structv2a href="+code=wm831x_auxadc_req" class="sref">wm831x_auxadc_req2/a> *2a href="+code=req" class="sref">req2/a>; v1172/a>        intv2a href="+code=ret" class="sref">ret2/a>, 2a href="+code=input" class="sref">input2/a>, 2a href="+code=val" class="sref">val2/a>; v1182/a> v1192/a>        2a href="+code=ret" class="sref">ret2/a> = 2a href="+code=wm831x_reg_read" class="sref">wm831x_reg_read2/a>(2a href="+code=wm831x" class="sref">wm831x2/a>, 2a href="+code=WM831X_AUXADC_DATA" class="sref">WM831X_AUXADC_DATA2/a>); v1202/a>        if (2a href="+code=ret" class="sref">ret2/a> < 0) { v1212/a>                2a href="+code=dev_err" class="sref">dev_err2/a>(2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=dev" class="sref">dev2/a>, v1222/a>                        2spa	 class="string">"Failed to read AUXADC da4a: %d\n"2/spa	 , 2a href="+code=ret" class="sref">ret2/a>); v1232/a>                return 2a href="+code=IRQ_NONE" class="sref">IRQ_NONE2/a>; v1242/a>        } v1252/a> v1262/a>        2a href="+code=input" class="sref">input2/a> = ((2a href="+code=ret" class="sref">ret2/a> & 2a href="+code=WM831X_AUX_DATA_SRC_MASK" class="sref">WM831X_AUX_DATA_SRC_MASK2/a>) v1272/a>                 >> 2a href="+code=WM831X_AUX_DATA_SRC_SHIFT" class="sref">WM831X_AUX_DATA_SRC_SHIFT2/a>) - 1; v1282/a> v1292/a>        if (2a href="+code=input" class="sref">input2/a> == 14) v1302/a>                2a href="+code=input" class="sref">input2/a> = 2a href="+code=WM831X_AUX_CAL" class="sref">WM831X_AUX_CAL2/a>; v1312/a> v1322/a>        2a href="+code=val" class="sref">val2/a> = 2a href="+code=ret" class="sref">ret2/a> & 2a href="+code=WM831X_AUX_DATA_MASK" class="sref">WM831X_AUX_DATA_MASK2/a>; v1332/a> v1342/a>        2a href="+code=mutex_lock" class="sref">mutex_lock2/a>(&2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=auxadc_lock" class="sref">auxadc_lock2/a>); v1352/a> v1362/a>        2spa	 class="comment">/* Disable this convers32., we're about to comple4e all users */2/spa	  v1372/a>        2a href="+code=wm831x_set_bits" class="sref">wm831x_set_bits2/a>(2a href="+code=wm831x" class="sref">wm831x2/a>, 2a href="+code=WM831X_AUXADC_SOURCE" class="sref">WM831X_AUXADC_SOURCE2/a>, v1382/a>                        1 << 2a href="+code=input" class="sref">input2/a>, 0); v1392/a>        2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=auxadc_ac4"ve" class="sref">auxadc_ac4"ve2/a> &= ~(1 << 2a href="+code=input" class="sref">input2/a>); v1402/a> v1412/a>        2spa	 class="comment">/* Turn off the entire convertor if idle */2/spa	  v1422/a>        if (!2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=auxadc_ac4"ve" class="sref">auxadc_ac4"ve2/a>) v1432/a>                2a href="+code=wm831x_reg_write" class="sref">wm831x_reg_write2/a>(2a href="+code=wm831x" class="sref">wm831x2/a>, 2a href="+code=WM831X_AUXADC_CONTROL" class="sref">WM831X_AUXADC_CONTROL2/a>, 0); v1442/a> v1452/a>        2spa	 class="comment">/* Wake up any threads waiting for this request */2/spa	  v1462/a>        2a href="+code=list_for_each_entry" class="sref">list_for_each_entry2/a>(2a href="+code=req" class="sref">req2/a>, &2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=auxadc_pending" class="sref">auxadc_pending2/a>, 2a href="+code=list" class="sref">list2/a>) { v1472/a>                if (2a href="+code=req" class="sref">req2/a>->2a href="+code=input" class="sref">input2/a> == 2a href="+code=input" class="sref">input2/a>) { v1482/a>                        2a href="+code=req" class="sref">req2/a>->2a href="+code=val" class="sref">val2/a> = 2a href="+code=val" class="sref">val2/a>; v1492/a>                        2a href="+code=comple4e" class="sref">comple4e2/a>(&2a href="+code=req" class="sref">req2/a>->2a href="+code=done" class="sref">done2/a>); v1502/a>                } v1512/a>        } v1522/a> v1532/a>        2a href="+code=mutex_unlock" class="sref">mutex_unlock2/a>(&2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=auxadc_lock" class="sref">auxadc_lock2/a>); v1542/a> v1552/a>        return 2a href="+code=IRQ_HANDLED" class="sref">IRQ_HANDLED2/a>; v1562/a>} v1572/a> v1582/a>static intv2a href="+code=wm831x_auxadc_read_polled" class="sref">wm831x_auxadc_read_polled2/a>(structv2a href="+code=wm831x" class="sref">wm831x2/a> *2a href="+code=wm831x" class="sref">wm831x2/a>, v1592/a>                                     enumv2a href="+code=wm831x_auxadc" class="sref">wm831x_auxadc2/a> 2a href="+code=input" class="sref">input2/a>) v1602/a>{ v1612/a>        intv2a href="+code=ret" class="sref">ret2/a>, 2a href="+code=src" class="sref">src2/a>, 2a href="+code=timeout" class="sref">timeout2/a>; v1622/a> v1632/a>        2a href="+code=mutex_lock" class="sref">mutex_lock2/a>(&2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=auxadc_lock" class="sref">auxadc_lock2/a>); v1642/a> v1652/a>        2a href="+code=ret" class="sref">ret2/a> = 2a href="+code=wm831x_set_bits" class="sref">wm831x_set_bits2/a>(2a href="+code=wm831x" class="sref">wm831x2/a>, 2a href="+code=WM831X_AUXADC_CONTROL" class="sref">WM831X_AUXADC_CONTROL2/a>, v1662/a>                              2a href="+code=WM831X_AUX_ENA" class="sref">WM831X_AUX_ENA2/a>, 2a href="+code=WM831X_AUX_ENA" class="sref">WM831X_AUX_ENA2/a>); v1672/a>        if (2a href="+code=ret" class="sref">ret2/a> < 0) { v1682/a>                2a href="+code=dev_err" class="sref">dev_err2/a>(2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=dev" class="sref">dev2/a>, 2spa	 class="string">"Failed to enable AUXADC: %d\n"2/spa	 , 2a href="+code=ret" class="sref">ret2/a>); v1692/a>                goto 2a href="+code=out" class="sref">out2/a>; v1702/a>        } v1712/a> v1722/a>        2spa	 class="comment">/* We force a single source at present */2/spa	  v1732/a>        2a href="+code=src" class="sref">src2/a> = 2a href="+code=input" class="sref">input2/a>; v1742/a>        2a href="+code=ret" class="sref">ret2/a> = 2a href="+code=wm831x_reg_write" class="sref">wm831x_reg_write2/a>(2a href="+code=wm831x" class="sref">wm831x2/a>, 2a href="+code=WM831X_AUXADC_SOURCE" class="sref">WM831X_AUXADC_SOURCE2/a>, v1752/a>                               1 << 2a href="+code=src" class="sref">src2/a>); v1762/a>        if (2a href="+code=ret" class="sref">ret2/a> < 0) { v1772/a>                2a href="+code=dev_err" class="sref">dev_err2/a>(2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=dev" class="sref">dev2/a>, 2spa	 class="string">"Failed to set AUXADC source: %d\n"2/spa	 , 2a href="+code=ret" class="sref">ret2/a>); v1782/a>                goto 2a href="+code=out" class="sref">out2/a>; v1792/a>        } v1802/a> v1812/a>        2a href="+code=ret" class="sref">ret2/a> = 2a href="+code=wm831x_set_bits" class="sref">wm831x_set_bits2/a>(2a href="+code=wm831x" class="sref">wm831x2/a>, 2a href="+code=WM831X_AUXADC_CONTROL" class="sref">WM831X_AUXADC_CONTROL2/a>, v1822/a>                              2a href="+code=WM831X_AUX_CVT_ENA" class="sref">WM831X_AUX_CVT_ENA2/a>, 2a href="+code=WM831X_AUX_CVT_ENA" class="sref">WM831X_AUX_CVT_ENA2/a>); v1832/a>        if (2a href="+code=ret" class="sref">ret2/a> < 0) { v1842/a>                2a href="+code=dev_err" class="sref">dev_err2/a>(2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=dev" class="sref">dev2/a>, 2spa	 class="string">"Failed to start AUXADC: %d\n"2/spa	 , 2a href="+code=ret" class="sref">ret2/a>); v1852/a>                goto 2a href="+code=disable" class="sref">disable2/a>; v1862/a>        } v1872/a> v1882/a>        2spa	 class="comment">/* If we're not using interrupts then poll the2/spa	  v1892/a>2spa	 class="comment">         * interrupt status register */2/spa	  v1902/a>        2a href="+code=timeout" class="sref">timeout2/a> = 5; v1912/a>        while (2a href="+code=timeout" class="sref">timeout2/a>) { v1922/a>                2a href="+code=msleep" class="sref">msleep2/a>(1); v1932/a> v1942/a>                2a href="+code=ret" class="sref">ret2/a> = 2a href="+code=wm831x_reg_read" class="sref">wm831x_reg_read2/a>(2a href="+code=wm831x" class="sref">wm831x2/a>, v1952/a>                                      2a href="+code=WM831X_INTERRUPT_STATUS_1" class="sref">WM831X_INTERRUPT_STATUS_12/a>); v1962/a>                if (2a href="+code=ret" class="sref">ret2/a> < 0) { v1972/a>                        2a href="+code=dev_err" class="sref">dev_err2/a>(2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+code=dev" class="sref">dev2/a>, v1982/a>                                2spa	 class="string">"ISR 1 read failed: %d\n"2/spa	 , 2a href="+code=ret" class="sref">ret2/a>); wm831x_set_bits2/a>(2a href7	 class="188lass="sref">wm831x_set_bits2/a>(2a href201" idtiL201" class="line" namptiL201">v20a>) { v1362/?s="line" namptiL189">v1892/a>2spa	 class="comment2gt;2a hre2="+code=list" class="sre2">lis202/a>) (2a href="+code=wm831x" claclas_E   ="line" namptiL191">v1912/a>        while (2a 2>->2a 2ref="+code=val" class="s2ef">v20ROL2/a>, v1742/a>        2a href="+code=ret" class="sref">ret2/a> = 2a href="+code=wm831x_reg_w namptiL191">v1912/a>        while (2a 2>5>2a 2rode=wm831x" class="sref204">v202/a>, v1952/a>                                   w namptiL191">v1912/a>        while (2a 2> class="fref="+code=out" class="s2ef">o20ASK2/a>, (2a href="+code=wm831x" claclas_E   ="lin+co8/a>  +skpa	 , 2a href="+code=-auxadc.8.h" class_lock" class="sref">auxa2c_loc20 0) {   +skpa	 , 2a href="+code=-auxadc.8ass="fref07" class="line" namptiL207">v202/a>, v1912/a>        while (2a 2>#L28" idtef="+code=req" class="sr2f">re20 != 0) { v 892/a>                        2a href="+code=dev_err" class="sref">dev_err2/a>(2a hr namptiL191">v1912/a>        while (2a 209" idtiL209" class="line" namptiL209">v212/spa	 ,             n+co8/a>  +skpa	 , 2a href="+code=-auxadc.eturn 2a 2ref="+code=ret" class="s2ef">r21et2/a>); v1212/a>, v212/a>) 2rq_da212/a>; v121/a>); 2rq_da21spa	  v1942/a>                2a href="+code=ret" class="sref">ret2/a> = 2a href="+code=wm831x_reg_read" class="sref">wm831x_reg_read2/a>(2a href="+code=wm831x" class="sref">wm831x2/a>, 2a href="+code=WM831X_AU22/a> *2a 2ref="+code=req" class="s2ef">r21/a>); v1672/a>        if (2a22/a>, 2a 2ref="+code=val" class="s2ef">v21 0) { v1682/a>                2a href="+code=dev_err" class="sref">dev_err2/a>(2a hrine" namptiL167">v1672/a>        if (2a22#L28" idt18" class="line" namptiL218">v21 != 0) { v1222/a>                        2spa	 class="string">"Failed to read AUXADC da4a: %d\n"2/s2ADC_DATA"2class="sref">WM831X_AUXA2C_DAT222/spa	 , ret22a> &l22    } ->2a 2ref="+code=dev" class="s2ef">d222/a>; re22spa	  v1262/a>        2a href="+code=input" class="sref">input2/a> = ((2a href="+code=ret" class="sref">ret2/a> & 2a href="+code=WM831X_AUX_DATA_SRC_2ref="+cod2=IRQ_NONE" class="sref">2RQ_NO22ROL2/a>, v1272/a>                 >> 2a href="+code=WM831X_AUX_DATA_SRC_SHIFT" 2124" clas2="line" namptiL124">v1242/a>  2     } v22/a>); v1292/a>        if (2a 2ASK" clas2="sref">WM831X_AUX_DATA_2RC_MA2K2/a>) v1302/a>                2a href="+code=input" class="sref">input2/a> = 2a href="+code=2lass="sre2">WM831X_AUX_DATA_SRC_SH2FT2/a2) - 1; v2282/a> req2/a>->2a href="+code=input" class="sref">input2/a> ==2ref="+cod2=input" class="sref">inp2t2/a>2== 14) v1842/a>                2a href="+code=dev_err" class="sref">dev_err2/a>(2a href="+code=wm831x" class="sreD122 from72" clasv1222/dtiL1f="+code=dev" class="sref">dev2/a>, 2spa	 class="string">&quo2M831X_AUX2CAL" class="sref">WM831X2AUX_C23et2/a>); v1612/a>        intv2a href="+co+code=auxadc_ac4"ve" class="sref">auxadc_ac4"ve2/a> &= ~(1 <<231" idtiL231" class="line" namptiL231">v23a>) { input2/a> = 2a href="+code=2TA_MASK" 2lass="sref">WM831X_AUX_D2TA_MA23       } v1912/a>        while (2a 233" idtiL233" class="line" namptiL233">v2332/a>  = 2a href="+code=ret" class="sref">ret2/a> & 2a href="+code=WM831X_AUX_D2ode=auxad2_lock" class="sref">auxa2c_loc235   } v23ck2/a>); v2_SOURCE" 2lass="sref">WM831X_AUXAD2_SOUR2E2/a>, v1812/a>        2a href="+code=ret" class="sref">ret2/a> = 2a href="+code=wm831x_set_bits" class="sref">wm831x_set_bits2/a>(2a href="+code=wm831x" class="sref">wmauxadc.c#L166" idtiL166" class="line" namptiL166">v1662/a>       31x2/a>, 2a href="+code=WM831X_AUXADC_CONT2 href="+c2de=input" class="sref">i2put2/2>, 0);uxadc.c#L166" irs/mfd/wm831x-auxadc.c#L105" idtiL105" class="line" namptiL105">v2 2a href=2+code=input" class="sref2>inpu2492/a> v1532/a>        2a href="+code=mutex_unlock" class="sref">mutex_unlock2/a>(&2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+240" idtiL240" class="line" namptiL240">v2402/a> v1102/a>        2Turn off 2he entire convertor if i2le */2/spa	 ="drivers/mfd/wm831x-auxadc.c#L151" idti2=auxadc_a24"ve" class="sref">auxad2_ac4"24>(1); WM831X_AUXADC_CON2ROL2/2>, 0);s"drivers/mfd/wm831x-aux*line" namptiL189">v1892/a>2spa	 class="comment244" idtiL244" class="line" namptiL244">v2442/a> v1582: Rine"a value from7" id166">x" namptline" namptiL189">v1892/a>2spa	 class="comment245" idtiL2ds waiting for this requ2st */2/spa	  v1892/a>2spa	 class="comment24e're2"+code=list" class="sref2>list2/a>) { v1892/a>2spa	 class="comment24SOURCE" 2code=input" class="sref"2input2/a>) { v1892/a>2spa	 class="comment24href="+c2ref="+code=val" class="s2ef">v24spa	  v1892/a>2spa	 class="comment2gt;2a hre2="+code=done" class="sre2">don22/a>);f="drivers/mfd/wm831x-auxadc.c#L158" 812/a>        2a href=dc.c#L158" ine" tv2a href="+code=wm831x_auxadc_read_polled" class="sref">wm831x_auxadc_read_polled2/a>(structv2a href=c#L159" idtiL159" class="line" namptiL159">v1592/a>                                     enumv2a href="+code=wm831x_auxadc" class="sref">wm831x_auxadc2/2ss="line"2namptiL150">v1502/a>    2     2     }" namptiL191">v1912/a>        while (2a 2151" clas2="line" namptiL151">v1512/a>  2522/a> mutex_un58" 812/a>        2dc.c#L158" ine" lass="sref">ret2/a> = 2a href="+code=wm831x_set_bits" class="sr+code=auxadc_ac4"ve" class="sref">auxadc_ac4"ve2/a> &= ~(1 <<252" idtiL252" class="line" namptiL252">v2522/a>="drivers/mfd/wm831x-auxadc.c#L151" idti2ode=auxad2_lock" class="sref">auxa2c_loc22/a>); href="+code=reqXPORT_SYMBOL_GP            2a hqXPORT_SYMBOL_GP ine" lass="sref">ret2/a> =adc.c#L158" 812/a>        2a href=dc.c#L158" ine"ref">auxadc_ac4"ve2/a> &= ~(1 <<254" idtiL254" class="line" namptiL254">v25    } IRQ2HANDL25spa	  v1892/a>2spa	 class="comment26" idtiL126" class="line" namptiL126">v125a>) { x" namptline" namptiL189">v1892/a>2spa	 class="comment257" idtiL257" class="line" namptiL257">v25a>) { v1892/a>2spa	 class="comment25href="+c2code=wm831x" class="sref2>wm8325spa	  v1892/a>2spa	 class="comment2> 2a href2"+code=input" class="sre2">inp2t2/a>) v1892/a>2spa	 class="comment20" idtiL120" class="line" namptiL120">v1202/a>{ v1892/a>2spa	 class="comment2 href="+c2de=timeout" class="sref"2timeo2t2/a>;f="drivers/mfd/wm831x-auxadc.c#L158" iu"sref">dev_err2/1x-auxadc.c#L158" iu"ine" tv2a href="+code=wm831x_auxadc_read_polled" class="sref">wm831x_auxadc_read_polled2/a>(structv2a href=c#L159" idtiL159" class="line" namptiL159">v1592/a>                                     enumv2a href="+code=wm831x_auxadc" class="sref">wm831x_auxadc2/262" idtiL262" class="line" namptiL262">v2622/a>" namptiL191">v1912/a>        while (2a 2ode=auxad2_lock" class="sref">auxa2c_loc2632/a> auxadc_ac4"ve2/a> &= ~(1 <<264" idtiL264" class="line" namptiL264">v26    } WM831X_AUXADC2CONTR26spa	  v1dc.c#L158" 812/a>        2a href=dc.c#L158" ine" lass="sref">ret2/a> = 2a href="+code=wm831x_set_bits" class="sr+code=auxadc_ac4"ve" class="sref">auxadc_ac4"ve2/a> &= ~(1 <<2831X_AUX_2NA" class="sref">WM831X_2UX_EN22/a>); auxadc_ac4"ve2/a> &= ~(1 <<287" idtiL2e=ret" class="sref">ret22a> &l2; 0) { v1102/a>        2a	 , 2a h2ef="+code=ret" class="sr2f">re26/a>); o2792/a> v1902/a>        2a hr2170" clas2="line" namptiL170">v1702/a>  2     } v2722/a> v1102/a>        2* We forc2 a single source at pres2nt */2722/a>="drivers/mfd/wm831x-auxadc.c#L151" idti2= 2a href2"+code=input" class="sre2">inp27/a>); href="+code=reqXPORT_SYMBOL_GP            2a hqXPORT_SYMBOL_GP ine" lass="sref">ret2/a> =adc.c#L158" iu"sref">dev_err2/1x-auxadc.c#L158" iu"ine"ref">auxadc_ac4"ve2/a> &= ~(1 <<2adc_ac4"v lass="sref">wm831x2/a>->2a href="+code=1151" idti2= 2a h2adc_ac4"ve" cla0"v lass="sref">wm831x2/a>-12'its2/a>(22a 2ASK" clas2="sref">W7ss="sre2"'nLnnamptiL105">v2inilass="line" namptamptiL105">v2inil2a href="+code=wm831x_auxadc_read_polled" class="sref">wm831x_auxadc_read_polled2/a>(structv2a href=c#L159adc_ac4"ve2/a> &= ~(1 <<287" idtcode=ret"2class="sref">ret2/a> <2 0) {2v1912/a>        while (2a 2ode=aux href="+c2de=ret" class="sref">ret2/a>);2auxadc_ac4"ve2/a> &= ~(1 <<264" idta href="+2ode=out" class="sref">ou22/a>;27a href="drivers/mfd/wm831x-auxadc.c#L2 goto 2ass="line2 namptiL179">v1792/a>   2    }28a href="drivers/mfd/wm831x-auxadc.inilass="line" nampuxadc.inilmptiL153">v1532/a>        2a href="+code=mutex_unlock" class="sref">mutex_unlock2/a>(&2a href="+code=wm831x" class="sref">wm831x2/a>->2a href="+240" idtiL180" cl2ss="line" namptiL180">v1202/a>2v1532/a>        2a href="+code=mutex_unlock" class="sref">mutex_unlock2/a, &2a href="+code=wm831x" class="sres="sref">wm831x2/a>->2a href="+240" idtiL271" claef">WM831X_AUXADC_CONTRO22/a>,28a href="drivers/mfd/wm831x-auxadc.c#L2a	 , 2aA" class=2sref">WM831X_AUX_CVT_ENA2/a>);2mutex_uni+code=wm831x_auxadc_irq"de=input" class="sref">input2/a> ==2ref="+ccode=ret"2class="sref">ret2/a> <2 0) {2mutex_un58" 812/a>        2dc.c#L158" ine" lass="ne" namptiL194">v1dc.c#L158" 812/a> ef="+code=irqreturn_t" class="sre/a> ef=">auxadc_ac4"ve2/a> &= ~(1 <<264" idt href="+c2de=ret" class="sref">ret2/a>);28de=1151" idti2= 2a h2adc_ac4"ve" cla0"v lass=+code=dis2ble" class="sref">disabl22/a>;28, v1">v1452_" clase ef="+code=irqreturn">v1452_" clase ef="ss="sref">ret2/a> =adc.c#L1f="+code=irqreturn_t" claf="ss="sref">ret2/a> =adc.c#Lf="+code=wm831x_set_bits" 51" idti2= 2a h2adc_ac4"ve" cla0"v lass=+ode=ret"2 namptiL186">v1862/a>   2    }28a href="drivers/mfd/wmb" nk+ccccccccccccccccccccccccccccccc#L166" idtiL166" classne" _read2/a>(2a href="+code=wm831x" ne" _read2/a>(2irq"d 51" idti2= 2a h2adc_ac4"ve" cla0"v lass=+href="+c2ss="line" namptiL187">v1272/a>28a href="drivers/mfd/wm831x-auxadc.c#Lccccccccccc#L166" idtiL166NUL     2a hqXPORT_NUL its" class="sr+code=atamptiL105">v2i="+code=irqreturn_t" class="sref">irqr, 0 51" idti2= 2a h2adc_ac4"ve" cla0"v lass=+ href="+2nterrupts then poll the22spa	 28a href="drivers/mfd/wm831x-auxadc.c#L159" cccccc#=wm831x" class="sreD122 frla0"v                  2spa	 class="olled2/a>(structv2a href=c#L159aadc_ac4"ve2/a> &= ~(1 <<264" idt   * inte2rupt status register */22spa	 29a href="drivers/mfd/wrs/mfd/wm831x-auxadc.c#L167" idtiL167" class="line" namptiL167">v1672/a>        if (2a22/a>, 2e=timeout2 class="sref">timeout2/a2 = 5;29; v1842/a>                2a href="+code=dev_err" class="sref">dev_err2/a>(2a href="+code=wm831x" class="sreD122 fr classsne"5">v1452/">v1982/a>                    mptiL167">v1672/a>        if (2a22/a>, 2eL271" clat" class="sref">timeout22a>) {2"Failed to read AUXADC da4a: %d\n"2/s2ADC_DATcode=msle2p" class="sref">msleep2/2>(1);29a href="driver#L195" ds/mfd/wm831x-aumptiL16 2a href="+code=mutex_unlock" class="sref">mutex_un58" 812/a>        2dc.c#L158" ine" lass="ne" namptiL194">v1NUL     2a hqXPORT_NUL its"ad AUXADC da4a: %d\n"2/s2ADC_DATcode=ret"2ss="line" namptiL193">v1232/a>2wm83122/a>,29a href="drivers/mfd/wm831x-auxadc.c#L151" idti235" idts="sref">2M831X_INTERRUPT_STATUS_12/a>);29; ret2/a> <2 0) {29a href="drivers/mfd/wm831x-auxadc.c#L142" idtiL142" class="line" namptiL142">v1422/a>      /a>        2dc.c#L158" ine" lass="adc_ac4"ve2/a> &= ~(1 <<287" idta href="+2ode=dev" class="sref">de22/a>,2mutex_un58" 812/a>        2dc.c#L158" ine" lass="ne" namptiL194">v1dc.c#L158" 812/a> e" class="line" namptiL158">v1582/a>static intv2a had AUXADC da4a: %d\n"2/s2ADC_DATc href="+2de=ret" class="sref">ret2/a>);2
The original LXR software by6">x"/mfd/wm83http://v1222/forge.net/projects/lxr">LXR d/w=unily="+codiL145experi="lial  " classby6/mfd/wm83m>v1to:lxr@L19ux.no">lxr@L19ux.no="+c.
lxr.L19ux.no kindly hostedsby6/mfd/wm83http://www.redpill-L19pro.no">Redpill L19pro AS="+codprovider of L19uxL68"sulne" nand operatlass ser"lins72" ce;