linux/drivers/mfd/omap-usb-host.c
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   1/**
   2 * omap-usb-host.c - The USBHS core driver for OMAP EHCI & OHCI
   3 *
   4 * Copyright (C) 2011-2013 Texas Instruments Incorporated - http://www.ti.com
   5 * Author: Keshava Munegowda <keshava_mgowda@ti.com>
   6 * Author: Roger Quadros <rogerq@ti.com>
   7 *
   8 * This program is free software: you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License version 2  of
  10 * the License as published by the Free Software Foundation.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License
  18 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  19 */
  20#include <linux/kernel.h>
  21#include <linux/module.h>
  22#include <linux/types.h>
  23#include <linux/slab.h>
  24#include <linux/delay.h>
  25#include <linux/clk.h>
  26#include <linux/dma-mapping.h>
  27#include <linux/gpio.h>
  28#include <linux/platform_device.h>
  29#include <linux/platform_data/usb-omap.h>
  30#include <linux/pm_runtime.h>
  31#include <linux/of.h>
  32#include <linux/of_platform.h>
  33#include <linux/err.h>
  34
  35#include "omap-usb.h"
  36
  37#define USBHS_DRIVER_NAME       "usbhs_omap"
  38#define OMAP_EHCI_DEVICE        "ehci-omap"
  39#define OMAP_OHCI_DEVICE        "ohci-omap3"
  40
  41/* OMAP USBHOST Register addresses  */
  42
  43/* UHH Register Set */
  44#define OMAP_UHH_REVISION                               (0x00)
  45#define OMAP_UHH_SYSCONFIG                              (0x10)
  46#define OMAP_UHH_SYSCONFIG_MIDLEMODE                    (1 << 12)
  47#define OMAP_UHH_SYSCONFIG_CACTIVITY                    (1 << 8)
  48#define OMAP_UHH_SYSCONFIG_SIDLEMODE                    (1 << 3)
  49#define OMAP_UHH_SYSCONFIG_ENAWAKEUP                    (1 << 2)
  50#define OMAP_UHH_SYSCONFIG_SOFTRESET                    (1 << 1)
  51#define OMAP_UHH_SYSCONFIG_AUTOIDLE                     (1 << 0)
  52
  53#define OMAP_UHH_SYSSTATUS                              (0x14)
  54#define OMAP_UHH_HOSTCONFIG                             (0x40)
  55#define OMAP_UHH_HOSTCONFIG_ULPI_BYPASS                 (1 << 0)
  56#define OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS              (1 << 0)
  57#define OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS              (1 << 11)
  58#define OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS              (1 << 12)
  59#define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN              (1 << 2)
  60#define OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN              (1 << 3)
  61#define OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN             (1 << 4)
  62#define OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN              (1 << 5)
  63#define OMAP_UHH_HOSTCONFIG_P1_CONNECT_STATUS           (1 << 8)
  64#define OMAP_UHH_HOSTCONFIG_P2_CONNECT_STATUS           (1 << 9)
  65#define OMAP_UHH_HOSTCONFIG_P3_CONNECT_STATUS           (1 << 10)
  66#define OMAP4_UHH_HOSTCONFIG_APP_START_CLK              (1 << 31)
  67
  68/* OMAP4-specific defines */
  69#define OMAP4_UHH_SYSCONFIG_IDLEMODE_CLEAR              (3 << 2)
  70#define OMAP4_UHH_SYSCONFIG_NOIDLE                      (1 << 2)
  71#define OMAP4_UHH_SYSCONFIG_STDBYMODE_CLEAR             (3 << 4)
  72#define OMAP4_UHH_SYSCONFIG_NOSTDBY                     (1 << 4)
  73#define OMAP4_UHH_SYSCONFIG_SOFTRESET                   (1 << 0)
  74
  75#define OMAP4_P1_MODE_CLEAR                             (3 << 16)
  76#define OMAP4_P1_MODE_TLL                               (1 << 16)
  77#define OMAP4_P1_MODE_HSIC                              (3 << 16)
  78#define OMAP4_P2_MODE_CLEAR                             (3 << 18)
  79#define OMAP4_P2_MODE_TLL                               (1 << 18)
  80#define OMAP4_P2_MODE_HSIC                              (3 << 18)
  81
  82#define OMAP_UHH_DEBUG_CSR                              (0x44)
  83
  84/* Values of UHH_REVISION - Note: these are not given in the TRM */
  85#define OMAP_USBHS_REV1         0x00000010      /* OMAP3 */
  86#define OMAP_USBHS_REV2         0x50700100      /* OMAP4 */
  87
  88#define is_omap_usbhs_rev1(x)   (x->usbhs_rev == OMAP_USBHS_REV1)
  89#define is_omap_usbhs_rev2(x)   (x->usbhs_rev == OMAP_USBHS_REV2)
  90
  91#define is_ehci_phy_mode(x)     (x == OMAP_EHCI_PORT_MODE_PHY)
  92#define is_ehci_tll_mode(x)     (x == OMAP_EHCI_PORT_MODE_TLL)
  93#define is_ehci_hsic_mode(x)    (x == OMAP_EHCI_PORT_MODE_HSIC)
  94
  95
  96struct usbhs_hcd_omap {
  97        int                             nports;
  98        struct clk                      **utmi_clk;
  99        struct clk                      **hsic60m_clk;
 100        struct clk                      **hsic480m_clk;
 101
 102        struct clk                      *xclk60mhsp1_ck;
 103        struct clk                      *xclk60mhsp2_ck;
 104        struct clk                      *utmi_p1_gfclk;
 105        struct clk                      *utmi_p2_gfclk;
 106        struct clk                      *init_60m_fclk;
 107        struct clk                      *ehci_logic_fck;
 108
 109        void __iomem                    *uhh_base;
 110
 111        struct usbhs_omap_platform_data *pdata;
 112
 113        u32                             usbhs_rev;
 114};
 115/*-------------------------------------------------------------------------*/
 116
 117const char usbhs_driver_name[] = USBHS_DRIVER_NAME;
 118static u64 usbhs_dmamask = DMA_BIT_MASK(32);
 119
 120/*-------------------------------------------------------------------------*/
 121
 122static inline void usbhs_write(void __iomem *base, u32 reg, u32 val)
 123{
 124        __raw_writel(val, base + reg);
 125}
 126
 127static inline u32 usbhs_read(void __iomem *base, u32 reg)
 128{
 129        return __raw_readl(base + reg);
 130}
 131
 132static inline void usbhs_writeb(void __iomem *base, u8 reg, u8 val)
 133{
 134        __raw_writeb(val, base + reg);
 135}
 136
 137static inline u8 usbhs_readb(void __iomem *base, u8 reg)
 138{
 139        return __raw_readb(base + reg);
 140}
 141
 142/*-------------------------------------------------------------------------*/
 143
 144/**
 145 * Map 'enum usbhs_omap_port_mode' found in <linux/platform_data/usb-omap.h>
 146 * to the device tree binding portN-mode found in
 147 * 'Documentation/devicetree/bindings/mfd/omap-usb-host.txt'
 148 */
 149static const char * const port_modes[] = {
 150        [OMAP_USBHS_PORT_MODE_UNUSED]   = "",
 151        [OMAP_EHCI_PORT_MODE_PHY]       = "ehci-phy",
 152        [OMAP_EHCI_PORT_MODE_TLL]       = "ehci-tll",
 153        [OMAP_EHCI_PORT_MODE_HSIC]      = "ehci-hsic",
 154        [OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0]   = "ohci-phy-6pin-datse0",
 155        [OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM]     = "ohci-phy-6pin-dpdm",
 156        [OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0]   = "ohci-phy-3pin-datse0",
 157        [OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM]     = "ohci-phy-4pin-dpdm",
 158        [OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0]   = "ohci-tll-6pin-datse0",
 159        [OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM]     = "ohci-tll-6pin-dpdm",
 160        [OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0]   = "ohci-tll-3pin-datse0",
 161        [OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM]     = "ohci-tll-4pin-dpdm",
 162        [OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0]   = "ohci-tll-2pin-datse0",
 163        [OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM]     = "ohci-tll-2pin-dpdm",
 164};
 165
 166/**
 167 * omap_usbhs_get_dt_port_mode - Get the 'enum usbhs_omap_port_mode'
 168 * from the port mode string.
 169 * @mode: The port mode string, usually obtained from device tree.
 170 *
 171 * The function returns the 'enum usbhs_omap_port_mode' that matches the
 172 * provided port mode string as per the port_modes table.
 173 * If no match is found it returns -ENODEV
 174 */
 175static const int omap_usbhs_get_dt_port_mode(const char *mode)
 176{
 177        int i;
 178
 179        for (i = 0; i < ARRAY_SIZE(port_modes); i++) {
 180                if (!strcmp(mode, port_modes[i]))
 181                        return i;
 182        }
 183
 184        return -ENODEV;
 185}
 186
 187static struct platform_device *omap_usbhs_alloc_child(const char *name,
 188                        struct resource *res, int num_resources, void *pdata,
 189                        size_t pdata_size, struct device *dev)
 190{
 191        struct platform_device  *child;
 192        int                     ret;
 193
 194        child = platform_device_alloc(name, 0);
 195
 196        if (!child) {
 197                dev_err(dev, "platform_device_alloc %s failed\n", name);
 198                goto err_end;
 199        }
 200
 201        ret = platform_device_add_resources(child, res, num_resources);
 202        if (ret) {
 203                dev_err(dev, "platform_device_add_resources failed\n");
 204                goto err_alloc;
 205        }
 206
 207        ret = platform_device_add_data(child, pdata, pdata_size);
 208        if (ret) {
 209                dev_err(dev, "platform_device_add_data failed\n");
 210                goto err_alloc;
 211        }
 212
 213        child->dev.dma_mask             = &usbhs_dmamask;
 214        dma_set_coherent_mask(&child->dev, DMA_BIT_MASK(32));
 215        child->dev.parent               = dev;
 216
 217        ret = platform_device_add(child);
 218        if (ret) {
 219                dev_err(dev, "platform_device_add failed\n");
 220                goto err_alloc;
 221        }
 222
 223        return child;
 224
 225err_alloc:
 226        platform_device_put(child);
 227
 228err_end:
 229        return NULL;
 230}
 231
 232static int omap_usbhs_alloc_children(struct platform_device *pdev)
 233{
 234        struct device                           *dev = &pdev->dev;
 235        struct usbhs_omap_platform_data         *pdata = dev->platform_data;
 236        struct platform_device                  *ehci;
 237        struct platform_device                  *ohci;
 238        struct resource                         *res;
 239        struct resource                         resources[2];
 240        int                                     ret;
 241
 242        res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ehci");
 243        if (!res) {
 244                dev_err(dev, "EHCI get resource IORESOURCE_MEM failed\n");
 245                ret = -ENODEV;
 246                goto err_end;
 247        }
 248        resources[0] = *res;
 249
 250        res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "ehci-irq");
 251        if (!res) {
 252                dev_err(dev, " EHCI get resource IORESOURCE_IRQ failed\n");
 253                ret = -ENODEV;
 254                goto err_end;
 255        }
 256        resources[1] = *res;
 257
 258        ehci = omap_usbhs_alloc_child(OMAP_EHCI_DEVICE, resources, 2, pdata,
 259                sizeof(*pdata), dev);
 260
 261        if (!ehci) {
 262                dev_err(dev, "omap_usbhs_alloc_child failed\n");
 263                ret = -ENOMEM;
 264                goto err_end;
 265        }
 266
 267        res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ohci");
 268        if (!res) {
 269                dev_err(dev, "OHCI get resource IORESOURCE_MEM failed\n");
 270                ret = -ENODEV;
 271                goto err_ehci;
 272        }
 273        resources[0] = *res;
 274
 275        res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "ohci-irq");
 276        if (!res) {
 277                dev_err(dev, "OHCI get resource IORESOURCE_IRQ failed\n");
 278                ret = -ENODEV;
 279                goto err_ehci;
 280        }
 281        resources[1] = *res;
 282
 283        ohci = omap_usbhs_alloc_child(OMAP_OHCI_DEVICE, resources, 2, pdata,
 284                sizeof(*pdata), dev);
 285        if (!ohci) {
 286                dev_err(dev, "omap_usbhs_alloc_child failed\n");
 287                ret = -ENOMEM;
 288                goto err_ehci;
 289        }
 290
 291        return 0;
 292
 293err_ehci:
 294        platform_device_unregister(ehci);
 295
 296err_end:
 297        return ret;
 298}
 299
 300static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
 301{
 302        switch (pmode) {
 303        case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
 304        case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
 305        case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
 306        case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
 307        case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
 308        case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
 309        case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
 310        case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
 311        case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
 312        case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
 313                return true;
 314
 315        default:
 316                return false;
 317        }
 318}
 319
 320static int usbhs_runtime_resume(struct device *dev)
 321{
 322        struct usbhs_hcd_omap           *omap = dev_get_drvdata(dev);
 323        struct usbhs_omap_platform_data *pdata = omap->pdata;
 324        int i, r;
 325
 326        dev_dbg(dev, "usbhs_runtime_resume\n");
 327
 328        omap_tll_enable(pdata);
 329
 330        if (!IS_ERR(omap->ehci_logic_fck))
 331                clk_enable(omap->ehci_logic_fck);
 332
 333        for (i = 0; i < omap->nports; i++) {
 334                switch (pdata->port_mode[i]) {
 335                case OMAP_EHCI_PORT_MODE_HSIC:
 336                        if (!IS_ERR(omap->hsic60m_clk[i])) {
 337                                r = clk_enable(omap->hsic60m_clk[i]);
 338                                if (r) {
 339                                        dev_err(dev,
 340                                         "Can't enable port %d hsic60m clk:%d\n",
 341                                         i, r);
 342                                }
 343                        }
 344
 345                        if (!IS_ERR(omap->hsic480m_clk[i])) {
 346                                r = clk_enable(omap->hsic480m_clk[i]);
 347                                if (r) {
 348                                        dev_err(dev,
 349                                         "Can't enable port %d hsic480m clk:%d\n",
 350                                         i, r);
 351                                }
 352                        }
 353                /* Fall through as HSIC mode needs utmi_clk */
 354
 355                case OMAP_EHCI_PORT_MODE_TLL:
 356                        if (!IS_ERR(omap->utmi_clk[i])) {
 357                                r = clk_enable(omap->utmi_clk[i]);
 358                                if (r) {
 359                                        dev_err(dev,
 360                                         "Can't enable port %d clk : %d\n",
 361                                         i, r);
 362                                }
 363                        }
 364                        break;
 365                default:
 366                        break;
 367                }
 368        }
 369
 370        return 0;
 371}
 372
 373static int usbhs_runtime_suspend(struct device *dev)
 374{
 375        struct usbhs_hcd_omap           *omap = dev_get_drvdata(dev);
 376        struct usbhs_omap_platform_data *pdata = omap->pdata;
 377        int i;
 378
 379        dev_dbg(dev, "usbhs_runtime_suspend\n");
 380
 381        for (i = 0; i < omap->nports; i++) {
 382                switch (pdata->port_mode[i]) {
 383                case OMAP_EHCI_PORT_MODE_HSIC:
 384                        if (!IS_ERR(omap->hsic60m_clk[i]))
 385                                clk_disable(omap->hsic60m_clk[i]);
 386
 387                        if (!IS_ERR(omap->hsic480m_clk[i]))
 388                                clk_disable(omap->hsic480m_clk[i]);
 389                /* Fall through as utmi_clks were used in HSIC mode */
 390
 391                case OMAP_EHCI_PORT_MODE_TLL:
 392                        if (!IS_ERR(omap->utmi_clk[i]))
 393                                clk_disable(omap->utmi_clk[i]);
 394                        break;
 395                default:
 396                        break;
 397                }
 398        }
 399
 400        if (!IS_ERR(omap->ehci_logic_fck))
 401                clk_disable(omap->ehci_logic_fck);
 402
 403        omap_tll_disable(pdata);
 404
 405        return 0;
 406}
 407
 408static unsigned omap_usbhs_rev1_hostconfig(struct usbhs_hcd_omap *omap,
 409                                                unsigned reg)
 410{
 411        struct usbhs_omap_platform_data *pdata = omap->pdata;
 412        int i;
 413
 414        for (i = 0; i < omap->nports; i++) {
 415                switch (pdata->port_mode[i]) {
 416                case OMAP_USBHS_PORT_MODE_UNUSED:
 417                        reg &= ~(OMAP_UHH_HOSTCONFIG_P1_CONNECT_STATUS << i);
 418                        break;
 419                case OMAP_EHCI_PORT_MODE_PHY:
 420                        if (pdata->single_ulpi_bypass)
 421                                break;
 422
 423                        if (i == 0)
 424                                reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
 425                        else
 426                                reg &= ~(OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS
 427                                                                << (i-1));
 428                        break;
 429                default:
 430                        if (pdata->single_ulpi_bypass)
 431                                break;
 432
 433                        if (i == 0)
 434                                reg |= OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
 435                        else
 436                                reg |= OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS
 437                                                                << (i-1);
 438                        break;
 439                }
 440        }
 441
 442        if (pdata->single_ulpi_bypass) {
 443                /* bypass ULPI only if none of the ports use PHY mode */
 444                reg |= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
 445
 446                for (i = 0; i < omap->nports; i++) {
 447                        if (is_ehci_phy_mode(pdata->port_mode[i])) {
 448                                reg &= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
 449                                break;
 450                        }
 451                }
 452        }
 453
 454        return reg;
 455}
 456
 457static unsigned omap_usbhs_rev2_hostconfig(struct usbhs_hcd_omap *omap,
 458                                                unsigned reg)
 459{
 460        struct usbhs_omap_platform_data *pdata = omap->pdata;
 461        int i;
 462
 463        for (i = 0; i < omap->nports; i++) {
 464                /* Clear port mode fields for PHY mode */
 465                reg &= ~(OMAP4_P1_MODE_CLEAR << 2 * i);
 466
 467                if (is_ehci_tll_mode(pdata->port_mode[i]) ||
 468                                (is_ohci_port(pdata->port_mode[i])))
 469                        reg |= OMAP4_P1_MODE_TLL << 2 * i;
 470                else if (is_ehci_hsic_mode(pdata->port_mode[i]))
 471                        reg |= OMAP4_P1_MODE_HSIC << 2 * i;
 472        }
 473
 474        return reg;
 475}
 476
 477static void omap_usbhs_init(struct device *dev)
 478{
 479        struct usbhs_hcd_omap           *omap = dev_get_drvdata(dev);
 480        unsigned                        reg;
 481
 482        dev_dbg(dev, "starting TI HSUSB Controller\n");
 483
 484        pm_runtime_get_sync(dev);
 485
 486        reg = usbhs_read(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
 487        /* setup ULPI bypass and burst configurations */
 488        reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
 489                        | OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
 490                        | OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN);
 491        reg |= OMAP4_UHH_HOSTCONFIG_APP_START_CLK;
 492        reg &= ~OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN;
 493
 494        switch (omap->usbhs_rev) {
 495        case OMAP_USBHS_REV1:
 496                reg = omap_usbhs_rev1_hostconfig(omap, reg);
 497                break;
 498
 499        case OMAP_USBHS_REV2:
 500                reg = omap_usbhs_rev2_hostconfig(omap, reg);
 501                break;
 502
 503        default:        /* newer revisions */
 504                reg = omap_usbhs_rev2_hostconfig(omap, reg);
 505                break;
 506        }
 507
 508        usbhs_write(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);
 509        dev_dbg(dev, "UHH setup done, uhh_hostconfig=%x\n", reg);
 510
 511        pm_runtime_put_sync(dev);
 512}
 513
 514static int usbhs_omap_get_dt_pdata(struct device *dev,
 515                                        struct usbhs_omap_platform_data *pdata)
 516{
 517        int ret, i;
 518        struct device_node *node = dev->of_node;
 519
 520        ret = of_property_read_u32(node, "num-ports", &pdata->nports);
 521        if (ret)
 522                pdata->nports = 0;
 523
 524        if (pdata->nports > OMAP3_HS_USB_PORTS) {
 525                dev_warn(dev, "Too many num_ports <%d> in device tree. Max %d\n",
 526                                pdata->nports, OMAP3_HS_USB_PORTS);
 527                return -ENODEV;
 528        }
 529
 530        /* get port modes */
 531        for (i = 0; i < OMAP3_HS_USB_PORTS; i++) {
 532                char prop[11];
 533                const char *mode;
 534
 535                pdata->port_mode[i] = OMAP_USBHS_PORT_MODE_UNUSED;
 536
 537                snprintf(prop, sizeof(prop), "port%d-mode", i + 1);
 538                ret = of_property_read_string(node, prop, &mode);
 539                if (ret < 0)
 540                        continue;
 541
 542                ret = omap_usbhs_get_dt_port_mode(mode);
 543                if (ret < 0) {
 544                        dev_warn(dev, "Invalid port%d-mode \"%s\" in device tree\n",
 545                                        i, mode);
 546                        return -ENODEV;
 547                }
 548
 549                dev_dbg(dev, "port%d-mode: %s -> %d\n", i, mode, ret);
 550                pdata->port_mode[i] = ret;
 551        }
 552
 553        /* get flags */
 554        pdata->single_ulpi_bypass = of_property_read_bool(node,
 555                                                "single-ulpi-bypass");
 556
 557        return 0;
 558}
 559
 560static struct of_device_id usbhs_child_match_table[] = {
 561        { .compatible = "ti,omap-ehci", },
 562        { .compatible = "ti,omap-ohci", },
 563        { }
 564};
 565
 566/**
 567 * usbhs_omap_probe - initialize TI-based HCDs
 568 *
 569 * Allocates basic resources for this USB host controller.
 570 */
 571static int usbhs_omap_probe(struct platform_device *pdev)
 572{
 573        struct device                   *dev =  &pdev->dev;
 574        struct usbhs_omap_platform_data *pdata = dev->platform_data;
 575        struct usbhs_hcd_omap           *omap;
 576        struct resource                 *res;
 577        int                             ret = 0;
 578        int                             i;
 579        bool                            need_logic_fck;
 580
 581        if (dev->of_node) {
 582                /* For DT boot we populate platform data from OF node */
 583                pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
 584                if (!pdata)
 585                        return -ENOMEM;
 586
 587                ret = usbhs_omap_get_dt_pdata(dev, pdata);
 588                if (ret)
 589                        return ret;
 590
 591                dev->platform_data = pdata;
 592        }
 593
 594        if (!pdata) {
 595                dev_err(dev, "Missing platform data\n");
 596                return -ENODEV;
 597        }
 598
 599        if (pdata->nports > OMAP3_HS_USB_PORTS) {
 600                dev_info(dev, "Too many num_ports <%d> in platform_data. Max %d\n",
 601                                pdata->nports, OMAP3_HS_USB_PORTS);
 602                return -ENODEV;
 603        }
 604
 605        omap = devm_kzalloc(dev, sizeof(*omap), GFP_KERNEL);
 606        if (!omap) {
 607                dev_err(dev, "Memory allocation failed\n");
 608                return -ENOMEM;
 609        }
 610
 611        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 612        omap->uhh_base = devm_ioremap_resource(dev, res);
 613        if (IS_ERR(omap->uhh_base))
 614                return PTR_ERR(omap->uhh_base);
 615
 616        omap->pdata = pdata;
 617
 618        /* Initialize the TLL subsystem */
 619        omap_tll_init(pdata);
 620
 621        pm_runtime_enable(dev);
 622
 623        platform_set_drvdata(pdev, omap);
 624        pm_runtime_get_sync(dev);
 625
 626        omap->usbhs_rev = usbhs_read(omap->uhh_base, OMAP_UHH_REVISION);
 627
 628        /* we need to call runtime suspend before we update omap->nports
 629         * to prevent unbalanced clk_disable()
 630         */
 631        pm_runtime_put_sync(dev);
 632
 633        /*
 634         * If platform data contains nports then use that
 635         * else make out number of ports from USBHS revision
 636         */
 637        if (pdata->nports) {
 638                omap->nports = pdata->nports;
 639        } else {
 640                switch (omap->usbhs_rev) {
 641                case OMAP_USBHS_REV1:
 642                        omap->nports = 3;
 643                        break;
 644                case OMAP_USBHS_REV2:
 645                        omap->nports = 2;
 646                        break;
 647                default:
 648                        omap->nports = OMAP3_HS_USB_PORTS;
 649                        dev_dbg(dev,
 650                         "USB HOST Rev:0x%d not recognized, assuming %d ports\n",
 651                         omap->usbhs_rev, omap->nports);
 652                        break;
 653                }
 654                pdata->nports = omap->nports;
 655        }
 656
 657        i = sizeof(struct clk *) * omap->nports;
 658        omap->utmi_clk = devm_kzalloc(dev, i, GFP_KERNEL);
 659        omap->hsic480m_clk = devm_kzalloc(dev, i, GFP_KERNEL);
 660        omap->hsic60m_clk = devm_kzalloc(dev, i, GFP_KERNEL);
 661
 662        if (!omap->utmi_clk || !omap->hsic480m_clk || !omap->hsic60m_clk) {
 663                dev_err(dev, "Memory allocation failed\n");
 664                ret = -ENOMEM;
 665                goto err_mem;
 666        }
 667
 668        need_logic_fck = false;
 669        for (i = 0; i < omap->nports; i++) {
 670                if (is_ehci_phy_mode(i) || is_ehci_tll_mode(i) ||
 671                        is_ehci_hsic_mode(i))
 672                                need_logic_fck |= true;
 673        }
 674
 675        omap->ehci_logic_fck = ERR_PTR(-EINVAL);
 676        if (need_logic_fck) {
 677                omap->ehci_logic_fck = clk_get(dev, "ehci_logic_fck");
 678                if (IS_ERR(omap->ehci_logic_fck)) {
 679                        ret = PTR_ERR(omap->ehci_logic_fck);
 680                        dev_dbg(dev, "ehci_logic_fck failed:%d\n", ret);
 681                }
 682        }
 683
 684        omap->utmi_p1_gfclk = clk_get(dev, "utmi_p1_gfclk");
 685        if (IS_ERR(omap->utmi_p1_gfclk)) {
 686                ret = PTR_ERR(omap->utmi_p1_gfclk);
 687                dev_err(dev, "utmi_p1_gfclk failed error:%d\n", ret);
 688                goto err_p1_gfclk;
 689        }
 690
 691        omap->utmi_p2_gfclk = clk_get(dev, "utmi_p2_gfclk");
 692        if (IS_ERR(omap->utmi_p2_gfclk)) {
 693                ret = PTR_ERR(omap->utmi_p2_gfclk);
 694                dev_err(dev, "utmi_p2_gfclk failed error:%d\n", ret);
 695                goto err_p2_gfclk;
 696        }
 697
 698        omap->xclk60mhsp1_ck = clk_get(dev, "xclk60mhsp1_ck");
 699        if (IS_ERR(omap->xclk60mhsp1_ck)) {
 700                ret = PTR_ERR(omap->xclk60mhsp1_ck);
 701                dev_err(dev, "xclk60mhsp1_ck failed error:%d\n", ret);
 702                goto err_xclk60mhsp1;
 703        }
 704
 705        omap->xclk60mhsp2_ck = clk_get(dev, "xclk60mhsp2_ck");
 706        if (IS_ERR(omap->xclk60mhsp2_ck)) {
 707                ret = PTR_ERR(omap->xclk60mhsp2_ck);
 708                dev_err(dev, "xclk60mhsp2_ck failed error:%d\n", ret);
 709                goto err_xclk60mhsp2;
 710        }
 711
 712        omap->init_60m_fclk = clk_get(dev, "init_60m_fclk");
 713        if (IS_ERR(omap->init_60m_fclk)) {
 714                ret = PTR_ERR(omap->init_60m_fclk);
 715                dev_err(dev, "init_60m_fclk failed error:%d\n", ret);
 716                goto err_init60m;
 717        }
 718
 719        for (i = 0; i < omap->nports; i++) {
 720                char clkname[30];
 721
 722                /* clock names are indexed from 1*/
 723                snprintf(clkname, sizeof(clkname),
 724                                "usb_host_hs_utmi_p%d_clk", i + 1);
 725
 726                /* If a clock is not found we won't bail out as not all
 727                 * platforms have all clocks and we can function without
 728                 * them
 729                 */
 730                omap->utmi_clk[i] = clk_get(dev, clkname);
 731                if (IS_ERR(omap->utmi_clk[i]))
 732                        dev_dbg(dev, "Failed to get clock : %s : %ld\n",
 733                                clkname, PTR_ERR(omap->utmi_clk[i]));
 734
 735                snprintf(clkname, sizeof(clkname),
 736                                "usb_host_hs_hsic480m_p%d_clk", i + 1);
 737                omap->hsic480m_clk[i] = clk_get(dev, clkname);
 738                if (IS_ERR(omap->hsic480m_clk[i]))
 739                        dev_dbg(dev, "Failed to get clock : %s : %ld\n",
 740                                clkname, PTR_ERR(omap->hsic480m_clk[i]));
 741
 742                snprintf(clkname, sizeof(clkname),
 743                                "usb_host_hs_hsic60m_p%d_clk", i + 1);
 744                omap->hsic60m_clk[i] = clk_get(dev, clkname);
 745                if (IS_ERR(omap->hsic60m_clk[i]))
 746                        dev_dbg(dev, "Failed to get clock : %s : %ld\n",
 747                                clkname, PTR_ERR(omap->hsic60m_clk[i]));
 748        }
 749
 750        if (is_ehci_phy_mode(pdata->port_mode[0])) {
 751                /* for OMAP3, clk_set_parent fails */
 752                ret = clk_set_parent(omap->utmi_p1_gfclk,
 753                                        omap->xclk60mhsp1_ck);
 754                if (ret != 0)
 755                        dev_dbg(dev, "xclk60mhsp1_ck set parent failed: %d\n",
 756                                        ret);
 757        } else if (is_ehci_tll_mode(pdata->port_mode[0])) {
 758                ret = clk_set_parent(omap->utmi_p1_gfclk,
 759                                        omap->init_60m_fclk);
 760                if (ret != 0)
 761                        dev_dbg(dev, "P0 init_60m_fclk set parent failed: %d\n",
 762                                        ret);
 763        }
 764
 765        if (is_ehci_phy_mode(pdata->port_mode[1])) {
 766                ret = clk_set_parent(omap->utmi_p2_gfclk,
 767                                        omap->xclk60mhsp2_ck);
 768                if (ret != 0)
 769                        dev_dbg(dev, "xclk60mhsp2_ck set parent failed: %d\n",
 770                                        ret);
 771        } else if (is_ehci_tll_mode(pdata->port_mode[1])) {
 772                ret = clk_set_parent(omap->utmi_p2_gfclk,
 773                                                omap->init_60m_fclk);
 774                if (ret != 0)
 775                        dev_dbg(dev, "P1 init_60m_fclk set parent failed: %d\n",
 776                                        ret);
 777        }
 778
 779        omap_usbhs_init(dev);
 780
 781        if (dev->of_node) {
 782                ret = of_platform_populate(dev->of_node,
 783                                usbhs_child_match_table, NULL, dev);
 784
 785                if (ret) {
 786                        dev_err(dev, "Failed to create DT children: %d\n", ret);
 787                        goto err_alloc;
 788                }
 789
 790        } else {
 791                ret = omap_usbhs_alloc_children(pdev);
 792                if (ret) {
 793                        dev_err(dev, "omap_usbhs_alloc_children failed: %d\n",
 794                                                ret);
 795                        goto err_alloc;
 796                }
 797        }
 798
 799        return 0;
 800
 801err_alloc:
 802        for (i = 0; i < omap->nports; i++) {
 803                if (!IS_ERR(omap->utmi_clk[i]))
 804                        clk_put(omap->utmi_clk[i]);
 805                if (!IS_ERR(omap->hsic60m_clk[i]))
 806                        clk_put(omap->hsic60m_clk[i]);
 807                if (!IS_ERR(omap->hsic480m_clk[i]))
 808                        clk_put(omap->hsic480m_clk[i]);
 809        }
 810
 811        clk_put(omap->init_60m_fclk);
 812
 813err_init60m:
 814        clk_put(omap->xclk60mhsp2_ck);
 815
 816err_xclk60mhsp2:
 817        clk_put(omap->xclk60mhsp1_ck);
 818
 819err_xclk60mhsp1:
 820        clk_put(omap->utmi_p2_gfclk);
 821
 822err_p2_gfclk:
 823        clk_put(omap->utmi_p1_gfclk);
 824
 825err_p1_gfclk:
 826        if (!IS_ERR(omap->ehci_logic_fck))
 827                clk_put(omap->ehci_logic_fck);
 828
 829err_mem:
 830        pm_runtime_disable(dev);
 831
 832        return ret;
 833}
 834
 835static int usbhs_omap_remove_child(struct device *dev, void *data)
 836{
 837        dev_info(dev, "unregistering\n");
 838        platform_device_unregister(to_platform_device(dev));
 839        return 0;
 840}
 841
 842/**
 843 * usbhs_omap_remove - shutdown processing for UHH & TLL HCDs
 844 * @pdev: USB Host Controller being removed
 845 *
 846 * Reverses the effect of usbhs_omap_probe().
 847 */
 848static int usbhs_omap_remove(struct platform_device *pdev)
 849{
 850        struct usbhs_hcd_omap *omap = platform_get_drvdata(pdev);
 851        int i;
 852
 853        for (i = 0; i < omap->nports; i++) {
 854                if (!IS_ERR(omap->utmi_clk[i]))
 855                        clk_put(omap->utmi_clk[i]);
 856                if (!IS_ERR(omap->hsic60m_clk[i]))
 857                        clk_put(omap->hsic60m_clk[i]);
 858                if (!IS_ERR(omap->hsic480m_clk[i]))
 859                        clk_put(omap->hsic480m_clk[i]);
 860        }
 861
 862        clk_put(omap->init_60m_fclk);
 863        clk_put(omap->utmi_p1_gfclk);
 864        clk_put(omap->utmi_p2_gfclk);
 865        clk_put(omap->xclk60mhsp2_ck);
 866        clk_put(omap->xclk60mhsp1_ck);
 867
 868        if (!IS_ERR(omap->ehci_logic_fck))
 869                clk_put(omap->ehci_logic_fck);
 870
 871        pm_runtime_disable(&pdev->dev);
 872
 873        /* remove children */
 874        device_for_each_child(&pdev->dev, NULL, usbhs_omap_remove_child);
 875        return 0;
 876}
 877
 878static const struct dev_pm_ops usbhsomap_dev_pm_ops = {
 879        .runtime_suspend        = usbhs_runtime_suspend,
 880        .runtime_resume         = usbhs_runtime_resume,
 881};
 882
 883static const struct of_device_id usbhs_omap_dt_ids[] = {
 884        { .compatible = "ti,usbhs-host" },
 885        { }
 886};
 887
 888MODULE_DEVICE_TABLE(of, usbhs_omap_dt_ids);
 889
 890
 891static struct platform_driver usbhs_omap_driver = {
 892        .driver = {
 893                .name           = (char *)usbhs_driver_name,
 894                .owner          = THIS_MODULE,
 895                .pm             = &usbhsomap_dev_pm_ops,
 896                .of_match_table = of_match_ptr(usbhs_omap_dt_ids),
 897        },
 898        .remove         = usbhs_omap_remove,
 899};
 900
 901MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
 902MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>");
 903MODULE_ALIAS("platform:" USBHS_DRIVER_NAME);
 904MODULE_LICENSE("GPL v2");
 905MODULE_DESCRIPTION("usb host common core driver for omap EHCI and OHCI");
 906
 907static int __init omap_usbhs_drvinit(void)
 908{
 909        return platform_driver_probe(&usbhs_omap_driver, usbhs_omap_probe);
 910}
 911
 912/*
 913 * init before ehci and ohci drivers;
 914 * The usbhs core driver should be initialized much before
 915 * the omap ehci and ohci probe functions are called.
 916 * This usbhs core driver should be initialized after
 917 * usb tll driver
 918 */
 919fs_initcall_sync(omap_usbhs_drvinit);
 920
 921static void __exit omap_usbhs_drvexit(void)
 922{
 923        platform_driver_unregister(&usbhs_omap_driver);
 924}
 925module_exit(omap_usbhs_drvexit);
 926
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