linux/drivers/rtc/rtc-pl031.c
<<
>>
Prefs
   1/*
   2 * drivers/rtc/rtc-pl031.c
   3 *
   4 * Real Time Clock interface for ARM AMBA PrimeCell 031 RTC
   5 *
   6 * Author: Deepak Saxena <dsaxena@plexity.net>
   7 *
   8 * Copyright 2006 (c) MontaVista Software, Inc.
   9 *
  10 * Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
  11 * Copyright 2010 (c) ST-Ericsson AB
  12 *
  13 * This program is free software; you can redistribute it and/or
  14 * modify it under the terms of the GNU General Public License
  15 * as published by the Free Software Foundation; either version
  16 * 2 of the License, or (at your option) any later version.
  17 */
  18#include <linux/module.h>
  19#include <linux/rtc.h>
  20#include <linux/init.h>
  21#include <linux/interrupt.h>
  22#include <linux/amba/bus.h>
  23#include <linux/io.h>
  24#include <linux/bcd.h>
  25#include <linux/delay.h>
  26#include <linux/slab.h>
  27
  28/*
  29 * Register definitions
  30 */
  31#define RTC_DR          0x00    /* Data read register */
  32#define RTC_MR          0x04    /* Match register */
  33#define RTC_LR          0x08    /* Data load register */
  34#define RTC_CR          0x0c    /* Control register */
  35#define RTC_IMSC        0x10    /* Interrupt mask and set register */
  36#define RTC_RIS         0x14    /* Raw interrupt status register */
  37#define RTC_MIS         0x18    /* Masked interrupt status register */
  38#define RTC_ICR         0x1c    /* Interrupt clear register */
  39/* ST variants have additional timer functionality */
  40#define RTC_TDR         0x20    /* Timer data read register */
  41#define RTC_TLR         0x24    /* Timer data load register */
  42#define RTC_TCR         0x28    /* Timer control register */
  43#define RTC_YDR         0x30    /* Year data read register */
  44#define RTC_YMR         0x34    /* Year match register */
  45#define RTC_YLR         0x38    /* Year data load register */
  46
  47#define RTC_CR_EN       (1 << 0)        /* counter enable bit */
  48#define RTC_CR_CWEN     (1 << 26)       /* Clockwatch enable bit */
  49
  50#define RTC_TCR_EN      (1 << 1) /* Periodic timer enable bit */
  51
  52/* Common bit definitions for Interrupt status and control registers */
  53#define RTC_BIT_AI      (1 << 0) /* Alarm interrupt bit */
  54#define RTC_BIT_PI      (1 << 1) /* Periodic interrupt bit. ST variants only. */
  55
  56/* Common bit definations for ST v2 for reading/writing time */
  57#define RTC_SEC_SHIFT 0
  58#define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */
  59#define RTC_MIN_SHIFT 6
  60#define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */
  61#define RTC_HOUR_SHIFT 12
  62#define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */
  63#define RTC_WDAY_SHIFT 17
  64#define RTC_WDAY_MASK (0x7 << RTC_WDAY_SHIFT) /* Day of Week [1-7] 1=Sunday */
  65#define RTC_MDAY_SHIFT 20
  66#define RTC_MDAY_MASK (0x1F << RTC_MDAY_SHIFT) /* Day of Month [1-31] */
  67#define RTC_MON_SHIFT 25
  68#define RTC_MON_MASK (0xF << RTC_MON_SHIFT) /* Month [1-12] 1=January */
  69
  70#define RTC_TIMER_FREQ 32768
  71
  72/**
  73 * struct pl031_vendor_data - per-vendor variations
  74 * @ops: the vendor-specific operations used on this silicon version
  75 * @clockwatch: if this is an ST Microelectronics silicon version with a
  76 *      clockwatch function
  77 * @st_weekday: if this is an ST Microelectronics silicon version that need
  78 *      the weekday fix
  79 * @irqflags: special IRQ flags per variant
  80 */
  81struct pl031_vendor_data {
  82        struct rtc_class_ops ops;
  83        bool clockwatch;
  84        bool st_weekday;
  85        unsigned long irqflags;
  86};
  87
  88struct pl031_local {
  89        struct pl031_vendor_data *vendor;
  90        struct rtc_device *rtc;
  91        void __iomem *base;
  92};
  93
  94static int pl031_alarm_irq_enable(struct device *dev,
  95        unsigned int enabled)
  96{
  97        struct pl031_local *ldata = dev_get_drvdata(dev);
  98        unsigned long imsc;
  99
 100        /* Clear any pending alarm interrupts. */
 101        writel(RTC_BIT_AI, ldata->base + RTC_ICR);
 102
 103        imsc = readl(ldata->base + RTC_IMSC);
 104
 105        if (enabled == 1)
 106                writel(imsc | RTC_BIT_AI, ldata->base + RTC_IMSC);
 107        else
 108                writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC);
 109
 110        return 0;
 111}
 112
 113/*
 114 * Convert Gregorian date to ST v2 RTC format.
 115 */
 116static int pl031_stv2_tm_to_time(struct device *dev,
 117                                 struct rtc_time *tm, unsigned long *st_time,
 118        unsigned long *bcd_year)
 119{
 120        int year = tm->tm_year + 1900;
 121        int wday = tm->tm_wday;
 122
 123        /* wday masking is not working in hardware so wday must be valid */
 124        if (wday < -1 || wday > 6) {
 125                dev_err(dev, "invalid wday value %d\n", tm->tm_wday);
 126                return -EINVAL;
 127        } else if (wday == -1) {
 128                /* wday is not provided, calculate it here */
 129                unsigned long time;
 130                struct rtc_time calc_tm;
 131
 132                rtc_tm_to_time(tm, &time);
 133                rtc_time_to_tm(time, &calc_tm);
 134                wday = calc_tm.tm_wday;
 135        }
 136
 137        *bcd_year = (bin2bcd(year % 100) | bin2bcd(year / 100) << 8);
 138
 139        *st_time = ((tm->tm_mon + 1) << RTC_MON_SHIFT)
 140                        |       (tm->tm_mday << RTC_MDAY_SHIFT)
 141                        |       ((wday + 1) << RTC_WDAY_SHIFT)
 142                        |       (tm->tm_hour << RTC_HOUR_SHIFT)
 143                        |       (tm->tm_min << RTC_MIN_SHIFT)
 144                        |       (tm->tm_sec << RTC_SEC_SHIFT);
 145
 146        return 0;
 147}
 148
 149/*
 150 * Convert ST v2 RTC format to Gregorian date.
 151 */
 152static int pl031_stv2_time_to_tm(unsigned long st_time, unsigned long bcd_year,
 153        struct rtc_time *tm)
 154{
 155        tm->tm_year = bcd2bin(bcd_year) + (bcd2bin(bcd_year >> 8) * 100);
 156        tm->tm_mon  = ((st_time & RTC_MON_MASK) >> RTC_MON_SHIFT) - 1;
 157        tm->tm_mday = ((st_time & RTC_MDAY_MASK) >> RTC_MDAY_SHIFT);
 158        tm->tm_wday = ((st_time & RTC_WDAY_MASK) >> RTC_WDAY_SHIFT) - 1;
 159        tm->tm_hour = ((st_time & RTC_HOUR_MASK) >> RTC_HOUR_SHIFT);
 160        tm->tm_min  = ((st_time & RTC_MIN_MASK) >> RTC_MIN_SHIFT);
 161        tm->tm_sec  = ((st_time & RTC_SEC_MASK) >> RTC_SEC_SHIFT);
 162
 163        tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
 164        tm->tm_year -= 1900;
 165
 166        return 0;
 167}
 168
 169static int pl031_stv2_read_time(struct device *dev, struct rtc_time *tm)
 170{
 171        struct pl031_local *ldata = dev_get_drvdata(dev);
 172
 173        pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR),
 174                        readl(ldata->base + RTC_YDR), tm);
 175
 176        return 0;
 177}
 178
rtc_time *  79 128                /* wd="L80">  180 1/

/* wd=ldataa href="drivers/rtc/rtc-1pl03118sref">pl031_stv2_time_to_tm(uns> *tm)
 170{
 171        struct ops;
ldata->"lin          /* wd="sref">reatch;
ldata->st18e=bcd_year" class="sref">bcdassref">ldata->"lin170" class="line"  format.
 178
 131
/* wd=ass="srefd="L85" class="line" nam1e="L818="sref">st_tivers/rtc/rtc-pl031.assref">ldata->"lin17=">/*d of="+code=pl031_locL74" id=33d="1l03/a> * 2 of t/rtc/8f">base + RTC_IMSC);
 108                #define /* wd=me="L176"1.c#L87" id="L87" class=1"line18ivers/rtc/rtc-pl031.c="+code=RTC_IMSC" class="sref">RTC_IMSC);
 131
 108                  32#define /* wd="drivers1/rtc/rtc-pl031.c#L89" id1="L891 class="line" l031.c#L175" id="L175" class="line" n>vendor;
 130   ss="sref"1>rtc;
ldata->"lin          /* wde="L91"> 1 91        void s="sref"1code=base" class="sref">1base<19ref">readl(  94static int  167}
 178
 178rtc_time *dev,
  95        unsigned int enabled)
  96{
  97        struc/rtc/rtc-p1l/a>1pl0311local *ldata->"lin          /* wd_get_drvd1ata(dev);
st_time & ldata->"lin170" class="line"  format.dev);
 172
 173     31#define pl031_stv2 id="L99"2class="line" name="L99">2 99ivers/rtc/rtc-pl031.c#L172" id="L172" class="line" name="L172"> 172
 173    >#define tm_mon,  131
RTC_BIT_AI, base + c" clline" name="L16c" clef="ref">tm_mon,  172
 173    );
 107        else
ode=base" class="sref">2lass=20s="sref">tm->tm_mon, RTC031.c#L162" id="L031.c#L172" id="L172" class="line" name="L172"> 172
 173    s="sref">writel( 107        else
  94static int ldata->ldata->"lin          /* w2 -&g2; 167" clc" clef="drivers/rtc/rtc-pl031.c#L178" id="L178" class="line" name="L155"> 178
 178rtc_time *2data->RTC2IMSC);
rtc_time *tm)
 170{
 171        structd=33d="1l2s>( 109
 128                /* w2ame="L1102> 110        return 2;


/* w21}
ldata->"lin          /* w2L113"> 112ldata-> 1142/a>  >imsc;
 116static int st_time & ldata->"lin170" class="line" 031.">wdasref">rtc_tm_to_timewdasrec-pl031" class="line" namc" clline" name="L16c" clef="ref">tm_mon,  131
ldata->"lin17=">/*d of="+code=pl031_locL74" id=33d="1l2href="+co2e=st_time" class="sref">2t_tim21ivers/rtc/rtc-pl031.c="+code=RTC_IMSassref">ldata->"lin170" class="line"  format.
 178
tm_mon,  131
pl031_stv2" id="L112" class="line" name="L112"> 1122ref="+code=tm" class="sref">ttttttttttttttttttttt31" class="line" name="L131"> 131
/* w220" id="L220" class="line" name="L220"> 22href="+code=tm" classvers/rtc/rtc-pl031.assref">ldata->"lin17=">/*d of="+code=pl031_locL74" id=33d="1l231.c#L1212 id="L121" class="line" 2ame="22141                      ="+code=RTC_IMSC" class="sref">RTC_IMSC);
 108                /* w22me="L1102"sref">wday = ="+code=RTC_IMSC" class="sref">RTC_IMSC);
 131
 108                #define /* w22}

readl(
="+code=RTC_IMS/rtc-p92" id="L92" class="line" name="L92">  92};
 178
tm_mon, Rv          /* w2214"> 1142ode=dev" class="sref">de2,2&l031.c#L175" id="L175" class="line" 2a href="+2ode=tm_wday" class="sref2>tm_w2ay);
  2="+code=EINVAL" class="s2ef">E22tc-pl031.c#L176" id="L176" class="line" 2class="sr2f">wday == -1) {
ldata->"lin          /* w2ay is not2provided, calculate it h2re */2/span>e031.c#L175" id="L175" class="line" 2 href="dr2vers/rtc/rtc-pl031.c#L132" id=2L130" class="line" name="L130"> 130  2         2   struct ldata-a>}ass="s_svers/="+code=RTC_IMS/rtc-pss="sref"ss="line" name="L92">ss="sref"ef="drtc/rtc-pl031.c#L17a>}ref">ldata-a>}tc/rtc="L90me="L155"> 178
_ide=RTC_IMSC" claa>
_idef="t ST vass=">rtc_time * 132 133         2     2rtc_time *tm)

_idef="          /* w2a>
mi"ef="          /* w2a14"> 1142 =            pan>
RTC_YDR), tm_wday;
bin2bcdst_time & mi"ef="TC031.c#L162" id="L031.c#L172" id="L172" class="line" name="L172"> 172
 173    Ma href="+code=RTC_IMSM" clas)f">RTC_YDR), bin2bcdmi"ef="Ta>);
 107        else
st_time 2 ((RTC_IMSC);
 107        else
 108                 101        writel<240   2                    |   2   (<2 href="+code=tm" classdrivers/rtc/rtceviti"line" name="L16eviti"d="L1|        }
 101       AFd="L1|="+code=writel" classRQF01"> 101       sRQF href="+code=writel" class="sref">writel<24        2L141" class="line" name=2L141"2 141              " class="line" 031.up/rtc_a>}ref">ldata-031.up/rtc_a>}ass="line" name="L172"> 172
pl031_vendor_data , 1rivers/rtc/rtc-pleviti"line" name="L16eviti"d="Lf="+code=writel" class="sref">writel<24 class="2                    |   2   (<24ode=__iomem" class="sref">__iomem *<2"> 143/* w2> 1442                       |2     24a>                tm24="sref">calc_tm.);
/* w2>=bin2bcd2> 145
 146        return 2;
dev);
 16}
 168
 169static int pl031_stv2_read_2L149"> 142 1502/a>      ass="sref">rtc_time *tm)
 170{
 171        structd=33d="1l2href="+co2e=pl031_stv2_time_to_tm"2class25ode=__iomem" class="sref">__iomem *<2>bcd_year2/a>,
tm->rtc_tm_to_time( 172
 173         174                         1532/a>        struct ldata->bcd2bin(RTC_YDR),   2 (( 2 (( = ((2a href="+code=st_time" c2ass="25ef="drivers/rtc/rtc-pl031.c#L177" id=" class="line" name="L177"> 17}
 178
rtc_time *tm_min  = (( 128                /* w2>tm_sec  = ((      ass="sref">rtc_time *tm)
 170{
 171        structent">/* w2>ref="+co2C_MASK" class="sref">RTC2SEC_M2SK) >&grtc/rtc-pl031.c#L17assref">ldata->"lin          /* w2sref">tm_2day, readl(rtc_assref">ldata->"lin170" class="line" 031.ode=calc_tm" class="sref">calc_tm;
 131
 164<2a>        calc_tm.st_tivers/rtc/rtc-pl031.assref">ldata->"lin17=">/f">calc_tm.base + RTC_IMSC);
 131
 108                  32#define /* w2ame="L1662> 166        return 2;
dev);
baseldata->"lin          /* w2lass="sre2">dev, struct pl231_lo2al * 16}
 178
 178rtc_time *r2adl(rtc_time *tm)
 170{
 171        structent">/* w2ase" clas2="sref">base + calc_tm.tm);
st_time & rtc_tm_to_time( 172
 173     31#define tm_mon,  131
 175
st_time & tm_mon,  172
 173    );
 107        else
st_time & tm_mon, RTC031.c#L162" id="L031.c#L172" id="L172" class="line" name="L172"> 172
 173    s="sref">writel>       sref="+co/a>);
 107        else
  79 130  2="L80">  280 28
RTC_YDR), ops;
readl(r2atch;
 167 clc" clef="drivers/rtc/rtc-pl031.c#L178" id="L178" class="line" name="L155"> 178
 178rtc_time *st28sref">dev,
  95        unsigned int enabled)
  96{
  97        struc/rtc/rtc-p2=me="L1752cclass="comment"> * 2 of2t/rtc28f">base +#L128" id="L128" class="line" name="L128"> 128                /* w2=me="L17621.c#L87" id="L87" class=2"line28ivers/rtc/rtcrtc/rtc-pl031.c#L17assref">ldata->"lin          /* w2="drivers2/rtc/rtc-pl031.c#L89" id2="L892 class         /* w2=a h1="+c2a>;
stCommon bit definitions fot"linemoniti, we cmmot bi deal@ops: non-wildcarda hc" claa>  >imsc;
rtc;
rtc_assref">ldata->"lin170" class="line" 031.">wdasref">rtc_tm_to_timewdasrec-pl031" class="line" namc" clline" name="L16c" clef="ref">tm_mon,  131
 2 91        void ldata->"lin17=">/*d of="+code=pl031_locL74" id=33d="1l2>s="sref"2code=base" class="sref">2base<29a href="+code=rtc_time_to_tm" class=assref">ldata->"lin170" class="line" 031.ode=calc_tm" class="sref">calc_tm;
tm_mon,  131
 131
  94static int ldata->"lin17=">/*d of="+code=pl031_locL74" id=33d="1l2>ef="+cod2a> *& RTC_IMSC);
 131
 108                #define /* w2l031.c#L925" id="L95" class="line"2 name2"L95">  95tring">&   92};
 178
tm_mon, Rv          /* w2l/a>2pl03129f">base + (/* w3 id="L99"3class="line" name="L99">3 99baseldata->"lin          /* w3a>(RTC_l031.c#L175" id="L175" class="line" 3r3(        void __iomem *<3a4s="sref3>ode=base" class="sref">3lass=30s="srrivers/rtc/rtc-pl031.c#L177" id=" mov"line" name="L167"> 16}
mov"ef="drivers/rtc/rtc-pl031.camba_#L178" id="L178" clasamba_#L178"e" name="L155"> 178
__iomem *<3a5s="sref3>  94static int enabled)
  96{

tm_mon,   97        struc/rtc/rtc-p3   85        unsigned long st_time &   96{
ef="de="L155"> 178
  97        struc/rtc/rtc-p3 9-&g3;ta(st_time & }ref">ldata-frec_a>}ef="de="L155"> 178
tm_mon, }ref">ldata-a>}tc/r[0]L1vers/rtc/rtc-pl031.c#L108" id="L108" class=""L97">  97        struc/rtc/rtc-p3s="sref">3data->st_time &  172
pl031_vendor_data "L97">  97        struc/rtc/rtc-p3sid="L99"3IMSC);
, ldata-aounmapass="line" name="L172"> 172
  97        struc/rtc/rtc-p3s>( 109
rtc_kfrec="L173" class="kfrecass="line" name="L172"> 172
  97        struc/rtc/rtc-p3s3( 110        return 3;
base + cmba_releine_region"line" name="L16cmba_releine_region"ef="de="L155"> 178
  97        struc/rtc/rtc-p3s4s="sref3href="drivers/rtc/rtc-pl331.c#31ref">readl( 113RTC_YDR),  1143/a>  85        unsigned long  16prob"ef="drivers/rtc/rtc-pl031.camba_#L178" id="L178" clasamba_#L178"e" name="L155"> 178
 178rtc_time *3t_tim31iversd of="+code=pl031_locL74" id=33d="1l3" id="L113" class="line" name="L113"> 1132ref="+code=tmrtc/rtc-pl031.c#L17assref">ldata->"lin          /* w320" id="L320" class="line" name="L320"> 32href="+code=t        unsigned int enabled)
/* w32>(rtc_time *vers/rtc/rtc-pl03> *venabled)
tm_mon,   96{
/* w323(wday = pl031_stv2_time_to_tm(unsacalf">wd_op"line" name="L162"> f">wd_op"nabled)
tm_mon, /* w324s="sref322
 128      L1vers/rtc/rtc-pl=6">  96{
/* w32113"> 113="drivers/rtc/rtc-pl031.3#L12432ass="sref">ldata-> 1143ode=dev" class="sref">de3,3ldata->"lin170" class="line" cmba_request_region"line" name="L16cmba_request_region"ef="de="L155"> 178
  97        struc/rtc/rtc-p3a href="+3ode=tm_wday" class="sref3>tm_w32="sref">st_tivers/rtc/rtc-pl031.assref">ldata->"lint ST vass=">rtc_time *E32f">base + /* w32ref="+co3f">wday == -1) {
dev);
st_time & enablv2line" name="L174GFP_KERNEL  97        struc/rtc/rtc-p3 href="dr3vers/rtc/rtc-pl031.c#L133" id=331"sref">st_tivers!line" name="L172"> 172
ldata->"lin170-" class="line" ENOMEMref">ldata-ENOMEM96"           /* w3" class="3ine" name="L132"> 132ldata-ous96"           /* w3"4s="sref3"L133"> 133         3     3
 172
/* w3"14"> 1143 = calc_tm.tm_wday;
st_time &  108                ldata-aoremapef="de="L155"> 178
tm_mon, ldata-rivrsame=tc031_locL74" id=2e"ource_rizeline" name="L162e"ource_rize/rtc-31" class="line" namca>
tm_mon,   97        struc/rtc/rtc-p3 17  3 class="sref">bin2bcdbin2bcd 172
st_time 3 ((ldata->"lin170-" class="line" ENOMEMref">ldata-ENOMEM96"           /* w340   3                    |   3   (<3 href="+code=tm" classgotoivers/rtc/rtc-plous_no_remapref">ldata-ous_no_remap96"           /* w34        3L141" class="line" name=3L141"3 141      l031.c#L175" id="L175" class="line" 34 class="3                    |   3   (<34ode=__iomem" class="sref">__iomem *<3"> 143tm->  96{
ef="de="L155"> 178
 172
  97        struc/rtc/rtc-p3> 1443                       |3     34ass="sref">ldata->tm34span class="se_to_tm" class=ef="dbme=dev" class="sef="dbm/rtc-31" class="line" namca>
tm_mon, "de128" r ID170ex%02x\n";
{
 178
  97        struc/rtc/rtc-p3>" class=3HIFT);
st_time & 
tm_mon, "revision170ex%01x\n";

 178
  97        struc/rtc/rtc-p3>17  3> 145
st_time &   96{
 172
 173    L101"> 101       writel<37}
st_timCommon bit definitions fEs="sr"linecef"kwatch on1ST Variantsmsc;
 143st_tiverslass="line" namvendotm_mon,  1503/a>              " class="line" =6">  96{
 101       /* w3href="+co3e=pl031_stv2_time_to_tm"3class35href="+code=telse         /* w3h> 143,
  96{
 101       /* w3h 1443/a>        struct RTC_IMSC);
  96{
 108                 101       writel<37;bcd2bin(calc_tm.st_timCommon bit definitions ;
;
;
;
st_tiverslass="line" namvendotm_mon, ldata-ri_weekday" na"*d of="+code=pl031_locL74" id=33d="1l3>tm_sec  = ((              vers/rtc/rtc-pl031.as31.c#L172" id="L172" class="line" name="L172"> 172
 173    Y    x20=0"*d of="+code=pl031_locL74" id=33d="1l3>ref="+co3C_MASK" class="sref">RTC3SEC_M36href="+code=tm" class        line" name="L17 name="L128"> 128      TC031.c#L162" id="L031.c#L172" id="L172" class="line" name="L172"> 172
 173        writel<3sref">tm_3day,  131
writel<3s 1443);
 164<3a>        & on  3> -= 1900;
  95tring">&  128      TC031.c#L162" id=" name="L128"> 128      T| (0x7 <<="+code=writel" clasWDAY_SHIFT  writel<3s17  3> 165
base + RTC_IMSC);
<>x20=0eivers/rtc/rtc-pl031.c#L108" id="L108" class="line" name="L108"> 108                  32#define /* w3ame="L1663> 166        return 3;
RTC_IMSC);
<31.c#L162" id=" name="L128"> 128      L1vers/rtc/rtc-pl031.c#L108" id="L108" class="line" name="L108"> 108                  32#define /* w3ime(s3ruct tl031.c#L175" id="L175" class="line" 3lass="sre3">dev, struct pl331_lo37141      l031.c#L175" id="L175" class="line" 3>ldata__iomem *<3_time_to_3m(tm-> 172
pl031_vendor_data 170" class="line" 031.#L178"_registec#L152" id="L152acal#L178"_registecass="lCommon bit driv=ime>"em;

tm_mon, pl031_stv3="sref">r3adl(/* w3i4"> 164<3="sref">base +   32#definISlER"ass="line" name="L172"> 172
pl031_vendor_data )"*d of="+code=pl031_locL74" id=33d="1l3lass="sre3">tm);
  95tring">&="+code=RTC_IMS0ssref">ldata->"lin170="+code=RTC_IMSPTRlER">  32#definPTRlER"ass="line" name="L172"> 172
pl031_vendor_data )          /* w3i17  3> 175
base + pl031_vendor_daous_no_r">96"           /* w3ame="L1763> 176        return 3;
/* w33a h1="+c39">  79st_tiverslass="line" namrequest_a>}ref">ldata-0equest_a>}ef="de="L155"> 178
tm_mon, }ref">ldata-a>}tc/r[0]L1vers/rtc/rtc-plss="srss="sref"ss="line" name="L92">ss="sref"ef="2_time_to_tm" class="sref">pl031_stv3="L80">  380 38141              tring">&="+code=RTC_IMSvendotm_mon, }flag"line" name="L16a>}flag"ame=,stCommon bit driv=ime>"rf">pl031";
 172
ldata->"lin170-" class="line" EIOref">ldata-EIO96"           /* w3ss="sref"3>ops;
}ref">ldata-ous_no_a>}96"           /* w3s"sref">r3atch;
st38="sref">calc_tm.st_time & ldata-ef=78"_init_wakeup/rtc-31" class="line" namca>
tm_mon, /* w3=me="L1753cclass="comment"> * 2 of3t/rtc38tc-pl031.c#L176" id="L176" class="line" 3=me="L17631.c#L87" id="L87" class=3"line38ivers/rtc/rtcass="sref">RTC_YDR), /* w3=a h1="+c3a>;
ldata-ous_no_a>}96" :         /* w3="L80">  3>rtc;
rtc_acal#L178"_unregistec#L152" id="L152acal#L178"_unregistecass="line" name="L172"> 172
pl031_vendor_data "L97">  97        struc/rtc/rtc-p3e="L91"> 3 91        void pl031_vendor_daous_no_r">96" :         /* w3=s="sref"3code=base" class="sref">3base<39s="sref">tm->ldata-aounmapass="line" name="L172"> 172
  97        struc/rtc/rtc-p3ame="L94"3>  94static int   96{
ef="de="L155"> 178
  97        struc/rtc/rtc-p3>ef="+cod3a> *ldata-ous_no_remap96" :         /* w3=ass="sre35" id="L95" class="line"3 name39="sref">st_time &  172
  97        struc/rtc/rtc-p3l/a>3pl03139f">bavers/rtc/rtc-plousref">ldata-ous96" :         /* w3=me="L1763ata(st_time &  178
  97        struc/rtc/rtc-p4rtc-pl0314c#L98" id="L98" class="l4ne" n40classe="L155"> 178/* w4 id="L99"4class="line" name="L99">4 99 130  4a>(ldata->"linL97">  97        struc/rtc/rtc-p4r3(        void 4lass=40ref">readl(;
rtc_time *vers/rtc/rtc-pl03> *venablee="L155"> 178 *st_ti.tm_mon, 4ss="s40f">base + ,  16}
class="line" name="L167"> 16}
pl031_stv4 9-&g4;ta(,  16" class="line" name="L177"> 17}
pl031_stv4s="sref">4data->,  16}
clac" clline" name="L167"> 16}
pl031_stv4sid="L99"4IMSC);
,  16" clc" clline" name="L167"> 167 clc" clef="2_time_to_tm" class="sref">pl031_stv4s>( 109
};
 1692" id="L92" class="line" name="L92">  92};
pl031_stv4s3( 110        return 4;
pl031_stv4s4s="sref4href="drivers/rtc/rtc-pl431.c#414"sref">st_ti.tm_mon, }flag"line" name="L16a>}flag"ame=170="+code=RTC_IMSsRQF_NO_SUSPENDline" name="L16sRQF_NO_SUSPENDef="2_time_to_tm" class="sref">pl031_stv4s5s="sref4  97        struc/rtc/rtc-p4114"> 1144/a>calc_tm. 116static int   4                        4     4truct rivers/ass="sref">rtc_time *vers/rtc/rtc-pl03> *venablee="L155"> 178 *4t_tim419"sref">st_ti.tm_mon,  1142ref="+code=tm" class=.tm_mon,  16}
class="line" name="L167"> 16}
pl031_stv420" id="L420" class="line" name="L420"> 42href="+code=tm" class.tm_mon,  16" class="line" name="L177"> 17}
pl031_stv42>( 16}
clac" clline" name="L167"> 16}
pl031_stv423(wday = ,  16" clc" clline" name="L167"> 167 clc" clef="2_time_to_tm" class="sref">pl031_stv424s="sref422
, };
 1692" id="L92" class="line" name="L92">  92};
pl031_stv42113"> 114="drivers/rtc/rtc-pl031.4#L124425e" class="sr}2_time_to_tm" class="sref">pl031_stv4214"> 1144ode=dev" class="sref">de4,4 128pl031_stv42me="L1164ode=tm_wday" class="sref4>tm_w42="sref">st_ti.tm_mon, ldata-ri_weekday" naTC031.c#L162" id=" rume="L128"> 128pl031_stv4217  4="+code=EINVAL" class="s4ef">E42f">base +.tm_mon, }flag"line" name="L16a>}flag"ame=170="+code=RTC_IMSsRQF_NO_SUSPENDline" name="L16sRQF_NO_SUSPENDef="2_time_to_tm" class="sref">pl031_stv42ref="+co4f">wday == -1) {
  97        struc/rtc/rtc-p4ay is not4provided, calculate it h4re */43class         /* w4 href="dr4vers/rtc/rtc-pl031.c#L134" id=4verve1*c;
rtc_time *vers/rtc/rtc-pl03> *venablee="L155"> 178 * 132 133         4     43a href="+code=rtc_tim.tm_mon,  16stv2_}
class="line" name="L167"> 16stv2_}
class="ef="2_time_to_tm" class="sref">pl031_stv4a>
,  16"tv2_" class="line" name="L177"> 17tv2_" class=ef="2_time_to_tm" class="sref">pl031_stv4a14"> 1144 = &.tm_mon,  16stv2_}
clac" clline" name="L167"> 167tv2_}
clac" clef="2_time_to_tm" class="sref">pl031_stv4ame="L1164sref">tm_wday;
  95tring">&.tm_mon,  16"tv2_" clc" clline" name="L167"> 167tv2_7 clc" clef="2_time_to_tm" class="sref">pl031_stv4 17  4 class="sref">bin2bcdbase + , };
 1692" id="L92" class="line" name="L92">  92};
pl031_stv4ylass="sr4a href="+code=bin2bcd" c4ass="4ref">bin2bcdpl031_stv4st_time" 4lass="sref">st_time 4 ((,  128pl031_stv440   4                    |   4   (<4 href="+code=t.tm_mon, ldata-ri_weekday" naTC031.c#L162" id=" rume="L128"> 128pl031_stv44        4L141" class="line" name=4L141"4 141      mCommon bit definitions ;
;
 1444                       |4     44ass="mCommon bit definitione=rtc_tim*c;
tm44span class="s.tm_mon, }flag"line" name="L16a>}flag"ame=170="+code=RTC_IMSsRQF_SHAREDline" name="L16sRQF_SHAREDame=1|="+code=writel" sRQF_NO_SUSPENDline" name="L16sRQF_NO_SUSPENDef="2_time_to_tm" class="sref">pl031_stv4>" class=4HIFT);
  97        struc/rtc/rtc-p4>17  4> 145
srivers/ass="sref">rtc_time 16id"line" name="L167"> 16id"e" n[]e=1d of="+code=pl031_locL74" id=33d="1l47}
st_tid of="+code=pl031_locL74" id=33d="1l470   4, pl031_stv4150"> 1504/a>              .tm_mon, pl031_stv41 class="4e=pl031_stv2_time_to_tm"4class45href="+code=tm" class.tm_mon,   96{
 *pl031_stv414s="sref4/a>,
pl031_stv4h 1444/a>        struct bcd2bin(st_tid of="+code=pl031_locL74" id=33d="1l47" class=4 ((  95tring">&.tm_mon, pl031_stv4117  4 ((base + , pl031_stv41lass="sr4a href="+code=st_time" c4ass="45ivers/rtc/rtc-pl031.c.tm_mon,   96{
 *pl031_stv4hour 4 ((pl031_stv4>tm_min  = ((st_tid of="+code=pl031_locL74" id=33d="1l4>tm_sec  = ((              .tm_mon, pl031_stv4>ref="+co4C_MASK" class="sref">RTC4SEC_M46href="+code=tm" class.tm_mon, pl031_stv4sref">tm_4day,   96{
 *pl031_stv4s 1444);
pl031_stv464"> 164<4a>        pl031_stv46" class=4> -= 1900;
  97        struc/rtc/rtc-p4s17  4> 165
 178 16id"line" name="L167"> 16id"e" n"L97">  97        struc/rtc/rtc-p4ime(s4ruct /* w4lass="sre4">dev, struct rtc_time 16span ce=RTC_IMSC" cla7"> 16span cnable=1d of="+code=pl031_locL74" id=33d="1l4ltm_secpl431_lo47141      .tm_mon, , pl031";
tm_4m(pl031_stv4="sref">r4adl(,  16id"line" name="L167"> 16id"e" n2_time_to_tm" class="sref">pl031_stv4=4"> 164<4="sref">base + ,  16prob"line" name="L167"> 16prob"ef="2_time_to_tm" class="sref">pl031_stv4=" class=4">tm);
st_ti.tm_mon,  16}
mov"line" name="L167"> 16}
mov"ef="2_time_to_tm" class="sref">pl031_stv4=17  4> 175
ba}L97">  97        struc/rtc/rtc-p4ame="L1764> 176        return 4;
dev);
 178 178 16span ce=RTC_IMSC" cla7"> 16span cnabl"L97">  97        struc/rtc/rtc-p43a h1="+c49">  79 130  4="L80">  480 48141  32#definMODULE_AUTHO"versdeCommon bit driv=ime>"Deepak Saxena <dsaxena@plexity.net";
<"L97">  97        struc/rtc/rtc-p43ref="+co4a href="drivers/rtc/rtc-4pl03148Kvers/rtc/rtc-plMODULE_DESCRIPTION01"> 101   MODULE_DESCRIPTIONversdeCommon bit driv=ime>"ARM AMBA PL1.c     D>    ";
<"L97">  97        struc/rtc/rtc-p43ref">tm_4>ops;
  97        struc/rtc/rtc-p43"sref">r4atch;
  97LXR efinunitynabl2athis experinitial hrefion1byn7">  97lxc@a hux.nonabl.
; lxc.a hux.no kindly hosted1byn7"> 97Redpill L hpro ASnabl2aprovidnr of L hux con"ult=im and operation" ser178"" since 1995.