linux/drivers/rtc/rtc-cmos.c
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   1/*
   2 * RTC class driver for "CMOS RTC":  PCs, ACPI, etc
   3 *
   4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
   5 * Copyright (C) 2006 David Brownell (convert to new framework)
   6 *
   7 * This program is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU General Public License
   9 * as published by the Free Software Foundation; either version
  10 * 2 of the License, or (at your option) any later version.
  11 */
  12
  13/*
  14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
  15 * That defined the register interface now provided by all PCs, some
  16 * non-PC systems, and incorporated into ACPI.  Modern PC chipsets
  17 * integrate an MC146818 clone in their southbridge, and boards use
  18 * that instead of discrete clones like the DS12887 or M48T86.  There
  19 * are also clones that connect using the LPC bus.
  20 *
  21 * That register API is also used directly by various other drivers
  22 * (notably for integrated NVRAM), infrastructure (x86 has code to
  23 * bypass the RTC framework, directly reading the RTC during boot
  24 * and updating minutes/seconds for systems using NTP synch) and
  25 * utilities (like userspace 'hwclock', if no /dev node exists).
  26 *
  27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
  28 * interrupts disabled, holding the global rtc_lock, to exclude those
  29 * other drivers and utilities on correctly configured systems.
  30 */
  31#include <linux/kernel.h>
  32#include <linux/module.h>
  33#include <linux/init.h>
  34#include <linux/interrupt.h>
  35#include <linux/spinlock.h>
  36#include <linux/platform_device.h>
  37#include <linux/mod_devicetable.h>
  38#include <linux/log2.h>
  39#include <linux/pm.h>
  40#include <linux/of.h>
  41#include <linux/of_platform.h>
  42
  43/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
  44#include <asm-generic/rtc.h>
  45
  46struct cmos_rtc {
  47        struct rtc_device       *rtc;
  48        struct device           *dev;
  49        int                     irq;
  50        struct resource         *iomem;
  51
  52        void                    (*wake_on)(struct device *);
  53        void                    (*wake_off)(struct device *);
  54
  55        u8                      enabled_wake;
  56        u8                      suspend_ctrl;
  57
  58        /* newer hardware extends the original register set */
  59        u8                      day_alrm;
  60        u8                      mon_alrm;
  61        u8                      century;
  62};
  63
  64/* both platform and pnp busses use negative numbers for invalid irqs */
  65#define is_valid_irq(n)         ((n) > 0)
  66
  67static const char driver_name[] = "rtc_cmos";
  68
  69/* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
  70 * always mask it against the irq enable bits in RTC_CONTROL.  Bit values
  71 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
  72 */
  73#define RTC_IRQMASK     (RTC_PF | RTC_AF | RTC_UF)
  74
  75static inline int is_intr(u8 rtc_intr)
  76{
  77        if (!(rtc_intr & RTC_IRQF))
  78                return 0;
  79        return rtc_intr & RTC_IRQMASK;
  80}
  81
  82/*----------------------------------------------------------------*/
  83
  84/* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
  85 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
  86 * used in a broken "legacy replacement" mode.  The breakage includes
  87 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
  88 * other (better) use.
  89 *
  90 * When that broken mode is in use, platform glue provides a partial
  91 * emulation of hardware RTC IRQ facilities using HPET #1.  We don't
  92 * want to use HPET for anything except those IRQs though...
  93 */
  94#ifdef CONFIG_HPET_EMULATE_RTC
  95#include <asm/hpet.h>
  96#else
  97
  98static inline int is_hpet_enabled(void)
  99{
 100        return 0;
 101}
 102
 103static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
 104{
 105        return 0;
 106}
 107
 108static inline int hpet_set_rtc_irq_bit(unsigned long mask)
 109{
 110        return 0;
 111}
 112
 113static inline int
 114hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
 115{
 116        return 0;
 117}
 118
 119static inline int hpet_set_periodic_freq(unsigned long freq)
 120{
 121        return 0;
 122}
 123
 124static inline int hpet_rtc_dropped_irq(void)
 125{
 126        return 0;
 127}
 128
 129static inline int hpet_rtc_timer_init(void)
 130{
 131        return 0;
 132}
 133
 134extern irq_handler_t hpet_rtc_interrupt;
 135
 136static inline int hpet_register_irq_handler(irq_handler_t handler)
 137{
 138        return 0;
 139}
 140
 141static inline int hpet_unregister_irq_handler(irq_handler_t handler)
 142{
 143        return 0;
 144}
 145
 146#endif
 147
 148/*----------------------------------------------------------------*/
 149
 150#ifdef RTC_PORT
 151
 152/* Most newer x86 systems have two register banks, the first used
 153 * for RTC and NVRAM and the second only for NVRAM.  Caller must
 154 * own rtc_lock ... and we won't worry about access during NMI.
 155 */
 156#define can_bank2       true
 157
 158static inline unsigned char cmos_read_bank2(unsigned char addr)
 159{
 160        outb(addr, RTC_PORT(2));
 161        return inb(RTC_PORT(3));
 162}
 163
 164static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
 165{
 166        outb(addr, RTC_PORT(2));
 167        outb(val, RTC_PORT(3));
 168}
 169
 170#else
 171
 172#define can_bank2       false
 173
 174static inline unsigned char cmos_read_bank2(unsigned char addr)
 175{
 176        return 0;
 177}
 178
 179static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
 180{
 181}
 182
 183#endif
 184
 185/*----------------------------------------------------------------*/
 186
 187static int cmos_read_time(struct device *dev, struct rtc_time *t)
 188{
 189        /* REVISIT:  if the clock has a "century" register, use
 190         * that instead of the heuristic in get_rtc_time().
 191         * That'll make Y3K compatility (year > 2070) easy!
 192         */
 193        get_rtc_time(t);
 194        return 0;
 195}
 196
 197static int cmos_set_time(struct device *dev, struct rtc_time *t)
 198{
 199        /* REVISIT:  set the "century" register if available
 200         *
 201         * NOTE: this ignores the issue whereby updating the seconds
 202         * takes effect exactly 500ms after we write the register.
 203         * (Also queueing and other delays before we get this far.)
 204         */
 205        return set_rtc_time(t);
 206}
 207
 208static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
 209{
 210        struct cmos_rtc *cmos = dev_get_drvdata(dev);
 211        unsigned char   rtc_control;
 212
 213        if (!is_valid_irq(cmos->irq))
 214                return -EIO;
 215
 216        /* Basic alarms only support hour, minute, and seconds fields.
 217         * Some also support day and month, for alarms up to a year in
 218         * the future.
 219         */
 220        t->time.tm_mday = -1;
 221        t->time.tm_mon = -1;
 222
 223        spin_lock_irq(&rtc_lock);
 224        t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
 225        t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
 226        t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
 227
 228        if (cmos->day_alrm) {
 229                /* ignore upper bits on readback per ACPI spec */
 230                t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
 231                if (!t->time.tm_mday)
 232                        t->time.tm_mday = -1;
 233
 234                if (cmos->mon_alrm) {
 235                        t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
 236                        if (!t->time.tm_mon)
 237                                t->time.tm_mon = -1;
 238                }
 239        }
 240
 241        rtc_control = CMOS_READ(RTC_CONTROL);
 242        spin_unlock_irq(&rtc_lock);
 243
 244        if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
 245                if (((unsigned)t->time.tm_sec) < 0x60)
 246                        t->time.tm_sec = bcd2bin(t->time.tm_sec);
 247                else
 248                        t->time.tm_sec = -1;
 249                if (((unsigned)t->time.tm_min) < 0x60)
 250                        t->time.tm_min = bcd2bin(t->time.tm_min);
 251                else
 252                        t->time.tm_min = -1;
 253                if (((unsigned)t->time.tm_hour) < 0x24)
 254                        t->time.tm_hour = bcd2bin(t->time.tm_hour);
 255                else
 256                        t->time.tm_hour = -1;
 257
 258                if (cmos->day_alrm) {
 259                        if (((unsigned)t->time.tm_mday) <= 0x31)
 260                                t->time.tm_mday = bcd2bin(t->time.tm_mday);
 261                        else
 262                                t->time.tm_mday = -1;
 263
 264                        if (cmos->mon_alrm) {
 265                                if (((unsigned)t->time.tm_mon) <= 0x12)
 266                                        t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
 267                                else
 268                                        t->time.tm_mon = -1;
 269                        }
 270                }
 271        }
 272        t->time.tm_year = -1;
 273
 274        t->enabled = !!(rtc_control & RTC_AIE);
 275        t->pending = 0;
 276
 277        return 0;
 278}
 279
 280static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
 281{
 282        unsigned char   rtc_intr;
 283
 284        /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
 285         * allegedly some older rtcs need that to handle irqs properly
 286         */
 287        rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
 288
 289        if (is_hpet_enabled())
 290                return;
 291
 292        rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
 293        if (is_intr(rtc_intr))
 294                rtc_update_irq(cmos->rtc, 1, rtc_intr);
 295}
 296
 297static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
 298{
 299        unsigned char   rtc_control;
 300
 301        /* flush any pending IRQ status, notably for update irqs,
 302         * before we enable new IRQs
 303         */
 304        rtc_control = CMOS_READ(RTC_CONTROL);
 305        cmos_checkintr(cmos, rtc_control);
 306
 307        rtc_control |= mask;
 308        CMOS_WRITE(rtc_control, RTC_CONTROL);
 309        hpet_set_rtc_irq_bit(mask);
 310
 311        cmos_checkintr(cmos, rtc_control);
 312}
 313
 314static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
 315{
 316        unsigned char   rtc_control;
 317
 318        rtc_control = CMOS_READ(RTC_CONTROL);
 319        rtc_control &= ~mask;
 320        CMOS_WRITE(rtc_control, RTC_CONTROL);
 321        hpet_mask_rtc_irq_bit(mask);
 322
 323        cmos_checkintr(cmos, rtc_control);
 324}
 325
 326static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
 327{
 328        struct cmos_rtc *cmos = dev_get_drvdata(dev);
 329       unsigned char   mon, mday, hrs, min, sec, rtc_control;
 330
 331        if (!is_valid_irq(cmos->irq))
 332                return -EIO;
 333
 334        mon = t->time.tm_mon + 1;
 335        mday = t->time.tm_mday;
 336        hrs = t->time.tm_hour;
 337        min = t->time.tm_min;
 338        sec = t->time.tm_sec;
 339
 340        rtc_control = CMOS_READ(RTC_CONTROL);
 341        if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
 342                /* Writing 0xff means "don't care" or "match all".  */
 343                mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
 344                mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
 345                hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
 346                min = (min < 60) ? bin2bcd(min) : 0xff;
 347                sec = (sec < 60) ? bin2bcd(sec) : 0xff;
 348        }
 349
 350        spin_lock_irq(&rtc_lock);
 351
 352        /* next rtc irq must not be from previous alarm setting */
 353        cmos_irq_disable(cmos, RTC_AIE);
 354
 355        /* update alarm */
 356        CMOS_WRITE(hrs, RTC_HOURS_ALARM);
 357        CMOS_WRITE(min, RTC_MINUTES_ALARM);
 358        CMOS_WRITE(sec, RTC_SECONDS_ALARM);
 359
 360        /* the system may support an "enhanced" alarm */
 361        if (cmos->day_alrm) {
 362                CMOS_WRITE(mday, cmos->day_alrm);
 363                if (cmos->mon_alrm)
 364                        CMOS_WRITE(mon, cmos->mon_alrm);
 365        }
 366
 367        /* FIXME the HPET alarm glue currently ignores day_alrm
 368         * and mon_alrm ...
 369         */
 370        hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
 371
 372        if (t->enabled)
 373                cmos_irq_enable(cmos, RTC_AIE);
 374
 375        spin_unlock_irq(&rtc_lock);
 376
 377        return 0;
 378}
 379
 380static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
 381{
 382        struct cmos_rtc *cmos = dev_get_drvdata(dev);
 383        unsigned long   flags;
 384
 385        if (!is_valid_irq(cmos->irq))
 386                return -EINVAL;
 387
 388        spin_lock_irqsave(&rtc_lock, flags);
 389
 390        if (enabled)
 391                cmos_irq_enable(cmos, RTC_AIE);
 392        else
 393                cmos_irq_disable(cmos, RTC_AIE);
 394
 395        spin_unlock_irqrestore(&rtc_lock, flags);
 396        return 0;
 397}
 398
 399#if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
 400
 401static int cmos_procfs(struct device *dev, struct seq_file *seq)
 402{
 403        struct cmos_rtc *cmos = dev_get_drvdata(dev);
 404        unsigned char   rtc_control, valid;
 405
 406        spin_lock_irq(&rtc_lock);
 407        rtc_control = CMOS_READ(RTC_CONTROL);
 408        valid = CMOS_READ(RTC_VALID);
 409        spin_unlock_irq(&rtc_lock);
 410
 411        /* NOTE:  at least ICH6 reports battery status using a different
 412         * (non-RTC) bit; and SQWE is ignored on many current systems.
 413         */
 414        return seq_printf(seq,
 415                        "periodic_IRQ\t: %s\n"
 416                        "update_IRQ\t: %s\n"
 417                        "HPET_emulated\t: %s\n"
 418                        // "square_wave\t: %s\n"
 419                        "BCD\t\t: %s\n"
 420                        "DST_enable\t: %s\n"
 421                        "periodic_freq\t: %d\n"
 422                        "batt_status\t: %s\n",
 423                        (rtc_control & RTC_PIE) ? "yes" : "no",
 424                        (rtc_control & RTC_UIE) ? "yes" : "no",
 425                        is_hpet_enabled() ? "yes" : "no",
 426                        // (rtc_control & RTC_SQWE) ? "yes" : "no",
 427                        (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
 428                        (rtc_control & RTC_DST_EN) ? "yes" : "no",
 429                        cmos->rtc->irq_freq,
 430                        (valid & RTC_VRT) ? "okay" : "dead");
 431}
 432
 433#else
 434#define cmos_procfs     NULL
 435#endif
 436
 437static const struct rtc_class_ops cmos_rtc_ops = {
 438        .read_time              = cmos_read_time,
 439        .set_time               = cmos_set_time,
 440        .read_alarm             = cmos_read_alarm,
 441        .set_alarm              = cmos_set_alarm,
 442        .proc                   = cmos_procfs,
 443        .alarm_irq_enable       = cmos_alarm_irq_enable,
 444};
 445
 446/*----------------------------------------------------------------*/
 447
 448/*
 449 * All these chips have at least 64 bytes of address space, shared by
 450 * RTC registers and NVRAM.  Most of those bytes of NVRAM are used
 451 * by boot firmware.  Modern chips have 128 or 256 bytes.
 452 */
 453
 454#define NVRAM_OFFSET    (RTC_REG_D + 1)
 455
 456static ssize_t
 457cmos_nvram_read(struct file *filp, struct kobject *kobj,
 458                struct bin_attribute *attr,
 459                char *buf, loff_t off, size_t count)
 460{
 461        int     retval;
 462
 463        if (unlikely(off >= attr->size))
 464                return 0;
 465        if (unlikely(off < 0))
 466                return -EINVAL;
 467        if ((off + count) > attr->size)
 468                count = attr->size - off;
 469
 470        off += NVRAM_OFFSET;
 471        spin_lock_irq(&rtc_lock);
 472        for (retval = 0; count; count--, off++, retval++) {
 473                if (off < 128)
 474                        *buf++ = CMOS_READ(off);
 475                else if (can_bank2)
 476                        *buf++ = cmos_read_bank2(off);
 477                else
 478                        break;
 479        }
 480        spin_unlock_irq(&rtc_lock);
 481
 482        return retval;
 483}
 484
 485static ssize_t
 486cmos_nvram_write(struct file *filp, struct kobject *kobj,
 487                struct bin_attribute *attr,
 488                char *buf, loff_t off, size_t count)
 489{
 490        struct cmos_rtc *cmos;
 491        int             retval;
 492
 493        cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
 494        if (unlikely(off >= attr->size))
 495                return -EFBIG;
 496        if (unlikely(off < 0))
 497                return -EINVAL;
 498        if ((off + count) > attr->size)
 499                count = attr->size - off;
 500
 501        /* NOTE:  on at least PCs and Ataris, the boot firmware uses a
 502         * checksum on part of the NVRAM data.  That's currently ignored
 503         * here.  If userspace is smart enough to know what fields of
 504         * NVRAM to update, updating checksums is also part of its job.
 505         */
 506        off += NVRAM_OFFSET;
 507        spin_lock_irq(&rtc_lock);
 508        for (retval = 0; count; count--, off++, retval++) {
 509                /* don't trash RTC registers */
 510                if (off == cmos->day_alrm
 511                                || off == cmos->mon_alrm
 512                                || off == cmos->century)
 513                        buf++;
 514                else if (off < 128)
 515                        CMOS_WRITE(*buf++, off);
 516                else if (can_bank2)
 517                        cmos_write_bank2(*buf++, off);
 518                else
 519                        break;
 520        }
 521        spin_unlock_irq(&rtc_lock);
 522
 523        return retval;
 524}
 525
 526static struct bin_attribute nvram = {
 527        .attr = {
 528                .name   = "nvram",
 529                .mode   = S_IRUGO | S_IWUSR,
 530        },
 531
 532        .read   = cmos_nvram_read,
 533        .write  = cmos_nvram_write,
 534        /* size gets set up later */
 535};
 536
 537/*----------------------------------------------------------------*/
 538
 539static struct cmos_rtc  cmos_rtc;
 540
 541static irqreturn_t cmos_interrupt(int irq, void *p)
 542{
 543        u8              irqstat;
 544        u8              rtc_control;
 545
 546        spin_lock(&rtc_lock);
 547
 548        /* When the HPET interrupt handler calls us, the interrupt
 549         * status is passed as arg1 instead of the irq number.  But
 550         * always clear irq status, even when HPET is in the way.
 551         *
 552         * Note that HPET and RTC are almost certainly out of phase,
 553         * giving different IRQ status ...
 554         */
 555        irqstat = CMOS_READ(RTC_INTR_FLAGS);
 556        rtc_control = CMOS_READ(RTC_CONTROL);
 557        if (is_hpet_enabled())
 558                irqstat = (unsigned long)irq & 0xF0;
 559        irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
 560
 561        /* All Linux RTC alarms should be treated as if they were oneshot.
 562         * Similar code may be needed in system wakeup paths, in case the
 563         * alarm woke the system.
 564         */
 565        if (irqstat & RTC_AIE) {
 566                rtc_control &= ~RTC_AIE;
 567                CMOS_WRITE(rtc_control, RTC_CONTROL);
 568                hpet_mask_rtc_irq_bit(RTC_AIE);
 569
 570                CMOS_READ(RTC_INTR_FLAGS);
 571        }
 572        spin_unlock(&rtc_lock);
 573
 574        if (is_intr(irqstat)) {
 575                rtc_update_irq(p, 1, irqstat);
 576                return IRQ_HANDLED;
 577        } else
 578                return IRQ_NONE;
 579}
 580
 581#ifdef  CONFIG_PNP
 582#define INITSECTION
 583
 584#else
 585#define INITSECTION     __init
 586#endif
 587
 588static int INITSECTION
 589cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
 590{
 591        struct cmos_rtc_board_info      *info = dev->platform_data;
 592        int                             retval = 0;
 593        unsigned char                   rtc_control;
 594        unsigned                        address_space;
 595
 596        /* there can be only one ... */
 597        if (cmos_rtc.dev)
 598                return -EBUSY;
 599
 600        if (!ports)
 601                return -ENODEV;
 602
 603        /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
 604         *
 605         * REVISIT non-x86 systems may instead use memory space resources
 606         * (needing ioremap etc), not i/o space resources like this ...
 607         */
 608        ports = request_region(ports->start,
 609                        resource_size(ports),
 610                        driver_name);
 611        if (!ports) {
 612                dev_dbg(dev, "i/o registers already in use\n");
 613                return -EBUSY;
 614        }
 615
 616        cmos_rtc.irq = rtc_irq;
 617        cmos_rtc.iomem = ports;
 618
 619        /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
 620         * driver did, but don't reject unknown configs.   Old hardware
 621         * won't address 128 bytes.  Newer chips have multiple banks,
 622         * though they may not be listed in one I/O resource.
 623         */
 624#if     defined(CONFIG_ATARI)
 625        address_space = 64;
 626#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
 627                        || defined(__sparc__) || defined(__mips__) \
 628                        || defined(__powerpc__)
 629        address_space = 128;
 630#else
 631#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
 632        address_space = 128;
 633#endif
 634        if (can_bank2 && ports->end > (ports->start + 1))
 635                address_space = 256;
 636
 637        /* For ACPI systems extension info comes from the FADT.  On others,
 638         * board specific setup provides it as appropriate.  Systems where
 639         * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
 640         * some almost-clones) can provide hooks to make that behave.
 641         *
 642         * Note that ACPI doesn't preclude putting these registers into
 643         * "extended" areas of the chip, including some that we won't yet
 644         * expect CMOS_READ and friends to handle.
 645         */
 646        if (info) {
 647                if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
 648                        cmos_rtc.day_alrm = info->rtc_day_alarm;
 649                if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
 650                        cmos_rtc.mon_alrm = info->rtc_mon_alarm;
 651                if (info->rtc_century && info->rtc_century < 128)
 652                        cmos_rtc.century = info->rtc_century;
 653
 654                if (info->wake_on && info->wake_off) {
 655                        cmos_rtc.wake_on = info->wake_on;
 656                        cmos_rtc.wake_off = info->wake_off;
 657                }
 658        }
 659
 660        cmos_rtc.dev = dev;
 661        dev_set_drvdata(dev, &cmos_rtc);
 662
 663        cmos_rtc.rtc = rtc_device_register(driver_name, dev,
 664                                &cmos_rtc_ops, THIS_MODULE);
 665        if (IS_ERR(cmos_rtc.rtc)) {
 666                retval = PTR_ERR(cmos_rtc.rtc);
 667                goto cleanup0;
 668        }
 669
 670        rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
 671
 672        spin_lock_irq(&rtc_lock);
 673
 674        /* force periodic irq to CMOS reset default of 1024Hz;
 675         *
 676         * REVISIT it's been reported that at least one x86_64 ALI mobo
 677         * doesn't use 32KHz here ... for portability we might need to
 678         * do something about other clock frequencies.
 679         */
 680        cmos_rtc.rtc->irq_freq = 1024;
 681        hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
 682        CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
 683
 684        /* disable irqs */
 685        cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
 686
 687        rtc_control = CMOS_READ(RTC_CONTROL);
 688
 689        spin_unlock_irq(&rtc_lock);
 690
 691        /* FIXME:
 692         * <asm-generic/rtc.h> doesn't know 12-hour mode either.
 693         */
 694       if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
 695                dev_warn(dev, "only 24-hr supported\n");
 696                retval = -ENXIO;
 697                goto cleanup1;
 698        }
 699
 700        if (is_valid_irq(rtc_irq)) {
 701                irq_handler_t rtc_cmos_int_handler;
 702
 703                if (is_hpet_enabled()) {
 704                        int err;
 705
 706                        rtc_cmos_int_handler = hpet_rtc_interrupt;
 707                        err = hpet_register_irq_handler(cmos_interrupt);
 708                        if (err != 0) {
 709                                dev_warn(dev, "hpet_register_irq_handler "
 710                                                " failed in rtc_init().");
 711                                goto cleanup1;
 712                        }
 713                } else
 714                        rtc_cmos_int_handler = cmos_interrupt;
 715
 716                retval = request_irq(rtc_irq, rtc_cmos_int_handler,
 717                                0, dev_name(&cmos_rtc.rtc->dev),
 718                                cmos_rtc.rtc);
 719                if (retval < 0) {
 720                        dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
 721                        goto cleanup1;
 722                }
 723        }
 724        hpet_rtc_timer_init();
 725
 726        /* export at least the first block of NVRAM */
 727        nvram.size = address_space - NVRAM_OFFSET;
 728        retval = sysfs_create_bin_file(&dev->kobj, &nvram);
 729        if (retval < 0) {
 730                dev_dbg(dev, "can't create nvram file? %d\n", retval);
 731                goto cleanup2;
 732        }
 733
 734        dev_info(dev, "%s%s, %zd bytes nvram%s\n",
 735                !is_valid_irq(rtc_irq) ? "no alarms" :
 736                        cmos_rtc.mon_alrm ? "alarms up to one year" :
 737                        cmos_rtc.day_alrm ? "alarms up to one month" :
 738                        "alarms up to one day",
 739                cmos_rtc.century ? ", y3k" : "",
 740                nvram.size,
 741                is_hpet_enabled() ? ", hpet irqs" : "");
 742
 743        return 0;
 744
 745cleanup2:
 746        if (is_valid_irq(rtc_irq))
 747                free_irq(rtc_irq, cmos_rtc.rtc);
 748cleanup1:
 749        cmos_rtc.dev = NULL;
 750        rtc_device_unregister(cmos_rtc.rtc);
 751cleanup0:
 752        release_region(ports->start, resource_size(ports));
 753        return retval;
 754}
 755
 756static void cmos_do_shutdown(void)
 757{
 758        spin_lock_irq(&rtc_lock);
 759        cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
 760        spin_unlock_irq(&rtc_lock);
 761}
 762
 763static void __exit cmos_do_remove(struct device *dev)
 764{
 765        struct cmos_rtc *cmos = dev_get_drvdata(dev);
 766        struct resource *ports;
 767
 768        cmos_do_shutdown();
 769
 770        sysfs_remove_bin_file(&dev->kobj, &nvram);
 771
 772        if (is_valid_irq(cmos->irq)) {
 773                free_irq(cmos->irq, cmos->rtc);
 774                hpet_unregister_irq_handler(cmos_interrupt);
 775        }
 776
 777        rtc_device_unregister(cmos->rtc);
 778        cmos->rtc = NULL;
 779
 780        ports = cmos->iomem;
 781        release_region(ports->start, resource_size(ports));
 782        cmos->iomem = NULL;
 783
 784        cmos->dev = NULL;
 785        dev_set_drvdata(dev, NULL);
 786}
 787
 788#ifdef  CONFIG_PM
 789
 790static int cmos_suspend(struct device *dev)
 791{
 792        struct cmos_rtc *cmos = dev_get_drvdata(dev);
 793        unsigned char   tmp;
 794
 795        /* only the alarm might be a wakeup event source */
 796        spin_lock_irq(&rtc_lock);
 797        cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
 798        if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
 799                unsigned char   mask;
 800
 801                if (device_may_wakeup(dev))
 802                        mask = RTC_IRQMASK & ~RTC_AIE;
 803                else
 804                        mask = RTC_IRQMASK;
 805                tmp &= ~mask;
 806                CMOS_WRITE(tmp, RTC_CONTROL);
 807                hpet_mask_rtc_irq_bit(mask);
 808
 809                cmos_checkintr(cmos, tmp);
 810        }
 811        spin_unlock_irq(&rtc_lock);
 812
 813        if (tmp & RTC_AIE) {
 814                cmos->enabled_wake = 1;
 815                if (cmos->wake_on)
 816                        cmos->wake_on(dev);
 817                else
 818                        enable_irq_wake(cmos->irq);
 819        }
 820
 821        dev_dbg(dev, "suspend%s, ctrl %02x\n",
 822                        (tmp & RTC_AIE) ? ", alarm may wake" : "",
 823                        tmp);
 824
 825        return 0;
 826}
 827
 828/* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
 829 * after a detour through G3 "mechanical off", although the ACPI spec
 830 * says wakeup should only work from G1/S4 "hibernate".  To most users,
 831 * distinctions between S4 and S5 are pointless.  So when the hardware
 832 * allows, don't draw that distinction.
 833 */
 834static inline int cmos_poweroff(struct device *dev)
 835{
 836        return cmos_suspend(dev);
 837}
 838
 839static int cmos_resume(struct device *dev)
 840{
 841        struct cmos_rtc *cmos = dev_get_drvdata(dev);
 842        unsigned char   tmp = cmos->suspend_ctrl;
 843
 844        /* re-enable any irqs previously active */
 845        if (tmp & RTC_IRQMASK) {
 846                unsigned char   mask;
 847
 848                if (cmos->enabled_wake) {
 849                        if (cmos->wake_off)
 850                                cmos->wake_off(dev);
 851                        else
 852                                disable_irq_wake(cmos->irq);
 853                        cmos->enabled_wake = 0;
 854                }
 855
 856                spin_lock_irq(&rtc_lock);
 857                if (device_may_wakeup(dev))
 858                        hpet_rtc_timer_init();
 859
 860                do {
 861                        CMOS_WRITE(tmp, RTC_CONTROL);
 862                        hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
 863
 864                        mask = CMOS_READ(RTC_INTR_FLAGS);
 865                        mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
 866                        if (!is_hpet_enabled() || !is_intr(mask))
 867                                break;
 868
 869                        /* force one-shot behavior if HPET blocked
 870                         * the wake alarm's irq
 871                         */
 872                        rtc_update_irq(cmos->rtc, 1, mask);
 873                        tmp &= ~RTC_AIE;
 874                        hpet_mask_rtc_irq_bit(RTC_AIE);
 875                } while (mask & RTC_AIE);
 876                spin_unlock_irq(&rtc_lock);
 877        }
 878
 879        dev_dbg(dev, "resume, ctrl %02x\n", tmp);
 880
 881        return 0;
 882}
 883
 884static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
 885
 886#else
 887
 888static inline int cmos_poweroff(struct device *dev)
 889{
 890        return -ENOSYS;
 891}
 892
 893#endif
 894
 895/*----------------------------------------------------------------*/
 896
 897/* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
 898 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
 899 * probably list them in similar PNPBIOS tables; so PNP is more common.
 900 *
 901 * We don't use legacy "poke at the hardware" probing.  Ancient PCs that
 902 * predate even PNPBIOS should set up platform_bus devices.
 903 */
 904
 905#ifdef  CONFIG_ACPI
 906
 907#include <linux/acpi.h>
 908
 909static u32 rtc_handler(void *context)
 910{
 911        struct device *dev = context;
 912
 913        pm_wakeup_event(dev, 0);
 914        acpi_clear_event(ACPI_EVENT_RTC);
 915        acpi_disable_event(ACPI_EVENT_RTC, 0);
 916        return ACPI_INTERRUPT_HANDLED;
 917}
 918
 919static inline void rtc_wake_setup(struct device *dev)
 920{
 921        acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
 922        /*
 923         * After the RTC handler is installed, the Fixed_RTC event should
 924         * be disabled. Only when the RTC alarm is set will it be enabled.
 925         */
 926        acpi_clear_event(ACPI_EVENT_RTC);
 927        acpi_disable_event(ACPI_EVENT_RTC, 0);
 928}
 929
 930static void rtc_wake_on(struct device *dev)
 931{
 932        acpi_clear_event(ACPI_EVENT_RTC);
 933        acpi_enable_event(ACPI_EVENT_RTC, 0);
 934}
 935
 936static void rtc_wake_off(struct device *dev)
 937{
 938        acpi_disable_event(ACPI_EVENT_RTC, 0);
 939}
 940
 941/* Every ACPI platform has a mc146818 compatible "cmos rtc".  Here we find
 942 * its device node and pass extra config data.  This helps its driver use
 943 * capabilities that the now-obsolete mc146818 didn't have, and informs it
 944 * that this board's RTC is wakeup-capable (per ACPI spec).
 945 */
 946static struct cmos_rtc_board_info acpi_rtc_info;
 947
 948static void cmos_wake_setup(struct device *dev)
 949{
 950        if (acpi_disabled)
 951                return;
 952
 953        rtc_wake_setup(dev);
 954        acpi_rtc_info.wake_on = rtc_wake_on;
 955        acpi_rtc_info.wake_off = rtc_wake_off;
 956
 957        /* workaround bug in some ACPI tables */
 958        if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
 959                dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
 960                        acpi_gbl_FADT.month_alarm);
 961                acpi_gbl_FADT.month_alarm = 0;
 962        }
 963
 964        acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
 965        acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
 966        acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
 967
 968        /* NOTE:  S4_RTC_WAKE is NOT currently useful to Linux */
 969        if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
 970                dev_info(dev, "RTC can wake from S4\n");
 971
 972        dev->platform_data = &acpi_rtc_info;
 973
 974        /* RTC always wakes from S1/S2/S3, and often S4/STD */
 975        device_init_wakeup(dev, 1);
 976}
 977
 978#else
 979
 980static void cmos_wake_setup(struct device *dev)
 981{
 982}
 983
 984#endif
 985
 986#ifdef  CONFIG_PNP
 987
 988#include <linux/pnp.h>
 989
 990static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
 991{
 992        cmos_wake_setup(&pnp->dev);
 993
 994        if (pnp_port_start(pnp,0) == 0x70 && !pnp_irq_valid(pnp,0))
 995                /* Some machines contain a PNP entry for the RTC, but
 996                 * don't define the IRQ. It should always be safe to
 997                 * hardcode it in these cases
 998                 */
 999                return cmos_do_probe(&pnp->dev,
1000                                pnp_get_resource(pnp, IORESOURCE_IO, 0), 8);
1001        else
1002                return cmos_do_probe(&pnp->dev,
1003                                pnp_get_resource(pnp, IORESOURCE_IO, 0),
1004                                pnp_irq(pnp, 0));
1005}
1006
1007static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
1008{
1009        cmos_do_remove(&pnp->dev);
1010}
1011
1012#ifdef  CONFIG_PM
1013
1014static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg)
1015{
1016        return cmos_suspend(&pnp->dev);
1017}
1018
1019static int cmos_pnp_resume(struct pnp_dev *pnp)
1020{
1021        return cmos_resume(&pnp->dev);
1022}
1023
1024#else
1025#define cmos_pnp_suspend        NULL
1026#define cmos_pnp_resume         NULL
1027#endif
1028
1029static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1030{
1031        if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pnp->dev))
1032                return;
1033
1034        cmos_do_shutdown();
1035}
1036
1037static const struct pnp_device_id rtc_ids[] = {
1038        { .id = "PNP0b00", },
1039        { .id = "PNP0b01", },
1040        { .id = "PNP0b02", },
1041        { },
1042};
1043MODULE_DEVICE_TABLE(pnp, rtc_ids);
1044
1045static struct pnp_driver cmos_pnp_driver = {
1046        .name           = (char *) driver_name,
1047        .id_table       = rtc_ids,
1048        .probe          = cmos_pnp_probe,
1049        .remove         = __exit_p(cmos_pnp_remove),
1050        .shutdown       = cmos_pnp_shutdown,
1051
1052        /* flag ensures resume() gets called, and stops syslog spam */
1053        .flags          = PNP_DRIVER_RES_DO_NOT_CHANGE,
1054        .suspend        = cmos_pnp_suspend,
1055        .resume         = cmos_pnp_resume,
1056};
1057
1058#endif  /* CONFIG_PNP */
1059
1060#ifdef CONFIG_OF
1061static const struct of_device_id of_cmos_match[] = {
1062        {
1063                .compatible = "motorola,mc146818",
1064        },
1065        { },
1066};
1067MODULE_DEVICE_TABLE(of, of_cmos_match);
1068
1069static __init void cmos_of_init(struct platform_device *pdev)
1070{
1071        struct device_node *node = pdev->dev.of_node;
1072        struct rtc_time time;
1073        int ret;
1074        const __be32 *val;
1075
1076        if (!node)
1077                return;
1078
1079        val = of_get_property(node, "ctrl-reg", NULL);
1080        if (val)
1081                CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1082
1083        val = of_get_property(node, "freq-reg", NULL);
1084        if (val)
1085                CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1086
1087        get_rtc_time(&time);
1088        ret = rtc_valid_tm(&time);
1089        if (ret) {
1090                struct rtc_time def_time = {
1091                        .tm_year = 1,
1092                        .tm_mday = 1,
1093                };
1094                set_rtc_time(&def_time);
1095        }
1096}
1097#else
1098static inline void cmos_of_init(struct platform_device *pdev) {}
1099#endif
1100/*----------------------------------------------------------------*/
1101
1102/* Platform setup should have set up an RTC device, when PNP is
1103 * unavailable ... this could happen even on (older) PCs.
1104 */
1105
1106static int __init cmos_platform_probe(struct platform_device *pdev)
1107{
1108        cmos_of_init(pdev);
1109        cmos_wake_setup(&pdev->dev);
1110        return cmos_do_probe(&pdev->dev,
1111                        platform_get_resource(pdev, IORESOURCE_IO, 0),
1112                        platform_get_irq(pdev, 0));
1113}
1114
1115static int __exit cmos_platform_remove(struct platform_device *pdev)
1116{
1117        cmos_do_remove(&pdev->dev);
1118        return 0;
1119}
1120
1121static void cmos_platform_shutdown(struct platform_device *pdev)
1122{
1123        if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pdev->dev))
1124                return;
1125
1126        cmos_do_shutdown();
1127}
1128
1129/* work with hotplug and coldplug */
1130MODULE_ALIAS("platform:rtc_cmos");
1131
1132static struct platform_driver cmos_platform_driver = {
1133        .remove         = __exit_p(cmos_platform_remove),
1134        .shutdown       = cmos_platform_shutdown,
1135        .driver = {
1136                .name           = (char *) driver_name,
1137#ifdef CONFIG_PM
1138                .pm             = &cmos_pm_ops,
1139#endif
1140                .of_match_table = of_match_ptr(of_cmos_match),
1141        }
1142};
1143
1144#ifdef CONFIG_PNP
1145static bool pnp_driver_registered;
1146#endif
1147static bool platform_driver_registered;
1148
1149static int __init cmos_init(void)
1150{
1151        int retval = 0;
1152
1153#ifdef  CONFIG_PNP
1154        retval = pnp_register_driver(&cmos_pnp_driver);
1155        if (retval == 0)
1156                pnp_driver_registered = true;
1157#endif
1158
1159        if (!cmos_rtc.dev) {
1160                retval = platform_driver_probe(&cmos_platform_driver,
1161                                               cmos_platform_probe);
1162                if (retval == 0)
1163                        platform_driver_registered = true;
1164        }
1165
1166        if (retval == 0)
1167                return 0;
1168
1169#ifdef  CONFIG_PNP
1170        if (pnp_driver_registered)
1171                pnp_unregister_driver(&cmos_pnp_driver);
1172#endif
1173        return retval;
1174}
1175module_init(cmos_init);
1176
1177static void __exit cmos_exit(void)
1178{
1179#ifdef  CONFIG_PNP
1180        if (pnp_driver_registered)
1181                pnp_unregister_driver(&cmos_pnp_driver);
1182#endif
1183        if (platform_driver_registered)
1184                platform_driver_unregister(&cmos_platform_driver);
1185}
1186module_exit(cmos_exit);
1187
1188
1189MODULE_AUTHOR("David Brownell");
1190MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1191MODULE_LICENSE("GPL");
1192
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