linux/drivers/eisa/pci_eisa.c
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e e1=/a>=spa
 class="comment">/*=/spa
  e e2=/a>=spa
 class="comment"> * Minimalist driver for a generic PCI-to-EISA bridge.=/spa
  e e3=/a>=spa
 class="comment"> *=/spa
  e e4=/a>=spa
 class="comment"> * (C) 2003 Marc Zyngier <maz@wild-wind.fr.eu.org>=/spa
  e e5=/a>=spa
 class="comment"> *=/spa
  e e6=/a>=spa
 class="comment"> * This code is released under the GPL vers.14.2.=/spa
  e e7=/a>=spa
 class="comment"> *=/spa
  e e8=/a>=spa
 class="comment"> * Iva
 Kokshaysky <ink@jurassic.park.msu.ru> :=/spa
  e e9=/a>=spa
 class="comment"> * Generalisa3.14.from i82375 to PCI_CLASS_BRIDGE_EISA.=/spa
  e i 
 a>=spa
 class="comment"> */=/spa
  e 11=/a> e 12=/a>#include <linux/kernel.h=/a>> e 13=/a>#include <linux/device.h=/a>> e 14=/a>#include <linux/eisa.h=/a>> e 15=/a>#include <linux/pci.h=/a>> e 16=/a>#include <linux/module.h=/a>> e 17=/a>#include <linux/init.h=/a>> e 18=/a> e 19=/a>=spa
 class="comment">/* There is only *one* pci_eisa device per machine, right ? */=/spa
  e 2 
 a>static structe=a href="+code=eisa_root_device" class="sref">eisa_root_device
 a>e=a href="+code=pci_eisa_root" class="sref">pci_eisa_root
 a>; e 21=/a> e 22
 a>static inte=a href="+code=__init" class="sref">__init
 a>e=a href="+code=pci_eisa_init" class="sref">pci_eisa_init
 a>(structe=a href="+code=pci_dev" class="sref">pci_dev
 a>e*=a href="+code=pdev" class="sref">pdev
 a>) e 23=/a>{ e 24=/a>        inte=a href="+code=rc" class="sref">rc=/a>,e=a href="+code=i" class="sref">i
 a>; e 25=/a>        structe=a href="+code=resource" class="sref">resource
 a>e*=a href="+code=res" class="sref">res=/a>,e*=a href="+code=bus_res" class="sref">bus_res
 a>e=e=a href="+code=NULL" class="sref">NULL
 a>; e 26=/a> e 27=/a>        if ((=a href="+code=rc" class="sref">rc=/a>e=e=a href="+code=pci_enable_device" class="sref">pci_enable_device=/a>e(=a href="+code=pdev" class="sref">pdev
 a>))) { e 28=/a>                =a href="+code=dev_err" class="sref">dev_err
 a>(&=a href="+code=pdev" class="sref">pdev
 a>->=a href="+code=dev" class="sref">dev=/a>,e=spa
 class="string">"Could not enable device\n"=/spa
 ); e 29=/a>                return =a href="+code=rc" class="sref">rc=/a>; e 30=/a>        } e 31=/a> e 32=/a>        =spa
 class="comment">/*=/spa
  e 33=/a>=spa
 class="comment">         * The Intel 82375 PCI-EISA bridge is a subtrac/ ve-decode PCI=/spa
  e 34=/a>=spa
 class="comment">         * device, so the resources available 14.EISA are the sam	 as those=/spa
  e 35=/a>=spa
 class="comment">         * available 14.the 82375 bus.  This works the sam	 as a PCI-PCI=/spa
  e 36=/a>=spa
 class="comment">         * bridge in subtrac/ ve-decode mode (see pci_read_bridge_bases()).=/spa
  e 37=/a>=spa
 class="comment">         * W	 assum	 other PCI-EISA bridges are similar.=/spa
  e 38=/a>=spa
 class="comment">         *=/spa
  e 39=/a>=spa
 class="comment">         * eisa_root_register() ca
 only deal with a single io port resource,=/spa
  e 4 
 a>=spa
 class="comment">        *  so we use the first 20"id io port resource.=/spa
  e 41=/a>=spa
 class="comment">         */=/spa
  e 42=/a>        =a href="+code=pci_bus_for_each_resource" class="sref">pci_bus_for_each_resource
 a>(=a href="+code=pdev" class="sref">pdev
 a>->=a href="+code=bus" class="sref">bus=/a>,e=a href="+code=res" class="sref">res=/a>,e=a href="+code=i" class="sref">i
 a>) e 43=/a>                if (=a href="+code=res" class="sref">res=/a> && (=a href="+code=res" class="sref">res=/a>->=a href="+code=flags" class="sref">flags=/a> &e=a href="+code=IORESOURCE_IO" class="sref">IORESOURCE_IO
 a>)) { e 44=/a>                        =a href="+code=bus_res" class="sref">bus_res
 a>e=e=a href="+code=res" class="sref">res=/a>; e 45=/a>                        break; e 46=/a>                } e 47=/a> e 48=/a>        if (!=a href="+code=bus_res" class="sref">bus_res
 a>) { e 49=/a>                =a href="+code=dev_err" class="sref">dev_err
 a>(&=a href="+code=pdev" class="sref">pdev
 a>->=a href="+code=dev" class="sref">dev=/a>,e=spa
 class="string">"No resources available\n"=/spa
 ); e 50=/a>                return -1; e 51=/a>        } e 52=/a> e 53=/a>        =a href="+code=pci_eisa_root" class="sref">pci_eisa_root
 a>.=a href="+code=dev" class="sref">dev=/a>              = &=a href="+code=pdev" class="sref">pdev
 a>->=a href="+code=dev" class="sref">dev=/a>; e 54=/a>        =a href="+code=pci_eisa_root" class="sref">pci_eisa_root
 a>.=a href="+code=res" class="sref">res=/a>              = =a href="+code=bus_res" class="sref">bus_res
 a>; e 55=/a>        =a href="+code=pci_eisa_root" class="sref">pci_eisa_root
 a>.=a href="+code=bus_base_addr" class="sref">bus_base_addr=/a>    = =a href="+code=bus_res" class="sref">bus_res
 a>->=a href="+code=start" class="sref">start
 a>; e 56=/a>        =a href="+code=pci_eisa_root" class="sref">pci_eisa_root
 a>.=a href="+code=slots" class="sref">slots=/a>            = =a href="+code=EISA_MAX_SLOTS" class="sref">EISA_MAX_SLOTS
 a>; e 57=/a>        =a href="+code=pci_eisa_root" class="sref">pci_eisa_root
 a>.=a href="+code=dma_mask" class="sref">dma_mask=/a>         =e=a href="+code=pdev" class="sref">pdev
 a>->=a href="+code=dma_mask" class="sref">dma_mask=/a>; e 58=/a>        =a href="+code=dev_set_drvdata" class="sref">dev_set_drvdata
 a>(=a href="+code=pci_eisa_root" class="sref">pci_eisa_root
 a>.=a href="+code=dev" class="sref">dev=/a>, &=a href="+code=pci_eisa_root" class="sref">pci_eisa_root
 a>); e 59=/a> e 60=/a>        if (=a href="+code=eisa_root_register" class="sref">eisa_root_register=/a>e(&=a href="+code=pci_eisa_root" class="sref">pci_eisa_root
 a>)) { e 61=/a>                =a href="+code=dev_err" class="sref">dev_err
 a>(&=a href="+code=pdev" class="sref">pdev
 a>->=a href="+code=dev" class="sref">dev=/a>,e=spa
 class="string">"Could not register.EISA root\n"=/spa
 ); e 62=/a>                return -1; e 63=/a>        } e 64=/a> e 65=/a>        return 0; e 66=/a>} e 67=/a> e 68=/a>=spa
 class="comment">/*=/spa
  e 69=/a>=spa
 class="comment"> * We have to call pci_eisa_init_early() before pnpacpi_init()/isapnp_init().=/spa
  e 7 
 a>=spa
 class="comment"> *   Otherwise pnp resource will get enabled early and could prevent eisa=/spa
  e 71=/a>=spa
 class="comment"> *   to be initialized.=/spa
  e 72=/a>=spa
 class="comment"> * Also need to make sure pci_eisa_init_early() is called after=/spa
  e 73=/a>=spa
 class="comment"> * x86/pci_subsys_init().=/spa
  e 74=/a>=spa
 class="comment"> * So need to use subsys_initcall_sync with it.=/spa
  e 75=/a>=spa
 class="comment"> */=/spa
  e 76
 a>static inte=a href="+code=__init" class="sref">__init
 a>e=a href="+code=pci_eisa_init_early" class="sref">pci_eisa_init_early
 a>(void) e 77=/a>{ e 78=/a>        structe=a href="+code=pci_dev" class="sref">pci_dev
 a>e*=a href="+code=dev" class="sref">dev=/a> =e=a href="+code=NULL" class="sref">NULL
 a>; e 79=/a>        inte=a href="+code=ret" class="sref">ret
 a>; e 80=/a> e 81=/a>        =a href="+code=for_each_pci_dev" class="sref">for_each_pci_dev
 a>(=a href="+code=dev" class="sref">dev=/a>) e 82=/a>                if ((=a href="+code=dev" class="sref">dev=/a>->=a href="+code=class" class="sref">class=/a> >> 8) ==e=a href="+code=PCI_CLASS_BRIDGE_EISA" class="sref">PCI_CLASS_BRIDGE_EISA
 a>) { e 83=/a>                        =a href="+code=ret" class="sref">ret
 a>e=e=a href="+code=pci_eisa_init" class="sref">pci_eisa_init
 a>(=a href="+code=dev" class="sref">dev=/a>); e 84=/a>                        if (=a href="+code=ret" class="sref">ret
 a>) e 85=/a>                                return =a href="+code=ret" class="sref">ret
 a>; e 86=/a>                } e 87=/a> e 88=/a>        return 0; e 89=/a>} e 9 
 a>=a href="+code=subsys_initcall_sync" class="sref">subsys_initcall_sync
 a>(=a href="+code=pci_eisa_init_early" class="sref">pci_eisa_init_early
 a>); e 91=/a>=/pre>
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