linux/drivers/edac/i5400_edac.c
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p p1t/a>tspa  class="comment">/*t/spa  
p p2t/a>tspa  class="comment"> * Intel 5400 class Memory Controllers kernel module (Seaburg)t/spa  
p p3t/a>tspa  class="comment"> *t/spa  
p p4t/a>tspa  class="comment"> * This file may be distributed under the terms of thet/spa  
p p5t/a>tspa  class="comment"> * GNU General Public License.t/spa  
p p6t/a>tspa  class="comment"> *t/spa  
p p7t/a>tspa  class="comment"> * Copyright (c) 2008 by:t/spa  
p p8t/a>tspa  class="comment"> *       Ben Woodard <woodard@redhat.com>t/spa  
p p9t/a>tspa  class="comment"> *       Mauro Carue=ho Chehab <mchehab@redhat.com>t/spa  
p /opta>tspa  class="comment"> *t/spa  
p 11t/a>tspa  class="comment"> * Red Hat Inc. http://www.redhat.comt/spa  
p 12t/a>tspa  class="comment"> *t/spa  
p 13t/a>tspa  class="comment"> * Forked and adapted from the i5000_edac driver which wast/spa  
p 14t/a>tspa  class="comment"> * written by Douglas ThompsvalLinux Networx <norsk5@xmiss>
 .com>t/spa  
p 15t/a>tspa  class="comment"> *t/spa  
p 16t/a>tspa  class="comment"> * This module is based valthe following document:t/spa  
p 17t/a>tspa  class="comment"> *t/spa  
p 18t/a>tspa  class="comment"> * Intel 5400 Chipset Memory Controller Hub (MCH) - Datasheett/spa  
p 19t/a>tspa  class="comment"> *      http://developer.intel.com/design/chipsets/datashts/313070.htmt/spa  
p 2opta>tspa  class="comment"> *t/spa  
p 21t/a>tspa  class="comment"> * This Memory Controller manages DDR2 FB-DIMMs. It has 2 branches, each witht/spa  
p 22t/a>tspa  class="comment"> * 2 channels operating in lockstep no-mirror mode. Each channel ca  have up tot/spa  
p 23t/a>tspa  class="comment"> * 4 dimm's, each with up to 8GB.t/spa  
p 24t/a>tspa  class="comment"> *t/spa  
p 25t/a>tspa  class="comment"> */t/spa  
p 26t/a>
p 27t/a>#include <linux/module.ht/a>>
p 28t/a>#include <linux/init.ht/a>>
p 29t/a>#include <linux/pci.ht/a>>
p 30t/a>#include <linux/pci_ids.ht/a>>
p 31t/a>#include <linux/slab.ht/a>>
p 32t/a>#include <linux/edac.ht/a>>
p 33t/a>#include <linux/mmzone.ht/a>>
p 34t/a>
p 35t/a>#include "edac_core.ht/a>"
p 36t/a>
p 37t/a>tspa  class="comment">/*t/spa  
p 38t/a>tspa  class="comment"> * Alter this vers valfor the I5400 module when modifican>
 s are madet/spa  
p 39t/a>tspa  class="comment"> */t/spa  
p 40t/a>#definepta href="+code=I5400_REVISION" class="sref">I5400_REVISIONt/a>op ptspa  class="string">" Ver: 1.0.0"p 41t/a>
p 42t/a>#definepta href="+code=EDAC_MOD_STR" class="sref">EDAC_MOD_STRt/a>op p ptspa  class="string">"i5400_edac"p 43t/a>
p 44t/a>#definepta href="+code=i5400_printk" class="sref">i5400_printkt/a>(ta href="+code=level" class="sref">levelt/a>,pta href="+code=fmt" class="sref">fmtt/a>,pta href="+code=arg" class="sref">argt/a>...) \
p 45t/a>op p p pta href="+code=edac_printk" class="sref">edac_printkt/a>(ta href="+code=level" class="sref">levelt/a>,ptspa  class="string">"i5400"fmtt/a>,p##arg)
p 46t/a>
p 47t/a>#definepta href="+code=i5400_mc_printk" class="sref">i5400_mc_printkt/a>(ta href="+code=mci" class="sref">mcit/a>,pta href="+code=level" class="sref">levelt/a>,pta href="+code=fmt" class="sref">fmtt/a>,pta href="+code=arg" class="sref">argt/a>...) \
p 48t/a>op p p pta href="+code=edac_mc_chipset_printk" class="sref">edac_mc_chipset_printkt/a>(ta href="+code=mci" class="sref">mcit/a>,pta href="+code=level" class="sref">levelt/a>,ptspa  class="string">"i5400"fmtt/a>,p##arg)
p 49t/a>
p 5opta>tspa  class="comment">/* Limitslfor i5400 */t/spa  
p 51t/a>#definepta href="+code=MAX_BRANCHES" class="sref">MAX_BRANCHESt/a>op p p ppppp2
p 52t/a>#definepta href="+code=CHANNELS_PER_BRANCH" class="sref">CHANNELS_PER_BRANCHt/a>op p 2
p 53t/a>#definepta href="+code=DIMMS_PER_CHANNEL" class="sref">DIMMS_PER_CHANNELt/a>op p p 4
p 54t/a>#definepta href="+code=MAX_CHANNELS" class="sref">MAX_CHANNELSt/a>op p p ppppp(ta href="+code=MAX_BRANCHES" class="sref">MAX_BRANCHESt/a>o*pta href="+code=CHANNELS_PER_BRANCH" class="sref">CHANNELS_PER_BRANCHt/a>)
p 55t/a>
p 56t/a>tspa  class="comment">/* Device 16,t/spa  
p 57t/a>tspa  class="comment"> * Funcn>
  0: System Addresst/spa  
p 58t/a>tspa  class="comment"> * Funcn>
  1: Memory Branch Map, Control, Errors Registert/spa  
p 59t/a>tspa  class="comment"> * Funcn>
  2: FSB Error Registerst/spa  
p 6opta>tspa  class="comment"> *t/spa  
p 61t/a>tspa  class="comment"> * All 3 funcn>
 s of Device 16 (0,1,2) share the SAME DID andt/spa  
p 62t/a>tspa  class="comment"> * uses PCI_DEVICE_ID_INTEL_5400_ERRlfor device 16 (0,1,2),t/spa  
p 63t/a>tspa  class="comment"> * PCI_DEVICE_ID_INTEL_5400_FBD0 and PCI_DEVICE_ID_INTEL_5400_FBD1t/spa  
p 64t/a>tspa  class="comment"> * for device 21 (0,1).t/spa  
p 65t/a>tspa  class="comment"> */t/spa  
p 66t/a>
p 67t/a>op p p ptspa  class="comment">/* OFFSETS for Funcn>
  0 */t/spa  
p 68t/a>#definepop p p pta href="+code=AMBASE" class="sref">AMBASEt/a>op p p ppppppppppp0x48ptspa  class="comment">/* AMB Mem Mapped Reg Regi
  Base */t/spa  
p 69t/a>#definepop p p pta href="+code=MAXCH" class="sref">MAXCHt/a>op p p pppppppppppp0x56ptspa  class="comment">/* Max Channel Number */t/spa  
p 70t/a>#definepop p p pta href="+code=MAXDIMMPERCH" class="sref">MAXDIMMPERCHt/a>op p p ppppp0x57ptspa  class="comment">/* Max DIMM PER Channel Number */t/spa  
p 71t/a>
p 72t/a>op p p ptspa  class="comment">/* OFFSETS for Funcn>
  1 */t/spa  
p 73t/a>#definepop p p pta href="+code=TOLM" class="sref">TOLMt/a>op p p ppppppppppppp0x6C
p 74t/a>#definepop p p pta href="+code=REDMEMB" class="sref">REDMEMBt/a>op p p pppppppppp0x7C
p 75t/a>#definepop p p pop p p pta href="+code=REC_ECC_LOCATOR_ODD" class="sref">REC_ECC_LOCATOR_ODDt/a>(ta href="+code=x" class="sref">xt/a>)pp((ta href="+code=x" class="sref">xt/a>)p&p0x3fe00)ptspa  class="comment">/* bitsl[17:9] indicane ODD, [8:0]  indicane EVEN */t/spa  
p 76t/a>#definepop p p pta href="+code=MIR0" class="sref">MIR0t/a>op p p ppppppppppppp0x80
p 77t/a>#definepop p p pta href="+code=MIR1" class="sref">MIR1t/a>op p p ppppppppppppp0x84
p 78t/a>#definepop p p pta href="+code=AMIR0" class="sref">AMIR0t/a>op p p pppppppppppp0x8c
p 79t/a>#definepop p p pta href="+code=AMIR1" class="sref">AMIR1t/a>op p p pppppppppppp0x90
p 80t/a>
p 81t/a>op p p ptspa  class="comment">/* Fatal error registers */t/spa  
p 82t/a>#definepop p p pta href="+code=FERR_FAT_FBD" class="sref">FERR_FAT_FBDt/a>op p p ppppp0x98 p ptspa  class="comment">/* also called as FERR_FAT_FB_DIMM at datasheet */t/spa  
p 83t/a>#definepop p p pop p p pta href="+code=FERR_FAT_FBDCHAN" class="sref">FERR_FAT_FBDCHANt/a>o(3<<28)op p p ptspa  class="comment">/* channel index where the highest-order error occurred */t/spa  
p 84t/a>
p 85t/a>#definepop p p pta href="+code=NERR_FAT_FBD" class="sref">NERR_FAT_FBDt/a>op p p ppppp0x9c
p 86t/a>#definepop p p pta href="+code=FERR_NF_FBD" class="sref">FERR_NF_FBDt/a>op p p pppppp0xa0 p ptspa  class="comment">/* also called as FERR_NFAT_FB_DIMM at datasheet */t/spa  
p 87t/a>
p 88t/a>op p p ptspa  class="comment">/* Non-fatal error register */t/spa  
p 89t/a>#definepop p p pta href="+code=NERR_NF_FBD" class="sref">NERR_NF_FBDt/a>op p p pppppp0xa4
p 90t/a>
p 91t/a>op p p ptspa  class="comment">/* Enable error mask */t/spa  
p 92t/a>#definepop p p pta href="+code=EMASK_FBD" class="sref">EMASK_FBDt/a>op p p pppppppp0xa8
p 93t/a>
p 94t/a>#definepop p p pta href="+code=ERR0_FBD" class="sref">ERR0_FBDt/a>op p p ppppppppp0xac
p 95t/a>#definepop p p pta href="+code=ERR1_FBD" class="sref">ERR1_FBDt/a>op p p ppppppppp0xb0
p 96t/a>#definepop p p pta href="+code=ERR2_FBD" class="sref">ERR2_FBDt/a>op p p ppppppppp0xb4
p 97t/a>#definepop p p pta href="+code=MCERR_FBD" class="sref">MCERR_FBDt/a>op p p pppppppp0xb8
p 98t/a>
p 99t/a>op p p ptspa  class="comment">/* No OFFSETS for Device 16 Funcn>
  2 */t/spa  
p100t/a>
p101t/a>tspa  class="comment">/*t/spa  
p102t/a>tspa  class="comment"> * Device 21,t/spa  
p103t/a>tspa  class="comment"> * Funcn>
  0: Memory Map Branch 0t/spa  
p104t/a>tspa  class="comment"> *t/spa  
p105t/a>tspa  class="comment"> * Device 22,t/spa  
p106t/a>tspa  class="comment"> * Funcn>
  0: Memory Map Branch 1t/spa  
p107t/a>tspa  class="comment"> */t/spa  
p108t/a>
p109t/a>op p p ptspa  class="comment">/* OFFSETS for Funcn>
  0 */t/spa  
p110t/a>#definepta href="+code=AMBPRESENT_0" class="sref">AMBPRESENT_0t/a>op p0x64
p111t/a>#definepta href="+code=AMBPRESENT_1" class="sref">AMBPRESENT_1t/a>op p0x66
p112t/a>#definepta href="+code=MTR0" class="sref">MTR0t/a>op p p ppppp0x80
p113t/a>#definepta href="+code=MTR1" class="sref">MTR1t/a>op p p ppppp0x82
p114t/a>#definepta href="+code=MTR2" class="sref">MTR2t/a>op p p ppppp0x84
p115t/a>#definepta href="+code=MTR3" class="sref">MTR3t/a>op p p ppppp0x86
p116t/a>
p117t/a>op p p ptspa  class="comment">/* OFFSETS for Funcn>
  1 */t/spa  
p118t/a>#definepta href="+code=NRECFGLOG" class="sref">NRECFGLOGt/a>op p p pppppppp0x74
p119t/a>#definepta href="+code=RECFGLOG" class="sref">RECFGLOGt/a>op p p ppppppppp0x78
p120t/a>#definepta href="+code=NRECMEMA" class="sref">NRECMEMAt/a>op p p ppppppppp0xbe
p121t/a>#definepta href="+code=NRECMEMB" class="sref">NRECMEMBt/a>op p p ppppppppp0xc0
p122t/a>#definepta href="+code=NRECFB_DIMMA" class="sref">NRECFB_DIMMAt/a>op p p ppppp0xc4
p123t/a>#definepta href="+code=NRECFB_DIMMB" class="sref">NRECFB_DIMMBt/a>op p p ppppp0xc8
p124t/a>#definepta href="+code=NRECFB_DIMMC" class="sref">NRECFB_DIMMCt/a>op p p ppppp0xcc
p125t/a>#definepta href="+code=NRECFB_DIMMD" class="sref">NRECFB_DIMMDt/a>op p p ppppp0xd0
p126t/a>#definepta href="+code=NRECFB_DIMME" class="sref">NRECFB_DIMMEt/a>op p p ppppp0xd4
p127t/a>#definepta href="+code=NRECFB_DIMMF" class="sref">NRECFB_DIMMFt/a>op p p ppppp0xd8
p128t/a>#definepta href="+code=REDMEMA" class="sref">REDMEMAt/a>op p p pppppppppp0xdC
p129t/a>#definepta href="+code=RECMEMA" class="sref">RECMEMAt/a>op p p pppppppppp0xf0
p130t/a>#definepta href="+code=RECMEMB" class="sref">RECMEMBt/a>op p p pppppppppp0xf4
p131t/a>#definepta href="+code=RECFB_DIMMA" class="sref">RECFB_DIMMAt/a>op p p pppppp0xf8
p132t/a>#definepta href="+code=RECFB_DIMMB" class="sref">RECFB_DIMMBt/a>op p p pppppp0xec
p133t/a>#definepta href="+code=RECFB_DIMMC" class="sref">RECFB_DIMMCt/a>op p p pppppp0xf0
p134t/a>#definepta href="+code=RECFB_DIMMD" class="sref">RECFB_DIMMDt/a>op p p pppppp0xf4
p135t/a>#definepta href="+code=RECFB_DIMME" class="sref">RECFB_DIMMEt/a>op p p pppppp0xf8
p136t/a>#definepta href="+code=RECFB_DIMMF" class="sref">RECFB_DIMMFt/a>op p p pppppp0xfC
p137t/a>
p138t/a>tspa  class="comment">/*t/spa  
p139t/a>tspa  class="comment"> * Error indicanor bitsland maskst/spa  
p14opta>tspa  class="comment"> * Error masks are according with Table 5-17 of i5400 datasheett/spa  
p141t/a>tspa  class="comment"> */t/spa  
p142t/a>
p143t/a>enumpta href="+code=error_mask" class="sref">error_maskt/a>o{
p144t/a>p ppppppta href="+code=EMASK_M1" class="sref">EMASK_M1t/a>p = 1<<0, ptspa  class="comment">/* Memory Write error on non-redundant retry */t/spa  
p145t/a>op p p pta href="+code=EMASK_M2" class="sref">EMASK_M2t/a>p = 1<<1, ptspa  class="comment">/* Memory or FB-DIMM configuran>
  CRC read error */t/spa  
p146t/a>op p p pta href="+code=EMASK_M3" class="sref">EMASK_M3t/a>p = 1<<2, ptspa  class="comment">/* Reserved */t/spa  
p147t/a>op p p pta href="+code=EMASK_M4" class="sref">EMASK_M4t/a>p = 1<<3, ptspa  class="comment">/* Uncorrectable Data ECC on Replay */t/spa  
p148t/a>op p p pta href="+code=EMASK_M5" class="sref">EMASK_M5t/a>p = 1<<4, ptspa  class="comment">/* Aliased Uncorrectable Non-Mirrored Demand Data ECC */t/spa  
p149t/a>op p p pta href="+code=EMASK_M6" class="sref">EMASK_M6t/a>p = 1<<5, ptspa  class="comment">/* Unsupported vali5400 */t/spa  
p150t/a>op p p pta href="+code=EMASK_M7" class="sref">EMASK_M7t/a>p = 1<<6, ptspa  class="comment">/* Aliased Uncorrectable Resilver- or Spare-Copy Data ECC */t/spa  
p151t/a>op p p pta href="+code=EMASK_M8" class="sref">EMASK_M8t/a>p = 1<<7, ptspa  class="comment">/* Aliased Uncorrectable Patrol Data ECC */t/spa  
p152t/a>op p p pta href="+code=EMASK_M9" class="sref">EMASK_M9t/a>p = 1<<8, ptspa  class="comment">/* Non-Aliased Uncorrectable Non-Mirrored Demand Data ECC */t/spa  
p153t/a>p ppppppta href="+code=EMASK_M10" class="sref">EMASK_M10t/a>p= 1<<9, ptspa  class="comment">/* Unsupported vali5400 */t/spa  
p154t/a>p ppppppta href="+code=EMASK_M11" class="sref">EMASK_M11t/a>p= 1<<10,ptspa  class="comment">/* Non-Aliased Uncorrectable Resilver- or Spare-Copy Data ECC  */t/spa  
p155t/a>op p p pta href="+code=EMASK_M12" class="sref">EMASK_M12t/a>p= 1<<11,ptspa  class="comment">/* Non-Aliased Uncorrectable Patrol Data ECC */t/spa  
p156t/a>op p p pta href="+code=EMASK_M13" class="sref">EMASK_M13t/a>p= 1<<12,ptspa  class="comment">/* Memory Write error on first attempt */t/spa  
p157t/a>op p p pta href="+code=EMASK_M14" class="sref">EMASK_M14t/a>p= 1<<13,ptspa  class="comment">/* FB-DIMM Configuran>
  Write error on first attempt */t/spa  
p158t/a>op p p pta href="+code=EMASK_M15" class="sref">EMASK_M15t/a>p= 1<<14,ptspa  class="comment">/* Memory or FB-DIMM configuran>
  CRC read error */t/spa  
p159t/a>op p p pta href="+code=EMASK_M16" class="sref">EMASK_M16t/a>p= 1<<15,ptspa  class="comment">/* Channel Failed-Over Occurred */t/spa  
p160t/a>op p p pta href="+code=EMASK_M17" class="sref">EMASK_M17t/a>o= 1<<16,ptspa  class="comment">/* Correctable Non-Mirrored Demand Data ECC */t/spa  
p161t/a>op p p pta href="+code=EMASK_M18" class="sref">EMASK_M18t/a>o= 1<<17,ptspa  class="comment">/* Unsupported vali5400 */t/spa  
p162t/a>op p p pta href="+code=EMASK_M19" class="sref">EMASK_M19t/a>o= 1<<18,ptspa  class="comment">/* Correctable Resilver- or Spare-Copy Data ECC */t/spa  
p163t/a>p ppppppta href="+code=EMASK_M20" class="sref">EMASK_M20t/a>p= 1<<19,ptspa  class="comment">/* Correctable Patrol Data ECC */t/spa  
p164t/a>p ppppppta href="+code=EMASK_M21" class="sref">EMASK_M21t/a>p= 1<<20,ptspa  class="comment">/* FB-DIMM Northbound parity error on FB-DIMM Sync Status */t/spa  
p165t/a>op p p pta href="+code=EMASK_M22" class="sref">EMASK_M22t/a>p= 1<<21,ptspa  class="comment">/* SPD protocol Error */t/spa  
p166t/a>op p p pta href="+code=EMASK_M23" class="sref">EMASK_M23t/a>p= 1<<22,ptspa  class="comment">/* Non-Redundant Fast Reset Timeout */t/spa  
p167t/a>op p p pta href="+code=EMASK_M24" class="sref">EMASK_M24t/a>p= 1<<23,ptspa  class="comment">/* Refresh error */t/spa  
p168t/a>op p p pta href="+code=EMASK_M25" class="sref">EMASK_M25t/a>p= 1<<24,ptspa  class="comment">/* Memory Write error on redundant retry */t/spa  
p169t/a>op p p pta href="+code=EMASK_M26" class="sref">EMASK_M26t/a>p= 1<<25,ptspa  class="comment">/* Redundant Fast Reset Timeout */t/spa  
p170t/a>op p p pta href="+code=EMASK_M27" class="sref">EMASK_M27t/a>o= 1<<26,ptspa  class="comment">/* Correctable Counter Threshold Exceeded */t/spa  
p171t/a>op p p pta href="+code=EMASK_M28" class="sref">EMASK_M28t/a>o= 1<<27,ptspa  class="comment">/* DIMM-Spare Copy Completed */t/spa  
p172t/a>op p p pta href="+code=EMASK_M29" class="sref">EMASK_M29t/a>o= 1<<28,ptspa  class="comment">/* DIMM-Isolan>
  Completed */t/spa  
p173t/a>};
p174t/a>
p175t/a>tspa  class="comment">/*t/spa  
p176t/a>tspa  class="comment"> * Namvs to translane bit error into something usefult/spa  
p177t/a>tspa  class="comment"> */t/spa  
p178t/a>static const char *ta href="+code=error_namv" class="sref">error_namvt/a>[]o= {
p179t/a>op p p p[0]  =ptspa  class="string">"Memory Write error on non-redundant retry"p180t/a>op p p p[1]  =ptspa  class="string">"Memory or FB-DIMM configuran>
  CRC read error"p181t/a>op p p ptspa  class="comment">/* Reserved */t/spa  
p182t/a>op p p p[3]  =ptspa  class="string">"Uncorrectable Data ECC on Replay"p183t/a>p pppppp[4]  =ptspa  class="string">"Aliased Uncorrectable Non-Mirrored Demand Data ECC"p184t/a>op p p ptspa  class="comment">/* M6 Unsupported vali5400 */t/spa  
p185t/a>op p p p[6]  =ptspa  class="string">"Aliased Uncorrectable Resilver- or Spare-Copy Data ECC"p186t/a>op p p p[7]  =ptspa  class="string">"Aliased Uncorrectable Patrol Data ECC"p187t/a>op p p p[8]  =ptspa  class="string">"Non-Aliased Uncorrectable Non-Mirrored Demand Data ECC"p188t/a>op p p ptspa  class="comment">/* M10 Unsupported vali5400 */t/spa  
p189t/a>op p p p[10] =ptspa  class="string">"Non-Aliased Uncorrectable Resilver- or Spare-Copy Data ECC"p190t/a>op p p p[11] =ptspa  class="string">"Non-Aliased Uncorrectable Patrol Data ECC"p191t/a>op p p p[12] =ptspa  class="string">"Memory Write error on first attempt"p192t/a>op p p p[13] =ptspa  class="string">"FB-DIMM Configuran>
  Write error on first attempt"p193t/a>p pppppp[14] =ptspa  class="string">"Memory or FB-DIMM configuran>
  CRC read error"p194t/a>p pppppp[15] =ptspa  class="string">"Channel Failed-Over Occurred"p195t/a>op p p p[16] =ptspa  class="string">"Correctable Non-Mirrored Demand Data ECC"p196t/a>op p p ptspa  class="comment">/* M18 Unsupported vali5400 */t/spa  
p197t/a>op p p p[18] =ptspa  class="string">"Correctable Resilver- or Spare-Copy Data ECC"p198t/a>op p p p[19] =ptspa  class="string">"Correctable Patrol Data ECC"p199t/a>op p p p[20] =ptspa  class="string">"FB-DIMM Northbound parity error on FB-DIMM Sync Status"p200t/a>op p p p[21] =ptspa  class="string">"SPD protocol Error"p201t/a>op p p p[22] =ptspa  class="string">"Non-Redundant Fast Reset Timeout"p202t/a>op p p p[23] =ptspa  class="string">"Refresh error"p203t/a>p pppppp[24] =ptspa  class="string">"Memory Write error on redundant retry"p204t/a>p pppppp[25] =ptspa  class="string">"Redundant Fast Reset Timeout"p205t/a>op p p p[26] =ptspa  class="string">"Correctable Counter Threshold Exceeded"p206t/a>op p p p[27] =ptspa  class="string">"DIMM-Spare Copy Completed"p207t/a>op p p p[28] =ptspa  class="string">"DIMM-Isolan>
  Completed"p208t/a>};
p209t/a>
p21opta>tspa  class="comment">/* Fatal errors */t/spa  
p211t/a>#definepta href="+code=ERROR_FAT_MASK" class="sref">ERROR_FAT_MASKt/a>op p p ppp(ta href="+code=EMASK_M1" class="sref">EMASK_M1t/a>p| \
p212t/a>op p p ppppppppppppppppppppppppppta href="+code=EMASK_M2" class="sref">EMASK_M2t/a>p| \
p213t/a>op p p ppppppppppppppppppppppppppta href="+code=EMASK_M23" class="sref">EMASK_M23t/a>)
p214t/a>
p215t/a>tspa  class="comment">/* Correctable errors */t/spa  
p216t/a>#definepta href="+code=ERROR_NF_CORRECTABLE" class="sref">ERROR_NF_CORRECTABLEt/a>op p(ta href="+code=EMASK_M27" class="sref">EMASK_M27t/a>o| \
p217t/a>op p p ppppppppppppppppppppppppppta href="+code=EMASK_M20" class="sref">EMASK_M20t/a>p| \
p218t/a>op p p ppppppppppppppppppppppppppta href="+code=EMASK_M19" class="sref">EMASK_M19t/a>o| \
p219t/a>op p p ppppppppppppppppppppppppppta href="+code=EMASK_M18" class="sref">EMASK_M18t/a>o| \
p220t/a>op p p ppppppppppppppppppppppppppta href="+code=EMASK_M17" class="sref">EMASK_M17t/a>o| \
p221t/a>op p p ppppppppppppppppppppppppppta href="+code=EMASK_M16" class="sref">EMASK_M16t/a>)
p222t/a>#definepta href="+code=ERROR_NF_DIMM_SPARE" class="sref">ERROR_NF_DIMM_SPAREt/a>op p (ta href="+code=EMASK_M29" class="sref">EMASK_M29t/a>o| \
p223t/a>op p p ppppppppppppppppppppppppppta href="+code=EMASK_M28" class="sref">EMASK_M28t/a>)
p224t/a>#definepta href="+code=ERROR_NF_SPD_PROTOCOL" class="sref">ERROR_NF_SPD_PROTOCOLt/a>op (ta href="+code=EMASK_M22" class="sref">EMASK_M22t/a>)
p225t/a>#definepta href="+code=ERROR_NF_NORTH_CRC" class="sref">ERROR_NF_NORTH_CRCt/a>op p p(ta href="+code=EMASK_M21" class="sref">EMASK_M21t/a>)
p226t/a>
p227t/a>tspa  class="comment">/* Recoverable errors */t/spa  
p228t/a>#definepta href="+code=ERROR_NF_RECOVERABLE" class="sref">ERROR_NF_RECOVERABLEt/a>op p(ta href="+code=EMASK_M26" class="sref">EMASK_M26t/a>p| \
p229t/a>op p p ppppppppppppppppppppppppppta href="+code=EMASK_M25" class="sref">EMASK_M25t/a>p| \
p230t/a>op p p ppppppppppppppppppppppppppta href="+code=EMASK_M24" class="sref">EMASK_M24t/a>p| \
p231t/a>op p p ppppppppppppppppppppppppppta href="+code=EMASK_M15" class="sref">EMASK_M15t/a>p| \
p232t/a>op p p ppppppppppppppppppppppppppta href="+code=EMASK_M14" class="sref">EMASK_M14t/a>p| \
p233t/a>op p p ppppppppppppppppppppppppppta href="+code=EMASK_M13" class="sref">EMASK_M13t/a>p| \
p234t/a>op p p ppppppppppppppppppppppppppta href="+code=EMASK_M12" class="sref">EMASK_M12t/a>p| \
p235t/a>op p p ppppppppppppppppppppppppppta href="+code=EMASK_M11" class="sref">EMASK_M11t/a>p| \
p236t/a>op p p ppppppppppppppppppppppppppta href="+code=EMASK_M9" class="sref">EMASK_M9t/a>p | \
p237t/a>op p p ppppppppppppppppppppppppppta href="+code=EMASK_M8" class="sref">EMASK_M8t/a>p | \
p238t/a>op p p ppppppppppppppppppppppppppta href="+code=EMASK_M7" class="sref">EMASK_M7t/a>p | \
p239t/a>op p p ppppppppppppppppppppppppppta href="+code=EMASK_M5" class="sref">EMASK_M5t/a>)
p240t/a>
p241t/a>tspa  class="comment">/* uncorrectable errors */t/spa  
p242t/a>#definepta href="+code=ERROR_NF_UNCORRECTABLE" class="sref">ERROR_NF_UNCORRECTABLEt/a>op(ta href="+code=EMASK_M4" class="sref">EMASK_M4t/a>)
p243t/a>
p244t/a>tspa  class="comment">/* mask to all non-fatal errors */t/spa  
p245t/a>#definepta href="+code=ERROR_NF_MASK" class="sref">ERROR_NF_MASKt/a>op p p pppp(ta href="+code=ERROR_NF_CORRECTABLE" class="sref">ERROR_NF_CORRECTABLEt/a>op | \
p246t/a>op p p ppppppppppppppppppppppppppta href="+code=ERROR_NF_UNCORRECTABLE" class="sref">ERROR_NF_UNCORRECTABLEt/a>o| \
p247t/a>op p p ppppppppppppppppppppppppppta href="+code=ERROR_NF_RECOVERABLE" class="sref">ERROR_NF_RECOVERABLEt/a>op | \
p248t/a>op p p ppppppppppppppppppppppppppta href="+code=ERROR_NF_DIMM_SPARE" class="sref">ERROR_NF_DIMM_SPAREt/a>op p| \
p249t/a>op p p ppppppppppppppppppppppppppta href="+code=ERROR_NF_SPD_PROTOCOL" class="sref">ERROR_NF_SPD_PROTOCOLt/a>op| \
p250t/a>op p p ppppppppppppppppppppppppppta href="+code=ERROR_NF_NORTH_CRC" class="sref">ERROR_NF_NORTH_CRCt/a>)
p251t/a>
p252t/a>tspa  class="comment">/*t/spa  
p253t/a>tspa  class="comment"> * Defineperror masks for the several registerst/spa  
p254t/a>tspa  class="comment"> */t/spa  
p255t/a>
p256t/a>tspa  class="comment">/* Enable all fatal and non fatal errors */t/spa  
p257t/a>#definepta href="+code=ENABLE_EMASK_ALL" class="sref">ENABLE_EMASK_ALLt/a>op p p p(ta href="+code=ERROR_FAT_MASK" class="sref">ERROR_FAT_MASKt/a>o|pta href="+code=ERROR_NF_MASK" class="sref">ERROR_NF_MASKt/a>)
p258t/a>
p259t/a>tspa  class="comment">/* mask for fatal error registers */t/spa  
p260t/a>#definepta href="+code=FERR_FAT_MASK" class="sref">FERR_FAT_MASKt/a>ota href="+code=ERROR_FAT_MASK" class="sref">ERROR_FAT_MASKt/a>
p261t/a>
p262t/a>tspa  class="comment">/* masks for non-fatal error register */t/spa  
p263t/a>static ta href="+code=inline" class="sref">inlinet/a>oint ta href="+code=to_nf_mask" class="sref">to_nf_maskt/a>(unsignedoint ta href="+code=mask" class="sref">maskt/a>)
p264t/a>{
p265t/a>op p p preturnp(ta href="+code=mask" class="sref">maskt/a>p&pta href="+code=EMASK_M29" class="sref">EMASK_M29t/a>)o|p(ta href="+code=mask" class="sref">maskt/a>p>> 3);
p266t/a>};
p267t/a>
p268t/a>static ta href="+code=inline" class="sref">inlinet/a>oint ta href="+code=from_nf_ferr" class="sref">from_nf_ferrt/a>(unsignedoint ta href="+code=mask" class="sref">maskt/a>)
p269t/a>{
p270t/a>op p p preturnp(ta href="+code=mask" class="sref">maskt/a>p&pta href="+code=EMASK_M29" class="sref">EMASK_M29t/a>)o|ppppppppppppptspa  class="comment">/* Bit 28 */t/spa  
p271t/a>op p p pppppppp(ta href="+code=mask" class="sref">maskt/a>p&p((1 << 28)o- 1) << 3);ppptspa  class="comment">/* Bits 0 to 27 */t/spa  
p272t/a>};
p273t/a>
p274t/a>#definepta href="+code=FERR_NF_MASK" class="sref">FERR_NF_MASKt/a>op p p pppp ta href="+code=to_nf_mask" class="sref">to_nf_maskt/a>(ta href="+code=ERROR_NF_MASK" class="sref">ERROR_NF_MASKt/a>)
p275t/a>#definepta href="+code=FERR_NF_CORRECTABLE" class="sref">FERR_NF_CORRECTABLEt/a>op p ta href="+code=to_nf_mask" class="sref">to_nf_maskt/a>(ta href="+code=ERROR_NF_CORRECTABLE" class="sref">ERROR_NF_CORRECTABLEt/a>)
p276t/a>#definepta href="+code=FERR_NF_DIMM_SPARE" class="sref">FERR_NF_DIMM_SPAREt/a>op p pta href="+code=to_nf_mask" class="sref">to_nf_maskt/a>(ta href="+code=ERROR_NF_DIMM_SPARE" class="sref">ERROR_NF_DIMM_SPAREt/a>)
p277t/a>#definepta href="+code=FERR_NF_SPD_PROTOCOL" class="sref">FERR_NF_SPD_PROTOCOLt/a>op pta href="+code=to_nf_mask" class="sref">to_nf_maskt/a>(ta href="+code=ERROR_NF_SPD_PROTOCOL" class="sref">ERROR_NF_SPD_PROTOCOLt/a>)
p278t/a>#definepta href="+code=FERR_NF_NORTH_CRC" class="sref">FERR_NF_NORTH_CRCt/a>op p p ta href="+code=to_nf_mask" class="sref">to_nf_maskt/a>(ta href="+code=ERROR_NF_NORTH_CRC" class="sref">ERROR_NF_NORTH_CRCt/a>)
p279t/a>#definepta href="+code=FERR_NF_RECOVERABLE" class="sref">FERR_NF_RECOVERABLEt/a>op p ta href="+code=to_nf_mask" class="sref">to_nf_maskt/a>(ta href="+code=ERROR_NF_RECOVERABLE" class="sref">ERROR_NF_RECOVERABLEt/a>)
p280t/a>#definepta href="+code=FERR_NF_UNCORRECTABLE" class="sref">FERR_NF_UNCORRECTABLEt/a>op ta href="+code=to_nf_mask" class="sref">to_nf_maskt/a>(ta href="+code=ERROR_NF_UNCORRECTABLE" class="sref">ERROR_NF_UNCORRECTABLEt/a>)
p281t/a>
p282t/a>tspa  class="comment">/* Defines to extract the vaious fields from thet/spa  
p283t/a>tspa  class="comment"> *      MTRxo- Memory Technology Registerst/spa  
p284t/a>tspa  class="comment"> */t/spa  
p285t/a>#definepta href="+code=MTR_DIMMS_PRESENT" class="sref">MTR_DIMMS_PRESENTt/a>(ta href="+code=mtr" class="sref">mtrt/a>)o pppppppp((ta href="+code=mtr" class="sref">mtrt/a>)o&p(1 << 10))
p286t/a>#definepta href="+code=MTR_DIMMS_ETHROTTLE" class="sref">MTR_DIMMS_ETHROTTLEt/a>(ta href="+code=mtr" class="sref">mtrt/a>)o pppppp((ta href="+code=mtr" class="sref">mtrt/a>)o&p(1 << 9))
p287t/a>#definepta href="+code=MTR_DRAM_WIDTH" class="sref">MTR_DRAM_WIDTHt/a>(ta href="+code=mtr" class="sref">mtrt/a>)o ppppppppppp(((ta href="+code=mtr" class="sref">mtrt/a>)o&p(1 << 8)) ? 8 : 4)
p288t/a>#definepta href="+code=MTR_DRAM_BANKS" class="sref">MTR_DRAM_BANKSt/a>(ta href="+code=mtr" class="sref">mtrt/a>)o ppppppppppp(((ta href="+code=mtr" class="sref">mtrt/a>)o&p(1 << 6)) ? 8 : 4)
p289t/a>#definepta href="+code=MTR_DRAM_BANKS_ADDR_BITS" class="sref">MTR_DRAM_BANKS_ADDR_BITSt/a>(ta href="+code=mtr" class="sref">mtrt/a>)o p((ta href="+code=MTR_DRAM_BANKS" class="sref">MTR_DRAM_BANKSt/a>(ta href="+code=mtr" class="sref">mtrt/a>)o== 8) ? 3 : 2)
p290t/a>#definepta href="+code=MTR_DIMM_RANK" class="sref">MTR_DIMM_RANKt/a>(ta href="+code=mtr" class="sref">mtrt/a>)o pppppppppppp(((ta href="+code=mtr" class="sref">mtrt/a>)o>> 5)o&p0x1)
p291t/a>#definepta href="+code=MTR_DIMM_RANK_ADDR_BITS" class="sref">MTR_DIMM_RANK_ADDR_BITSt/a>(ta href="+code=mtr" class="sref">mtrt/a>)o pp(ta href="+code=MTR_DIMM_RANK" class="sref">MTR_DIMM_RANKt/a>(ta href="+code=mtr" class="sref">mtrt/a>)o? 2 : 1)
p292t/a>#definepta href="+code=MTR_DIMM_ROWS" class="sref">MTR_DIMM_ROWSt/a>(ta href="+code=mtr" class="sref">mtrt/a>)o pppppppppppp(((ta href="+code=mtr" class="sref">mtrt/a>)o>> 2)o&p0x3)
p293t/a>#definepta href="+code=MTR_DIMM_ROWS_ADDR_BITS" class="sref">MTR_DIMM_ROWS_ADDR_BITSt/a>(ta href="+code=mtr" class="sref">mtrt/a>)o pp(ta href="+code=MTR_DIMM_ROWS" class="sref">MTR_DIMM_ROWSt/a>(ta href="+code=mtr" class="sref">mtrt/a>)o+ 13)
p294t/a>#definepta href="+code=MTR_DIMM_COLS" class="sref">MTR_DIMM_COLSt/a>(ta href="+code=mtr" class="sref">mtrt/a>)o pppppppppppp((ta href="+code=mtr" class="sref">mtrt/a>)o&p0x3)
p295t/a>#definepta href="+code=MTR_DIMM_COLS_ADDR_BITS" class="sref">MTR_DIMM_COLS_ADDR_BITSt/a>(ta href="+code=mtr" class="sref">mtrt/a>)o pp(ta href="+code=MTR_DIMM_COLS" class="sref">MTR_DIMM_COLSt/a>(ta href="+code=mtr" class="sref">mtrt/a>)o+ 10)
p296t/a>
p297t/a>tspa  class="comment">/* This applies to FERR_NF_FB-DIMM as well as FERR_FAT_FB-DIMM */t/spa  
p298t/a>static ta href="+code=inline" class="sref">inlinet/a>oint ta href="+code=extract_fbdchan_indx" class="sref">extract_fbdchan_indxt/a>(ta href="+code=u32" class="sref">u32t/a>ota href="+code=x" class="sref">xt/a>)
p299t/a>{
p300t/a>op p p preturnp(ta href="+code=x" class="sref">xt/a>>>28)o&p0x3;
p301t/a>}
p302t/a>
p303t/a>tspa  class="comment">/* Device namv and register DID (Device ID) */t/spa  
p304t/a>struct ta href="+code=i5400_dev_info" class="sref">i5400_dev_infot/a>o{
p305t/a>op p p pconst char *ta href="+code=ctl_namv" class="sref">ctl_namvt/a>;ppptspa  class="comment">/* namv for this device */t/spa  
p306t/a>op p p pta href="+code=u16" class="sref">u16t/a>pta href="+code=fsb_mapping_errors" class="sref">fsb_mapping_errorst/a>;ptspa  class="comment">/* DID for the branchmap,control */t/spa  
p307t/a>};
p308t/a>
p309t/a>tspa  class="comment">/* Table of devices attributes supported by this driver */t/spa  
p31opta>static const struct ta href="+code=i5400_dev_info" class="sref">i5400_dev_infot/a>ota href="+code=i5400_devs" class="sref">i5400_devst/a>[]o= {
p311t/a>op p p p{
p312t/a>op p p ppppppppp.ta href="+code=ctl_namv" class="sref">ctl_namvt/a> =ptspa  class="string">"I5400"p313t/a>op p p ppppppppp.ta href="+code=fsb_mapping_errors" class="sref">fsb_mapping_errorst/a> =pta href="+code=PCI_DEVICE_ID_INTEL_5400_ERR" class="sref">PCI_DEVICE_ID_INTEL_5400_ERRt/a>,
p314t/a>op p p p},
p315t/a>};
p316t/a>
p317t/a>struct ta href="+code=i5400_dimm_info" class="sref">i5400_dimm_infot/a>o{
p318t/a>op p p pint ta href="+code=megabytes" class="sref">megabytest/a>;pppp p p ptspa  class="comment">/* size, 0 means not present  */t/spa  
p319t/a>};
p320t/a>
p321t/a>tspa  class="comment">/* driver privane data structure */t/spa  
p322t/a>struct ta href="+code=i5400_pvt" class="sref">i5400_pvtt/a>o{
p323t/a>op p p pstruct ta href="+code=pci_dev" class="sref">pci_devt/a>o*ta href="+code=system_address" class="sref">system_addresst/a>;pppp p p tspa  class="comment">/* 16.0 */t/spa  
p324t/a>op p p pstruct ta href="+code=pci_dev" class="sref">pci_devt/a>o*ta href="+code=branchmap_werrors" class="sref">branchmap_werrorst/a>;pppp ptspa  class="comment">/* 16.1 */t/spa  
p325t/a>op p p pstruct ta href="+code=pci_dev" class="sref">pci_devt/a>o*ta href="+code=fsb_error_regs" class="sref">fsb_error_regst/a>;pppp p p tspa  class="comment">/* 16.2 */t/spa  
p326t/a>op p p pstruct ta href="+code=pci_dev" class="sref">pci_devt/a>o*ta href="+code=branch_0" class="sref">branch_0t/a>;pppp p p p p p tspa  class="comment">/* 21.0 */t/spa  
p327t/a>op p p pstruct ta href="+code=pci_dev" class="sref">pci_devt/a>o*ta href="+code=branch_1" class="sref">branch_1t/a>;pppp p p p p p tspa  class="comment">/* 22.0 */t/spa  
p328t/a>
p329t/a>op p p pta href="+code=u16" class="sref">u16t/a>pta href="+code=tolm" class="sref">tolmt/a>;pppp p p p p p                 tspa  class="comment">/* top of low memory */t/spa  
p330t/a>op p p pun>
  {
p331t/a>op p p pppppppppta href="+code=u64" class="sref">u64t/a>pta href="+code=ambasv" class="sref">ambasvt/a>;pppp p p p p p               tspa  class="comment">/* AMB BAR */t/spa  
p332t/a>op p p pppppppppstruct {
p333t/a>op p p pppppppppppppppppta href="+code=u32" class="sref">u32t/a>ota href="+code=ambasv_bottom" class="sref">ambasv_bottomt/a>;
p334t/a>op p p pppppppppppppppppta href="+code=u32" class="sref">u32t/a>ota href="+code=ambasv_top" class="sref">ambasv_topt/a>;
p335t/a>op p p ppppppppp}pta href="+code=u" class="sref">ut/a>ota href="+code=__packed" class="sref">__packedt/a>;
p336t/a>op p p p};
p337t/a>
p338t/a>op p p pta href="+code=u16" class="sref">u16t/a>pta href="+code=mir0" class="sref">mir0t/a>,pta href="+code=mir1" class="sref">mir1t/a>;
p339t/a>
p340t/a>op p p pta href="+code=u16" class="sref">u16t/a>pta href="+code=b0_mtr" class="sref">b0_mtrt/a>[ta href="+code=DIMMS_PER_CHANNEL" class="sref">DIMMS_PER_CHANNELt/a>]; ptspa  class="comment">/* Memory Technlogy Reg */t/spa  
p341t/a>op p p pta href="+code=u16" class="sref">u16t/a>pta href="+code=b0_ambpresent0" class="sref">b0_ambpresent0t/a>;pppp p p p p p       tspa  class="comment">/* Branch 0, Channel 0 */t/spa  
p342t/a>op p p pta href="+code=u16" class="sref">u16t/a>pta href="+code=b0_ambpresent1" class="sref">b0_ambpresent1t/a>;pppp p p p p p       tspa  class="comment">/* Brnach 0, Channel 1 */t/spa  
p343t/a>
p344t/a>op p p pta href="+code=u16" class="sref">u16t/a>pta href="+code=b1_mtr" class="sref">b1_mtrt/a>[ta href="+code=DIMMS_PER_CHANNEL" class="sref">DIMMS_PER_CHANNELt/a>]; ptspa  class="comment">/* Memory Technlogy Reg */t/spa  
p345t/a>op p p pta href="+code=u16" class="sref">u16t/a>pta href="+code=b1_ambpresent0" class="sref">b1_ambpresent0t/a>;pppp p p p p p       tspa  class="comment">/* Branch 1, Channel 8 */t/spa  
p346t/a>op p p pta href="+code=u16" class="sref">u16t/a>pta href="+code=b1_ambpresent1" class="sref">b1_ambpresent1t/a>;pppp p p p p p       tspa  class="comment">/* Branch 1, Channel 1 */t/spa  
p347t/a>
p348t/a>op p p ptspa  class="comment">/* DIMM informan>
  manrix, allocan>ng architecture maximums */t/spa  
p349t/a>op p p pstruct ta href="+code=i5400_dimm_info" class="sref">i5400_dimm_infot/a>ota href="+code=dimm_info" class="sref">dimm_infot/a>[ta href="+code=DIMMS_PER_CHANNEL" class="sref">DIMMS_PER_CHANNELt/a>][ta href="+code=MAX_CHANNELS" class="sref">MAX_CHANNELSt/a>];
p350t/a>
p351t/a>op p p ptspa  class="comment">/* Actual values for this controller */t/spa  
p352t/a>op p p pint ta href="+code=maxch" class="sref">maxcht/a>;pppp p p p p p                tspa  class="comment">/* Max channels */t/spa  
p353t/a>op p p pint ta href="+code=maxdimmperch" class="sref">maxdimmpercht/a>;pppp p p p p p         tspa  class="comment">/* Max DIMMs per channel */t/spa  
p354t/a>};
p355t/a>
p356t/a>tspa  class="comment">/* I5400 MCH error informan>
  retrieved from Hardware */t/spa  
p357t/a>struct ta href="+code=i5400_error_info" class="sref">i5400_error_infot/a>o{
p358t/a>op p p ptspa  class="comment">/* These registers are always read from the MC */t/spa  
p359t/a>op p p pta href="+code=u32" class="sref">u32t/a>ota href="+code=ferr_fat_fbd" class="sref">ferr_fat_fbdt/a>;pppp p tspa  class="comment">/* First Errors Fatal */t/spa  
p360t/a>op p p pta href="+code=u32" class="sref">u32t/a>ota href="+code=nerr_fat_fbd" class="sref">nerr_fat_fbdt/a>;pppp p tspa  class="comment">/* Next Errors Fatal */t/spa  
p361t/a>op p p pta href="+code=u32" class="sref">u32t/a>ota href="+code=ferr_nf_fbd" class="sref">ferr_nf_fbdt/a>;pppp p ptspa  class="comment">/* First Errors Non-Fatal */t/spa  
p362t/a>op p p pta href="+code=u32" class="sref">u32t/a>ota href="+code=nerr_nf_fbd" class="sref">nerr_nf_fbdt/a>;pppp p ptspa  class="comment">/* Next Errors Non-Fatal */t/spa  
p363t/a>
p364t/a>op p p ptspa  class="comment">/* These registers are input ONLY if there was a Recoverable Error */t/spa  
p365t/a>op p p pta href="+code=u32" class="sref">u32t/a>ota href="+code=redmemb" class="sref">redmembt/a>;pppp p p p ptspa  class="comment">/* Recoverable Mem Data Error log B */t/spa  
p366t/a>op p p pta href="+code=u16" class="sref">u16t/a>pta href="+code=recmema" class="sref">recmemat/a>;pppp p p p ptspa  class="comment">/* Recoverable Mem Error log A */t/spa  
p367t/a>op p p pta href="+code=u32" class="sref">u32t/a>ota href="+code=recmemb" class="sref">recmembt/a>;pppp p p p ptspa  class="comment">/* Recoverable Mem Error log B */t/spa  
p368t/a>
p369t/a>op p p ptspa  class="comment">/* These registers are input ONLY if there was a Non-Rec Error */t/spa  
p370t/a>op p p pta href="+code=u16" class="sref">u16t/a>pta href="+code=nrecmema" class="sref">nrecmemat/a>;pppp p p p tspa  class="comment">/* Non-Recoverable Mem log A */t/spa  
p371t/a>op p p pta href="+code=u16" class="sref">u16t/a>pta href="+code=nrecmemb" class="sref">nrecmembt/a>;pppp p p p tspa  class="comment">/* Non-Recoverable Mem log B */t/spa  
p372t/a>
p373t/a>};
p374t/a>
p375t/a>tspa  class="comment">/* note that nrec_rdwr changed from NRECMEMA to NRECMEMB between the 5000 andt/spa  
p376t/a>tspa  class="comment"> p 5400 better to usv an inline funcn>
  than a macro in this case */t/spa  
p377t/a>static ta href="+code=inline" class="sref">inlinet/a>oint ta href="+code=nrec_bank" class="sref">nrec_bankt/a>(struct ta href="+code=i5400_error_info" class="sref">i5400_error_infot/a>o*ta href="+code=info" class="sref">infot/a>)
p378t/a>{
p379t/a>op p p preturnp((ta href="+code=info" class="sref">infot/a>->ta href="+code=nrecmema" class="sref">nrecmemat/a>)o>> 12)o&p0x7;
p380t/a>}
p381t/a>static ta href="+code=inline" class="sref">inlinet/a>oint ta href="+code=nrec_rank" class="sref">nrec_rankt/a>(struct ta href="+code=i5400_error_info" class="sref">i5400_error_infot/a>o*ta href="+code=info" class="sref">infot/a>)
p382t/a>{
p383t/a>op p p preturnp((ta href="+code=info" class="sref">infot/a>->ta href="+code=nrecmema" class="sref">nrecmemat/a>)o>> 8)o&p0xf;
p384t/a>}
p385t/a>static ta href="+code=inline" class="sref">inlinet/a>oint ta href="+code=nrec_buf_id" class="sref">nrec_buf_idt/a>(struct ta href="+code=i5400_error_info" class="sref">i5400_error_infot/a>o*ta href="+code=info" class="sref">infot/a>)
p386t/a>{
p387t/a>op p p preturnp((ta href="+code=info" class="sref">infot/a>->ta href="+code=nrecmema" class="sref">nrecmemat/a>))o&p0xff;
p388t/a>}
p389t/a>static ta href="+code=inline" class="sref">inlinet/a>oint ta href="+code=nrec_rdwr" class="sref">nrec_rdwrt/a>(struct ta href="+code=i5400_error_info" class="sref">i5400_error_infot/a>o*ta href="+code=info" class="sref">infot/a>)
p390t/a>{
p391t/a>op p p preturnp(ta href="+code=info" class="sref">infot/a>->ta href="+code=nrecmemb" class="sref">nrecmembt/a>)o>> 31;
p392t/a>}
p393t/a>tspa  class="comment">/* This applies to both NREC and REC string so it can be usvd with nrec_rdwrt/spa  
p394t/a>tspa  class="comment">   and rec_rdwr */t/spa  
p395t/a>static ta href="+code=inline" class="sref">inlinet/a>oconst char *ta href="+code=rdwr_str" class="sref">rdwr_strt/a>(int ta href="+code=rdwr" class="sref">rdwrt/a>)
p396t/a>{
p397t/a>op p p preturnpta href="+code=rdwr" class="sref">rdwrt/a> ?ptspa  class="string">"Write""Read"p398t/a>}
p399t/a>static ta href="+code=inline" class="sref">inlinet/a>oint ta href="+code=nrec_cas" class="sref">nrec_cast/a>(struct ta href="+code=i5400_error_info" class="sref">i5400_error_infot/a>o*ta href="+code=info" class="sref">infot/a>)
p400t/a>{
p401t/a>op p p preturnp((ta href="+code=info" class="sref">infot/a>->ta href="+code=nrecmemb" class="sref">nrecmembt/a>)o>> 16)o&p0x1fff;
p402t/a>}
p403t/a>static ta href="+code=inline" class="sref">inlinet/a>oint ta href="+code=nrec_ras" class="sref">nrec_rast/a>(struct ta href="+code=i5400_error_info" class="sref">i5400_error_infot/a>o*ta href="+code=info" class="sref">infot/a>)
p404t/a>{
p405t/a>op p p preturnp(ta href="+code=info" class="sref">infot/a>->ta href="+code=nrecmemb" class="sref">nrecmembt/a>)o&p0xffff;
p406t/a>}
p407t/a>static ta href="+code=inline" class="sref">inlinet/a>oint ta href="+code=rec_bank" class="sref">rec_bankt/a>(struct ta href="+code=i5400_error_info" class="sref">i5400_error_infot/a>o*ta href="+code=info" class="sref">infot/a>)
p408t/a>{
p409t/a>op p p preturnp((ta href="+code=info" class="sref">infot/a>->ta href="+code=recmema" class="sref">recmemat/a>)o>> 12)o&p0x7;
p410t/a>}
p411t/a>static ta href="+code=inline" class="sref">inlinet/a>oint ta href="+code=rec_rank" class="sref">rec_rankt/a>(struct ta href="+code=i5400_error_info" class="sref">i5400_error_infot/a>o*ta href="+code=info" class="sref">infot/a>)
p412t/a>{
p413t/a>op p p preturnp((ta href="+code=info" class="sref">infot/a>->ta href="+code=recmema" class="sref">recmemat/a>)o>> 8)o&p0xf;
p414t/a>}
p415t/a>static ta href="+code=inline" class="sref">inlinet/a>oint ta href="+code=rec_rdwr" class="sref">rec_rdwrt/a>(struct ta href="+code=i5400_error_info" class="sref">i5400_error_infot/a>o*ta href="+code=info" class="sref">infot/a>)
p416t/a>{
p417t/a>op p p preturnp(ta href="+code=info" class="sref">infot/a>->ta href="+code=recmemb" class="sref">recmembt/a>)o>> 31;
p418t/a>}
p419t/a>static ta href="+code=inline" class="sref">inlinet/a>oint ta href="+code=rec_cas" class="sref">rec_cast/a>(struct ta href="+code=i5400_error_info" class="sref">i5400_error_infot/a>o*ta href="+code=info" class="sref">infot/a>)
p420t/a>{
p421t/a>op p p preturnp((ta href="+code=info" class="sref">infot/a>->ta href="+code=recmemb" class="sref">recmembt/a>)o>> 16)o&p0x1fff;
p422t/a>}
p423t/a>static ta href="+code=inline" class="sref">inlinet/a>oint ta href="+code=rec_ras" class="sref">rec_rast/a>(struct ta href="+code=i5400_error_info" class="sref">i5400_error_infot/a>o*ta href="+code=info" class="sref">infot/a>)
p424t/a>{
p425t/a>op p p preturnp(ta href="+code=info" class="sref">infot/a>->ta href="+code=recmemb" class="sref">recmembt/a>)o&p0xffff;
p426t/a>}
p427t/a>
p428t/a>static struct ta href="+code=edac_pci_ctl_info" class="sref">edac_pci_ctl_infot/a>o*ta href="+code=i5400_pci" class="sref">i5400_pcit/a>;
p429t/a>
p430t/a>tspa  class="comment">/*t/spa  
p431t/a>tspa  class="comment"> *      i5400_get_error_info    Retrieve the hardware error informan>
  fromt/spa  
p432t/a>tspa  class="comment"> *                              the hardware and cache it in the 'info't/spa  
p433t/a>tspa  class="comment"> *                              structuret/spa  
p434t/a>tspa  class="comment"> */t/spa  
p435t/a>static void ta href="+code=i5400_get_error_info" class="sref">i5400_get_error_infot/a>(struct ta href="+code=mem_ctl_info" class="sref">mem_ctl_infot/a>o*ta href="+code=mci" class="sref">mcit/a>,
p436t/a>op p p p                         struct ta href="+code=i5400_error_info" class="sref">i5400_error_infot/a>o*ta href="+code=info" class="sref">infot/a>)
p437t/a>{
p438t/a>op p p pstruct ta href="+code=i5400_pvt" class="sref">i5400_pvtt/a>o*ta href="+code=pvt" class="sref">pvtt/a>;
p439t/a>op p p pta href="+code=u32" class="sref">u32t/a>ota href="+code=value" class="sref">valuet/a>;
p440t/a>
p441t/a>op p p pta href="+code=pvt" class="sref">pvtt/a> =pta href="+code=mci" class="sref">mcit/a>->ta href="+code=pvt_info" class="sref">pvt_infot/a>;
p442t/a>
p443t/a>op p p ptspa  class="comment">/* read in the 1st FATAL error register */t/spa  
p444t/a>op p p pta href="+code=pci_read_config_dword" class="sref">pci_read_config_dwordt/a>(ta href="+code=pvt" class="sref">pvtt/a>->ta href="+code=branchmap_werrors" class="sref">branchmap_werrorst/a>,pta href="+code=FERR_FAT_FBD" class="sref">FERR_FAT_FBDt/a>,p&ta href="+code=value" class="sref">valuet/a>);
p445t/a>
p446t/a>op p p ptspa  class="comment">/* Mask only the bits that the doc says are validt/spa  
p447t/a>tspa  class="comment">ass="sref*/t/spa  
p448t/a>op p p pta href="+code=value" class="sref">valuet/a>p&=p(ta href="+code=FERR_FAT_FBDCHAN" class="sref">FERR_FAT_FBDCHANt/a>p|pta href="+code=FERR_FAT_MASK" class="sref">FERR_FAT_MASKt/a>);
p449t/a>
p450t/a>op p p ptspa  class="comment">/* If there is an error, then read in thet/spa  
p451t/a>tspa  class="comment">           NEXT FATAL error register and the Memory Error Log Register At/spa  
p452t/a>tspa  class="comment"> ss="sref*/t/spa  
p453t/a>op p p pifp(ta href="+code=value" class="sref">valuet/a>p&pta href="+code=FERR_FAT_MASK" class="sref">FERR_FAT_MASKt/a>)o{
p454t/a>op p p pppppppppta href="+code=info" class="sref">infot/a>->ta href="+code=ferr_fat_fbd" class="sref">ferr_fat_fbdt/a> =pta href="+code=value" class="sref">valuet/a>;
p455t/a>
p456t/a>op p p p        tspa  class="comment">/* harvest the various error data we needf*/t/spa  
p457t/a>op p p pppppppppta href="+code=pci_read_config_dword" class="sref">pci_read_config_dwordt/a>(ta href="+code=pvt" class="sref">pvtt/a>->ta href="+code=branchmap_werrors" class="sref">branchmap_werrorst/a>,
p458t/a>op p p pppppppppppppppppppppppppta href="+code=NERR_FAT_FBD" class="sref">NERR_FAT_FBDt/a>,p&ta href="+code=info" class="sref">infot/a>->ta href="+code=nerr_fat_fbd" class="sref">nerr_fat_fbdt/a>);
p459t/a>op p p pppppppppta href="+code=pci_read_config_word" class="sref">pci_read_config_wordt/a>(ta href="+code=pvt" class="sref">pvtt/a>->ta href="+code=branchmap_werrors" class="sref">branchmap_werrorst/a>,
p460t/a>op p p pppppppppppppppppppppppppta href="+code=NRECMEMA" class="sref">NRECMEMAt/a>,p&ta href="+code=info" class="sref">infot/a>->ta href="+code=nrecmema" class="sref">nrecmemat/a>);
p461t/a>op p p pppppppppta href="+code=pci_read_config_word" class="sref">pci_read_config_wordt/a>(ta href="+code=pvt" class="sref">pvtt/a>->ta href="+code=branchmap_werrors" class="sref">branchmap_werrorst/a>,
p462t/a>op p p pppppppppppppppppppppppppta href="+code=NRECMEMB" class="sref">NRECMEMBt/a>,p&ta href="+code=info" class="sref">infot/a>->ta href="+code=nrecmemb" class="sref">nrecmembt/a>);
p463t/a>
p464t/a>op p p ppppppppptspa  class="comment">/* Clear the error bits, by wrin>ng them backf*/t/spa  
p465t/a>op p p pppppppppta href="+code=pci_wrine_config_dword" class="sref">pci_wrine_config_dwordt/a>(ta href="+code=pvt" class="sref">pvtt/a>->ta href="+code=branchmap_werrors" class="sref">branchmap_werrorst/a>,
p466t/a>op p p p                        ta href="+code=FERR_FAT_FBD" class="sref">FERR_FAT_FBDt/a>,pta href="+code=value" class="sref">valuet/a>);
p467t/a>op p p p} elseo{
p468t/a>op p p pppppppppta href="+code=info" class="sref">infot/a>->ta href="+code=ferr_fat_fbd" class="sref">ferr_fat_fbdt/a> =p0;
p469t/a>op p p pppppppppta href="+code=info" class="sref">infot/a>->ta href="+code=nerr_fat_fbd" class="sref">nerr_fat_fbdt/a> =p0;
p470t/a>op p p pppppppppta href="+code=info" class="sref">infot/a>->ta href="+code=nrecmema" class="sref">nrecmemat/a> =p0;
p471t/a>op p p pppppppppta href="+code=info" class="sref">infot/a>->ta href="+code=nrecmemb" class="sref">nrecmembt/a> =p0;
p472t/a>op p p p}
p473t/a>
p474t/a>op p p ptspa  class="comment">/* read in the 1st NON-FATAL error register */t/spa  
p475t/a>op p p pta href="+code=pci_read_config_dword" class="sref">pci_read_config_dwordt/a>(ta href="+code=pvt" class="sref">pvtt/a>->ta href="+code=branchmap_werrors" class="sref">branchmap_werrorst/a>, ta href="+code=FERR_NF_FBD" class="sref">FERR_NF_FBDt/a>,p&ta href="+code=value" class="sref">valuet/a>);
p476t/a>
p477t/a>op p p ptspa  class="comment">/* If there is an error, then read in the 1st NON-FATAL errort/spa  
p478t/a>tspa  class="comment"> ss="sref* register as well */t/spa  
p479t/a>op p p pifp(ta href="+code=value" class="sref">valuet/a>p&pta href="+code=FERR_NF_MASK" class="sref">FERR_NF_MASKt/a>)o{
p480t/a>op p p pppppppppta href="+code=info" class="sref">infot/a>->ta href="+code=ferr_nf_fbd" class="sref">ferr_nf_fbdt/a> =pta href="+code=value" class="sref">valuet/a>;
p481t/a>
p482t/a>op p p ppppppppptspa  class="comment">/* harvest the various error data we needf*/t/spa  
p483t/a>op p p pppppppppta href="+code=pci_read_config_dword" class="sref">pci_read_config_dwordt/a>(ta href="+code=pvt" class="sref">pvtt/a>->ta href="+code=branchmap_werrors" class="sref">branchmap_werrorst/a>,
p484t/a>op p p pppppppppppppppppppppppppta href="+code=NERR_NF_FBD" class="sref">NERR_NF_FBDt/a>,p&ta href="+code=info" class="sref">infot/a>->ta href="+code=nerr_nf_fbd" class="sref">nerr_nf_fbdt/a>);
p485t/a>op p p pppppppppta href="+code=pci_read_config_word" class="sref">pci_read_config_wordt/a>(ta href="+code=pvt" class="sref">pvtt/a>->ta href="+code=branchmap_werrors" class="sref">branchmap_werrorst/a>,
p486t/a>op p p p                        ta href="+code=RECMEMA" class="sref">RECMEMAt/a>,p&ta href="+code=info" class="sref">infot/a>->ta href="+code=recmema" class="sref">recmemat/a>);
p487t/a>op p p pppppppppta href="+code=pci_read_config_dword" class="sref">pci_read_config_dwordt/a>(ta href="+code=pvt" class="sref">pvtt/a>->ta href="+code=branchmap_werrors" class="sref">branchmap_werrorst/a>,
p488t/a>op p p pppppppppppppppppppppppppta href="+code=RECMEMB" class="sref">RECMEMBt/a>,p&ta href="+code=info" class="sref">infot/a>->ta href="+code=recmemb" class="sref">recmembt/a>);
p489t/a>op p p pppppppppta href="+code=pci_read_config_dword" class="sref">pci_read_config_dwordt/a>(ta href="+code=pvt" class="sref">pvtt/a>->ta href="+code=branchmap_werrors" class="sref">branchmap_werrorst/a>,
p490t/a>op p p pppppppppppppppppppppppppta href="+code=REDMEMB" class="sref">REDMEMBt/a>,p&ta href="+code=info" class="sref">infot/a>->ta href="+code=redmemb" class="sref">redmembt/a>);
p491t/a>
p492t/a>op p p ppppppppptspa  class="comment">/* Clear the error bits, by wrin>ng them backf*/t/spa  
p493t/a>op p p pppppppppta href="+code=pci_wrine_config_dword" class="sref">pci_wrine_config_dwordt/a>(ta href="+code=pvt" class="sref">pvtt/a>->ta href="+code=branchmap_werrors" class="sref">branchmap_werrorst/a>,
p494t/a>op p p pppppppppppppppppppppppppta href="+code=FERR_NF_FBD" class="sref">FERR_NF_FBDt/a>,pta href="+code=value" class="sref">valuet/a>);
p495t/a>op p p p} elseo{
p496t/a>op p p p        ta href="+code=info" class="sref">infot/a>->ta href="+code=ferr_nf_fbd" class="sref">ferr_nf_fbdt/a> =p0;
p497t/a>op p p pppppppppta href="+code=info" class="sref">infot/a>->ta href="+code=nerr_nf_fbd" class="sref">nerr_nf_fbdt/a> =p0;
p498t/a>op p p pppppppppta href="+code=info" class="sref">infot/a>->ta href="+code=recmema" class="sref">recmemat/a> =p0;
p499t/a>op p p pppppppppta href="+code=info" class="sref">infot/a>->ta href="+code=recmemb" class="sref">recmembt/a> =p0;
p500t/a>op p p pppppppppta href="+code=info" class="sref">infot/a>->ta href="+code=redmemb" class="sref">redmembt/a> =p0;
p501t/a>op p p p}
p502t/a>}
p503t/a>
p504t/a>tspa  class="comment">/*t/spa  
p505t/a>tspa  class="comment"> * i5400_proccess_non_recoverable_info(struct mem_ctl_info *mci,t/spa  
p506t/a>tspa  class="comment"> *                                      struct i5400_error_info *info,t/spa  
p507t/a>tspa  class="comment">a*                                      int handle_errors);t/spa  
p508t/a>tspa  class="comment"> *t/spa  
p509t/a>tspa  class="comment">a*      handle the Intel FATAL and unrecoverable errors, if anyt/spa  
p510t/a>tspa  class="comment">f*/t/spa  
static toid ta href="+code=i5400_groccess_non_recoverable_info( class="sref">in400_groccess_non_recoverable_info(/a>(ttruct ta href="+code=mem_ctl_info" class="sref">mem_ctl_infot/a>o*ta href="+code=mci" class="sref">mcit/a>,
p451t/a>op p p pppppppppppppppppppppppppt   struct ia href="+code=i5400_grror_info" class="sref">i5400_error_infot/a>o*ta href="+code=info" class="sref">infot/a>)
p451t/a>op p p ppppppppptttttttttttttttttttttunsigned log ta href="+code=iallErors" class="sref">ballErors"/a>);p451t/a>{
p451t/a>op p p p}har *a href="+code=mcsg class="sref">mcsg/a>ota href="+code=MEDAC_MC_LABEL_LE" class="sref">FEDAC_MC_LABEL_LE"/a>op+ 1p+ 90p+ 80;
p451t/a>op p p p nt ta href="+code=rranchm class="sref">branchm/a>;
p457t/a>op p p prnt ta href="+code=rhannel  class="sref">bhannel /a>;
p4518/a>op p p p nt ta href="+code=rrnk" class="sref">rankt/a>(
p4519/a>op p p p nt ta href="+code=rrf_id" class="sref">nuf_idt/a>(
p4520/a>op p p p nt ta href="+code=rank" class="sref">renkt/a>(
p451t/a>op p p prnt ta href="+code=rdwr" class="sref">rdwrt/a>)
p452t/a>op p p pint ta href="+code=mas" class="sref">reat/a>, ta href="+code=Fas" class="sref">rast/a>(
p452t/a>op p p pint ta href="+code=mrronum class="sref">rrronum/a>(
p4524/a>op p p p}har *ta href="+code=ityp" class="sref">vtyp"/a> =pta href="+code=vNUL" class="sref">DNUL"/a>(
p455t/a>op p p prenumta href="+code=vhw_evnt"_mcerro_typ" class="sref">vhw_evnt"_mcerro_typ"/a>opa href="+code=itp_evnt" class="sref">vtp_evnt"/a> =pta href="+code=vHW_EVENT_RR_NUNCORRECTE" class="sref">FHW_EVENT_RR_NUNCORRECTE"/a>(
p452t/a>
p452t/a>op p p prnf (!a href="+code=iallErors" class="sref">ballErors"/a>);p452t/a>op p p pppppppppteturnppppp p p pspa  class="comment">/* Cnf noerror, teturnp(now*/t/spa  
p459t/a>
p4530/a>op p p prnf (a href="+code=iallErors" class="sref">ballErors"/a>)&ptta href="+code=vRR_O_FAT_MASK" class="sref">FRR_O_FAT_MASK"/a>)o{
p453t/a>op p p pppppppppta href="+code=ityp" class="sref">vtyp"/a> =ptapa  class="string">"RATAL quot;p453t/a>op p p pppppppppts href="+code=itp_evnt" class="sref">vtp_evnt"/a> =pta href="+code=vHW_EVENT_RR_NATAL  class="sref">FHW_EVENT_RR_NATAL /a>(
p453t/a>op p p pi elseo{nf (a href="+code=iallErors" class="sref">ballErors"/a>)&pta href="+code=FERR_NF_FUNCORRECTABLE class="sref">FERR_NF_FUNCORRECTABLE/a>);p453t/a>op p p pppppppppta href="+code=ityp" class="sref">vtyp"/a> =ptapa  class="string">"RON-FATAL euncorrecte"p453t/a>op p p preseop456t/a>op p p p         a href="+code=ityp" class="sref">vtyp"/a> =ptapa  class="string">"RON-FATAL eecoverable_quot;p453t/a>
p458t/a>op p p psspa  class="comment">/* CNLY iONE o ther possile errorsbits twillbe uset,as wperthe doc s*/t/spa  
p453t/a>
p454t/a>op p p pta href="+code=uranchm class="sref">branchm/a>;=pta href="+code=vextrac_fbdthann_indx class="sref">rrxtrac_fbdthann_indx/a>(ta href="+code=pnfo" class="sref">infot/a>->ta href="+code=ferr_fat_fbd" class="sref">ferr_fat_fbdt/a> ;
p451t/a>op p p pta href="+code=phannel  class="sref">bhannel /a>;=pta href="+code=vranchm class="sref">branchm/a>;
p452t/a>
p453t/a>op p p ptspa  class="comment">/* rUs the ION-Fecoverable Macro  to brxtrac_data w/t/spa  
p454t/a>op p p pta href="+code=prnk" class="sref">rankt/a>(=pta href="+code=vrec_bank" class="sref">nrec_bankt/a>(sa href="+code=pnfo" class="sref">infot/a>-;
p454t/a>op p p pta href="+code=pank" class="sref">renkt/a>(=pta href="+code=vrec_bank" class="sref">nrec_rankt/a>(sa href="+code=pnfo" class="sref">infot/a>-;
p456t/a>op p p pts href="+code=rrf_id" class="sref">nuf_idt/a>(=pta href="+code=vrec_baf_id" class="sref">nrec_buf_idt/a>(sa href="+code=pnfo" class="sref">infot/a>-;
p4547/a>op p p pta href="+code=pawr" class="sref">rdwrt/a> ?pta href="+code=vrec_bawr" class="sref">nrec_rdwrt/a>(sa href="+code=pnfo" class="sref">infot/a>-;
p458t/a>op p p pta href="+code=vas" class="sref">reat/a>,=pta href="+code=vrec_ban" class="sref">nrec_rast/a>(sa href="+code=pnfo" class="sref">infot/a>-;
p454t/a>op p p pta href="+code=uas" class="sref">rast/a>(=pta href="+code=vrec_bas" class="sref">nrec_cast/a>(sa href="+code=pnfo" class="sref">infot/a>-;
p455t/a>
p455t/a>op p p pta href="+code=pdac._dbg class="sref">mdac._dbg/a>(s0,tapa  class="string">"R\t\tDIMM=ƍd  Cannel s=ƍd,#397;d  (Banchm=ƍd DRAM Bnkt=ƍd Buferr ID =ƍd dwrt=ƍs ast=ƍd cst=ƍd)\nquot;p455t/a>op p p pppppppppppa href="+code=pank" class="sref">renkt/a>( ta href="+code=Faannel  class="sref">bhannel /a>; ta href="+code=Faannel  class="sref">bhannel /a>;p+ 1 ta href="+code=Franchm class="sref">branchm/a>;=gt;> 16 ta href="+code=Frnk" class="sref">rankt/a>(
p455t/a>op p p ppppppppptts href="+code=rrf_id" class="sref">nuf_idt/a>( ta href="+code=Fdwr_str" class="sref">rdwr_strt/a>(ia href="+code=pawr" class="sref">rdwrt/a> ) ta href="+code=Fds" class="sref">reat/a>, ta href="+code=Fas" class="sref">rast/a>(;
p454t/a>op455t/a>op p p ptapa  class="comment">/* CNly t1bitstwillbe uonw/t/spa  
p455t/a>op p p pts href="+code=rrronum class="sref">rrronum/a>(=pta href="+code=vfind_first_its class="sref">feind_first_its/a>(iamp;ta href="+code=iallErors" class="sref">ballErors"/a>) ta href="+code=FARRAY_SIZE class="sref">FARRAY_SIZE/a>(ia href="+code=prror_iamv3 class="sref">rrror_iamv3/a>(;;
p455t/a>
p455t/a>op p p psspa  class="comment">/* CForm ou memssagew/t/spa  
p455t/a>op p p pta href="+code=usnpingtf class="sref">rsnpingtf/a>(ia href="+code=pcsg class="sref">mcsg/a>o, sizeofia href="+code=pcsg class="sref">mcsg/a>o)
p450t/a>op p p pppppppppppapa  class="string">"RBnkt=#397;d Buferr ID =ƍd RAS=#397;d CAS=#397;d Ero=0x#397;lx (#397;s)quot;p451t/a>op p p ppppppppptta href="+code=Frnk" class="sref">rankt/a>(
ts href="+code=rrf_id" class="sref">nuf_idt/a>( ta href="+code=Fds" class="sref">reat/a>, ta href="+code=Fas" class="sref">rast/a>( ta href="+code=FallErors" class="sref">ballErors"/a>) ta href="+code=Frror_iamv3 class="sref">rrror_iamv3/a>(ta href="+code=Mrronum class="sref">rrronum/a>(];
p456t/a>
p4563/a>op p p pts href="+code=rrac._mc_andle_errors class="sref">mdac._mc_andle_errors/a>(ia href="+code=ptp_evnt" class="sref">vtp_evnt"/a>  ta href="+code=Fci" class="sref">mcit/a>,
16 t0 t0 t0 p454t/a>op p p ppppppppptp ppppppppptta href="+code=Franchm class="sref">branchm/a>;=gt;> 16 t-6 ta href="+code=Fank" class="sref">renkt/a>( p455t/a>op p p ppppppppptp ppppppppptta href="+code=Fdwr" class="sref">rdwrt/a> ?ptspa  class="string">"Write&errorsquot;"Read&errorsquot;p456t/a>op p p p                      a href="+code=pcsg class="sref">mcsg/a>o)
p457t/a>o
p458t/a>op456t/a>tspa  class="comment">a*t/spa  
p457t/a>tspa  class="comment">f*/i5400_proccss_nfatalerror_infotstruct mem_ctl_info *mci,t/spa  
p457t/a>tspa  class="comment"> *      iiiiiiiiiiiiiiiiiiiiiiiiitruct i5400_error_info *info,t/spa  
p457t/a>tspa  class="comment"> *                              tnt handle_errors);t/spa  
p457t/a>tspa  class="comment"> * /spa  
p457t/a>tspa  class="comment"> */     tandle the Intel FON-FATAL errort, if anyt/spa  
p457t/a>tspa  class="comment"> * t/spa  
p456t/a>
tatic toid ta href="+code=i5400_groccss_non_fatalerror_infot class="sref">in400_groccss_non_fatalerror_infot/a>(itruct ta href="+code=mem_ctl_info" class="sref">mem_ctl_infot/a>o*ta href="+code=mci" class="sref">mcit/a>,
p457t/a>op p p ppppppppptiiiiiiiiiiiiiiiiiiiiiiiitruct ia href="+code=i5400_grror_info" class="sref">i5400_error_infot/a>o*ta href="+code=info" class="sref">infot/a>)
p457t/a>{
p459t/a>op p p pihar *a href="+code=mcsg class="sref">mcsg/a>ota href="+code=MEDAC_MC_LABEL_LE" class="sref">FEDAC_MC_LABEL_LE"/a>op+ 1p+ 90p+ 80;
p450t/a>op p p ppunsigned log ta href="+code=iallErors" class="sref">ballErors"/a>)
p458t/a>op p p prnt ta href="+code=rranchm class="sref">branchm/a>;
p458t/a>op p p pint ta href="+code=mhannel  class="sref">bhannel /a>;
p458t/a>op p p pint ta href="+code=mrnk" class="sref">rankt/a>(
p454t/a>op p p ppnt ta href="+code=rank" class="sref">renkt/a>(
p485ref="+code=pvt ta href="+code=rdwr" class="sref">rdwrt/a>)
p458t/a>op p p p nt ta href="+code=ras" class="sref">reat/a>, ta href="+code=Fas" class="sref">rast/a>(
p458t/a>op p p prnt ta href="+code=rrronum class="sref">rrronum/a>(
p458t/a>op459t/a>op p p ppspa  class="comment">/* Cmsk onf ther Erorsbits that tre vpossile e t/spa  
p459t/a>op p p pta href="+code=uallErors" class="sref">ballErors"/a>)&pta href="+code=vfromnf_fbrro class="sref">feromnf_fbrro/a>(ta href="+code=pnfo" class="sref">infot/a>->ta href="+code=ferr_ff_fbd" class="sref">ferr_nf_fbdt/a> =amp;pta href="+code=FERR_NF_MASK" class="sref">FERR_NF_MASKt/a>)o
p459t/a>op p p prnf (!a href="+code=iallErors" class="sref">ballErors"/a>);p452t/a>op p p pppppppppteturnppppp p p pspa  class="comment">/* Cnf noerror, teturnp(now*/t/spa  
p459t/a>
p454t/a>op p p ppspa  class="comment">/* CNLY iONE o ther possile errorsbits twillbe uset,as wperthe doc s*/t/spa  
p459_read_config_dword" class="sref">pci_rea5496" id3.5496" class="line" namv3.5496">5496t/a>op p p o{nf (a href="+code=iallErors" class="sref">ballErors"/a>)&f (a href="+code>FRR_O_NF_FUNCORRECTABLE class="sref">FRR_O_NF_FUNCORRECTABs"/a>p|pta href="+code>FRR_O_NFORROVERCTABLE class="sref">FRR_O_NFORROVERCTABv3/a>()o{
5497t/a>op p p pppppppppta href="+code=i5400_groccess_non_recoverable_info( class="sref">in400_groccess_non_recoverable_info(/a> ta href="+code=Fci" class="sref">mcit/a>,(ta href="+code=pnfo" class="sref">infot/a>( ta href="+code=FallErors" class="sref">ballErors"/a>)o
5498t/a>op p p pppppppppteturno
5499t/a>op p p >o
6055t/a>
6501t/a>op p p ptspa  class="comment">/* ncorrerable error s*/t/spa  
6026t/a>op p p o{nf (a href="+code=iallErors" class="sref">ballErors"/a>)&pta href="+code>FRR_O_NFUNCORRECTABLE class="sref">FRR_O_NFUNCORRECTABLE/a>)o{
6093t/a>op p p pppppppppta href="+code=pdac._dbg class="sref">mdac._dbg/a>(s0,tapa  class="string">"RCncorrectrsbit= o=0x#397;d)\nquot;ballErors"/a>)o
6054t/a>o6085t/a>op p p pppppppppta href="+code=uranchm class="sref">branchm/a>;=pta href="+code=vextrac_fbdthann_indx class="sref">rrxtrac_fbdthann_indx/a>(ta href="+code=pnfo" class="sref">infot/a>->ta href="+code=ferr_ff_fbd" class="sref">ferr_nf_fbdt/a>)o
6052t/a>
6097t/a>op p p pppppppppta href="+code=phannel  class="sref">bhannel /a>;=p0;
6098t/a>op p p ppppppppo{nf (a href="+codeORR_ECC_LOCATR_OODTE" class="sref"ORR_ECC_LOCATR_OODTdx/a>(ta href="+code=pnfo" class="sref">infot/a>->ta href="+code=redmemb" class="sref">redmembt/a>>);6099t/a>op p p pppppppppppppppppta href="+code=phannel  class="sref">bhannel /a>;=10;
6155t/a>
op p p ppppppppptspa  class="comment">/* nnivet >bhanne  tolbebasctr>fer zero, instReadof/t/spa  
6152t/a>tspa  class="comment"> ss="sreeeeeeeee*r>fer >brancebascNE o0 s*/t/spa  
6451t/a>op p p pppppppppta href="+code=phannel  class="sref">bhannel /a>+;=pta href="+code=vranchm class="sref">branchm/a>;
6154t/a>o6185t/a>op p p pppppppppta href="+code=prnk" class="sref">rankt/a>(=pta href="+codevrec_bank" class="sref"nrec_bankt/a>(sa href="+code=pnfo" class="sref">infot/a>-;
6156t/a>op p p p         a href="+code=pank" class="sref">renkt/a>(=pta href="+codevrec_bank" class="sref"nrec_rankt/a>(sa href="+code=pnfo" class="sref">infot/a>-;
6197t/a>op p p pppppppppta href="+code=pawr" class="sref">rdwrt/a> ?pta href="+codevrec_bawr" class="sref"nrec_rdwrt/a>(sa href="+code=pnfo" class="sref">infot/a>-;
6198t/a>op p p pppppppppta href="+code=vas" class="sref">reat/a>,=pta href="+codevrec_ban" class="sref"nrec_rast/a>(sa href="+code=pnfo" class="sref">infot/a>-;
6199t/a>op p p pppppppppta href="+code=uas" class="sref">rast/a>(=pta href="+codevrec_bas" class="sref"nrec_cast/a>(sa href="+code=pnfo" class="sref">infot/a>-;
6255t/a>
6253t/a>op p p ppppppppptspa  class="comment">/* CNly t1bitstwillbe uonw/t/spa  
6253t/a>op p p pppppppppts href="+code=rrronum class="sref">rrronum/a>(=pta href="+code=vfind_first_its class="sref">feind_first_its/a>(iamp;ta href="+code=iallErors" class="sref">ballErors"/a>) ta href="+code=FARRAY_SIZE class="sref">FARRAY_SIZE/a>(ia href="+code=prror_iamv3 class="sref">rrror_iamv3/a>(;;
6259t/a>
6253t/a>op p p pppppppppta href="+code=pdac._dbg class="sref">mdac._dbg/a>(s0,tapa  class="string">"R\t\tDIMM=ƍ  CanneMM=ƍd  (Bancm=ƍd DRAM Bnkt=ƍd dwrt=ƍs ast=ƍd cst=ƍd)\nquot;6255t/a>op p p ppppppppptp ppppp  a href="+code=pank" class="sref">renkt/a>( ta href="+code=Faannel  class="sref">bhannel /a>; ta href="+code=Franchm class="sref">branchm/a>;=gt;> 16 ta href="+code=Frnk" class="sref">rankt/a>(
6256t/a>op p p p                pta href="+code=pawr_str" class="sref">rdwr_strt/a>(ia href="+code=pawr" class="sref">rdwrt/a> ) ta href="+code=Fds" class="sref">reat/a>, ta href="+code=Fas" class="sref">rast/a>(;
6255t/a>
6452t/a>op p p pppppppppsspa  class="comment">/* CForm ou memssagew/t/spa  
6299t/a>op p p pppppppppta href="+code=usnpingtf class="sref">rsnpingtf/a>(ia href="+code=pcsg class="sref">mcsg/a>o, sizeofia href="+code=pcsg class="sref">mcsg/a>o)
6390t/a>op p p ppppppppppppppppp,tapa  class="string">"Cncorrectr error  (Banch=ƍd DR-;RBnkt=#397;RDWR==ƍ\nquot;6453t/a>op p p ppppppppppppppppp,tapa  class="string">"d RAS=#397;d CAS=#397, CE;d Ero=0x#397;lx (#397;;s)quot;6453t/a>op p p pppppppp pppppppppta href="+code=Franchm class="sref">branchm/a>;=gt;> 16 ta href="+code=Frnk" class="sref">rankt/a> pta href="+code=pawr_str" class="sref">rdwr_strt/a>(ia href="+code=pawr" class="sref">rdwrt/a> ) ta href="+code=Fds" class="sref">reat/a>, ta href="+code=Fas" class="sref">rast/a ;
6355t/a>op p p ppppppppppppppppppta href="+code=FallErors" class="sref">ballErors"/a>) ta href="+code=Frror_iamv3 class="sref">rrror_iamv3/a>(ta href="+code=Mrronum class="sref">rrronum/a>(];
6354t/a>o6385t/a>op p p pppppppppta href="+code>mdac._mc_andle_errors class="sref">mdac._mc_andle_errors/a>(ia href="+code>FHW_EVENT_RRUNCORRECTE" class="sref">FHW_EVENT_RRUNCORRECTE"/a>  ta href="+code=Fci" class="sref">mcit/a>,
16 t0 t0 t0 6456t/a>op p p p       p p pppppppp pppppppppta href="+code=Franchm class="sref">branchm/a>;=gt;> 16 ta href="+code=phannel  class="sref">bhannel /a> (#39 2-6 ta href="+code=Fank" class="sref">renkt/a>( 6357t/a>op p p ppppppppptiiiiiiiiiiiiiiiiiiipta href="+code=pawr" class="sref">rdwrt/a> ?ptspa  class="string">"Write&errorsquot;"Read&errorsquot;6388t/a>op p p ppppppppppppppppppppppppiiiiipta href="+code=pcsg class="sref">mcsg/a>o)
6453t/a>
6490t/a>op p p pppppppppteturno
6401t/a>op p p p}
6452t/a>
6453t/a>op p p ptspa  class="comment">/*Miscellaneious error s*/t/spa  
6454t/a>op p p pta href="+code=rrronum class="sref">rrronum/a>(=pta href="+code=vfind_first_its class="sref">feind_first_its/a>(iamp;ta href="+code=iallErors" class="sref">ballErors"/a>) ta href="+code=FARRAY_SIZE class="sref">FARRAY_SIZE/a>(ia href="+code=prror_iamv3 class="sref">rrror_iamv3/a>(;;
6459_read_config_dword" class="sref">pci_rea6451" id3.6456" class="line" namv3.6456">6456t/a>op p p pts href="+code=uranchm class="sref">branchm/a>;=pta href="+code=vextrac_fbdthann_indx class="sref">rrxtrac_fbdthann_indx/a>(ta href="+code=pnfo" class="sref">infot/a>->ta href="+code=ferr_ff_fbd" class="sref">ferr_nf_fbdt/a>)o
6455t/a>
6458t/a>op p p pta href="+code/i5400._msnpinnk" class="sref"/i5400._msnpinno(/a> ta href="+code=Fci" class="sref">mcit/a>,(ta href="+codeKERN_EMERGi" class="sref"KERN_EMERGkt/a>( 6499t/a>op p p ppppppppppppppppptapa  class="string">"on-F_fat miscr error  (Banch=ƍd Er='#7;lx (#397;;s)quot;6590t/a>op p p pppppppppppppppppta href="+code=Franchm class="sref">branchm/a>;=gt;> 16 ta href="+code=FallErors" class="sref">ballErors"/a>) ta href="+code=Frror_iamv3 class="sref">rrror_iamv3/a>(ta href="+code=Mrronum class="sref">rrronum/a>(];
6455t/ap}
6552t/a>
6557t/a>tspa  class="comment">a*t/spa  
6557t/a>tspa  class="comment"> */    >in400_groccss_error_infooooooooPgroccsr the error_info thatis*t/spa  
6505t/a>tspa  class="comment"> */    >nr the (#9;_inf (#9;iiitrucure, previioulyppterievctr>fer ha>rdare*t/spa  
6506t/a>tspa  class="comment"> */t/spa  
6455t/a>
tatic toid ta href="+code=i5400_groccsslerror_infot class="sref">in400_groccsslerror_infot/a>(itruct ta href="+code=mem_ctl_info" class="sref">mem_ctl_infot/a>o*ta href="+code=mci" class="sref">mcit/a>,
6588t/a>op p p ppppppppppppppppppppppppiitruct ia href="+code=i5400_grror_info" class="sref">i5400_error_infot/a>o*ta href="+code=info" class="sref">infot/a>)
6455t/a{ppppppppta href="+codeu452" class="sref"u453t/a> ta href="+code=FallErors" class="sref">ballErors"/a];
6655t/a>
6601t/a>op p p ptspa  class="comment">/*F_fir  tandleany n_fats error  thatoccurrctr */t/spa  
6628t/a>op p p pta href="+code=uallErors" class="sref">ballErors"/a>)&>(ta href="+code=pnfo" class="sref">infot/a>->ta href="+code=ferr_fat_fbd" class="sref">ferr_fat_fbdt/a> =amp;pta href="+code=FERR_FAT_MASK" class="sref"=FERR_FAT_MASdt/a>)o
64563/a>op p p pts href="+code=i5400_groccess_non_recoverable_info( class="sref">in400_groccess_non_recoverable_info(/a> ta href="+code=Fci" class="sref">mcit/a>,(ta href="+code=pnfo" class="sref">infot/a>( ta href="+code=FallErors" class="sref">ballErors"/a>)o
6654t/a>o6655t/a>op p p ptapa  class="comment">/*p(no tandleany _no-n_fats error  thatoccurrctr */t/spa  
6656t/a>op p p pts href="+code=i5400_groccss_non_fatalerror_infot class="sref">in400_groccss_non_fatalerror_infot/a> ta href="+code=Fci" class="sref">mcit/a>,(ta href="+code=pnfo" class="sref">infot/a>)o
6457t/a>o
6458t/a>o6456t/a>tspa  class="comment">a*t/spa  
6457t/a>tspa  class="comment">f*/    >in400clearalerroop p p Rterievceany lerroo>fer  theha>rdare*t/spa  
6457t/a>tspa  class="comment"> *      iiiiiiiiiiiiiiiiiiiiiiibut do NOT pgroccsr thatlerro.*t/spa  
6457t/a>tspa  class="comment"> *                             Usctr>roo (#9;clearing (#9;im ouof previious error*t/spa  
6457t/a>tspa  class="comment"> *                             C>bactrsy  theCore module.*t/spa  
6457t/a>tspa  class="comment"> */t/spa  
6457t/a>
tatic toid ta href="+code=i5400clearalerroot class="sref">in400clearalerroot/a>(itruct ta href="+code=mem_ctl_info" class="sref">mem_ctl_infot/a>o*ta href="+code=mci" class="sref">mcit/a>)
6456t/ao{
6457t/a>op p p iitruct ia href="+code=i5400_grror_info" class="sref">i5400_error_infot/a>(ta href="+code=pnfo" class="sref">infot/a)o
6758t/a>o6755t/a>op p p pta href="+code/i5400get0_grror_info" class="sref">i5400get0_grror_infot/a> ta href="+code=Fci" class="sref">mcit/a>,(iamp;ta href="+code=pnfo" class="sref">infot/a>)o
6450t/a>o
6458t/ao
6857t/a>tspa  class="comment">a*t/spa  
6857t/a>tspa  class="comment"> *     >in400checkalerroop p p Rterievceand pgroccsr error reportctrsy  th*t/spa  
6857t/a>tspa  class="comment"> */                            ha>rdare. C>bactrsy  theCore module.*t/spa  
p6857t/a>tspa  class="comment"> * t/spa  
6856t/a>
tatic toid ta href="+code=i5400checkalerroot class="sref">in400checkalerroot/a>(itruct ta href="+code=mem_ctl_info" class="sref">mem_ctl_infot/a>o*ta href="+code=mci" class="sref">mcit/a>)
6458t/ao{
6887t/a>op p p iitruct ia href="+code=i5400_grror_info" class="sref">i5400_error_infot/a>(ta href="+code=pnfo" class="sref">infot/a)o
6855t/a>op p p pta href="+code>mdac._dbg class="sref">mdac._dbg/a>4s0,tapa  class="string">"MC=ƍd)\nquot;mcit/a>->ta href="+codemc_iindx class="sref"mc_iinot/a>)o
6459t/a>op p p pta href="+code/i5400get0_grror_info" class="sref">i5400get0_grror_infot/a> ta href="+code=Fci" class="sref">mcit/a>,(iamp;ta href="+code=pnfo" class="sref">infot/a>)o
6955t/a>op p p pta href="+code=i5400_groccsslerror_infot class="sref">in400_groccsslerror_infot/a> ta href="+code=Fci" class="sref">mcit/a>,(iamp;ta href="+code=pnfo" class="sref">infot/a>)o
6452t/a>o
6459t/a>
6957t/a>tspa  class="comment">a*t/spa  
6905t/a>tspa  class="comment"> */    >in400_ut_devioccop p p  (#9;_ut (#9;i>baerthe eviocco thatwhehavh*t/spa  
6906t/a>tspa  class="comment"> */                            reservctrvia  (#9;get (#9;*t/spa  
6497t/a>tspa  class="comment"> * t/spa  
6498t/a>
tatic toid ta href="+code=i5400_ut_devioccot class="sref">in400_ut_devioccot/a>(itruct ta href="+code=mem_ctl_info" class="sref">mem_ctl_infot/a>o*ta href="+code=mci" class="sref">mcit/a>)
6499t/ao{
7007t/a>op p p iitruct ia href="+code=i5400pvits class="sref"=i5400pviot/a>o*ta href="+codepvits class="sref"pviot/a)o
7058t/ao
7028t/a>op p p pta href="+codepvits class="sref"pviot/a>;=pta href="+code=mci" class="sref">mcit/a>->ta href="+codepvil_info" class="sref"pvil_infot/a)o
7059t/a>
7054t/a>op p p ppspa  class="comment">/*Decremmen umssagcouen >roo eviocco * t/spa  
7054t/a>op p p pta href="+codepci_dev0_uto" class="sref"pci_dev0_utot/a> ta href="+codepvits class="sref"pviot/a>->ta href="+code>branc_1ts class="sref">branc_1ot/a>)o
7056t/a>op p p pts href="+codepci_dev0_uto" class="sref"pci_dev0_utot/a> ta href="+codepvits class="sref"pviot/a>->ta href="+code>branc_0ts class="sref">branc_0ot/a>)o
70547/a>op p p pta href="+codepci_dev0_uto" class="sref"pci_dev0_utot/a> ta href="+codepvits class="sref"pviot/a>->ta href="+codefsbslerrorregcot class="sref"fsbslerrorregcot/a>)o
7058t/a>op p p pta href="+codepci_dev0_uto" class="sref"pci_dev0_utot/a> ta href="+codepvits class="sref"pviot/a>->ta href="+code>brancmap_welErors" class="sref">brancmap_welErorot/a>)o
7099t/a>o
7155t/a>
tspa  class="comment">a*t/spa  
7152t/a>tspa  class="comment"> */    >in400get0devioccop p p Findeand perfCFor (#9;get (#9; opertatone uortheMCH (#9;r*t/spa  
7157t/a>tspa  class="comment"> *                     devioc/funcatonstwhewaen to reference >roothis "drive*t/spa  
7157t/a>tspa  class="comment"> *t/spa  
7105t/a>tspa  class="comment"> */                    Nectrto  (#9;get (#9; devioc 16 func 1eand func 2*t/spa  
7106t/a>tspa  class="comment"> */t/spa  
7155t/a>
taticprnt ta href="+code>in400get0deviocco" class="sref">i5400get0devioccot/a>(itruct ta href="+code=mem_ctl_info" class="sref">mem_ctl_infot/a>o*ta href="+code=mci" class="sref">mcit/a,cprnt ta href="+codedev0iindx class="sref"dev0iinit/a>)
7157t/a>{
7199t/a>op p p iitruct ia href="+code=i5400pvits class="sref"=i5400pviot/a>o*ta href="+codepvits class="sref"pviot/a)o
7207t/a>op p p iitruct ia href="+codepci_devo" class="sref"pci_devot/a>o*ta href="+codepdevo" class="sref"pdevot/a)o
7258t/ao
7228t/a>op p p pta href="+codepvits class="sref"pviot/a>;=pta href="+code=mci" class="sref">mcit/a>->ta href="+codepvil_info" class="sref"pvil_infot/a)o
72563/a>op p p pts href="+codepvits class="sref"pviot/a>->ta href="+code>brancmap_welErors" class="sref">brancmap_welErorot/a>;=pta href="+codeNULLs" class="sref"NULLot/a)o
7254t/a>op p p pta href="+codepvits class="sref"pviot/a>->ta href="+codefsbslerrorregcot class="sref"fsbslerrorregcot/a>;=pta href="+codeNULLs" class="sref"NULLot/a)o
7254t/a>op p p pta href="+codepvits class="sref"pviot/a>->ta href="+code>branc_0ts class="sref">branc_0ot/a>;=pta href="+codeNULLs" class="sref"NULLot/a)o
7256t/a>op p p pts href="+codepvits class="sref"pviot/a>->ta href="+code>branc_1ts class="sref">branc_1ot/a>;=pta href="+codeNULLs" class="sref"NULLot/a)o
7255t/a>
7255t/a>op p p psspa  class="comment">/*Attemptrto  (#9;get (#9; rtheMCH registertwhewaen  */t/spa  
7255t/a>op p p pta href="+codepdevo" class="sref"pdevot/a>;=pta href="+codeNULLs" class="sref"NULLot/a)o
7390t/a>op p p while (1>)o{
7453t/a>op p p pppppppppta href="+codepdevo" class="sref"pdevot/a>;=pta href="+codepci_get0devioco" class="sref"pci_get0deviocot/a> ta href="+codePCI_VENDOR_ID_INTELs" class="sref"PCI_VENDOR_ID_INTELit/a,{
7453t/a>op p p pppppppp pppppppp p p pppppppppta href="+codePCI_DEVICE_ID_INTEL_i5400ERRs" class="sref"PCI_DEVICE_ID_INTEL_i5400ERRit/a,cpta href="+codepdevo" class="sref"pdevot/a>)o
7355t/a>op p p ppppppppprnf (!a href="+codepdevo" class="sref"pdevot/a>)o{
7354t/a>op p p ppppppppptp pppppsspa  class="comment">/*Enadof list, leavagew/t/spa  
7385t/a>op p p pppppppppppppppppta href="+code>in400_gpinnk" class="sref"/i5400snpinno(/a> ta href="+codeKERN_ERRs" class="sref"KERN_ERRit/a,{
7456t/a>op p p p       p p pppppppp ppp,tapa  class="string">" (#9;rystem address,PgroccsrBus (#9; \nquot;7357t/a>op p p ppppppppptiiiiiiiiiiiiii,tapa  class="string">"devioc non >rund:\nquot;7388t/a>op p p pppppppppppppppppppppppp,tapa  class="string">"vendor o=0x#39x devioc o=0x#39x ERR func 1e\nquot;7399t/a>op p p pppppppppppppppppppppppp,tapa  class="string">"(broken BIOS?;d)\nquot;7490t/a>op p p pppppppppppppppppppppppp,ta href="+codePCI_VENDOR_ID_INTELs" class="sref"PCI_VENDOR_ID_INTELit/a,{
7453t/a>op p p pppppppppppppppppppppppp,ta href="+codePCI_DEVICE_ID_INTEL_i5400ERRs" class="sref"PCI_DEVICE_ID_INTEL_i5400ERRit/a>)o
7453t/a>op p p pppppppp ppppppp teturn-,ta href="+codeENODEVs" class="sref"ENODEVot/a)o
7455t/a>op p p pppppppp>o
7454t/a>o7485t/a>op p p pppppppppsspa  class="comment">/*Store devioc 16 func 1eew/t/spa  
7456t/a>op p p p       o{nf (a href="+codePCI_FUNCs" class="sref"PCI_FUNCot/a> ta href="+codepdevo" class="sref"pdevot/a>->ta href="+codedevfndx class="sref"devfnot/a>)== 1>)
7457t/a>op p p ppppppppptiiiiiibreak)o
7458t/a>op p p >o
7455t/a>op p p pta href="+codepvits class="sref"pviot/a>->ta href="+code>brancmap_welErors" class="sref">brancmap_welErorot/a>;=pta href="+codepdevo" class="sref"pdevot/a)o
7555t/a>
7555t/a>op p p pta href="+codepdevo" class="sref"pdevot/a>;=pta href="+codeNULLs" class="sref"NULLot/a)o
7553t/a>op p p while (1>)o{
7551t/a>op p p pppppppppta href="+codepdevo" class="sref"pdevot/a>;=pta href="+codepci_get0devioco" class="sref"pci_get0deviocot/a> ta href="+codePCI_VENDOR_ID_INTELs" class="sref"PCI_VENDOR_ID_INTELit/a,{
7554t/a>op p p ppppppppptp ppppp p p pppppppppta href="+codePCI_DEVICE_ID_INTEL_i5400ERRs" class="sref"PCI_DEVICE_ID_INTEL_i5400ERRit/a,cpta href="+codepdevo" class="sref"pdevot/a>)o
7585t/a>op p p ppppppppprnf (!a href="+codepdevo" class="sref"pdevot/a>)o{
7556t/a>op p p p       p p pppppsspa  class="comment">/*Enadof list, leavagew/t/spa  
7557t/a>op p p ppppppppptiiiiiipta href="+code>in400_gpinnk" class="sref"/i5400snpinno(/a> ta href="+codeKERN_ERRs" class="sref"KERN_ERRit/a,{
7588t/a>op p p pppppppppppppppppppppppp,tapa  class="string">" (#9;rystem address,PgroccsrBus (#9; \nquot;7599t/a>op p p pppppppppppppppppppppppp,tapa  class="string">"devioc non >rund:\nquot;7690t/a>op p p pppppppppppppppppppppppp,tapa  class="string">"vendor o=0x#39x devioc o=0x#39x ERR func 2 \nquot;7653t/a>op p p pppppppppppppppppppppppp,tapa  class="string">"(broken BIOS?;d)\nquot;7653t/a>op p p pppppppp pppppppp p p pp ta href="+codePCI_VENDOR_ID_INTELs" class="sref"PCI_VENDOR_ID_INTELit/a,{
7655t/a>op p p ppppppppppppppppp p p pp ta href="+codePCI_DEVICE_ID_INTEL_i5400ERRs" class="sref"PCI_DEVICE_ID_INTEL_i5400ERRit/a>)o
7654t/a>o7685t/a>op p p pppppppppppppppppta href="+codepci_dev0_uto" class="sref"pci_dev0_utot/a> ta href="+codepvits class="sref"pviot/a>->ta href="+code>brancmap_welErors" class="sref">brancmap_welErorot/a>)o
7656t/a>op p p p       p p pppp teturn-,ta href="+codeENODEVs" class="sref"ENODEVot/a)o
7657t/a>op p p pppppppp>o
7458t/a>o7699t/a>op p p pppppppppsspa  class="comment">/*Store devioc 16 func 2gew/t/spa  
7790t/a>op p p ppppppppo{nf (a href="+codePCI_FUNCs" class="sref"PCI_FUNCot/a> ta href="+codepdevo" class="sref"pdevot/a>->ta href="+codedevfndx class="sref"devfnot/a>)== 2>)
7753t/a>op p p ppppppppppppppppbreak)o
7753t/a>op p p >o
77563/a>op p p pts href="+codepvits class="sref"pviot/a>->ta href="+codefsbslerrorregcot class="sref"fsbslerrorregcot/a>;=pta href="+codepdevo" class="sref"pdevot/a)o
7754t/a>o7754t/a>op p p pta href="+code_edac._dbg class="sref">mdac._dbg/a>1s0,tapa  class="string">"System Address, pgroccsor bus- PCIrBus ID:t=ƍt='x:='xd)\nquot;7756t/a>op p p p       ppta href="+codepci__iamv3 class="sref"pci__iamot/a> ta href="+codepvits class="sref"pviot/a>->ta href="+coderystem_addressts class="sref"rystem_addressot/a> ;
7757t/a>op p p ppppppppp ta href="+codepvits class="sref"pviot/a>->ta href="+coderystem_addressts class="sref"rystem_addressot/a>->ta href="+codevendorts class="sref"vendorit/a,cpta href="+codepvits class="sref"pviot/a>->ta href="+coderystem_addressts class="sref"rystem_addressot/a>->ta href="+codedevioco" class="sref"deviocot/a>)o
7758t/a>op p p pta href="+code_edac._dbg class="sref">mdac._dbg/a>1s0,tapa  class="string">"Bbrancmap, controleand  error - PCIrBus ID:t=ƍt='x:='xd)\nquot;7799t/a>op p p ppppppppppta href="+codepci__iamv3 class="sref"pci__iamot/a> ta href="+codepvits class="sref"pviot/a>->ta href="+code>brancmap_welErors" class="sref">brancmap_welErorot/a> ;
7890t/a>op p p ppppppppp ta href="+codepvits class="sref"pviot/a>->ta href="+code>brancmap_welErors" class="sref">brancmap_welErorot/a>->ta href="+codevendorts class="sref"vendorit/a,;
7853t/a>op p p ppppppppp ta href="+codepvits class="sref"pviot/a>->ta href="+code>brancmap_welErors" class="sref">brancmap_welErorot/a>->ta href="+codedevioco" class="sref"deviocot/a>)o
7828t/a>op p p pta href="+code_edac._dbg class="sref">mdac._dbg/a>1s0,tapa  class="string">"FSB llEro Regc - PCIrBus ID:t=ƍt='x:='xd)\nquot;7855t/a>op p p ppppppppppta href="+codepci__iamv3 class="sref"pci__iamot/a> ta href="+codepvits class="sref"pviot/a>->ta href="+codefsbslerrorregcot class="sref"fsbslerrorregcot/a> ;
7854t/a>op p p ppppppppp ta href="+codepvits class="sref"pviot/a>->ta href="+codefsbslerrorregcot class="sref"fsbslerrorregcot/a>->ta href="+codevendorts class="sref"vendorit/a,cpta href="+codepvits class="sref"pviot/a>->ta href="+codefsbslerrorregcot class="sref"fsbslerrorregcot/a>->ta href="+codedevioco" class="sref"deviocot/a>)o
p7859_read_config_dword" class="sref">pci_rea71"6" id3.7456" class="line" namv3.7456">7856t/a>op p p pts href="+codepvits class="sref"pviot/a>->ta href="+code>branc_0ts class="sref">branc_0ot/a>;=pta href="+codepci_get0devioco" class="sref"pci_get0deviocot/a> ta href="+codePCI_VENDOR_ID_INTELs" class="sref"PCI_VENDOR_ID_INTELit/a,{
7857t/a>op p p ppppppppptiiiiiiiiiiiiiiiiiiipp ta href="+codePCI_DEVICE_ID_INTEL_i5400FBD0ts class="sref"PCI_DEVICE_ID_INTEL_i5400FBD0it/a,cpta href="+codeNULLs" class="sref"NULLot/a>)o
7887t/a>op p p prnf (!a href="+codepvits class="sref"pviot/a>->ta href="+code>branc_0ts class="sref">branc_0ot/a>)o{
7899t/a>op p p pppppppppta href="+code>in400_gpinnk" class="sref"/i5400snpinno(/a> ta href="+codeKERN_ERRs" class="sref"KERN_ERRit/a,{
7990t/a>op p p ppppppppppppppppptapa  class="string">"MC:  (#9;BRANCH 0 (#9; devioc non >rund:\nquot;7953t/a>op p p pppppppppppppppp,tapa  class="string">"vendor o=0x#39x devioc o=0x#39x Func 0 (broken BIOS?;d)\nquot;7953t/a>op p p pppppppp ppppppp ta href="+codePCI_VENDOR_ID_INTELs" class="sref"PCI_VENDOR_ID_INTELit/a,p ta href="+codePCI_DEVICE_ID_INTEL_i5400FBD0ts class="sref"PCI_DEVICE_ID_INTEL_i5400FBD0it/a>)o
7459t/a>
7953t/a>op p p pppppppppta href="+codepci_dev0_uto" class="sref"pci_dev0_utot/a> ta href="+codepvits class="sref"pviot/a>->ta href="+codefsbslerrorregcot class="sref"fsbslerrorregcot/a>)o
7985t/a>op p p pppppppppta href="+codepci_dev0_uto" class="sref"pci_dev0_utot/a> ta href="+codepvits class="sref"pviot/a>->ta href="+code>brancmap_welErors" class="sref">brancmap_welErorot/a>)o
7956t/a>op p p p        teturn-,ta href="+codeENODEVs" class="sref"ENODEVot/a)o
7957t/a>op p p >o
7958t/a>o7955t/a>op p p psspa  class="comment">/*Ifothis "evioc  climsrto havh more thpa 2 >bhannesr thn;8057t/a>tspa  class="comment">>>>>>>>>* fetch Bbranc 1 (#9;rr_infrmtaton;8057t/a>tspa  class="comment">>>>>>>>>*w/t/spa  
7007t/a>op p p iit8502">8f="dria  ;
ferr_fat_fbdCHANNELS_PER_s="strpppppta href="+CHANNELS_PER_s="strs="sromment">>>>>>>>>*w/t/spa  
7956t0s" class="sref"ENODEVot/a)o
7754t/a>o7054t/a>op p p pts href="+codepvits class="sref"pviot/a>->ta href="+code>branc_1ts class="sref">branc_0ot/a>;=pta href="+codepci_get0devioco" class="sref"pci_get0deviocot/a> ta href="+codePCI_VENDOR_ID_INTELs" class="sref"PCI_VENDOR_ID_INTELit/a,{
7456t/a>op p pine" namv3.7505">7054t_i5400FBD0ts class="sref"PCI>ta href="+co_i5400FBD0ts class="sref"PCI&DEVICE_ID_INTEL_i5400FBD0it/a,cpta href="+codeNULLs" class="sref"NULLot/a>)o
7887t/a>op p p prnf (!a href="+codepvits class="sref"pviot/a>->ta href="+code>branc_1ts class="sref">branc_0ot/a>)o{
7899t/a>op p p pppppppppta href="+code>in400_gpinnk" class="sref"/i5400snpinno(/a> ta href="+codeKERN_ERRs" class="sref"KERN_ERRit/a,{
6499t/a>op p p ppppppppppppppppptapa  class="stri1g">"MC:  (#9;BRANCH 0 (#9; devioc non >rund:\nquot;7990t/a>op p p ppppppppppppppppptapa  class="string">"vendor o=0x#39 0 (#9; devioc non >rund:\nquot;7953t/a>op p p pppppppppppppppp,tx devioc o=0x#39x Func 0 (broken BIOS?;d)\nquot;7953t/a>op p p pppppppp ppppppp ta href="+codePCI_VENDOR_ID_INTELs" class="srefen BIOS?;d)\nquot;7655t/mv3.7505">7054t_i5400FBD0ts class="sref"PCI>ta href="+co_i5400FBD0ts class="sref"PCI&DEVILLs" class="sref"NULLot/a>)o
7754t/a>o7985t/a>op p p pppppppppta href="+codepci_dev0_uto" class="sref"pci_dev0_utot/a> ta href="+codepvits class="sref"pviot/a>->ta href="+code>branc_0ts class="sref">branc_0ot/a>)o
7953t/a>op p p pppppppppta href="+codepci_dev0_uto" class="sref"pci_dev0_utot/a> ta href="+codepvits class="sref"pviot/a>->ta href="+codefsbslerrorregcot class="sref"fsbslerrorregcot/a>)o
7985t/a>op p p pppppppppta href="+codepci_dev0_uto" class="sref"pci_dev0_utot/a> ta href="+codepvits class="sref"pviot/a>->ta href="+code>brancmap_welErors" class="sref">brancmap_welErorot/a>)o
7956t/a>op p p p        teturn-,ta href="+codeENODEVs" class="sref"ENODEVot/a)o
7957t/a>op p p >o
7555t/a>
7956t0s" class="sref"ENODEVot/a)o
6452t/a>o
7459t/a>
6957t/a>tspa  class="comment">a*t/spa  
7105t/a>tspadetermc#7_ambgpies>71a>tspa  class="comment">a*t/spa  
7106t/a>tspa  class="comment">a*t/spa  
6497t/ne" namv3.7458Atte>>* fetch B is="strac#7da  cDIMMS_PER_CHANNEL difc/fun1a>tspa  class="comment">a*t/spa  
6497t/ne" namv3.7458to  (#9;sadetermc#pppamv3chpa  AtteDIMMS_PER_CHANNEL requireopertatone uortheMCH (#9;r*t/spa  
6456t/ne" namv3.7458knowpppamv3chplimsrto is=  cquesch Bbranc 1 (#9;rr_infrmtaton;6457t/branc 1 (#9;rr_infrmtaton;6457t/a>tspa2 ap_weles, eachpwith  climsrto branc 1 (#9;rr_infrmtaton;6457t/a>tspa  class=b0_ambpies>710tonstlimsrto g">&q0    reservctrvia  (#9;get (#9;*t/spa  
7157t/a>tspa  class=b0_ambpies>711tonstlimsrto g">&q1    reservctrvia  (#9;get (#9;*t/spa  
6857t/a>tspa  class=b1_ambpies>710tonstlimsrto g">&q2    reservctrvia  (#9;get (#9;*t/spa  
7105t/a>tspa  class=b1_ambpies>711tonstlimsrto g">&q3    reservctrvia  (#9;get (#9;*t/spa  
7106t/a>tspa  class="comment"> */t/spa  
7155t/a>determc#7_ambgpies>71cot ->ta href="+cotermc#7_ambgpies>71cot " clamv3.7459">7199t/a>op p p iitruct ia href="+code=i5400pvits class="sref"=i5400pviot/a>o*ta href="+code=mci" class="sref">mclimsrtoiot/a>o*ta hreflimsrtos="sromment">>>>>>>>>*w/t/spa  
7157t/a>{
mcambgpies>71iot/a>o*ta hrefambgpies>71a>EVs" class="sref"ENODEVot/a)o
7555t/a>
8f="dria limsrtoiot/a>o*ta hreflimsrtos="sa<ref">ferr_fat_fbdCHANNELS_PER_s="strpppppta href="+CHANNELS_PER_s="strs="srclass="sref">branc_0ot/a>)o{
8f="dria limsrtoiot/a>o*ta hreflimsrtos="sa&="sre0xlass="sref"devfnot/a>)== 1>)
mcambgpies>71iot/a>o*ta hrefambgpies>71a>EV class="sref">branc0_utot/a> ta href="+codepvits class="sref"pvi0_ambpies>711f="+code>brancma0_ambpies>711a>EVs" class="sref"ENODEVot/a)o
mcambgpies>71iot/a>o*ta hrefambgpies>71a>EV class="sref">branc0_utot/a> ta href="+codepvits class="sref"pvi0_ambpies>71>ta href="+cod0_ambpies>71&a>EVs" class="sref"ENODEVot/a)o
branc_0ot/a>)o{
8f="dria limsrtoiot/a>o*ta hreflimsrtos="sa&="sre0xlass="sref"devfnot/a>)== 1>)
7588t/class="sref">mcambgpies>71iot/a>o*ta hrefambgpies>71a>EV class="sref">branc0_utot/a> ta href="+codepvits class="sref"pvi1_ambpies>711f="+code>brancma1_ambpies>711a>EVs" class="sref"ENODEVot/a)o
7990t/alass="sref">mcambgpies>71iot/a>o*ta hrefambgpies>71a>EV class="sref">branc0_utot/a> ta href="+codepvits class="sref"pvi1_ambpies>71>ta href="+cod1_ambpies>71&a>EVs" class="sref"ENODEVot/a)o
6452t/a>o
6452t/a>o
7956tclass="sref">mcambgpies>71iot/a>o*ta hrefambgpies>71a>EVs" class="sref"ENODEVot/a)o
6452t/a>o
p7859_read_config_dw8ivers/eda8/i5400_edac.c#7451" id3.8456" 85ass="line" namv3.7456">7106t/a>tspa  class="comment">a*t/spa  
6497t/ncotermc#7_mtr(="+, dimm,tlimsrto)a>tspa  class="comment">a*t/spa  
6497t/a>tspa  class="comment">a*t/spa  
6456t/n">7956tAtteprnd p MTRrto  (#9;gasadetermc#e        dimm">&qudesired limsrtos=tspa  class="comment">a*t/spa  
6457t/a>tspa  class="comment"> */t/spa  
7155t/a>determc#7_mtr->ta href="+cotermc#7_mtr" clamv3.7459">7199t/a>op p p iitruct ia href="+code=i5400pvits class="sref"=i5400pviot/a>o*ta href="+code=mci" class="sref">mcdimm->ta href="+cimmcode=mci" class="sref">mclimsrtoiot/a>o*ta hreflimsrtos="sromment">>>>>>>>>*w/t/spa  
branc_0ot/a>)o{
mcmtr->ta href="+mtr" cls" class="sref"ENODEVot/a)o
mca>->ta href="n" cls" class="sref"ENODEVot/a)o
p7859_read_config_dw8ivers/eda8/i5400_edac.c#7451" id3.8456" 8lass="line" namv3.7499">7955t/a>op p p There is=o#e MTRronsteachpslot pairpa  FB-DIMMs,>tspa  class="comment"> */t/spa  
6497tttttttttttEachpslot pairpmay be at ap_wel 0 otSyomment".>tspa  class="comment"> */t/spa  
6497ttttttttt/a>tspa  class="comment"> */t/spa  
7455ta>->ta href="n" cl class="sref">brandimm->ta href="+cimmcodes" class="sref"ENODEVot/a)o
7555t/a>
8f="dria a>->ta href="n" cl vitsclass="sref">branDIMMS_PER_CHANNEL>->ta href="DIMMS_PER_CHANNELs="srclass="sref">branc_0ot/a>)o{
bran hrep p p pta href="+code_edac._dbg 0lass="sref">mdac._dbg/a>1s0,tERROR: trypppato acot (#"srinvalid dimmB llErod39x Func 0 (broken BIOS?;d)\nquot;7655t/aass="sref">brandimm->ta href="+cimmcoderef">brancmap_welErorot/a>)o
7956t0s" class="sref"ENODEVot/a)o
6452t/a>o
6452t/a>o
8f="dria limsrtoiot/a>o*ta hreflimsrtos="sa<ref">ferr_fat_fbdCHANNELS_PER_s="strpppppta href="+CHANNELS_PER_s="strs="srine" namv3.6452">6452t/a>o
7899t/a>op p mtr->ta href="+mtr" cl class="sref">branc0_utot/a> ta href="+codepvits class="sref"pvi0_mtr->ta href="+i0_mtrcode[8502">8f="dria a>->ta href="n" cl]s" class="sref"ENODEVot/a)o
7899t/a>op p mtr->ta href="+mtr" cl class="sref">branc0_utot/a> ta href="+codepvits class="sref"pvi1_mtr->ta href="+i1_mtrcode[8502">8f="dria a>->ta href="n" cl]s" class="sref"ENODEVot/a)o
7258t/ao
7956tclass="sref">mcmtr->ta href="+mtr" cls" class="sref"ENODEVot/a)o
6452t/a>o
7754t/a>o7105t/a>tspa  class="comment">a*t/spa  
pci_rea71"6" id3.8456" 88ass="line" namv3.7456">7106t/a>tspa  class="comment"> */t/spa  
7155t/a>de5t/a_mtr->ta href="+co5t/a_mtr_dbg ci" class="sref">mcslot_row->ta href="+slot_rowcode=mclass="sref">mcu/i5400_edacref="+u1ass="lclass="sref">mcmtr->ta href="+mtr" clrine" namv3.6452">6452t/a>o
7157t/a>{
mcanef="+code>brancmane" cls" class="sref"ENODEVot/a)o
7555t/a>
7555tanef="+code>brancmane" cl class="sref">branMTR_DIMMS_PRESENTf="+code>brancmMTR_DIMMS_PRESENT_dbg class="sref">mcmtr->ta href="+mtr" clrs" class="sref"ENODEVot/a)o
6452t/a>o
77563 hrep p p pta href="+code_edac._dbg 2lass="sref">mdac._dbg/a>1s0,t\tMTRllErod=otvendor: eDIMM(#"re llEro Pies>7139x Func 0 (broken BIOS?;d)\nquot;mcslot_row->ta href="+slot_rowcode=mclass="sref">mcmtr->ta href="+mtr" cl=mclass="sref">mcanef="+code>brancmane" cl ?p pppppppppppppppppppppppp,ta Func 0 (bro :p pppppppppppppppppppppppp,tNOT9 0 (#9; deviors" class="sref"ENODEVot/a)o
7887t/a>opanef="+code>brancmane" clrine" namv3.6452">6452t/a>o
7956s" class="sref"ENODEVot/a)o
7255t/a>
7758t/a>op p p pta href="+code_edac._dbg 2lass="sref">mdac._dbg/a>1s0,t\t\tWIDTH: xllErod39x Func 0 (broklass="sref">branMTR_DRAM_WIDTHf="+code>brancmMTR_DRAM_WIDTH_dbg class="sref">mcmtr->ta href="+mtr" clrrs" class="sref"ENODEVot/a)o
7758t/a>op p p pta href="+code_edac._dbg 2lass="sref">mdac._dbg/a>1s0,t\t\tELECTRICAL THROTTLING is=llEro 39x Func 0 (broken BIOS?;d)\nquot;7853t/a>op p pMTR_DIMMS_ETHROTTLEf="+code>brancmMTR_DIMMS_ETHROTTLE_dbg class="sref">mcmtr->ta href="+mtr" clr ?p pppppppppppppppppppppppp,tenableda Func 0 (bro :p pppppppppppppppppppppppp,tdisableda Func 0 (brors" class="sref"ENODEVot/a)o
6452t/a>o
77563 hrep p p pta href="+code_edac._dbg 2lass="sref">mdac._dbg/a>1s0,t\t\tNUMBANKB llErod bank(s#39x Func 0 (broklass="sref">branMTR_DRAM_BANKSf="+code>brancmMTR_DRAM_BANKS_dbg class="sref">mcmtr->ta href="+mtr" clrrs" class="sref"ENODEVot/a)o
7254t hrep p p pta href="+code_edac._dbg 2lass="sref">mdac._dbg/a>1s0,t\t\tNUMRANKB llEro 39x Func 0 (broken BIOS?;d)\nquot;7853t/a>op p pMTR_DIMM_RANKf="+code>brancmMTR_DIMM_RANK_dbg class="sref">mcmtr->ta href="+mtr" clr ?p pppppppppppppppppppppppp,tdoublea Func 0 (bro :p pppppppppppppppppppppppp,tsppplea Func 0 (brors" class="sref"ENODEVot/a)o
7856t hrep p p pta href="+code_edac._dbg 2lass="sref">mdac._dbg/a>1s0,t\t\tNUMROWB llEro 39x Func 0 (broken BIOS?;d)\nquot;7757t/a>op p pMTR_DIMM_ROWSf="+code>brancmMTR_DIMM_ROWS_dbg class="sref">mcmtr->ta href="+mtr" clr == 0 ?p pppppppppppppppppppppppp,t8,192 - 13 rowsa Func 0 (bro :en BIOS?;d)\nquot;7757t/a>op p pMTR_DIMM_ROWSf="+code>brancmMTR_DIMM_ROWS_dbg class="sref">mcmtr->ta href="+mtr" clr == 1 ?p pppppppppppppppppppppppp,t16,384 - 14 rowsa Func 0 (bro :en BIOS?;d)\nquot;7757t/a>op p pMTR_DIMM_ROWSf="+code>brancmMTR_DIMM_ROWS_dbg class="sref">mcmtr->ta href="+mtr" clr == 2 ?p pppppppppppppppppppppppp,t32,768 - 15 rowsa Func 0 (bro :en BIOS?;d)\nquot;7555t hrep p p pta href="+code_edac._dbg 2lass="sref">mdac._dbg/a>1s0,t\t\tNUMCOLB llEro 39x Func 0 (broken BIOS?;d)\nquot;7757t/a>op p pMTR_DIMM_COLSf="+code>brancmMTR_DIMM_COLS_dbg class="sref">mcmtr->ta href="+mtr" clr == 0 ?p pppppppppppppppppppppppp,t1,024 - 10 columnsa Func 0 (bro :en BIOS?;d)\nquot;7757t/a>op p pMTR_DIMM_COLSf="+code>brancmMTR_DIMM_COLS_dbg class="sref">mcmtr->ta href="+mtr" clr == 1 ?p pppppppppppppppppppppppp,t2,048 - 11 columnsa Func 0 (bro :en BIOS?;d)\nquot;mcMTR_DIMM_COLSf="+code>brancmMTR_DIMM_COLS_dbg class="sref">mcmtr->ta href="+mtr" clr == 2 ?p pppppppppppppppppppppppp,t4,096 - 12 columnsa Func 0 (bro :en BIOS?;d)\nquot;rveda Func 0 (brors" class="sref"ENODEVot/a)o
6452t/a>o
7255t/a>
7155t/a>handle_limsrtoiot/a>o*ta hrefhandle_limsrto" clamv3.7459">7199t/a>op p p iitruct ia href="+code=i5400pvits class="sref"=i5400pviot/a>o*ta href="+code=mci" class="sref">mcdimm->ta href="+cimmcode=mci" class="sref">mclimsrtoiot/a>o*ta hreflimsrtos="sken BIOS?;d)\nquot;6499t/mv3.7459">7199t/a>op p p iitcimm_>>* t ia href="+code=i540cimm_>>* its class="sref"=i540d>>* t ia href="+codd>>* its rine" namv3.6452">6452t/a>o
7157t/a>{
mcmtr->ta href="+mtr" cls" class="sref"ENODEVot/a)o
mcambgpies>71cot ->ta href="+ambgpies>71cot " cls" class="sref"ENODEVot/a)o
mcesstBitef="+code>brancmasstBite" cls" class="sref"ENODEVot/a)o
7754t/a>o7054tmtr->ta href="+mtr" cl class="sref">brandetermc#7_mtr->ta href="+cotermc#7_mtr" claass="sref"=i5400pviot/a>o*ta href="+code=mclass="sref">mcdimm->ta href="+cimmcode=mclass="sref">mclimsrtoiot/a>o*ta hreflimsrtos="srs" class="sref"ENODEVot/a)o
8f="dria MTR_DIMMS_PRESENTf="+code>brancmMTR_DIMMS_PRESENT_dbg class="sref">mcmtr->ta href="+mtr" clrrclass="sref">branc_0ot/a>)o{
7985t/a>op p ambgpies>71cot ->ta href="+ambgpies>71cot " cl class="sref">brandetermc#7_ambgpies>71cot ->ta href="+cotermc#7_ambgpies>71cot " claass="sref"=i5400pviot/a>o*ta href="+code=mclass="sref">mclimsrtoiot/a>o*ta hreflimsrtos="srs" class="sref"ENODEVot/a)o
7958t/a>o7699t/a>op p p ppppppppDetermc#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>7990t/a>5ae=mci" class="sne" n1to" c )
7985t/a>op p a8502">(1.85028502">8f="dria limsr" 87ass="line" namv3.7453">7ENT_dbg class="sref">mcmtr->ta href="+57t/branc91 (#9;rr_infrmtaton;numbe7955tbnacline"a Banke i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>79"+mtr" cl1 (#9;rr_infrmtaton;8f="=  c  cla699t/1>791cot " cltrvia  (#9;get (#9;*t/sp9  
7555ass="sref_ADDR_BITk(s#39x Func 0 (broklass="sref_ADDR_BITkMTR_DIMMS_PRESENTf="+code>brancmMTR_DIMMS_PRESENT_dbg class="sref">mcmtr->ta href9   reserv9trvia  (#9;get (#9;*t/sp9  
8f="=  c  cla699t/1>794" 92ass=trvia  (#9;get (#9;*t/sp9  
7555tan757t/_ADDR_BITk(s#39x Func 0 (brokltan757t/_ADDR_BITkMTR_DIMMS_PRESENTf="+code>brancmMTR_DIMMS_PRESENT_dbg class="sref">mcmtr->ta href9 srtos="srtrvia  (#9;get (#9;*t/sp9  
numbe7955tCOLUMNtbnaclc#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>79tr" clrrc class="comment"> */t/sp9  
7555tan7ss="_ADDR_BITk(s#39x Func 0 (brokltan7ss="_ADDR_BITkMTR_DIMMS_PRESENTf="+code>brancmMTR_DIMMS_PRESENT_dbg class="sref">mcmtr->ta href9 srtos="srromment">>>>>>>>>*w/t/sp9  
numbe7955t53t/tbnaclc#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>798" 92ass=line" namv3.7458">7157t/9>{
7555tan7590ass="line" namv3.74553>7853t/a>op p pMTR_DIMM_RANKf="+code>brancmMTR_DIMM_RENT_dbg class="sref">mcmtr->ta href9ies>71a>E9s" class="sref"ENODEVot/9)o
7555t9a>
8f="=  c  cla699t/1>7"strs="sr9lass="sref">branc_0ot/a>9o{
8f="=  c  cla699t/1>7"1cot " class="sref"devfnot/a>)== 9>)
8f="=  c  cla699t/1>7es>711a>E9s" class="sref"ENODEVot/9)o
8f="dregabytec"+code>brancmMTRegabyteci" c"li1.85028502">8f="dria limsr451" id3.9503" 92ass="line" naci" class="sref">mcesstBitef="+code>brancmases>71&a>E9s" class="sref"ENODEVot/9)o
branc_0ot/a>9o{
)== 9>)
79es>71&a>E9s" class="sref"ENODEVot/9)o
7199sizec#7315" id3.8455" 88ass="line" namv3.7455">79estrs="sr9line" namv3.6452">6452t/9>o
79e1cot " cl"ine" namv3.6452">6452t/9>o
769matrix de_edif debug3.74;ta hre,line"vie 82ac#7315" id3.8455" 88ass="line" namv3.7455">79es>711a>E9s" class="sref"ENODEVot/9)o
mpopulatedc#7315" id3.8455" 88ass="line" namv3.7455">79e3.7454to9line" namv3.6452">6452t/9>o
8f="=  c  cla699t/1>755" 85ass9"line" namv3.745">p7859_9ead_c9nfig_dd9ivers/eda9/i5400_edac.c#7calculate">7199size0pviot/a>o*ta hralculate">7199sizec#t/a>handle_limsrtoiot/a>o*ta hrefhandle_limsrto" clamv3.7459">7199t/a>op p p iitruct ia href="+code=i540ts class="sref"=i540d>>* t ia href="+co06t/a>tsp9  class="comment">a*t/sp9  
mcmtr->ta href="+rto)a>tsp9  class="comment">a*t/sp9  
6499t/mv3.7459">7199t/a>op p p iitcimm_>>* t ia href="+code=i540cimm_>>* ilass="sref">mcesstBitef="+code>brancmas97t/a>tsp9  class="comment">a*t/sp9  
o*ta href="+code=mclass="sremax">719c"+code>brancmMTRax">719c>* ilass="sref">mcesstBitef="+code>brancmassrtos=tsp9  class="comment">a*t/sp9  
op p p iitct ia href="+codef="+c199t/a>op p p iimem_bue>>*"+code>brancmMTRem_bue>>*>* ilass="sref">mcesstBitef="+code>brancmasss>71&a>E9 class="comment"> */t/sp9  
mca>->ta 9imsrtos="9romment">>>>>>>>>*w/t/sp9  
mca>->ta 9i1cot " cllass="sref">branc_0ot/a>9o{
8f="=  c  cla699t/1>7ref="n" c9s" class="sref"ENODEVot/9)o
mca>->ta 9i5" 85ass9"line" namv3.745">p7859_9ead_c96ref="d9i6ers/eda9/i5400_edacmem_bue>>*"+code>brancmMTRem_bue>>*>* iamv3.7450">7899t/a>ct ia href="+codef="amv3.7450">7899t/akmallocct ia href="+cokmalloca>op p pMTR_DIMM_RANi  ef="+code>branc_1i  efef="+code=mclass="sreGFP_pinn href="n" cl vitsGFP_pinn hIMM_RENT_dbg class="sref">mcmtr->ta href9MMs,>tspa9 class="comment"> */t/sp9  
ct ia href="+codef="ammv3.7450">7899t/ai5400FBD0ts class="sref"PCI&NT_dbg class="sref">mcmtr->ta href="+nt".>tspa9 class="comment"> */t/sp9  
7899t/a>op p p pppppppppta href="+code>in400_gpinnk" class=.c#7595" id3.8599" 80ass="line" nam7;s:nam7;s() kmalloc() faihre 2lass="sref">mdac._dbg/a>1s0,t\t\tNUMCOLB llEro 39x Ftt/a>tspa9 class="comment"> */t/sp9  
in400_g__func__IMM_RENT_dbg class="sref">mcmtr->ta href9"+cimmcod9s" class="sref"ENODEVot/9)o
7555t9a>
branc_0ot/a>9o{
8f="=  c  cla699t/1>7+cimmcode9ef">brancmap_welErorot/a9)o
8f="=  c  cla699t/1>7+ef="n" c9s" class="sref"ENODEVot/9)o
highest>7956tfirst,._dbdisplay ittfirste i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>7+5" 85ass9line" namv3.6452">6452t/9>o
pci_cccccccc*tAttework._dwardsspa>0lina hrefi  Attre is=aeDIMM 2">8f="=  c  cla699t/1>7+Ms,>tspa9"ine" namv3.6452">6452t/9>o
8f="=  c  cla699t/1>7s="strs="9rine" namv3.6452">6452t/9>o
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8f="dria limsr550" id3.8457" 87ass="line" namv3++"NT_ine" naci" class="sref">mca>->ta 1022" 8lass10s" class="sref"ENODEVot/10s" >10rref="d8ivers/eda8/i5400_edac.c#7552"450" id3.8454" 864ss=amv3.7450">7899t/asn8">78f="+code>branc_1in8">78fes>71cot ->ta hrefct ia href="+codef="+cp pMTR_DIMM_RANi  ef="+code>branc_1i  efef="+co#7595" id3.8599" 80ass="liline" nc._dbg 2|4lass="sref">md/eda9/i5400_edacf"=i5400pviot/a>o*ta href="+code=mclass="sref">mclimsrtoiot/a>o*ta hrefl10r3" 8lass10s" class="sref"ENODEVot/10s" >10rref="d8ivers/eda8/i54ci5400_edac.c#7>ct ia href="+codef="a+line" namv3.7451"450" id3.8454" 864ss="line" naci" class="sref">mca>->ta 10r4" 8lass10s" class="sref"ENODEVot/10s" >10rref="d8ivers/eda8/i54c#7451" id3.845i  ef="+code>branc_1i  efef=""-line" namv3.7451"450" id3.8454" 864ss="line" naci" class="sref">mca>->ta 10r5" 8lass10"line" namv3.7454">7754t10"li>10rref="d8ivers/eda8/i5400_edac.c#7515" id3.8455" 8las10r6" 8lass10s" class="sref"ENODEVot/10s" >10rref="d8ivers/eda8/i5400_edac.c#75a6" id3.81027" 8lass10lass="sref">branc_0ot/a>10las>10r7ef="d9ivers/eda9/i5400_edaci  ef="+code>branc_1i  efef=""-line" namv3.7451"450" id3.8454" 864ss="line" naci" class="sref">mca>->ta 1028" 8lass10s" class="sref"ENODEVot/10s" >10rref="d8ivers/eda8/i5400_edac.c#7458" id3.8498" 89ass="line" namv3.7458">7758t/a>op p p pta hrec._dbg 2lass="sref">md/eda9/i5400_edacmem_bue>>*"+code>brancmMTRem_bue>>*>* iRENT_dbg class="sref">mcmtr->ta href1029" 8lass10"line" namv3.7498">7958t10"li>10rref="d8ivers/eda8/i5400_edac>ct ia href="+codef="amv3.7450">7899t/amem_bue>>*"+code>brancmMTRem_bue>>*>* ilass="sref">mcesstBitef="+code>brancma1039" 8lass10=mci" class="sne" n1to" 10=mc>10=mef="d9ivers/eda9/i5400_edaci  ef="+code>branc_1i  efef=""line" namv3.7451"PAGE_SIZine" namv3.7451"PAGE_SIZi4ss="line" naci" class="sref">mca>->ta 1031" 8lass101 (#9;rr_infrmtaton;10=ref="d8ivers/eda8/i5400_edac.c#7301" id3.810=2" 8lass101 (#9;rr_infrmtaton;10=2ef="d9ivers/eda9/i5400_edac450" id3.8454" 864ss=amv3.7450">7899t/asn8">78f="+code>branc_1in8">78fes>71cot ->ta hrefct ia href="+codef="+cp pMTR_DIMM_RANi  ef="+code>branc_1i  efef="+co#7595" id3.8599" 80ass="lii5400_edac.ppppppppptapaRENT_dbg class="sref">mcmtr->ta href1033" 8lass10trvia  (#9;get (#9;*t/sp10trv>10=ref="d9i3ers/eda9/i5400_edac>ct ia href="+codef="a+line" namv3.7451"450" id3.8454" 864ss="line" naci" class="sref">mca>->ta 1034" 8lass10trvia  (#9;get (#9;*t/sp10trv>10=ref="d8ivers/ine">op p p pppppppp7tttttgt;ta href="+ci7ttttt4ss=." 02">8f="dria limsr7tttttgt;ta href="+ci7ttttt4ss=.8502">8f="dria limsrMAXfbdCHANEk(s#39x Func 0 (bAXfbdCHANEk4ss="">8f="dria limsr7tttttgt;ta href="+ci7ttttt4ss=++"NT_ine" naci" class="sref">mca>->ta 1035" 8lass10trvia  (#9;get (#9;*t/sp10trv>10=ref="d8ivers/eda8/i54c#7450" id3.845450" id3.8454" 864ss=amv3.7450">7899t/asn8">78f="+code>branc_1in8">78fes>71cot ->ta hrefct ia href="+codef="+cp pMTR_DIMM_RANi  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91ass="line" namv3.7451">7555t hrep p p pta hrec._dbg 2lass="sref">md/eda9/i5400_edacmem_bue>>*"+code>brancmMTRem_bue>>*>* iRENT_dbg class="sref">mcmtr->ta href1042" 8lass10lass="sref">branc_0ot/a>10las>10s2ef="d9ivers/eda9/i5400_edackfree"+code>brancmMTkfreees>71cot ->ta hremem_bue>>*"+code>brancmMTRem_bue>>*>* iRENT_dbg class="sref">mcmtr->ta href1043" 8lass10ass="sref"devfnot/a>)== 10ass>10sref="d8ivers/eda8/i5400_edac.c#7453" id3.8410s4" 8lass10s" class="sref"ENODEVot/10s" >10sref="d9ivers/eda9/i5400_edac.c#7404" id3.910s5" 8lass10e" class="sref"ENODEVot/10e" >10sref="d8ivers/eda8/i5400_edac.c#7315" id3.8455" 88ass="line" namv3.7455">710s6" 8lass10s" class="sref"ENODEVot/10s" >10sref="d8rd" class8"sref">pci_rivers/ namv3get_mc/a>os9ivers/read p p pe necessary/registss= Attc#7315" id3.8455" 88ass="line" namv3.7455">710s7" 8lass10lass="sref">branc_0ot/a>10las>10sref="d8ivers/eda8/i5400_edac*d9ivers/eda9/i5444444444444444cacpa>3ocallyc#7315" id3.8455" 88ass="line" namv3.7455">710s8" 8lass10ass="sref"devfnot/a>)== 10ass>10s8ef="d8ivers/eda8/i5400_edac*c#7315" id3.8455" 88ass="line" namv3.7455">710s9" 8lass10s" class="sref"ENODEVot/10s" >10s9ef="d8ivers/eda8/i5400_edac*d9ivers/eda9/i54444444Fills p p pe 8">vate4data membe7sc#7315" id3.8455" 88ass="line" namv3.7455">71059" 8lass10e" class="sref"ENODEVot/10e" >10e"ef="d8ivers/eda8/i5400_edac*#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1051" 8lass10s" class="sref"ENODEVot/10s" >10eref="d9ivers/eda9/i5400_edac.c#7 namv3get_mc/a>os"+code>brancmMT namv3get_mc/a>oses>71c#7457" id3.9509" 91asRem_ctlamv3.6459">6499t/mv3Rem_ctlamv3.ef="d199t/a>op p p iimci6459">6499t/mv3Rci>* iRtre is=aeDIMM 2">8f="=  c  cla699t/1>1052" 8lass10line" namv3.6452">6452t/10lin>10e2ef="T_ine" naci" class="sref">mca>->ta 1053" 8lass10"ine" namv3.6452">6452t/10"in>10eref="d9i3ers/>handle_limsrtoiot/a>o*ta hrefhandle_limsrto" clamv3.7459">7199t/a>op p p iitruct ia href="+code=i540ENT_dbg class="sref">mcmtr->ta href1054" 8lass10s" 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mcmtr->ta href1058" 8lass10  class="comment">a*t/sp10  c>10e8ef="d9ivers/eda9/i5400_edac.c#7Rax>719per  ;
mca>->ta 10e9" 8lass10  class="comment">a*t/sp10  c>10eref="d8ivers/eda8/i5400_edac.c#7way0;
mca>->ta 1069" 8lass10  class="comment">a*t/sp10  c>10  ef="d9ivers/eda9/i5400_edac.c#7404" id3.91061" 8lass10 class="comment"> */t/sp10 cl>10 ref="d9ivers/eda9/i5400_edac>ruct ia href="+code=i540amv3.7450">7899t/amci6459">6499t/mv3Rci>* itr" cl class="sref">de=amv3.6459">6499t/mv3de=amv3.4ss="line" naci" class="sref">mca>->ta 1062" 8lass10romment">>>>>>>>>*w/t/sp10rom>10 ref="d9ivers/eda9/i5400_edac.c#8502" id3.910 3" 8lass10lass="sref">branc_0ot/a>10las>10 ref="d9i3ers/eda9/i5400_edac>ci_read_config_dword6459">6499t/mv3dci_read_config_dwordes>71cot ->ta hrefop p mtr->ta href="+mtr" cl class="sref">systsm_ine"ess" 8lass="line" nystsm_ine"essef="+cp pMTR_DIMM_RANAMBASine" namv3.7451"AMBASief="+d9ivers/eda9/i5400_edac.c#8502" id3.910 4" 8lass10s" class="sref"ENODEVot/10s" >10 ref="d9ivers/eda9/i5400_edac.l502">8f="dria limsr>op p mtr->ta href="+mtr" cl class="sref">u class="sf="+cou="+m.eda9/i5400_edacambase_bottom5400pviot/a>o*tambase_bottom>* iRENT_dbg class="sref">mcmtr->ta href1065" 8lass10s" class="sref"ENODEVot/10s" >10 ref="d9ivers/eda9/i5400_edac>ci_read_config_dword6459">6499t/mv3dci_read_config_dwordes>71cot ->ta hrefop p mtr->ta href="+mtr" cl class="sref">systsm_ine"ess" 8lass="line" nystsm_ine"essef="+cp pMTR_DIMM_RANAMBASine" namv3.7451"AMBASief=" + sizeof1cot ->ta hreu1 (#9;rr_inf="+cou=2ef=")+d9ivers/eda9/i5400_edac.c#8502" id3.910 6" 8lass10"line" namv3.745">p7859_10"li>10 ref="d8ivers/eda8/i5400_edac.l502">8f="dria limsr>op p mtr->ta href="+mtr" cl class="sref">u class="sf="+cou="+m.eda9/i5400_edacambase_to>ct ia href="+coambase_to>>* iRENT_dbg class="sref">mcmtr->ta href1067" 8lass10 class="comment"> */t/sp10 cl>10 ref="d9ivers/eda9/i5400_edac.c#7457" id3.91068" 8lass10 class="comment"> */t/sp10 cl>10 ref="d8ivers/eda8/i5400_edacmax>719per  ;
7899t/a>op p mtr->ta href="+mtr" cl class="sref">Rax>719per  ;
mca>->ta 10 9" 8lass10 class="comment"> */t/sp10 cl>10 ref="d8ivers/eda8/i5400_edacRax  ;
7899t/a>op p mtr->ta href="+mtr" cl class="sref">Rax  ;
mcmtr->ta href1079" 8lass10s" class="sref"ENODEVot/10s" >10s"ef="d9ivers/eda9/i5400_edac.c#7457" id3.91071" 8lass10"line" namv3.7450">7555t10"li>10sref="d9ivers/eda9/i5400_edac.c#75amv3.L429511" 91ass="line" namv3.7451">7555t hrep p p pta hreAMBASi= 0xc._dblx  MAXCH=t._dbg 22MAX-ne" -Per-CH=t._dbg  2lass="sref">mdac._dbg/a>1s0,t\t\tNUMCOLB llEro 39x 10s2" 8lass10lass="sref">branc_0ot/a>10las>10sref="d8ivers/eda8/i540(long unsigned p t)3.7450">7899t/a>op p mtr->ta href="+mtr" cl class="sref">ambasect ia href="+coambaseef="+cp pMTR_DIMM_RAN>op p mtr->ta href="+mtr" cl class="sref">Rax  ;
Rax>719per  ;
mcmtr->ta href1073" 8lass10ken BIOS?;d)\nquot;10sref="d8ivers/eda8/i5400_edac.c#7451" id3.810s4" 8lass10ef">brancmap_welErorot/a10ef">10sref="d8ivers/c#75amv3.L4288" id3.7459"G8tsspa>BttttttMap a>os9*#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1075" 8lass10s" class="sref"ENODEVot/10s" >10sref="d9ivers/eda9/i5400_edac>ci_read_config_word6459">6499t/mv3dci_read_config_wordes>71cot ->ta hrefop p mtr->ta href="+mtr" cl class="sref">7tttttmap_werrors" 8lass="line" 7tttttmap_werrors4ss=+cp pMTR_DIMM_RANTOLM" 8lass="line" TOLM4ss=+cl502">8f="dria limsr>op p mtr->ta href="+mtr" cl class="sref">toli5400pviot/a>o*ttolii540RENT_dbg class="sref">mcmtr->ta href1076" 8lass10line" namv3.6452">6452t/10lin>10sref="d9i6ers/eda9/i5400_edac>op p mtr->ta href="+mtr" cl class="sref">toli5400pviot/a>o*ttolii540"lineline" 12ENT_dbg class="sref">mcmtr->ta href1077" 8lass10"ine" namv3.6452">6452t/10"in>10s7ef="d9ivers/eda9/i5400_edac.c#75amv3.L429511" 91ass="line" namv3.7451">7555t hrep p p pta hre\nTOLM (numbe7955t256M/regions) =._dbgu (0xc._dbx) 2lass="sref">mdac._dbg/a>1s0,t\t\tNUMCOLB llEro 39x 10s8" 8lass10rine" namv3.6452">6452t/10rin>10sref="d8ivers/eda8/i540eda9/i5400_edac>op p mtr->ta href="+mtr" cl class="sref">toli5400pviot/a>o*ttolii540+cp pMTR_DIMM_RAN>op p mtr->ta href="+mtr" cl class="sref">toli5400pviot/a>o*ttolii540RENT_dbg class="sref">mcmtr->ta href1079" 8lass10s" class="sref"ENODEVot/10s" >10sref="d8ivers/eda8/i5400_edac.c#7409" id3.81089" 8lass10e" class="sref"ENODEVot/10e" >10e"ef="d9ivers/eda9/i5400_edacactual_toli5400pviot/a>o*tactual_tolii540amv1cot ->ta hreu1 (#9;rr_inf="+cou=2ef=") ((1099l *cp pMTR_DIMM_RAN>op p mtr->ta href="+mtr" cl class="sref">toli5400pviot/a>o*ttolii540R"lineline (30 - 28)RENT_dbg class="sref">mcmtr->ta href1081" 8lass10s" class="sref"ENODEVot/10s" >10eref="d9ivers/eda9/i5400_edac.c#75amv3.L429511" 91ass="line" namv3.7451">7555t hrep p p pta hreActual/TOLM byte"addr=._dbgu.._dbg03u GB (0xc._dbx) 2lass="sref">mdac._dbg/a>1s0,t\t\tNUMCOLB llEro 39x 1082" 8lass10"line" namv3.7451">7258t10"li>10eref="d8ivers/eda8/i540eda9/i5400_edacactual_toli5400pviot/a>o*tactual_tolii540/1099+cp pMTR_DIMM_RANactual_toli5400pviot/a>o*tactual_tolii540ac._db 1099+cp pMTR_DIMM_RAN>op p mtr->ta href="+mtr" cl class="sref">toli5400pviot/a>o*ttolii540"l5028502"28)ENT_dbg class="sref">mcmtr->ta href1083" 8lass10s" class="sref"ENODEVot/10s" >10eref="d8ivers/eda8/i5400_edac.c#7451" id3.81084" 8lass10line" namv3.6452">6452t/10lin>10eref="d9ivers/eda9/i5400_edac>ci_read_config_word6459">6499t/mv3dci_read_config_wordes>71cot ->ta hrefop p mtr->ta href="+mtr" cl class="sref">7tttttmap_werrors" 8lass="line" 7tttttmap_werrors4ss=+cp pMTR_DIMM_RANMIR0;
8f="dria limsr>op p mtr->ta href="+mtr" cl class="sref">mir0;
mcmtr->ta href1085" 8lass10"line" namv3.7454">7754t10"li>10eref="d9ivers/eda9/i5400_edac>ci_read_config_word6459">6499t/mv3dci_read_config_wordes>71cot ->ta hrefop p mtr->ta href="+mtr" cl class="sref">7tttttmap_werrors" 8lass="line" 7tttttmap_werrors4ss=+cp pMTR_DIMM_RANMIR1;
8f="dria limsr>op p mtr->ta href="+mtr" cl class="sref">mir1;
mcmtr->ta href1086" 8lass10  class="comment">a*t/sp10  c>10eref="d8ivers/eda8/i5400_edac.c#75a6" id3.81087" 8lass10 class="comment"> */t/sp10 cl>10e7ef="d8ivers/e#75amv3.L4288" id3.7459"G8tsspa>MIR[0-1] a>os9*#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1088" 8lass10rine" namv3.6452">6452t/10rin>10eref="d8ivers/eda8/i5400_edaclimiuct ia href="+colimiui540amv1cot ->ta hre>op p mtr->ta href="+mtr" cl class="sref">mir0;
8f0fffENT_dbg class="sref">mcmtr->ta href1089" 8lass10line" namv3.7458">7157t/10lin>10eref="d8ivers/eda8/i5400_edacway0;
7899t/a>op p mtr->ta href="+mtr" cl class="sref">Rir0;
8f=ENT_dbg class="sref">mcmtr->ta href1099" 8lass10s" class="sref"ENODEVot/10s" >10s"ef="d8ivers/eda8/i5400_edacway1;
7899t/a>op p mtr->ta href="+mtr" cl class="sref">Rir0;
8f2ENT_dbg class="sref">mcmtr->ta href1091" 8lass10"line" namv3.7450">7555t10"li>10sref="d9ivers/eda9/i5400_edac.c#75amv3.L429511" 91ass="line" namv3.7451">7555t hrep p p pta hreMIR0: limiu= 0xc._dbx  WAY1=t._dbgu  WAY0=t._dbgx 2lass="sref">mdac._dbg/a>1s0,t\t\tNUMCOLB llEro 39x 1092" 8lass10s" class="sref"ENODEVot/10s" >10sref="d8ivers/eda8/i540eda9/i5400_edaclimiuct ia href="+colimiui540+cp pMTR_DIMM_RANway1;
mcmtr->ta href1093" 8lass10"ine" namv3.6452">6452t/10"in>10sref="d9i3ers/eda9/i5400_edaclimiuct ia href="+colimiui540amv1cot ->ta hre>op p mtr->ta href="+mtr" cl class="sref">mir1;
8ffffENT_dbg class="sref">mcmtr->ta href1094" 8lass10ken BIOS?;d)\nquot;10sref="d9ivers/eda9/i5400_edacway0;
7899t/a>op p mtr->ta href="+mtr" cl class="sref">Rir1;
8f=ENT_dbg class="sref">mcmtr->ta href1095" 8lass10s" class="sref"ENODEVot/10s" >10sref="d9ivers/eda9/i5400_edacway1;
7899t/a>op p mtr->ta href="+mtr" cl class="sref">Rir1;
8f2ENT_dbg class="sref">mcmtr->ta href1096" 8lass10rine" namv3.6452">6452t/10rin>10sref="d9i6ers/eda9/i5400_edac.c#75amv3.L429511" 91ass="line" namv3.7451">7555t hrep p p pta hreMIR1: limiu= 0xc._dbx  WAY1=t._dbgu  WAY0=t._dbgx 2lass="sref">mdac._dbg/a>1s0,t\t\tNUMCOLB llEro 39x 1097" 8lass10s" class="sref"ENODEVot/10s" >10sref="drivers/edac/i540eda9/i5400_edaclimiuct ia href="+colimiui540+cp pMTR_DIMM_RANway1;
mcmtr->ta href1098" 8lass10"line" namv3.7457">7255t10"li>10s8ef="d8ivers/eda8/i5400_edac.c#75a6" id3.81099" 8lass10s" class="sref"ENODEVot/10s" >10sref="d8ivers/e#75amv3.L4288" id3.7459"G8tsspa>98tsof MTR[0-3] a>os9by" namv7tttttt*#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1199" 8lass1199" lass="sref"ENODEVot/1199">1199ef="d8ivers/ine">op p p ppppppppid3.8454" 8lass="line" namv3.7454 c." 02">8f="dria limsrid3.8454" 8lass="line" namv3.7454 c.8502">8f="dria limsrne" n_PER_CHANn href="n" cl vitsne" n_PER_CHANn h4ss="">8f="dria limsrid3.8454" 8lass="line" namv3.7454 c++"NT_ine" naci" class="sref">mca>->ta 1191" 8lass119line" namv3.7450">7555t119li>119ref="d8ivers/edac/i54eda8/i5400_edac.c#7wherect ia href="+cowhere4ss=amv3.7450">7899t/aMTR0;
op p p ppppppppid3.8454" 8lass="line" namv3.7454 c.* sizeof1cot ->ta hreus" class="sf="+cou:ref=")RENT_dbg class="sref">mcmtr->ta href1192" 8lass119" class="sref"ENODEVot/119" >110ref="d9ivers/eda9/i5400_edac.c#8502" id3.91193" 8lass119ine" namv3.6452">6452t/119in>119ref="d8ivers/eda8/i54c#75amv3.L4288" id3.7459"Btttttt0>98tsof MTR/registss= *#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1194" 8lass119en BIOS?;d)\nquot;119ref="d8ivers/eda8/i54c#7451" id3.845>ci_read_config_word6459">6499t/mv3dci_read_config_wordes>71cot ->ta hrefop p mtr->ta href="+mtr" cl class="sref">7ttttt_0;
1s0,t\t\tNUMCOLB llEro 39x 1195" 8lass119" class="sref"ENODEVot/119" >119ref="d8ivers/eda8/i544444444444444444l502">8f="dria limsr>op p mtr->ta href="+mtr" cl class="sref">b0_mt*"+code>brancmMTb0_mt*="+mits class="sref"id3.8454" 8lass="line" namv3.7454 c]RENT_dbg class="sref">mcmtr->ta href1196" 8lass119ine" namv3.6452">6452t/119in>110ref="d8ivers/eda8/i5400_edac.c#75a6" id3.81197" 8lass119" class="sref"ENODEVot/119" >110ref="d9ivers/eda9/i5400_edac.c#7457".c#75amv3.L429511" 91ass="line" namv3.7451">7555t hrep p p pta hreMTR._dbg 2where=0xc._dbx B0 value=0xc._dbx 2lass="sref">mdac._dbg/a>1s0,t\t\tNUMCOLB llEro 39x 1198" 8lass119line" namv3.7457">7255t119li>110ref="d8ivers/eda8/i5400_edac.">8f="dria limsrid3.8454" 8lass="line" namv3.7454 c+cp pMTR_DIMM_RANwherect ia href="+cowhere4ss=dv3.7450">7899t/a>op p mtr->ta href="+mtr" cl class="sref">b0_mt*"+code>brancmMTb0_mt*="+mits class="sref"id3.8454" 8lass="line" namv3.7454 c]RENT_dbg class="sref">mcmtr->ta href1199" 8lass119" class="sref"ENODEVot/119" >110ref="d8ivers/eda8/i5400_edac.c#7409" id3.81119" 8lass11:en BIOS?;d)\nquot;11:eef="d8ivers/edac/i54eda8/i5400_edac.c#7>op p mtr->ta href="+mtr" cl class="sref">Rax  ;
8f="dria limsrCHANn hn_PER_bdCHAN;
mca>->ta 11:1" 8lass11s" class="sref"ENODEVot/11s" >111ref="d8ivers/edac/i5400_edac.c#7451" id3.845>op p mtr->ta href="+mtr" cl class="sref">b1_mt*"+code>brancmMTb1_mt*="+mits class="sref"id3.8454" 8lass="line" namv3.7454 c]." 02_ine" naci" class="sref">mca>->ta 11:2" 8lass11ken BIOS?;d)\nquot;111ref="d8ivers/eda8/i5400000000continue2_ine" naci" class="sref">mca>->ta 11:3" 8lass11:en BIOS?;d)\nquot;111ref="d8ivers/eda8/i54d8ivers/eda8/i5400_edac.c#7453" id3.841114" 8lass11:en BIOS?;d)\nquot;111ref="d9ivers/eda9/i5400_edac.c#7404" id3.91115" 8lass11:en BIOS?;d)\nquot;111ref="d8ivers/eda8/i54c#75amv3.L4288" id3.7459"Btttttt1>98tsof MTR/registss= *#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>11:6" 8lass11s" class="sref"ENODEVot/11s" >111ref="d8ivers/eda8/i54eda9/i5400_edac>ci_read_config_word6459">6499t/mv3dci_read_config_wordes>71cot ->ta hrefop p mtr->ta href="+mtr" cl class="sref">7ttttt_1;
1s0,t\t\tNUMCOLB llEro 39x 11:7" 8lass11line" namv3.6452">6452t/11lin>111ref="drivers/edac/i5400_edac.........l502">8f="dria limsr>op p mtr->ta href="+mtr" cl class="sref">b1_mt*"+code>brancmMTb1_mt*="+mits class="sref"id3.8454" 8lass="line" namv3.7454 c]RENT_dbg class="sref">mcmtr->ta href11:8" 8lass11"line" namv3.7457">7255t11"li>111ref="d8ivers/eda8/i5400_edac.c#7585".c#75amv3.L429511" 91ass="line" namv3.7451">7555t hrep p p pta hreMTR._dbg 2where=0xc._dbx B1 value=0xc._dbx 2lass="sref">mdac._dbg/a>1s0,t\t\tNUMCOLB llEro 39x 11:9" 8lass11ken BIOS?;d)\nquot;111ref="d8ivers/eda8/i5400_edac.">8f="dria limsrid3.8454" 8lass="line" namv3.7454 c+cp pMTR_DIMM_RANwherect ia href="+cowhere4ss=dv3.7450">7899t/a>op p mtr->ta href="+mtr" cl class="sref">b1_mt*"+code>brancmMTb1_mt*="+mits class="sref"id3.8454" 8lass="line" namv3.7454 c]RENT_dbg class="sref">mcmtr->ta href1129" 8lass11rine" namv3.6452">6452t/11rin>11rief="d9ivers/d8ivers/eda8/i5400_edac.c#7453" id3.841121" 8lass11line" namv3.7458">7157t/11lin>112ref="d8ivers/eda8/i5400_edac.c#7301" id3.81122" 8lass11s" class="sref"ENODEVot/11s" >11rref="d8ivers/c#75amv3.L4288" id3.7459"Read Attedumpv7tttttt0499t/s MTR= *#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>11r3" 8lass11s" class="sref"ENODEVot/11s" >112ref="d9i3ers/eda9/i5400_edac.c#75a3" id3.9553" 90ass="line" namv3.7453">77563 hrep p p pta hreMemory Technology"Registss=: 2lass="sref">mRENT_dbg class="sref">mcmtr->ta href1124" 8lass11s" class="sref"ENODEVot/11s" >112ref="d9ivers/eda9/i5400_edac.c#75a3" id3.9553" 90ass="line" namv3.7453">77563 hrep p p pta hrers/Btttttt0: 2lass="sref">mRENT_dbg class="sref">mcmtr->ta href1125" 8lass11"line" namv3.7454">7754t11"li>11rref="d8ivers/ine">op p p ppppppppid3.8454" 8lass="line" namv3.7454 c." 02">8f="dria limsrid3.8454" 8lass="line" namv3.7454 c.8502">8f="dria limsrne" n_PER_CHANn href="n" cl vitsne" n_PER_CHANn h4ss="">8f="dria limsrid3.8454" 8lass="line" namv3.7454 c++"NT_dbg class="sref">mcmtr->ta href1126" 8lass11s" class="sref"ENODEVot/11s" >112ref="d8ivers/eda8/i54eda9/i5400_edacde_eda_mt*"+code>brancmMTde_eda_mt*es>71cot ->ta hreid3.8454" 8lass="line" namv3.7454 c+cp pMTR_DIMM_RAN>op p mtr->ta href="+mtr" cl class="sref">b0_mt*"+code>brancmMTb0_mt*="+mits class="sref"id3.8454" 8lass="line" namv3.7454 c]RENT_dbg class="sref">mcmtr->ta href1127" 8lass11lass="sref">branc_0ot/a>11las>112ref="d9ivers/eda9/i5400_edac.c#7457" id3.91128" 8lass11s" class="sref"ENODEVot/11s" >11rref="d8ivers/eda8/i5400_edac>ci_read_config_word6459">6499t/mv3dci_read_config_wordes>71cot ->ta hrefop p mtr->ta href="+mtr" cl class="sref">7ttttt_0;
1s0,t\t\tNUMCOLB llEro 39x 1129" 8lass11"line" namv3.7498">7958t11"li>112ref="d8ivers/eda8/i5400_edac.l502">8f="dria limsr>op p mtr->ta href="+mtr" cl class="sref">b0_ambp>798nt0;
mcmtr->ta href1139" 8lass11=mci" class="sne" n1to" 11=mc>11=mef="d9ivers/eda9/i5400_edac.c#75amv3.L429511" 91ass="line" namv3.7451">7555t hrep p p pta hre\t\tAMB-Btttttt0-p>798nt0 0xc._dbx: 2lass="sref">m+cp pMTR_DIMM_RAN>op p mtr->ta href="+mtr" cl class="sref">b0_ambp>798nt0;
mcmtr->ta href1131" 8lass111 (#9;rr_infrmtaton;113ref="d9ivers/eda9/i5400_edac>ci_read_config_word6459">6499t/mv3dci_read_config_wordes>71cot ->ta hrefop p mtr->ta href="+mtr" cl class="sref">7ttttt_0;
1s0,t\t\tNUMCOLB llEro 39x 11=2" 8lass111 (#9;rr_infrmtaton;113ref="d8ivers/eda8/i5400000000l502">8f="dria limsr>op p mtr->ta href="+mtr" cl class="sref">b0_ambp>798nt1;
mcmtr->ta href1133" 8lass11trvia  (#9;get (#9;*t/sp11trv>11=ref="d9i3ers/eda9/i5400_edac.c#75amv3.L429511" 91ass="line" namv3.7451">7555t hrep p p pta hre\t\tAMB-Btttttt0-p>798nt1 0xc._dbx: 2lass="sref">m+cp pMTR_DIMM_RAN>op p mtr->ta href="+mtr" cl class="sref">b0_ambp>798nt1;
mcmtr->ta href1134" 8lass11trvia  (#9;get (#9;*t/sp11trv>113ref="d9ivers/eda9/i5400_edac.c#7404" id3.91135" 8lass11trvia  (#9;get (#9;*t/sp11trv>11=ref="d8ivers/e#75amv3.L4288" id3.7459"Only4edawe have 2v7ttttts (4 ref="+cs) *#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1136" 8lass11trvia  (#9;get (#9;*t/sp11trv>11=ref="d8ivers/eda8/i5400_edac.c#7>op p mtr->ta href="+mtr" cl class="sref">Rax  ;
8f="dria limsrCHANn hn_PER_bdCHAN;
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mca>->ta 1139" 8lass11line" namv3.7458">7157t/11lin>113ref="d8ivers/} +cse"T_ine" naci" class="sref">mca>->ta 1149" 8lass11s" class="sref"ENODEVot/11s" >114eef="d8ivers/edac/i54c#75amv3.L4288" id3.7459"Read Attedumpvv7tttttt1499t/s MTR= *#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1141" 8lass11"line" namv3.7450">7555t11"li>114ref="d8ivers/edac/i54eda9/i5400_edac.c#75a3" id3.9553" 90ass="line" namv3.7453">77563 hrep p p pta hrers/Btttttt1: 2lass="sref">mRENT_dbg class="sref">mcmtr->ta href1142" 8lass11lass="sref">branc_0ot/a>11las>114ref="d8ivers/eda8/i54ine">op p p ppppppppid3.8454" 8lass="line" namv3.7454 c." 02">8f="dria limsrid3.8454" 8lass="line" namv3.7454 c.8502">8f="dria limsrne" n_PER_CHANn href="n" cl vitsne" n_PER_CHANn h4ss="">8f="dria limsrid3.8454" 8lass="line" namv3.7454 c++"NT_dbg class="sref">mcmtr->ta href1143" 8lass11ass="sref"devfnot/a>)== 11ass>114ref="d8ivers/eda8/i54edac/i54eda9/i5400_edacde_eda_mt*"+code>brancmMTde_eda_mt*es>71cot ->ta hreid3.8454" 8lass="line" namv3.7454 c+cp pMTR_DIMM_RAN>op p mtr->ta href="+mtr" cl class="sref">b1_mt*"+code>brancmMTb1_mt*="+mits class="sref"id3.8454" 8lass="line" namv3.7454 c]RENT_dbg class="sref">mcmtr->ta href11s4" 8lass11s" class="sref"ENODEVot/11s" >11sref="d9ivers/eda9/i5400_edac.c#7404" id3.911s5" 8lass11e" class="sref"ENODEVot/11e" >114ref="d8ivers/eda8/i54c#7450" id3.845>ci_read_config_word6459">6499t/mv3dci_read_config_wordes>71cot ->ta hrefop p mtr->ta href="+mtr" cl class="sref">7ttttt_1;
1s0,t\t\tNUMCOLB llEro 39x 11s6" 8lass11s" class="sref"ENODEVot/11s" >114ref="d8ivers/eda8/i5400_edac.........l502">8f="dria limsr>op p mtr->ta href="+mtr" cl class="sref">b1_ambp>798nt0;
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1s0,t\t\tNUMCOLB llEro 39x 1159" 8lass11e" class="sref"ENODEVot/11e" >115eef="d8ivers/edac/i5400_edac.........l502">8f="dria limsr>op p mtr->ta href="+mtr" cl class="sref">b1_ambp>798nt1;
mcmtr->ta href1151" 8lass11s" class="sref"ENODEVot/11s" >115ref="d8ivers/edac/i54eda9/i5400_edac.c#75a3" id3.9553" 90ass="line" namv3.7453">77563 hrep p p pta hre\t\tAMB-Btttttt1-p>798nt1 0xc._dbx: 2lass="sref">m+NT_dbg class="sref">mcmtr->ta href1152" 8lass11line" namv3.6452">6452t/11lin>115ref="d8ivers/eda8/i5400000000400_edac.c#7585">op p mtr->ta href="+mtr" cl class="sref">b1_ambp>798nt1;
mcmtr->ta href1153" 8lass11"ine" namv3.6452">6452t/11"in>11eref="d9i3ers/d8ivers/eda8/i5400_edac.c#7453" id3.841154" 8lass11s" class="sref"ENODEVot/11s" >115ref="d9ivers/eda9/i5400_edac.c#7404" id3.91155" 8lass11line" namv3.6452">6452t/11lin>115ref="d8ivers/e#75amv3.L4288" id3.7459"Go Attedeterm645sspa>9izesof  namvne"  Atteplace p pane i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1156" 8lass11"line" namv3.745">p7859_11"li>115ref="d8rd" class8"sref">pci_________* orderly map px *#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1157" 8lass11  class="comment">a*t/sp11  c>11e7ef="d9ivers/l class="sref">calculate_>719_9ize;
mcmtr->ta href1158" 8lass11  class="comment">a*t/sp11  c>11e8ef="d8ivers/eda8/i5400_edac.c#7453" id3.841159" 8lass11  class="comment">a*t/sp11  c>115ref="d8ivers/eda8/i5400_edac.c#7409" id3.81169" 8lass11  class="comment">a*t/sp11  c>116"ef="d8ivers/eda8/i5400_edac.c#7315" id3.8455" 88ass="line" namv3.7455">71161" 8lass11 class="comment"> */t/sp11 cl>11 ref="d8rd" class8"sref">pci_rivers/ namv3init_>719s9ivers/ Initializesspa>499t/>719s499t/atable withine i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1162" 8lass11romment">>>>>>>>>*w/t/sp11rom>11 ref="d8ivers/eda8/i5400_edac*d9ivers/eda9/i5444444444444444spa>mci0control/>handlure with4spae i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1163" 8lass11lass="sref">branc_0ot/a>11las>11 ref="d8ivers/eda8/i5400_edac*d9ivers/eda9/i5444444444444444ine"essp psof memory.e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1164" 8lass11s" class="sref"ENODEVot/11s" >11 ref="d8ivers/eda8/i5400_edac*c#7315" id3.8455" 88ass="line" namv3.7455">71165" 8lass11s" class="sref"ENODEVot/11s" >116ref="d8ivers/eda8/i5400_edac*d9iverrelurn:c#7315" id3.8455" 88ass="line" namv3.7455">71166" 8lass11"line" namv3.745">p7859_11"li>116ref="d8rd" class8"sref">pci_rivers/////////0///////successef7315" id3.8455" 88ass="line" namv3.7455">71167" 8lass11 class="comment"> */t/sp11 cl>116ref="d8ivers/eda8/i5400_edac*d9ivers/eda9/i1/eda9/ino Actual/memory foutteo p pis MCef7315" id3.8455" 88ass="line" namv3.7455">71168" 8lass11 class="comment"> */t/sp11 cl>1168ef="d8ivers/eda8/i5400_edac*#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>11 9" 8lass11 class="comment"> */t/sp11 cl>11 ref="d9iverseda8/i5400_edac.c#7 namv3init_>719s p mtr->ta h namv3init_>719ses>71c#7457" id3.9509" 91asRem_ctlamv3.6459">6499t/mv3Rem_ctlamv3.ef="d199t/a>op p p iimci6459">6499t/mv3Rci>* iRtre is=aeDIMM 2">8f="=  c  cla699t/1>1179" 8lass11s" class="sref"ENODEVot/11s" >11s"ef="T_ine" naci" class="sref">mca>->ta 1171" 8lass11"line" namv3.7450">7555t11"li>11sref="d9ivers/>handle_limsrtoiot/a>o*ta hrefhandle_limsrto" clamv3.7459">7199t/a>op p p iitruct ia href="+code=i540ENT_dbg class="sref">mcmtr->ta href11s2" 8lass11lass="sref">branc_0ot/a>11las>11sref="d8ivers/>handle_limsrtoiot/a>o>719_mv3.6459">6499t/mv3>719_mv3.59">7199t/a>op p p ii>7196459">6499t/mv3>719i540ENT_dbg class="sref">mcmtr->ta href11s3" 8lass11ken BIOS?;d)\nquot;117ref="d9i3ers/eda8/i5400_edac.c#7n>719s p mtr->ta hn>719ses>7d/eda9/i5400_edacf"=i540_counuct ia href="+cof"=i540_counui540ENT_dbg class="sref">mcmtr->ta href11s4" 8lass11ef">brancmap_welErorot/a11ef">11sref="d8ivers/eda9/i5400_edac.c#7Rax_>719s p mtr->ta hRax_>719si540ENT_dbg class="sref">mcmtr->ta href11s5" 8lass11s" class="sref"ENODEVot/11s" >11sref="d9ivers/eda9/i5400_edac.c#7Rt*"+code>brancmMTmt*="+mENT_dbg class="sref">mcmtr->ta href11s6" 8lass11line" namv3.6452">6452t/11lin>117ref="d9ivers/eda9/i5400_edac.c#7iize_mb" 8lass="line" nize_mb="+mENT_dbg class="sref">mcmtr->ta href11s7" 8lass11"ine" namv3.6452">6452t/11"in>11s7ef="d9ivers/eda9/eda9/i5400_edacf"=i540ct ia href="+cof"=i540es>7d/eda9/i5400_edacnamv" 8lass="line" namv="+mENT_dbg class="sref">mcmtr->ta href11s8" 8lass11rine" namv3.6452">6452t/11rin>1178ef="d8ivers/eda8/i5400_edac.c#75a6" id3.81179" 8lass11s" class="sref"ENODEVot/11s" >117ref="d8ivers/eda8/i5400_edac>ruct ia href="+code=i540amv3.7450">7899t/amci6459">6499t/mv3Rci>* itr" cl class="sref">de=amv3.6459">6499t/mv3de=amv3.4ss="line" naci" class="sref">mca>->ta 1189" 8lass11e" class="sref"ENODEVot/11e" >118"ef="d9ivers/eda9/i5400_edac.c#7457" id3.91181" 8lass11s" class="sref"ENODEVot/11s" >11eref="d9ivers/eda9/i5400_edacf"=i540_counuct ia href="+cof"=i540_counui540amv3.7450">7899t/a>op p mtr->ta href="+mtr" cl class="sref">Rax  ;
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mca>->ta 1183" 8lass11s" class="sref"ENODEVot/11s" >11eref="d8ivers/eda8/i5400_edac.c#7451" id3.81184" 8lass11line" namv3.6452">6452t/11lin>11eref="d9ivers/eda9/i5400_edacn>719s p mtr->ta hn>719ses>7." 02_ine" naci" class="sref">mca>->ta 1185" 8lass11"line" namv3.7454">7754t11"li>11eref="_ine" naci" class="sref">mca>->ta 1186" 8lass11  class="comment">a*t/sp11  c>118ref="d9i6ers/e8ivers/eda8/i5400_edac.c#7315" id3.8455" 88ass="line" namv3.7455">71187" 8lass11 class="comment"> */t/sp11 cl>118ref="d8ivers/eda8/i5400_edaccccccccc* FIXME:rremove  reftr" c>719_mv3.[namv][f"=i540] Atteusesspa>3c#7315" id3.8455" 88ass="line" namv3.7455">71188" 8lass11rine" namv3.6452">6452t/11rin>1188ef="d8ivers/eda8/i5400_edaccccccccc* layss= here.e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1189" 8lass11line" namv3.7458">7157t/11lin>1189ef="d8ivers/eda8/i5400_edaccccccccc*#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1199" 8lass11s" class="sref"ENODEVot/11s" >1199ef="d8ivers/ine">op p p ppppppppf"=i540ct ia href="+cof"=i540es>7." 02">8f="dria limsrf"=i540ct ia href="+cof"=i540es>7.8502">8f="dria limsrmci6459">6499t/mv3Rci>* itr" cl class="sref">layss=6459">6499t/mv3layss=="+mi0].eda9/i5400_edac9ize;
6499t/mv3Rci>* itr" cl class="sref">layss=6459">6499t/mv3layss=="+mi1].eda9/i5400_edac9ize;
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8f="dria limsrid3." 8lass="line" namv="+m++"NT_ine" naci" class="sref">mca>->ta 1193" 8lass11"ine" namv3.6452">6452t/11"in>119ref="d8ivers/eda8/i54edac/i54eda9/i5400_edacRt*"+code>brancmMTmt*="+mamv3.7450">7899t/adeterm645_mt*"+code>brancmMTdeterm645_mt*es>71cot ->ta hrefop p mtr->ta href="+md/eda9/i5400_edacnamv" 8lass="line" namv="+md/eda9/i5400_edacf"=i540ct ia href="+cof"=i540es>7RENT_dbg class="sref">mcmtr->ta href1194" 8lass11ken BIOS?;d)\nquot;119ref="d9ivers/eda9/i5400_edac.c#7404" id3.91195" 8lass11s" class="sref"ENODEVot/11s" >119ref="d8ivers/eda8/i5444444444e#75amv3.L4288" id3.7459"ifino ne" neo p pis namv,0continuec*#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1196" 8lass11rine" namv3.6452">6452t/11rin>119ref="d8ivers/eda8/i5400_edac.eda8!eda9/i5400_edacMTR_ne" n_PRESENTct ia href="+coMTR_ne" n_PRESENTes>71cot ->ta hreRt*"+code>brancmMTmt*="+m)Rtre is=aeDIMM 2">8f="=  c  cla699t/1>1197" 8lass11s" class="sref"ENODEVot/11s" >11sref="drivers/edac/i540000000000000000continue2_ine" naci" class="sref">mca>->ta 1198" 8lass11"line" namv3.7457">7255t11"li>11s8ef="d8ivers/eda8/i5400_edac.c#75a6" id3.81199" 8lass11s" class="sref"ENODEVot/11s" >119ref="d8ivers/eda8/i5400_edac.99t/a>op p p ii>7196459">6499t/mv3>719i540amv3.7450">7899t/aEDAC_ne" _PTR6459">6499t/mv3EDAC_ne" _PTRes>71cot ->ta hreRci6459">6499t/mv3Rci>* itr" cl class="sref">layss=6459">6499t/mv3layss=="+md/eda9/i5400_edacmci6459">6499t/mv3Rci>* itr" cl class="sref">>719s p mtr->ta h>719ses>7d/eda9/i5400_edacmci6459">6499t/mv3Rci>* itr" cl class="sref">n_layss=6459">6499t/mv3n_layss=4ss=dac._dbg/a>1s0,t\t\tNUMCOLB llEro 39x 1299" 8lass1299" lass="sref"ENODEVot/1299">120eef="d8ivers/edac/i5400_edac.........0_edac.99t/a>op p p iif"=i540ct ia href="+cof"=i540es>7./ 2d/eda9/i5400_edacf"=i540ct ia href="+cof"=i540es>7ac._db 2d/eda9/i5400_edacnamv" 8lass="line" namv="+mRENT_dbg class="sref">mcmtr->ta href1291" 8lass129line" namv3.7450">7555t129li>120ref="d8ivers/eda8/i5400_edac.c#7301" id3.81292" 8lass129" class="sref"ENODEVot/129" >120ref="d8ivers/eda8/i5400000000/i5400_edac.c#7iize_mb" 8lass="line" nize_mb="+mamvv3.7450">7899t/a>op p mtr->ta href="+mtr" cl class="sref">>719_mv3.6459">6499t/mv3>719_mv3.59">its class="sref"id3." 8lass="line" namv="+m]its class="sref"f"=i540ct ia href="+cof"=i540es>7].eda9/i5400_edacmegabytes p mtr->ta hRegabyteses>72_ine" naci" class="sref">mca>->ta 1293" 8lass129ine" namv3.6452">6452t/129in>120ref="d8ivers/eda8/i5400_edac.c#7451" id3.81294" 8lass129en BIOS?;d)\nquot;129ref="d8ivers/eda8/i5400000000/i5400_edac.c#7.c#75a3" id3.9553" 90ass="line" namv3.7453">77563 hrep p p pta hre>719 (7tttttt._dbg 2f"=i540t._dbg 2namvt._dbg ):t._dbg .._dbg03d GB 2lass="sref">m+NT_dbg class="sref">mcmtr->ta href1295" 8lass129" class="sref"ENODEVot/129" >129ref="d8ivers/eda8/i544444444444444444.99t/a>op p p iif"=i540ct ia href="+cof"=i540es>7./ 2d/eda9/i5400_edacf"=i540ct ia href="+cof"=i540es>7ac._db 2d/eda9/i5400_edacnamv" 8lass="line" namv="+m+NT_dbg class="sref">mcmtr->ta href1296" 8lass129ine" namv3.6452">6452t/129in>120ref="d8ivers/eda8/i5400_edac.........0/i5400_edac.c#7iize_mb" 8lass="line" nize_mb="+ma/ 1099+cp pMTR_DIMM_RANiize_mb" 8lass="line" nize_mb="+mac._db 1099RENT_dbg class="sref">mcmtr->ta href1297" 8lass129" class="sref"ENODEVot/129" >120ref="d9ivers/eda9/i5400_edac.c#7457" id3.91298" 8lass129line" namv3.7457">7255t129li>120ref="d8ivers/eda8/i5400_edac.99t/a>op p p ii>7196459">6499t/mv3>719i540tr" cl class="sref">nr_pages p mtr->ta hnr_pagesi540amv3.7450">7899t/aiize_mb" 8lass="line" nize_mb="+mac5028502"8ENT_dbg class="sref">mcmtr->ta href1299" 8lass129" class="sref"ENODEVot/129" >120ref="d8ivers/eda8/i5400_edac.99t/a>op p p ii>7196459">6499t/mv3>719i540tr" cl class="sref">grain6459">6499t/mv3graini540amv8ENT_dbg class="sref">mcmtr->ta href1219" 8lass12:en BIOS?;d)\nquot;12:eef="d8ivers/edac/i5400_edac.99t/a>op p p ii>7196459">6499t/mv3>719i540tr" cl class="sref">dtype;
7899t/aMTR_nRAM_WIDTN;
brancmMTmt*="+m) ?">8f="dria limsrnEV_X8"+code>brancmMTnEV_X8i540a:">8f="dria limsrnEV_X4"+code>brancmMTnEV_X4es>72_ine" naci" class="sref">mca>->ta 12:1" 8lass12s" class="sref"ENODEVot/12s" >121ref="d8ivers/edac/i5400_edac.c#7451" id3.845>7196459">6499t/mv3>719i540tr" cl class="sref">mtype;
7899t/aMEM_FB_DDR (#9;rr_inf="+coMEM_FB_DDR es>72_ine" naci" class="sref">mca>->ta 12:2" 8lass12ken BIOS?;d)\nquot;121ref="d8ivers/eda8/i5400000000e8ivers/eda8/i5400_edac.c#7315" id3.8455" 88ass="line" namv3.7455">712:3" 8lass12:en BIOS?;d)\nquot;121ref="d8ivers/eda8/i5400_edaccccccccccccccccccccccccc* The eccc mef"=iism is SDDC (aka SECC), withc#7315" id3.8455" 88ass="line" namv3.7455">712:4" 8lass12:en BIOS?;d)\nquot;121ref="d8ivers/eda8/i5400_edaccccccccccccccccccccccccc* is nimilar to Chipkill.e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1215" 8lass12:en BIOS?;d)\nquot;121ref="d8ivers/eda8/i5400_edaccccccccccccccccccccccccc*#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>12:6" 8lass12s" class="sref"ENODEVot/12s" >121ref="d8ivers/eda8/i5400_edac.c#7451" id3.845>7196459">6499t/mv3>719i540tr" cl class="sref">s="limef" id3.9553" 90ass="limef"i540amv3.7450">7899t/aMTR_nRAM_WIDTN;
brancmMTmt*="+m) ?tre is=aeDIMM 2">8f="=  c  cla699t/1>12:7" 8lass12line" namv3.6452">6452t/12lin>121ref="drivers/edac/i5400_edac.........5400_edac.c#7451" id3.845EDAC_S8ECD8ED6459">6499t/mv3EDAC_S8ECD8EDi540a:">8f="dria limsrEDAC_S4ECD4ED6459">6499t/mv3EDAC_S4ECD4EDes>72_ine" naci" class="sref">mca>->ta 12:8" 8lass12"line" namv3.7457">7255t12"li>121ref="d8ivers/eda8/i5400_edac.c#7451" id3.845n>719s p mtr->ta hn>719ses>7++2_ine" naci" class="sref">mca>->ta 12:9" 8lass12ken BIOS?;d)\nquot;121ref="d8ivers/eda8/i54d8ivers/eda8/i5400_edac.c#7453" id3.841229" 8lass12rine" namv3.6452">6452t/12rin>12rief="d9ivers/d8ivers/eda8/i5400_edac.c#7453" id3.841221" 8lass12line" namv3.7458">7157t/12lin>122ref="d8ivers/eda8/i5400_edac.c#7301" id3.81222" 8lass12s" class="sref"ENODEVot/12s" >12rref="d8ivers/c#75amv3.L4288" id3.7459e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>12r3" 8lass12s" class="sref"ENODEVot/12s" >122ref="d8ivers/eda8/i5400_edaccccccccc* When just one/memory is provided, it should be at location (0,0,0).e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1224" 8lass12s" class="sref"ENODEVot/12s" >122ref="d8ivers/eda8/i5400_edaccccccccc* With4sutttsp ple-ne"  mef",sspa>SDCC algorithm degrades to SECDEC+.e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1225" 8lass12"line" namv3.7454">7754t12"li>122ref="d8ivers/eda8/i5400_edaccccccccc*#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1226" 8lass12s" class="sref"ENODEVot/12s" >122ref="d8ivers/eda8/i5400_edac.c#7n>719s p mtr->ta hn>719ses>7."= 1Rtre is=aeDIMM 2">8f="=  c  cla699t/1>1227" 8lass12lass="sref">branc_0ot/a>12las>122ref="d9ivers/eda9/i5400_edac.c#7457"mci6459">6499t/mv3Rci>* itr" cl class="sref">>719s p mtr->ta h>719ses>7[0]tr" cl class="sref">s="limef" id3.9553" 90ass="limef"i540amv3.7450">7899t/aEDAC_SECDED6459">6499t/mv3EDAC_SECDEDes>72_ine" naci" class="sref">mca>->ta 1228" 8lass12s" class="sref"ENODEVot/12s" >1228ef="d8ivers/eda8/i5400_edac.c#75a6" id3.81229" 8lass12"line" namv3.7498">7958t12"li>122ref="d8ivers/relurna8/i5400_edac.c#7n>719s p mtr->ta hn>719ses>7."= 9RENT_dbg class="sref">mcmtr->ta href1239" 8lass12=mci" class="sne" n1to" 12=mc>12=mef="d8ivers/eda8/i5400_edac.c#7453" id3.841231" 8lass121 (#9;rr_infrmtaton;123ref="d8ivers/eda8/i5400_edac.c#7301" id3.812=2" 8lass121 (#9;rr_infrmtaton;123ref="d8ivers/eda8/i5400_eda59e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1233" 8lass12trvia  (#9;get (#9;*t/sp12trv>123ref="d8ivers/eda8/i5400_edac*d9iver c  clanable_error_reportp pe i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1234" 8lass12trvia  (#9;get (#9;*t/sp12trv>123ref="d8ivers/eda8/i5400_edac*ivers/eda8/i5400_edac.Turnao p pe/memory reportp p fealuressof  pe/hardwarae i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1235" 8lass12trvia  (#9;get (#9;*t/sp12trv>123ref="d8ivers/eda8/i5400_edac*#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1236" 8lass12trvia  (#9;get (#9;*t/sp12trv>12=ref="d9iversvoide_limsrtoiot/a>o*ta hranable_error_reportp p p mtr->ta h c  clanable_error_reportp pe >71c#7457" id3.9509" 91asRem_ctlamv3.6459">6499t/mv3Rem_ctlamv3.ef="d199t/a>op p p iimci6459">6499t/mv3Rci>* iRtre is=aeDIMM 2">8f="=  c  cla699t/1>1237" 8lass12 class="comment"> */t/sp12 cl>12=ref="T_ine" naci" class="sref">mca>->ta 1238" 8lass12romment">>>>>>>>>*w/t/sp12rom>123ref="d8ivers/>handle_limsrtoiot/a>o*ta hrefhandle_limsrto" clamv3.7459">7199t/a>op p p iitruct ia href="+code=i540ENT_dbg class="sref">mcmtr->ta href1239" 8lass12line" namv3.7458">7157t/12lin>123ref="d8ivers/eda8/i5400_edacu1 (#9;rr_inf="+cou=2ef="/eda8/i5400_edacfbd_error_mask(#9;rr_inf="+cofbd_error_maski540ENT_dbg class="sref">mcmtr->ta href1249" 8lass12s" class="sref"ENODEVot/12s" >124"ef="d9ivers/eda9/i5400_edac.c#7457" id3.91241" 8lass12"line" namv3.7450">7555t12"li>124ref="d9ivers/eda9/i5400_edac>ruct ia href="+code=i540amv3.7450">7899t/amci6459">6499t/mv3Rci>* itr" cl class="sref">de=amv3.6459">6499t/mv3de=amv3.4ss="line" naci" class="sref">mca>->ta 1242" 8lass12lass="sref">branc_0ot/a>12las>124ref="d9ivers/eda9/i5400_edac.c#8502" id3.91243" 8lass12ass="sref"devfnot/a>)== 12ass>124ref="d8ivers/c#75amv3.L4288" id3.7459"Read  pe/FBD Error Mask"Registssc*#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>12s4" 8lass12s" class="sref"ENODEVot/12s" >124ref="d9ivers/eda9/i5400_edac>ci_read_config_dword6459">6499t/mv3dci_read_config_dwordes>71cot ->ta hrefop p mtr->ta href="+mtr" cl class="sref">7tttttmap_werrors" 8lass="line" 7tttttmap_werrors4ss=+cp pMTR_DIMM_RANEMASK_FBD6459">6499t/mv3EMASK_FBD="+m+NT_dbg class="sref">mcmtr->ta href12s5" 8lass12e" class="sref"ENODEVot/12e" >124ref="d8ivers/eda8/i5444444444l502">8f="dria limsrfbd_error_mask(#9;rr_inf="+cofbd_error_maski540RENT_dbg class="sref">mcmtr->ta href12s6" 8lass12s" class="sref"ENODEVot/12s" >124ref="d8ivers/eda8/i5400_edac.c#75a6" id3.812s7" 8lass12lass="sref">branc_0ot/a>12las>124ref="d9ivers/c#75amv3.L4288" id3.7459"Enable with a>499t/0499t/c*#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>12s8" 8lass12ass="sref"devfnot/a>)== 12ass>124ref="d8ivers/eda8/i5400_edacfbd_error_mask(#9;rr_inf="+cofbd_error_maski5404l502"= ~1cot ->ta hreENABLE_EMASK_ALhref="n" cl vitsENABLE_EMASK_ALhi540RENT_dbg class="sref">mcmtr->ta href12s9" 8lass12s" class="sref"ENODEVot/12s" >124ref="d8ivers/eda8/i5400_edac.c#7409" id3.81259" 8lass12e" class="sref"ENODEVot/12e" >125mef="d9ivers/eda9/i5400_edacdci_write_config_dword6459">6499t/mv3dci_write_config_dwordes>71cot ->ta hrefop p mtr->ta href="+mtr" cl class="sref">7tttttmap_werrors" 8lass="line" 7tttttmap_werrors4ss=+cp pMTR_DIMM_RANEMASK_FBD6459">6499t/mv3EMASK_FBD="+m+NT_dbg class="sref">mcmtr->ta href1251" 8lass12s" class="sref"ENODEVot/12s" >125ref="d8ivers/edac/i54d8ivers/eda8/i5400_edacfbd_error_mask(#9;rr_inf="+cofbd_error_maski540RENT_dbg class="sref">mcmtr->ta href1252" 8lass12line" namv3.6452">6452t/12lin>125ref="d8ivers/eda8/i5400_edac.c#7453" id3.841253" 8lass12"ine" namv3.6452">6452t/12"in>125ref="d8ivers/eda8/i5400_edac.c#7451" id3.81254" 8lass12s" class="sref"ENODEVot/12s" >125ref="d8ivers/eda8/i5400_eda59e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1255" 8lass12line" namv3.6452">6452t/12lin>125ref="d8ivers/eda8/i5400_edac*d9iverclamv3.robe1/edaProbe4ine"ONE ind9incesof devicesto see/edait isef7315" id3.8455" 88ass="line" namv3.7455">71256" 8lass12"line" namv3.745">p7859_12"li>125ref="d8rd" class8"sref">pci_*ivers/eda8/i5400_edac.p>798nt.e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1257" 8lass12  class="comment">a*t/sp12  c>125ref="d8ivers/eda8/i5400_edac*d9iverrelurn:c#7315" id3.8455" 88ass="line" namv3.7455">71258" 8lass12  class="comment">a*t/sp12  c>1258ef="d8ivers/eda8/i5400_edac*a8/i5400_edac.04ine"FOUND a>devicec#7315" id3.8455" 88ass="line" namv3.7455">71259" 8lass12  class="comment">a*t/sp12  c>1259ef="d8ivers/eda8/i5400_edac*a8/i5400_edac.8502"04ine"error cef"i57315" id3.8455" 88ass="line" namv3.7455">71269" 8lass12  class="comment">a*t/sp12  c>126"ef="d8ivers/eda8/i5400_edac*#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1261" 8lass12 class="comment"> */t/sp12 cl>12 ref="d9iverseda8/i5400_edac.c#7 namv3.robe1andle_limsrto" clamv3.robe1e >71c#7457" id3.9509" 91asdci_dev6459">6499t/mv3dci_dev59">7199t/a>op p p iitdev6459">6499t/mv3ddev59">,seda8/i5400_edac.c#7dev_idx p mtr->ta h>ev_idx>* iRtre is=aeDIMM 2">8f="=  c  cla699t/1>1262" 8lass12romment">>>>>>>>>*w/t/sp12rom>12 ref="T_ine" naci" class="sref">mca>->ta 1263" 8lass12lass="sref">branc_0ot/a>12las>126ref="d8ivers/c#7457" id3.9509" 91asRem_ctlamv3.6459">6499t/mv3Rem_ctlamv3.ef="d199t/a>op p p iimci6459">6499t/mv3Rci>* iENT_dbg class="sref">mcmtr->ta href1264" 8lass12s" class="sref"ENODEVot/12s" >1264ef="d8ivers/c#7457" id3.9509" 91as*ta hrefhandle_limsrto" clamv3.7459">7199t/a>op p p iitruct ia href="+code=i540ENT_dbg class="sref">mcmtr->ta href1265" 8lass12s" class="sref"ENODEVot/12s" >1265ef="d8ivers/c#7457" id3.9509" 91ass="limc_layss id3.9553" 90ass="limc_layssef="/eda8/i5400_edaclayss=6459">6499t/mv3layss=="+mi3]ENT_dbg class="sref">mcmtr->ta href1266" 8lass12"line" namv3.745">p7859_12"li>126ref="d8ivers/eda8/i5400_edac.c#75a6" id3.81267" 8lass12 class="comment"> */t/sp12 cl>1267ef="d9ivers/eda8/i5400_edac.c#7dev_idx p mtr->ta h>ev_idx>* i r" cmv3.7450">7899t/aARRAY_SIZE p mtr->ta hARRAY_SIZEes>71cot ->ta hre.c#75a>evs p mtr->ta h namv3>evs>* iRRtre is=aeDIMM 2">8f="=  c  cla699t/1>1268" 8lass12 class="comment"> */t/sp12 cl>126ref="d8ivers/eda8/i54relurna-p pMTR_DIMM_RANEINVAhref="n" cl vitsEINVAhi540ENT_dbg class="sref">mcmtr->ta href1269" 8lass12 class="comment"> */t/sp12 cl>126ref="d8ivers/eda8/i5400_edac.c#7409" id3.81279" 8lass12s" class="sref"ENODEVot/12s" >127mef="d9ivers/eda9/i5400_edac.c#75amv3.L429511" 91ass="line" namv0.7453">77563 hrep p p pta hreMC: ddev busac._dbu>dev=0xc._dbx fn=0xc._dbx 2lass="sref">mdac._dbg/a>1s0,t\t\tNUMCOLB llEro 39x 1271" 8lass12"line" namv3.7450">7555t12"li>127ref="d8ivers/edac/i54d99t/a>op p p iitdev6459">6499t/mv3ddev59">tr" cl class="sref">7us" 8lass="line" 7usi540tr" cl class="sref">numbss id3.9553" 90asnumbss="+m+NT_dbg class="sref">mcmtr->ta href12s2" 8lass12lass="sref">branc_0ot/a>12las>127ref="d8ivers/eda8/i540l class="sref">PCI_SLOTct ia href="+coPCI_SLOTes>71cot ->ta hrefdev6459">6499t/mv3ddev59">tr" cl class="sref">devfn6459">6499t/mv3devfn>* iR+cp pMTR_DIMM_RANPCI_FUNCct ia href="+coPCI_FUNCes>71cot ->ta hrefdev6459">6499t/mv3ddev59">tr" cl class="sref">devfn6459">6499t/mv3devfn>* iRRENT_dbg class="sref">mcmtr->ta href12s3" 8lass12ken BIOS?;d)\nquot;127ref="d8ivers/eda8/i5400_edac.c#7451" id3.812s4" 8lass12ef">brancmap_welErorot/a12ef">12sref="d8ivers/c#75amv3.L4288" id3.7459"Wesonly4are lookp p for func"04of  pe/98ts*#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>12s5" 8lass12s" class="sref"ENODEVot/12s" >12sref="d9ivers/eda8/i5400_edac.c#7PCI_FUNCct ia href="+coPCI_FUNCes>71cot ->ta hrefdev6459">6499t/mv3ddev59">tr" cl class="sref">devfn6459">6499t/mv3devfn>* iR != 9Rtre is=aeDIMM 2">8f="=  c  cla699t/1>12s6" 8lass12line" namv3.6452">6452t/12lin>127ref="d8ivers/eda8/i54relurna-p pMTR_DIMM_RANENODEVref="n" cl vitsENODEVi540ENT_dbg class="sref">mcmtr->ta href12s7" 8lass12"ine" namv3.6452">6452t/12"in>127ref="d9ivers/eda9/i5400_edac.c#7457" id3.912s8" 8lass12rine" namv3.6452">6452t/12rin>1278ef="d8ivers/c#75amv3.L4288" id3.7459e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>12s9" 8lass12s" class="sref"ENODEVot/12s" >1279ef="d8ivers/eda8/i5400_edaccccccccc* allocate a>new MC0control/>handluree i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1289" 8lass12e" class="sref"ENODEVot/12e" >128"ef="d8ivers/eda8/i5400_edaccccccccc*e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1281" 8lass12s" class="sref"ENODEVot/12s" >128ref="d8rd" class8"sref">pci_cccccccc* Tpis IMM 2">euses  pe/ne"  namvtasacass="csrowta hrerAtte pe/resvtasacass="c"=i540cass=".e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1282" 8lass12"line" namv3.7451">7258t12"li>128ref="d8ivers/eda8/i5400_edaccccccccc*#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1283" 8lass12s" class="sref"ENODEVot/12s" >128ref="d9i3ers/eda9/i5400_edaclayss=6459">6499t/mv3layss=="+mi0].eda9/i5400_edactype;
7899t/aEDAC_MC_LAYER_bdCHAN;
mcmtr->ta href1284" 8lass12line" namv3.6452">6452t/12lin>12eref="d9ivers/eda9/i5400_edaclayss=6459">6499t/mv3layss=="+mi0].eda9/i5400_edac9ize;
7899t/aMAX_bdCHANES;
mcmtr->ta href1285" 8lass12"line" namv3.7454">7754t12"li>1285ef="d9ivers/eda9/i5400_edaclayss=6459">6499t/mv3layss=="+mi0].eda9/i5400_edacis_virt_csrow p mtr->ta h s_virt_csrowes>7 mv3.7450">7899t/afalse;
mcmtr->ta href1286" 8lass12  class="comment">a*t/sp12  c>128ref="d9i6ers/eda9/i5400_edaclayss=6459">6499t/mv3layss=="+mi1].eda9/i5400_edactype;
7899t/aEDAC_MC_LAYER_CHANn href="n" cl vitsEDAC_MC_LAYER_CHANn hi540ENT_dbg class="sref">mcmtr->ta href1287" 8lass12 class="comment"> */t/sp12 cl>1287ef="d9ivers/l class="sref">layss=6459">6499t/mv3layss=="+mi1].eda9/i5400_edac9ize;
7899t/aCHANn hn_PER_bdCHAN;
mcmtr->ta href1288" 8lass12rine" namv3.6452">6452t/12rin>128ref="d8ivers/eda8/i5400_edaclayss=6459">6499t/mv3layss=="+mi1].eda9/i5400_edacis_virt_csrow p mtr->ta h s_virt_csrowes>7 mv3.7450">7899t/afalse;
mcmtr->ta href1289" 8lass12line" namv3.7458">7157t/12lin>128ref="d8ivers/eda8/i5400_edaclayss=6459">6499t/mv3layss=="+mi2].eda9/i5400_edactype;
7899t/aEDAC_MC_LAYER_SLOTct ia href="+coEDAC_MC_LAYER_SLOTi540ENT_dbg class="sref">mcmtr->ta href1299" 8lass12s" class="sref"ENODEVot/12s" >129mef="d9ivers/eda9/i5400_edaclayss=6459">6499t/mv3layss=="+mi2].eda9/i5400_edac9ize;
7899t/ane" n_PER_CHANn href="n" cl vitsne" n_PER_CHANn h4ss="NT_dbg class="sref">mcmtr->ta href1291" 8lass12"line" namv3.7450">7555t12"li>129ref="d9ivers/eda9/i5400_edaclayss=6459">6499t/mv3layss=="+mi2].eda9/i5400_edacis_virt_csrow p mtr->ta h s_virt_csrowes>7 mv3.7450">7899t/ahane;
mcmtr->ta href1292" 8lass12s" class="sref"ENODEVot/12s" >1292ef="d9ivers/eda9/i5400_edacRci6459">6499t/mv3Rci>* i mv3.7450">7899t/as="limc_alloc id3.9553" 90ass="limc_alloc namv0.74.7450">7899t/aARRAY_SIZE p mtr->ta hARRAY_SIZEes>71cot ->ta hrelayss=6459">6499t/mv3layss=="+mR+cp pMTR_DIMM_RANlayss=6459">6499t/mv3layss=="+md/9izeof(199t/a>op p p iitruct ia href="+code=i540RRENT_dbg class="sref">mcmtr->ta href1293" 8lass12"ine" namv3.6452">6452t/12"in>129ref="d8ivers/eda8/i5400_edac.c#7Rci6459">6499t/mv3Rci>* i mmv3.7450">7899t/aNULhref="n" cl vitsNULh>* iRtre is=aeDIMM 2">8f="=  c  cla699t/1>1294" 8lass12ken BIOS?;d)\nquot;129ref="d8ivers/eda8/i54relurna-p pMTR_DIMM_RANENOMEMref="n" cl vitsENOMEM4ss="NT_dbg class="sref">mcmtr->ta href1295" 8lass12s" class="sref"ENODEVot/12s" >129ref="_ine" naci" class="sref">mca>->ta 1296" 8lass12rine" namv3.6452">6452t/12rin>129ref="d9i6ers/eda9/i5400_edac.c#75amv3.L429511" 91ass="line" namv0.7453">77563 hrep p p pta hreMC: mci0=ac._dbp 2lass="sref">m+cp pMTR_DIMM_RANmci6459">6499t/mv3Rci>* iR"NT_dbg class="sref">mcmtr->ta href1297" 8lass12s" class="sref"ENODEVot/12s" >129ref="d9ivers/eda9/i5400_edac.c#7457" id3.91298" 8lass12"line" namv3.7457">7255t12"li>129ref="d8ivers/eda8/i5400_edacmci6459">6499t/mv3Rci>* itr" cl class="sref">ddev6459">6499t/mv3ddev59">0=ac502">8f="dria limsr>dev6459">6499t/mv3ddev59">tr" cl class="sref">dev6459">6499t/mv3dev4ss="/c#75amv3.L4288" id3.7459"record ptr sto  pe/generic devices*#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1299" 8lass12s" class="sref"ENODEVot/12s" >129ref="d8ivers/eda8/i5400_edac.c#7409" id3.81399" 8lass1399" lass="sref"ENODEVot/1399">130mef="d9ivers/eda9/i5400_edacdruct ia href="+code=i540amv3.7450">7899t/amci6459">6499t/mv3Rci>* itr" cl class="sref">de=amv3.6459">6499t/mv3de=amv3.4ss="line" naci" class="sref">mca>->ta 1391" 8lass139line" namv3.7450">7555t139li>130ref="d9ivers/eda9/i5400_edac>ruct ia href="+code=i540tr" cl class="sref">system_ine"ess;
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7899t/ane" n_PER_CHANn href="n" cl vitsne" n_PER_CHANn h4ss="NT_dbg class="sref">mcmtr->ta href1394" 8lass139en BIOS?;d)\nquot;130ref="d9ivers/eda9/i5400_edac.c#7404" id3.91395" 8lass139" class="sref"ENODEVot/139" >139ref="d8ivers/e#75amv3.L4288" id3.7459"499t/get499t/atpe/pci0devicesawe wantsto >798rve4ine"our uses*#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1396" 8lass139ine" namv3.6452">6452t/139in>130ref="d8ivers/eda8/i5400_edac.c#7 c  clget_devices p mtr->ta h namv3get_deviceses>71cot ->ta hremci6459">6499t/mv3Rci>* i+cp pMTR_DIMM_RANdev_idx p mtr->ta h>ev_idx>* iRRtre is=aeDIMM 2">8f="=  c  cla699t/1>1397" 8lass139" class="sref"ENODEVot/139" >130ref="d9ivers/eda9/i54goto 3.7450">7899t/afail0;
mcmtr->ta href1398" 8lass139line" namv3.7457">7255t139li>1308ef="d8ivers/eda8/i5400_edac.c#75a6" id3.81399" 8lass139" class="sref"ENODEVot/139" >130ref="d8ivers/e#75amv3.L4288" id3.7459"Timesto get 98riou= *#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1319" 8lass13:en BIOS?;d)\nquot;131mef="d9ivers/eda9/i5400_edac namv3get_mc_regs p mtr->ta h namv3get_mc_regses>71cot ->ta hremci6459">6499t/mv3Rci>* i)"/c#75amv3.L4288" id3.7459"rep peve  pe/hardwara"registss= *#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1311" 8lass13s" class="sref"ENODEVot/13s" >131ref="d8ivers/eda8/i5400_edac.c#7301" id3.813:2" 8lass13ken BIOS?;d)\nquot;1312ef="d9ivers/eda9/i5400_edacRci6459">6499t/mv3Rci>* itr" cl class="sref">Rc_idx p mtr->ta hRc_idx4ss=amv02_ine" naci" class="sref">mca>->ta 13:3" 8lass13:en BIOS?;d)\nquot;131ref="d9i3ers/eda9/i5400_edacRci6459">6499t/mv3Rci>* itr" cl class="sref">Rtype_cap6459">6499t/mv3Rtype_cap4ss=.mv3.7450">7899t/aMEM_FLAG_FB_DDR (#9;rr_inf="+coMEM_FLAG_FB_DDR 4ss="NT_dbg class="sref">mcmtr->ta href13:4" 8lass13:en BIOS?;d)\nquot;131ref="d9ivers/eda9/i5400_edacRci6459">6499t/mv3Rci>* itr" cl class="sref">s="lictlacap6459">6499t/mv3s="lictlacapi540amv3.7450">7899t/aEDAC_FLAG_NONE p mtr->ta hEDAC_FLAG_NONE4ss="NT_dbg class="sref">mcmtr->ta href13:5" 8lass13:en BIOS?;d)\nquot;1315ef="d9ivers/eda9/i5400_edacRci6459">6499t/mv3Rci>* itr" cl class="sref">s="licap6459">6499t/mv3s="licapi540amv3.7450">7899t/aEDAC_FLAG_NONE p mtr->ta hEDAC_FLAG_NONE4ss="NT_dbg class="sref">mcmtr->ta href13:6" 8lass13s" class="sref"ENODEVot/13s" >131ref="d9i6ers/eda9/i5400_edacRci6459">6499t/mv3Rci>* itr" cl class="sref">Rod_ODEV6459">6499t/mv3Rod_ODEVi540amv353">77563 hrep p p pta hretr->ta hrlass="sref">m"NT_dbg class="sref">mcmtr->ta href13:7" 8lass13line" namv3.6452">6452t/13lin>1317ef="d9ivers/l class="sref">Rci6459">6499t/mv3Rci>* itr" cl class="sref">Rod_vss id3.9553" 90asRod_vssi540amv3.7450">7899t/aIr->REVISION id3.9553" 90asIr->REVISION4ss="NT_dbg class="sref">mcmtr->ta href13:8" 8lass13"line" namv3.7457">7255t13"li>131ref="d8ivers/eda8/i5400_edacmci6459">6499t/mv3Rci>* itr" cl class="sref">ctlaODEV6459">6499t/mv3ctlaODEVi540amv3.7450">7899t/a.c#75a>evs p mtr->ta h namv3>evs>* iits class="sref"dev_idx p mtr->ta h>ev_idx>* i].eda9/i5400_edacctlaODEV6459">6499t/mv3ctlaODEVi540"NT_dbg class="sref">mcmtr->ta href13:9" 8lass13ken BIOS?;d)\nquot;131ref="d8ivers/eda8/i5400_edacmci6459">6499t/mv3Rci>* itr" cl class="sref">>ev_ODEV6459">6499t/mv3>ev_ODEVi540amv3.7450">7899t/a>ci_ODEV6459">6499t/mv3>ci_ODEVes>71cot ->ta hre>dev6459">6499t/mv3ddev59">R"NT_dbg class="sref">mcmtr->ta href1329" 8lass13rine" namv3.6452">6452t/13rin>132mef="d9ivers/eda9/i5400_edacmci6459">6499t/mv3Rci>* itr" cl class="sref">ctlapage_to_phys p mtr->ta hctlapage_to_physi540amv3.7450">7899t/aNULhref="n" cl vitsNULh>* i"NT_dbg class="sref">mcmtr->ta href1321" 8lass13line" namv3.7458">7157t/13lin>132ref="d8ivers/eda8/i5400_edac.c#7301" id3.81322" 8lass13s" class="sref"ENODEVot/13s" >13rref="d8ivers/c#75amv3.L4288" id3.7459 Set  pe/function pointsscto At Actual/operation function *#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>13r3" 8lass13s" class="sref"ENODEVot/13s" >132ref="d9i3ers/eda9/i5400_edacRci6459">6499t/mv3Rci>* itr" cl class="sref">s="licheck(#9;rr_inf="+cos="lichecki540amv3.7450">7899t/a.c#75acheck_error p mtr->ta h namv3check_error>* i"NT_dbg class="sref">mcmtr->ta href1324" 8lass13s" class="sref"ENODEVot/13s" >132ref="d9ivers/eda9/i5400_edac.c#7404" id3.91325" 8lass13"line" namv3.7454">7754t13"li>132ref="d8ivers/e#75amv3.L4288" id3.7459"initializesspa>MC0control/>handlure>499t/>719s499t/atablee i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>13r6" 8lass13s" class="sref"ENODEVot/13s" >132ref="d8rd" class8"sref">pci_________* with4spa mappp p Attecontrol/mv3.rmation *#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>13r7" 8lass13lass="sref">branc_0ot/a>13las>1327ef="d9ivers/eda8/i5400_edac.c#7 c  clinit_>719s p mtr->ta h namv3init_>719ses>71cot ->ta hremci6459">6499t/mv3Rci>* i)"NT_ine" naci" class="sref">mca>->ta 1328" 8lass13s" class="sref"ENODEVot/13s" >132ref="d8ivers/eda8/i54eda9/i5400_edac.c#75amv3.L429511" 91ass="line" namv0.7453">77563 hrep p p pta hreMC: Settp p Rcitr" cs="licapcto EDAC_FLAG_NONE becauses namv3init_>719s()4relurned nonzero value 2lass="sref">mR"NT_dbg class="sref">mcmtr->ta href1329" 8lass13"line" namv3.7498">7958t13"li>132ref="d8ivers/d9ivers/eda9/i5400_edacRci6459">6499t/mv3Rci>* itr" cl class="sref">s="licap6459">6499t/mv3s="licapi540amv3.7450">7899t/aEDAC_FLAG_NONE p mtr->ta hEDAC_FLAG_NONE4ss="/e#75amv3.L4288" id3.7459"no >719s9foutte*#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1339" 8lass13=mci" class="sne" n1to" 13=mc>133ief="d9ivers/d elsesT_ine" naci" class="sref">mca>->ta 1331" 8lass131 (#9;rr_infrmtaton;133ref="d8ivers/edac/i54eda9/i5400_edac.c#75amv3.L429511" 91ass="line" namv1.7453">77563 hrep p p pta hreMC: Enable error reportp p now 2lass="sref">mR"NT_dbg class="sref">mcmtr->ta href13=2" 8lass131 (#9;rr_infrmtaton;133ref="d8ivers/eda8/i54/i5400_edac.c#7 c  clanable_error_reportp p p mtr->ta h c  clanable_error_reportp pe >71p pMTR_DIMM_RANmci6459">6499t/mv3Rci>* iR"NT_dbg class="sref">mcmtr->ta href1333" 8lass13trvia  (#9;get (#9;*t/sp13trv>133ref="d9i3ers/d8ivers/eda8/i5400_edac.c#7453" id3.841334" 8lass13trvia  (#9;get (#9;*t/sp13trv>133ref="d9ivers/eda9/i5400_edac.c#7404" id3.91335" 8lass13trvia  (#9;get (#9;*t/sp13trv>133ref="d8ivers/e#75amv3.L4288" id3.7459"add  pis new MC0control/>handlurecto EDAC499t/s list of MC= *#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1336" 8lass13trvia  (#9;get (#9;*t/sp13trv>133ref="d8ivers/eda8/i5400_edac.c#7s="limc_addimc id3.9553" 90ass="limc_addimces>71cot ->ta hremci6459">6499t/mv3Rci>* i)"NT_ine" naci" class="sref">mca>->ta 1337" 8lass13 class="comment"> */t/sp13 cl>133ref="d9ivers/eda9/i5400_edac.c#7457".c#75amv3.L429511" 91ass="line" namv0.7453">77563 hrep p p pta hreMC: failed s="limc_addimc() 2lass="sref">mR"NT_dbg class="sref">mcmtr->ta href13=8" 8lass13romment">>>>>>>>>*w/t/sp13rom>133ref="d8ivers/eda8/i54e#75amv3.L4288" id3.7459"FIXME:rperhaps some cef" should go here  pat >7sables error>*i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1339" 8lass13line" namv3.7458">7157t/13lin>1339ef="d8ivers/eda8/i5400_edaccccccccccccccccc* reportp p edawe just anabled it>*i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1349" 8lass13s" class="sref"ENODEVot/13s" >134"ef="d8ivers/eda8/i5400_edaccccccccccccccccc*#e i  Attre is=aeDIMM 2">8f="=  c  cla699t/1>1341" 8lass13"line" namv3.7450">7555t13"li>134ref="d8ivers/edac/i54goto 3.7450">7899t/afail1andle_limsrto" fail1>* i"NT_dbg class="sref">mcmtr->ta href1342" 8lass13lass="sref">branc_0ot/a>13las>1342ef="d9i3ers/d8ivers/eda8/i5400_edac.c#7453" id3.841343" 8lass13ass="sref"devfnot/a>)== 13ass>134ref="d8ivers/eda8/i5400_edac.c#7451" id3.813s4" 8lass13s" class="sref"ENODEVot/13s" >134ref="d9ivers/eda9/i5400_edac namv3clear_error p mtr->ta h namv3clear_errore >71p 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itr" cl clas48lass12las4="sref">branc_0ot/a>12las4122re45line" naci" class="sref">mca>>64rp13 cl>133ref="d">64rp3.74" namv3.6452">6452t/13ass13ken c399">cla699t/1>1262" 8laass13ken c399">R>* iR"NT_dbg class="srefss="src399">cla699t/1>1262"ss="src399">>mcmef" should go here  pat >7sables error>*4ref">mcmtr4>ta href1252" 8lass12l4ne" n45o At Actual/operation function *#e i  Attre45400_edac.4#7451" id3.81254" 8lass124" cla45R"NT_dbg clasi" clas nt">>>>>>>>>*w/t3s4rp13 cl>133ref="d">64rp3.74"< 0) ?class="sref">mca>>64rp13 cl>133ref="d">64rp3.74":ssref">Rtype_cap6459">6499t/mv3Rtype_cap44800_edac n4i  Attre is=aeDIMM 2">8f=4=  c 45p mtrf"ENODEVot/12s" >125ref="d8ivers/eda8/i489t/mv3Rci4ref="d8ivers/eda8/i5400_e4ac*d945andlurecto EDAC499t/s list of MC= *#e i  At45eda8/i5404ass="line" namv3.7455">71456" 845ss12"line" namv3.745">p7859"ONE ind9incesof devicesto see/edait isef7315" 4 8lass12  4lass="comment">a*t/sp12  4>125r45="d8ivers/eda8/i5400_edac*d9i*a8/i5"d8iveexit()cc* Moduon 0xit  itr" clNE ind9incesof devicesto see/edait isef7315" 4comment">a4t/sp12  c>1258ef="d8ivers4eda8/45400_edac*a8/i5400_edac.04ine"FOUND                 Unass13kenidhes1399">>m ind9incesof devicesto see/edait isef7315" 4c Attre is42  class="comment">a*t/sp42  c>4559ef="d8ivers/eda8/i5400_edacss="sref"ENODEVot/1399">130mef="d9ivers/eda9/i41269" 8las412  class="comment">a*t/s412  c45_ODEVRem_ctlamv3.ef="d199t/a>op _eexit_RANEDAC_MOD_ST_eexit/mv3d54goto 3.7450">ss="srexit_RANEDAC_MOD_STss="srexitdx>* amv3>>>>>*w/t/sp12rom>123ref="d8ivers/>hand4/sp12 cl>14 ref="d9iverseda8/i5400_e4ac.c#4 namv3lamv3.ef="d199t/a>op p p iimci6459">6494/ef">mcmtr4dci_dev59">7199t/a>op p p4iitde46t/mv3ddev59">;vers/e#75amv3. id3.o 39x 1271" 8lass12"line" namv327450">7555t12"li>127ref="d8iversrperhaps some cef" should go here  pat >7sables error>*4" id3.95094 91asRem_ctlamv3.6459">6449t/mv468lass13:en BIOS?;d)\nquot;64unass13ken c399">cla699t/1>1262" 8launass13ken c399">R>* iR"NT_dbg class="srefss="src399">cla699t/1>1262"ss="src399">>mcmef" should go here  pat >7sables error>*4t/mv3Rci>*4iENT_dbg class="sref">mcm4r->46p mtrf"ENODEVot/12s" >125ref="d8ivers/eda8/i4e=i540ENT_4bg class="sref">mcmtr->4ta hr46andlurecto EDAC499t/s list of MC= *#e i  At4/eda8/i5404yss=="+mi3]ENT_dbg class=4sref"46a hEDf">mca>->ta 1oduonrrs/e_RANEDAC_MOD_ST1oduonrrs/edx>* nt">>>>>>>>>*w/ss="srrs/e_RANEDAC_MOD_STss="srrs/edx>*ef" should go here  pat >7sables error>*4t8lass12  47dev_idx p mtr->ta h>e4_idx>466 >71f">mca>->ta 1oduonrexit_RANEDAC_MOD_ST1oduonrexitdx>* nt">>>>>>>>>*w/ss="srexit_RANEDAC_MOD_STss="srexitdx>*ef" should go here  pat >7sables error>*4tomment">a4IZEes>71cot ->ta hre.c475a>e46s="sref">ddev6459">6499t/mv3ddev59">0=ac5024 href1269"48lass12 class="comment"> 4/t/sp46 Attredac.c#75a6" idMODULElLICENSs6" 8lass13s" clMODULElLICENSsdx>* n0">7555t12"li>127ref="d8ivGPLerhaps some cef" should go here  pat >7sables error>*4"269" 8las475amv3.L429511" 91ass="li4e" na46DEVot/dac.c#75a6" idMODULElAUTHOamv3.ci6459">649MODULElAUTHOadx>* n0">7555t12"li>127ref="d8ivBen Woodard"<woodard@red* r./i5ss13erhaps some cef" should go here  pat >7sables error>*4._dbu>dev=4xc._dbx fn=0xc._dbx 2lass4"sref47namv3./i5400_edac.c#MODULElAUTHOamv3.ci6459">649MODULElAUTHOadx>* n0">7555t12"li>127ref="d8ivMauro Carvalho Chehab"<mchehab@red* r./i5ss13erhaps some cef" should go here  pat >7sables error>*4.ef">mcmtr4ss="sref">numbss id3.95534 90as47f="=  /i5400_edac.c#MODULElAUTHOamv3.ci6459">649MODULElAUTHOadx>* n0">7555t12"li>127ref="d8ivRed H reInc. (http://www.red* r./i5)erhaps some cef" should go here  pat >7sables error>*4. id3.95094cl class="sref">devfn64594>649947edacladac.c#75a6" idMODULElDESCRIPT459">6499t/mv3Rci>MODULElDESCRIPT459dx>* n0">7555t12"li>127ref="d8ivMC Dicestl  p Intel Isabl memory9t/mv3cllre  - erhaps some c" should go here  pat >7sables error>*4./mv3Rci>*43.7459"Wesonly4are lookp 4 for 47p mtr->ta href="+md/eadac.c#75a6" idIsablacmci6459">6499t/mv3Rci>* itr" cl class="sef" should go here  pat >7sables error>*4.=i540ENT_4699t/1>12s5" 8lass12s" cl4ss="s47andlurecto EDAC499t/s list of MC= *#e i  At4=eda8/i5404ass="sref">devfn6459">6494t/mv347a hEDf">mca>->ta 1oduonrparam_RANEDAC_MOD_ST1oduonrparamdx>* nt">>>>>>>>>*w/2"linop_6499e9x 1271" 8lass12"linop_6499eeda9/iint, 0444ef" should go here  pat >7sables error>*4.8lass12  48lass12"ine" namv3.6452">4452t/476 >71f">mca>->ta MODULElPARMlDESC">6499t/mv3Rci>MODULElPARMlDESCdx>* nt">>>>>>>>>*w/2"linop_6499e9x 1271" 8lass12"linop_6499eeda9/in0">7555t12"li>127ref="d8ivmc_a_fig_dwRccccccccc6499e:ss=Pcll,1=NMIerhaps some cef" should go here  pat >7sables error>*4.omment">a43.7459e i  Attre is=aeDIM4 2">847v3.74


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