linux/drivers/edac/cell_edac.c
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 L1">2 21./a>.spaa class="comment">/*./spaalu
 L2">2 22./a>.spaa class="comment"> * Cell MIC driver for ECC counting./spaalu
 L3">2 23./a>.spaa class="comment"> *./spaalu
 L4">2 24./a>.spaa class="comment"> * Copyright 2007 Benjamin Herrenschmidt, IBM Corp../spaalu
 L5">2 25./a>.spaa class="comment"> *                <benh@kernel.crashing.org>./spaalu
 L6">2 26./a>.spaa class="comment"> *./spaalu
 L7">2 27./a>.spaa class="comment"> * This file may be distributed under the terms of the./spaalu
 L8">2 28./a>.spaa class="comment"> * GNU General Public License../spaalu
 L9">2 29./a>.spaa class="comment"> */./spaalu
 L10">2 va1ua>#undef2.a href="+code=DEBUG" class="sref">DEBUG./a><
 L11">2 11./a><
 L12">2 12./a>#include <linux/edac.h./a>><
 L13">2 13./a>#include <linux/module.h./a>><
 L14">2 14./a>#include <linux/init.h./a>><
 L15">2 15./a>#include <linux/platform_device.h./a>><
 L16">2 16./a>#include <linux/stop_machine.h./a>><
 L17">2 17./a>#include <linux/io.h./a>><
 L18">2 18./a>#include <asm/machdep.h./a>><
 L19">2 19./a>#include <asm/cell-regs.h./a>><
 L20">2 20./a><
 L21">2 21./a>#include "edac_core.h./a>"<
 L22">2 22./a><
 L23">2 23./a>struct2.a href="+code=cell_edac_priv" class="sref">cell_edac_priv./a><
 L24">2 24./a>{<
 L25">2 25./a>        struct2.a href="+code=cbe_mic_tm_regs" class="sref">cbe_mic_tm_regs./a> .a href="+code=__iomem" class="sref">__iomem./a>  *.a href="+code=regs" class="sref">regs./a>;<
 L26">2 26./a>        int                             .a href="+code=node" class="sref">node./a>;<
 L27">2 27./a>        int                             .a href="+code=chanmask" class="sref">chanmask./a>;<
 L28">2 28./a>#ifdef2.a href="+code=DEBUG" class="sref">DEBUG./a><
 L29">2 29./a>        .a href="+code=u64" class="sref">u64./a>                             .a href="+code=prev_fir" class="sref">prev_fir./a>;<
 L30">2 3a1ua>#endif<
 L31">2 31./a>};<
 L32">2 32./a><
 L33">2 33./a>static void2.a href="+code=cell_edac_count_ce" class="sref">cell_edac_count_ce./a>(struct2.a href="+code=mem_ctl_info" class="sref">mem_ctl_info./a> *.a href="+code=mci" class="sref">mci./a>, int .a href="+code=chan" class="sref">chan./a>, .a href="+code=u64" class="sref">u64./a> .a href="+code=ar" class="sref">ar./a>)<
 L34">2 34./a>{<
 L35">2 35./a>        struct2.a href="+code=cell_edac_priv" class="sref">cell_edac_priv./a>           *.a href="+code=priv" class="sref">priv./a> =2.a href="+code=mci" class="sref">mci./a>->.a href="+code=pvt_info" class="sref">pvt_info./a>;<
 L36">2 36./a>        struct2.a href="+code=csrow_info" class="sref">csrow_info./a>               *.a href="+code=csrow" class="sref">csrow./a> =2.a href="+code=mci" class="sref">mci./a>->.a href="+code=csrows" class="sref">csrows./a>[0];<
 L37">2 37./a>        unsigned long                   .a href="+code=address" class="sref">address./a>, .a href="+code=pfn" class="sref">pfn./a>, .a href="+code=offset" class="sref">offset./a>, .a href="+code=syndrome" class="sref">syndrome./a>;<
 L38">2 38./a><
 L39">2 39./a>        .a href="+code=dev_dbg" class="sref">dev_dbg./a>(.a href="+code=mci" class="sref">mci./a>->.a href="+code=pdev" class="sref">pdev./a>, .spaa class="string">"ECC CE err on node %d, channel %d, ar =20x%016llx\n"
 L40">2 40./a>                .a href="+code=priv" class="sref">priv./a>->.a href="+code=node" class="sref">node./a>, .a href="+code=chan" class="sref">chan./a>, .a href="+code=ar" class="sref">ar./a>);<
 L41">2 41./a><
 L42">2 42./a>        .spaa class="comment">/* Address decoding is likely a bit bogus, to dbl check */./spaalu
 L43">2 43./a>        .a href="+code=address" class="sref">address./a> =2(.a href="+code=ar" class="sref">ar./a> &20xffffffffe0000000ul) >> 29;<
 L44">2 44./a>        if2(.a href="+code=priv" class="sref">priv./a>->.a href="+code=chanmask" class="sref">chanmask./a> ==20x3)<
 L45">2 45./a>                .a href="+code=address" class="sref">address./a> =2(.a href="+code=address" class="sref">address./a> << 1) | .a href="+code=chan" class="sref">chan./a>;<
 L46">2 46./a>        .a href="+code=pfn" class="sref">pfn./a> =2.a href="+code=address" class="sref">address./a> >> .a href="+code=PAGE_SHIFT" class="sref">PAGE_SHIFT./a>;<
 L47">2 47./a>        .a href="+code=offset" class="sref">offset./a> =2.a href="+code=address" class="sref">address./a> &2~.a href="+code=PAGE_MASK" class="sref">PAGE_MASK./a>;<
 L48">2 48./a>        .a href="+code=syndrome" class="sref">syndrome./a> =2(.a href="+code=ar" class="sref">ar./a> &20x000000001fe00000ul) >> 21;<
 L49">2 49./a><
 L50">2 50./a>        .spaa class="comment">/* TODO: Decoding of the error address */./spaalu
 L51">2 51./a>        .a href="+code=edac_mc_handle_error" class="sref">edac_mc_handle_error./a>(.a href="+code=HW_EVENT_ERR_CORRECTED" class="sref">HW_EVENT_ERR_CORRECTED./a>, .a href="+code=mci" class="sref">mci./a>, 1,u
 L52">2 52./a>                             .a href="+code=csrow" class="sref">csrow./a>->.a href="+code=first_page" class="sref">first_page./a> + .a href="+code=pfn" class="sref">pfn./a>, .a href="+code=offset" class="sref">offset./a>, .a href="+code=syndrome" class="sref">syndrome./a>,u
 L53">2 53./a>                             0, .a href="+code=chan" class="sref">chan./a>, -1, .spaa class="string">""""
 L54">2 54./a>}<
 L55">2 55./a><
 L56">2 56./a>static void2.a href="+code=cell_edac_count_ue" class="sref">cell_edac_count_ue./a>(struct2.a href="+code=mem_ctl_info" class="sref">mem_ctl_info./a> *.a href="+code=mci" class="sref">mci./a>, int .a href="+code=chan" class="sref">chan./a>, .a href="+code=u64" class="sref">u64./a> .a href="+code=ar" class="sref">ar./a>)<
 L57">2 57./a>{<
 L58">2 58./a>        struct2.a href="+code=cell_edac_priv" class="sref">cell_edac_priv./a>           *.a href="+code=priv" class="sref">priv./a> =2.a href="+code=mci" class="sref">mci./a>->.a href="+code=pvt_info" class="sref">pvt_info./a>;<
 L59">2 59./a>        struct2.a href="+code=csrow_info" class="sref">csrow_info./a>               *.a href="+code=csrow" class="sref">csrow./a> =2.a href="+code=mci" class="sref">mci./a>->.a href="+code=csrows" class="sref">csrows./a>[0];<
 L60">2 60./a>        unsigned long                   .a href="+code=address" class="sref">address./a>, .a href="+code=pfn" class="sref">pfn./a>, .a href="+code=offset" class="sref">offset./a>;<
 L61">2 61./a><
 L62">2 62./a>        .a href="+code=dev_dbg" class="sref">dev_dbg./a>(.a href="+code=mci" class="sref">mci./a>->.a href="+code=pdev" class="sref">pdev./a>, .spaa class="string">"ECC UE err on node %d, channel %d, ar =20x%016llx\n"
 L63">2 63./a>                .a href="+code=priv" class="sref">priv./a>->.a href="+code=node" class="sref">node./a>, .a href="+code=chan" class="sref">chan./a>, .a href="+code=ar" class="sref">ar./a>);<
 L64">2 64./a><
 L65">2 65./a>        .spaa class="comment">/* Address decoding is likely a bit bogus, to dbl check */./spaalu
 L66">2 66./a>        .a href="+code=address" class="sref">address./a> =2(.a href="+code=ar" class="sref">ar./a> &20xffffffffe0000000ul) >> 29;<
 L67">2 67./a>        if2(.a href="+code=priv" class="sref">priv./a>->.a href="+code=chanmask" class="sref">chanmask./a> ==20x3)<
 L68">2 68./a>                .a href="+code=address" class="sref">address./a> =2(.a href="+code=address" class="sref">address./a> << 1) | .a href="+code=chan" class="sref">chan./a>;<
 L69">2 69./a>        .a href="+code=pfn" class="sref">pfn./a> =2.a href="+code=address" class="sref">address./a> >> .a href="+code=PAGE_SHIFT" class="sref">PAGE_SHIFT./a>;<
 L70">2 70./a>        .a href="+code=offset" class="sref">offset./a> =2.a href="+code=address" class="sref">address./a> &2~.a href="+code=PAGE_MASK" class="sref">PAGE_MASK./a>;<
 L71">2 71./a><
 L72">2 72./a>        .spaa class="comment">/* TODO: Decoding of the error address */./spaalu
 L73">2 73./a>        .a href="+code=edac_mc_handle_error" class="sref">edac_mc_handle_error./a>(.a href="+code=HW_EVENT_ERR_UNCORRECTED" class="sref">HW_EVENT_ERR_UNCORRECTED./a>, .a href="+code=mci" class="sref">mci./a>, 1,u
 L74">2 74./a>                             .a href="+code=csrow" class="sref">csrow./a>->.a href="+code=first_page" class="sref">first_page./a> + .a href="+code=pfn" class="sref">pfn./a>, .a href="+code=offset" class="sref">offset./a>, 0,u
 L75">2 75./a>                             0, .a href="+code=chan" class="sref">chan./a>, -1, .spaa class="string">""""
 L76">2 76./a>}<
 L77">2 77./a><
 L78">2 78./a>static void2.a href="+code=cell_edac_check" class="sref">cell_edac_check./a>(struct2.a href="+code=mem_ctl_info" class="sref">mem_ctl_info./a> *.a href="+code=mci" class="sref">mci./a>3)<pfn./a> =2.a href="+code=address" class="srefref dac.c#L58" id
 L58" class="line" nam>
 L58">2 70./8>        .a href="+code8offse8" class="srefiv" class="sref">cell_edac_priv./a>           *.a href="+code=priv" class="sref">priv./a> =2.a href="+code=mci" class="sref">mci./a>->.a href="+code=pvt_info" class="sref">pvt_info./a>;<
 L58">2 71./8><prev_fir./a href="drivers/edal_edac.ar./a>);<chan./a>, .a hreleffffffe0000000ul)eleffsref">m0c#L59" id
 L59" class="line" nam>
 L58">2 72./8>        .spaa class="c8mment8dac.c#L33" id
 L33" class="line" nam>
 L38">2 73./8>        .a href="+code8edac_8c_handle_error" class="sref" href="drivers/edal_edac.">mci./a>->.a hin_be                 in_be  _infolass=priv./a>->.a href="+code=chanmask" class="sref">chanmask./aef="drivers/edac/cell_edac.s="sref">chanmask./aomem href="drivers/edaomem hredac.c#L64" id
 L64" class="line" nam>
 L68">2 74./8>                      8     8/linux/sref">DEBUG./a><
 L28">2 75./8>                      8     80, .a href="+ef">priv./a>->.a href="drivers/edal_edac."!>mci./a>->.a h href="+code=chanmask" class="sref">chanmask./a>;<
 L58">2 76./8>}<dev_dbg./a>(.a href="+code=mci" class="sref">mci./a>->.a href="+code=pdev" class="sref">pdev./a>, .spaa class="string">"ECC UE err on node %d, channell_ex\n&qge :href="driver/edac/cell_edac.cor" class="sref" href="drivers/edal_edac..c#L64" id
 L64" class="line" nam>
 L68">2 77./8><dev_dbg./a>( href="+code=chanmask" class="sref">chanmask./a>;<mci./a>->.a h href="drivers/edal_edac.c#L64" id
 L64" class="line" nam>
 L682 28./a>..spaa class="comment"> *ode=c8e=address" clc#L77" id
 L77" class="line" nam>
 L782.a href8"+code=address" class="8refre8includdac.c#L31" id
 L31" class="line" nam>
 L39">2 70./9>        .a href="+code9offse90, .a href="+ef">>priv./a>->.a href="+code=chanmask" class="sref">chanmask./a> ==20x3)<->.aCBcelIC_FIR_ECC_SINGLE_0de=mef="drivers/edaCBcelIC_FIR_ECC_SINGLE_0de=mdac..) c#L58" id
 L58" class="line" nam>
 L59">2 71./9><dev_dbg./a>("edacf="+code=mci" cl"edacfsref">mci./a>->.a hin_be                 in_be  _infolass=priv./a>->.a href="+code=chanmask" class="sref">chanmask./aef="drivers/edac/cell_edac.s="sref">chanmask./aomemdf_ecc_/edac/c_0ef="drivers/edaomemdf_ecc_/edac/c_0dac..c#L64" id
 L64" class="line" nam>
 L69">2 72./9>        .spaa class="c9mment9.a href="+code=csrow"chan./a>, .a hreleffffffe0000000ul)eleffsref"|>mci./a>->.a hCBcelIC_FIR_ECC_SINGLE_0dRESE href="drivers/eCBcelIC_FIR_ECC_SINGLE_0dRESE dac.c#L64" id
 L64" class="line" nam>
 L69">2 73./9>        .a href="+code9edac_9e=priv" class="sref">priv./a>->.aell_edac_count_ce./a>(struct2.a href="+code=mem_ctl_infoci./a>, 1,uchan./a>, -1, ."edacf="+code=mci" cl"edacfsref.c#L64" id
 L64" class="line" nam>
 L69">2 74./9>                      9     94=address" clc#L77" id
 L77" class="line" nam>
 L79">2 75./9>                      9     90, .a href="+ef">>priv./a>->.a href="+code=chanmask" class="sref">chanmask./a> ==20x3)<->.aCBcelIC_FIR_ECC_SINGLE_1de=mef="drivers/edaCBcelIC_FIR_ECC_SINGLE_1de=mdac..) c#L58" id
 L58" class="line" nam>
 L59">2 76./9>}<dev_dbg./a>("edacf="+code=mci" cl"edacfsref">mci./a>->.a hin_be                 in_be  _infolass=priv./a>->.a href="+code=chanmask" class="sref">chanmask./aef="drivers/edac/cell_edac.s="sref">chanmask./aomemdf_ecc_/edac/c_1ef="drivers/edaomemdf_ecc_/edac/c_1sref.c#L64" id
 L64" class="line" nam>
 L69">2 77./9><dev_dbg./a>(eleffffffe0000000ul)eleffsref"|>mci./a>->.a hCBcelIC_FIR_ECC_SINGLE_1dRESE href="drivers/eCBcelIC_FIR_ECC_SINGLE_1dRESE dac.c#L64" id
 L64" class="line" nam>
 L692 28./a>9.spaa class="comment"> 9ode=c9e=address" class="sref">address./a> ell_edac_count_ce./a>(struct2.a href="+code=mem_ctl_infoci./a>, 1,uchan./a>, -1, ."edacf="+code=mci" cl"edacfsref.c#L64" id
 L64" class="line" nam>
 L692 29./a>..spaa class="comment"> *refre99=address" clc#L77" id
 L77" class="line" nam>
 L710">2 va1ua>>#undef2.a href="+code=DEoffsDEo, .a href="+ef">>priv./a>->.a href="+code=chanmask" class="sref">chanmask./a> ==20x3)<->.aCBcelIC_FIR_ECC_MULTI_0de=mef="drivers/edaCBcelIC_FIR_ECC_MULTI_0de=mdac..) c#L58" id
 L58" class="line" nam>
 L510">2 11./a0><dev_dbg./a>("edacf="+code=mci" cl"edacfsref">mci./a>->.a hin_be                 in_be  _infolass=priv./a>->.a href="+code=chanmask" class="sref">chanmask./aef="drivers/edac/cell_edac.s="sref">chanmask./aomemdf_ecc_/edac/c_0ef="drivers/edaomemdf_ecc_/edac/c_0dac..c#L64" id
 L64" class="line" nam>
 L610">2 12./a0>#include <, .a hreleffffffe0000000ul)eleffsref"|>mci./a>->.a hCBcelIC_FIR_ECC_MULTI_0dRESE href="drivers/eCBcelIC_FIR_ECC_MULTI_0dRESE dac.c#L64" id
 L64" class="line" nam>
 L610">2 13./a0>#include <priv./a>->.aell_edac_count_ce./a>(struct2.a href="+code=mem_ctl_infoci./a>, 1,uchan./a>, -1, ."edacf="+code=mci" cl"edacfsref.c#L64" id
 L64" class="line" nam>
 L610">2 14./a0>#include <
 L710">2 15./a0>#include <>priv./a>->.a href="+code=chanmask" class="sref">chanmask./a> ==20x3)<->.aCBcelIC_FIR_ECC_MULTI_1de=mef="drivers/edaCBcelIC_FIR_ECC_MULTI_1de=mdac..) c#L58" id
 L58" class="line" nam>
 L510">2 16./a0>#include <dev_dbg./a>("edacf="+code=mci" cl"edacfsref">mci./a>->.a hin_be                 in_be  _infolass=priv./a>->.a href="+code=chanmask" class="sref">chanmask./aef="drivers/edac/cell_edac.s="sref">chanmask./aomemdf_ecc_/edac/c_1ef="drivers/edaomemdf_ecc_/edac/c_1sref.c#L64" id
 L64" class="line" nam>
 L610">2 17./a0>#include <dev_dbg./a>(eleffffffe0000000ul)eleffsref"|>mci./a>->.a hCBcelIC_FIR_ECC_MULTI_1dRESE href="drivers/eCBcelIC_FIR_ECC_MULTI_1dRESE dac.c#L64" id
 L64" class="line" nam>
 L610">2 18./a0>#include <address./a> ell_edac_count_ce./a>(struct2.a href="+code=mem_ctl_infoci./a>, 1,uchan./a>, -1, ."edacf="+code=mci" cl"edacfsref.c#L64" id
 L64" class="line" nam>
 L610">2 19./a0>#include <
 L710">2 va1uaa>#undef2.a href="+code=DDEBUG11dac.c#L21" id
 L21" class="line" nam>
 L211">2 11./a>><
 L102">2 12./aa>#include <f">dev_dbg./a>(eleffffffe0000000ul)eleffsref) c#L58" id
 L58" class="line" nam>
 L513">2 13./aa>#include <priv./a>->.a href="drivers/edal_edac."t; 29= ~>f">dev_dbg./a>(CBcelIC_FIR_ECC_e=mc->.a hCBcelIC_FIR_ECC_SETc
 L614">2 14./aa>#include <->.a href="drivers/edal_edac."|>mci./a>->.a hCBcelIC_FIR_ECC_RESE c
 L615">2 15./aa>#include <address./a>  href="drivers/edal_edac."t; 29= ~f">dev_dbg./a>(eleffffffe0000000ul)eleffsrefc#L64" id
 L64" class="line" nam>
 L615">2 16./aa>#include <dev_dbg./a>(out_be                 out_be  _infolass=priv./a>->.a href="+code=chanmask" class="sref">chanmask./aef="drivers/edac/cell_edac.s="sref">chanmask./aomem href="drivers/edaomem hredaccor" class="sref" href="drivers/edal_edac..c#L64" id
 L64" class="line" nam>
 L617">2 17./aa>#include <->.a hin_be                 in_be  _infolass=priv./a>->.a href="+code=chanmask" class="sref">chanmask./aef="drivers/edac/cell_edac.s="sref">chanmask./aomem href="drivers/edaomem hredac.c#L64" id
 L64" class="line" nam>
 L618">2 18./aa>#include <
 L319">2 19./aa>#include <dev_dbg./a>(mbef="drivers/edaob_info);rrording of the error addressync upell_edac.c#L10" id
 L10" class="line" nam>
 L100">2 20./1a><DEBUG./a><
 L211">2 21./1a>#include "dev_dbg./a>( href="drivers/edal_edac.">mci./a>->.a hin_be                 in_be  _infolass=priv./a>->.a href="+code=chanmask" class="sref">chanmask./aef="drivers/edac/cell_edac.s="sref">chanmask./aomem href="drivers/edaomem hredac.c#L64" id
 L64" class="line" nam>
 L211">2 12./a>>#include <, .a hr.a href="+code=mci" class="sref">mci./a>->.a href="+code=pdev" class="sref">pdev./a>, .spaa class="string">"ECC UE err on node %d, channell_ex\leff  :href="driver/edac/cell_edac.cor" class="sref" href="drivers/edal_edac..c#L64" id
 L64" class="line" nam>
 L613">2 23./1a>struct2.a href="+code=1cell_1dac_prddac.c#L31" id
 L31" class="line" nam>
 L314">2 24./1a>{<
 L715">2 25./1a>        struct2.a href1="+co1e=cbe_c#L77" id
 L77" class="line" nam>
 L715">2 16./aa>        int           1     1      #L77" id
 L77" class="line" nam>
 L715">2 17./aa>        int           1     1      ac_check" class="sref">cell_edac_checac/c_;<m" class="sref">mem_ctl_info./a> *.a href="+code=mci" class="sref">mci./a>3)<pfn./a> 18">2 28./1a>#ifdef2.a href="+code=1DEBUG1 classc#L58" id
 L58" class="line" nam>
 L519">2 29./1a>        .a href="+code1=u64"12=csrow_info" class="sref">csrow_info./a>               *.a href="+code=csrow" class="sref">csrow./a> =2.a href="+code=mci" class="sref">mci./a>->.a href="+code=csrows" class="sref">csrows./a>[0];<
 L510">2 3a1u1a>#endif<cell_dimm               *.a hdimm     a href="+code=csrow"">csrow./a> =2.adimm          *.a hdimmsrefc#L64" id
 L64" class="line" nam>
 L611">2 31./1a>};<csrow_infodac_priv./a>           *.a href="+code=priv" class="sref">priv./a> =2.a href="+code=mci" class="sref">mci./a>->.a href="+code=pvt_info" class="sref">pvt_info./a>;<
 L512">2 32./1a><cell_ddac/c_ef="+code=chan" claddac/c_ef="a href="+code=csro>priv./a> =2.a hnp+code=chan" clanpdac.c#L59" id
 L59" class="line" nam>
 L512">2 13./a>>#include <chanmask./aj+code=chan" clajdac.c#L59" id
 L59" class="line" nam>
 L512">2 24./1a>{<chanmask./aua><chanmask./anrass="href="drivers/ednrass="hdac.c#L59" id
 L59" class="line" nam>
 L512">2 25./1a>        struct2.a href1="+co13dac.c#L56" id
 L56" class="line" nam>
 L516">2 36./1a>        struct2.a href1="+co1e=csrow_info" rivemci./a>->.a hnp+code=chan" clanpdac.">mci./a>->.a hNULL+code=chan" claNULLdac.c#L59" id
 L59" class="line" nam>
 L512">2 17./aa>        unsigned long 1     137a href="+code=premci./a>->.a hnp+code=chan" clanpdac.">mci./a>->.a hofm hnd_ef="_by_d lo               ofm hnd_ef="_by_d loef">mci./a>->.a hnp+code=chan" clanpdac.E err on node %d, channelci"orydac/cell_edac.)"!>mci./a>->.a hNULL+code=chan" claNULLdac.c) c#L58" id
 L58" class="line" nam>
 L518">2 38./1a><cell_resoure./a>(struct2.a hresoure.=addrss="sref">cell_r/a>(struct2.a hrdac.c#L59" id
 L59" class="line" nam>
 L512">2 29./1a>        .a href="+code1=dev_13dac.c#L50" id
 L50" class="line" nam>
 L510">2 40./1a>                .a hre1f="+c1de=priv" class="sref">pding of the error addresW_core.h"knowore.h" thatef="dCne" l_emware only creates one r ary_edac.c#L10" id
 L10" class="line" nam>
 L101">2 41./1a><
 L101">2 32./1a>        .spaa class="c1ommen14 MIC driver for ECC countingow"sk" class="sr*sneedrivebe adaptedl_edac.c#L9" id
 L9" class="line" nam>
 L9">13">2 43./1a>        .a href="+code1=addr14alu
 L104">2 44./1a>        if2(.a href="+1code=14.a href="+code=prev_fef">f">dev_dbg./a>(ofm/edac/c_to_resoure./a>(struct2.a hofm/edac/c_to_resoure.ef">mci./a>->.a hnp+code=chan" clanpdac.E 0, lass=priv./a>->.ar/a>(struct2.a hrdac.).c#79" id
 Lref="+code=ofef">pfn./a> 15">2 45./1a>                .a hre1f="+c1de=address" class="sreeeeeeeee/e7/inuec#L14" id
 L14" class="line" nam>
 L14"">2 36./1a>        .a href="+code1=pfn"146a href="+code=prev_fef">f">dev_dbg./a>(ofmef="_to_nid/a>(struct2.a hofmef="_to_nidef">mci./a>->.a hnp+code=chan" clanpdac.)"!>mci./a>->.a h href="+code=node" class="sref">node./a>, .a href="+code=chan" class="sref.c#79" id
 Lref="+code=ofef">pfn./a> 15">2 17./aa>        .a href="+code1=offs147a href="+code=prev_feeeeeeee/e7/inuec#L14" id
 L14" class="line" nam>
 L14"">2 38./1a>        .a href="+code1=synd14e=address" class="sref">address./a> ea href="+code=first_page" class="sref">first_page./a> + .a href="+code=pfn" class="sref">mci./a>->.a hr/a>(struct2.a hrdac..ci./a>->.a hstarhref="drivers/edstarhdac."t class="sref">PAGE_SHIFT./a>;<
 L719">2 49./1a><dev_dbg./a>(nrass="href="drivers/ednrass="hdac.">mci./a>->.a hresoure._siz./a>(struct2.a hresoure._siz._infolass=priv./a>->.ar/a>(struct2.a hrdac.)"t class="sref">PAGE_SHIFT./a>;<
 L710">2 50./1a>        .spaa class="c1ommen15e=priv" class="sref">priv./a>->.aea href="+code=first_page" class="sref">first_pag"+c> + .a href="+code=pf"+c> + .adac.">mci./a>->.a h.a href="+code=first_page" class="sref">first_page./a> + .a href="+code=pfn" class="sref">pfn./a>, .a hrefnrass="href="drivers/ednrass="hdac."- .c#L49" id
 L49" class="line" nam>
 L411">2 51./1a>        .a href="+code1=edac15dac.c#L12" id
 L12" class="line" nam>
 L122">2 52./1a>                      1     1 .a href="+code=csrow"rivemci./a>->.a hj+code=chan" clajdac.">m0cref">chanmask./aj+code=chan" clajdac." clamci./a>->.a h.a href="+code=first_page" class="sref">first_pagnra\n"href="drivers/ednra\n"hdac.cref">chanmask./aj+code=chan" clajdac.++) c#L58" id
 L58" class="line" nam>
 L513">2 53./1a>                      1     1 0, .a href="+code=chan" class>csrow./a> =2.adimm          *.a hdimmsref">mci./a>->.a h.a href="+code=first_page" class="sref">first_pag\n"href="drivers/ed\n"hdac.[ef">chanmask./aj+code=chan" clajdac.]ass="sref">first_pagdimm          *.a hdimmsrefc#L64" id
 L64" class="line" nam>
 L614">2 54./1a>}<first_pagdimm          *.a hdimmsrefs="sref">chanmask./aotypa href="+code=pfotypasref">mci./a>->.a hMEM_XDmef="drivers/edaMEM_XDmsrefc#L64" id
 L64" class="line" nam>
 L614">2 45./1a><first_pagdimm          *.a hdimmsrefs="sref">chanmask./a+codemf="+code=chan" cla+codemf="sref">mci./a>->.a hEDAC_SECDRRECTED./a>, .a hEDAC_SECDRRsrefc#L64" id
 L64" class="line" nam>
 L614">2 36./1a>static void2.a href="+1code=156a href="+code=prev_feeeeeeeesref">first_pagdimm          *.a hdimmsrefs="sref">chanmask./anrass="href="drivers/ednrass="hdac.">mci./a>->.a hnrass="href="drivers/ednrass="hdac."/mci./a>->.a h.a href="+code=first_page" class="sref">first_pagnra\n"href="drivers/ednra\n"hdac.c#L64" id
 L64" class="line" nam>
 L614">2 17./aa>{<
 L718">2 58./1a>        struct2.a href1="+co15e=address" class="sref">address./a> .a href="+code=mci" class="sref">mci./a>->.a href="+code=pdev" class="sref">pdev./a>, .spaa class="string">"ECC UE#L77" id
 L77" class="line" nam>
 L718">2 49./1a>        struct2.a href1="+co159a href="+code=prev_fass="srefrr on node %d, channelInitializ.dr =20x%016llx\n&qedac=ref="drx,dac/cell_edac#L77" id
 L77" class="line" nam>
 L710">2 60./1a>        unsigned long 1     16e=priv" class="sref">ass="srefrr on node %d, channel n" class="=ref="drlx, nrass="h=ref="drxedac/cell_edac.c#L63" id
 L63" class="line" nam>
 L611">2 61./1a><address./a>  href="+code=node" class="sref">node./a>, .a href="+code=chan" class="sref">chan./a>, .a hr href="+code=chanmask" class="sref">chanmask./a> ==20x3)<
 L611">2 52./1a>        .a href="+code1=dev_16.a href="+code=csrow"sk" clasci./a>->.a h.a href="+code=first_page" class="sref">first_page./a> + .a href="+code=pfn" class="sref">chan./a>, .a hrnrass="href="drivers/ednrass="hdac..c#L64" id
 L64" class="line" nam>
 L613">2 63./1a>                .a hre1f="+c1de=priv" class="sref">breakc#L64" id
 L64" class="line" nam>
 L613">2 54./1a><
 L715">2 65./1a>        .spaa class="c1ommen16=cbe_c#L77" id
 L77" class="line" nam>
 L716">2 66./1a>        .a href="+code1=addr16     #L77" id
 L77" class="line" nam>
 L717">2 67./1a>        if2(.a href="+1code=16     ac_checef">chan./a>, .a hreef="+code=pob./a>(struct2.a href="+code=pob.ef">m" class="sref">mem_ctlplatrivm_ddac/cf="+code=chanmaslatrivm_ddac/cref">mci./a>3)<"ECC U.c#79" id
 Lref="+code=ofef">pfn./a> 18">2 68./1a>                .a hre1f="+c16classc#L58" id
 L58" class="line" nam>
 L519">2 69./1a>        .a href="+code1=pfn"16=csrow_info" class="sref">csrow_infoic_tm_regs./a> .a href="+code=__iomem" class="sref">__iomem./a>  *.a href="+code=regs" class="sref">regs./a>;<
 L210">2 70./1a>        .a href="+code1=offs17" class="srefiv" class="sref">cell__info./a> *.a href="+code=mci" class="sref">>>>>>>>>>>>>mci./a>3)<
 L210">2 61./1a><csrow_inf+codemc_layeor./a>(.a href="+code=HWlayeoref">>>>>>>>>>>>sref">first_pag"+yeo"drivers/edac/ce"+yeo"dac.[2.c#L60" id
 L60" class="line" nam>
 L512">2 72./1a>        .spaa class="c1ommen172 class="srefiv" class="sref">cell_odac_priv./a>           *.a href="+code=priv" class="sref">priv./a> =2.a href="+code=mci" class="srefc#L60" id
 L60" class="line" nam>
 L512">2 63./1a>        .a href="+code1=edac1mc_handle_error" class="sref"                    .a href="+code=prev_fir" class="sref">prev_fir./aacf="+code=mci" clacfsrefc#L60" id
 L60" class="line" nam>
 L512">2 54./1a>                      1     1 .a href="+cod href="+code=chanmask" class="sref">chanmask./arc="+code=mci" clacsref">chan./a>, .a hr> ==20x3)<
 L512">2 65./1a>                      1     17dac.c#L56" id
 L56" class="line" nam>
 L516">2 76./1a>}<address./a> ef="drivers/edac/cell_edac.">mci./a>->.a h.__iget_cpu_tm_regs./a> .a href="+code=__iget_cpu_tm_regs./a>ef">mci./a>->.a h=__ief="_to_cpu .a href="+code=__ief="_to_cpuef">mci./a>->.a h class="string">"ECC Uass="sref">first_pagid/a>(struct2.a hidef">).c#L64" id
 L64" class="line" nam>
 L617">2 77./1a><priv./a>->.aef="drivers/edac/cell_edac.">>mci./a>->.a hNULL+code=chan" claNULLdac..c#79" id
 Lref="+code=ofef">pfn./a> 18">2 78./1a>static void2.a href="+1code=17e=address" class="srereturn -ci./a>->.a hENODEVECTED./a>, .a hENODEVsrefc#L60" id
 L60" class="line" nam>
 L512">2 69./1="+code=address" class="1srefr17dac.c#L50" id
 L50" class="line" nam>
 L518">2 70./18>        .a href="+code18offs18" class="sref">offset./a> =2+codeop_ac_c"+code=chan" cla+codeop_ac_c"sref">mci./a>->.a hEDAC_OPSTATE_POLL+code=chan" claEDAC_OPSTATE_POLLsrefc#L60" id
 L60" class="line" nam>
 L518">2 71./18><
 L128">2 72./18>        .spaa class="c18mmen18>/* TODO: Decoding of the error addresGetx\n"populationr*l_edac.c#L10" id
 L10" class="line" nam>
 L108">2 73./18>        .a href="+code18edac18c_handle_error" class="sref"acf="+code=mci" clacfsref">mci./a>->.a hin_be                 in_be  _infolass=priv./a>->.aef="drivers/edac/cell_edac.s="sref">chanmask./aomemmm_ctff="+code=mci" clomemmm_ctffdac..c#L64" id
 L64" class="line" nam>
 L618">2 74./18>                      18    184=address" clef">chanmask./a.a href="+code=mci" class="sref">mlass=priv./a>->.a class="string">"ECC Uass="sref">first_pagclass="string">&qut;ECC UE err on node %d, channellIC_MNT_CFGa href="drivers/edac/cell_edac.cor" class="sref"acf="+code=mci" clacfsref.c#L64" id
 L64" class="line" nam>
 L618">2 65./18>                      18    180, .a href="+chan./a>, .a hr> ==20x3)<m0c#L59" id
 L59" class="line" nam>
 L518">2 76./18>}<priv./a>->.aef=="+code=mci" clacfsref"t; 29;priv./a>->.aCBcelIC_MNT_CFG_CHAN_0_POP="+code=mci" clCBcelIC_MNT_CFG_CHAN_0_POPdac..c#79" id
 Lref="+code=ofef">pfn./a> 18">2 77./18><dev_dbg./a>(> ==20x3)<
 L4182 28./a>1..spaa class="comment"> 1*ode=18e=address" clef">priv./a>->.aef=="+code=mci" clacfsref"t; 29;priv./a>->.aCBcelIC_MNT_CFG_CHAN_1_POP="+code=mci" clCBcelIC_MNT_CFG_CHAN_1_POPdac..c#79" id
 Lref="+code=ofef">pfn./a> 18">2 69./18"+code=address" class="18refr189a href="+code=prev_ff">dev_dbg./a>(> ==20x3)<
 L419">2 70./19>        .a href="+code19offs190, .a href="+ef">chan./a>, .a hr> ==20x3)< hr) c#L58" id
 L58" class="line" nam>
 L519">2 71./19><dev_dbg./a>(ass=wara class="string"ass=waraef">mlass=priv./a>->.a class="string">"ECC Uass="sref">first_pagclass="string">&qut;ECC UE#L58" id
 L58" class="line" nam>
 L519">2 72./19>        .spaa class="c19mmen19.a href="+code=csrow"de=prev_ffrr on node %d, channelYuck ! Nox\n"populated ? Abortu
 L619">2 73./19>        .a href="+code19edac19e=priv" class="sref">return -ci./a>->.a hENODEVECTED./a>, .a hENODEVsrefc#L60" id
 L60" class="line" nam>
 L519">2 74./19>                      19    194=address" clc#L77" id
 L77" class="line" nam>
 L719">2 75./19>                      19    190, .a href="+chan./a>, .a hr.a href="+code=mci" class="sref">mlass=priv./a>->.a class="string">"ECC Uass="sref">first_pagclass="string">&qut;ECC UE err on node %d, channelInitial FIRu href="drivers/edac/cell_edac.c#L63" id
 L63" class="line" nam>
 L619">2 76./19>}<dev_dbg./a>(in_be                 in_be  _infolass=priv./a>->.aef="drivers/edac/cell_edac.s="sref">chanmask./aomem href="drivers/edaomem hredac..c#L64" id
 L64" class="line" nam>
 L619">2 77./19><
 L7192 28./a>19.spaa class="comment"> 19ode=19e=address" clecoding is likely a bit bollocate"t; 29;ac/c EDAC MC datafiv" clured*l_edac.c#L10" id
 L10" class="line" nam>
 L1092 29./a>1..spaa class="comment"> 1*refr19lass="sref">pfn./a> =2.a hrenuma\n&qhref="drivers/ednuma\n&qhsref">mci./a>->.a h. ==20x3)< h3 ? 2 : .c#L49" id
 L49" class="line" nam>
 L420">2 va1u2>>#undef2.a href="+code=2Eoffs20dac.c#L21" id
 L21" class="line" nam>
 L220">2 11./20><->.a htypa href="+code=pftypasref">mci./a>->.a hEDAC_MC_LAYER_CHIP_SELEC href="drivers/eEDAC_MC_LAYER_CHIP_SELEC srefc#L60" id
 L60" class="line" nam>
 L520">2 12./20>#include <->.a hsiz./a>(struct2.a hsiz._inf">m.c#L49" id
 L49" class="line" nam>
 L4203>2 12./20>        .a href="+code203ffs20c_handle_error" class="sref""+yeo"drivers/edac/ce"+yeo"dac.[0].ci./a>->.a his_virc_;<mci./a>->.a hv" a href="+code=pftrtl_infc#L49" id
 L49" class="line" nam>
 L4204>2 12./20>                      204ffs204=address" clef">chanmask./a"+yeo"drivers/edac/ce"+yeo"dac.[1].ci./a>->.a htypa href="+code=pftypasref">mci./a>->.a hEDAC_MC_LAYER_CHANNEL+code=chan" claEDAC_MC_LAYER_CHANNEL_infc#L49" id
 L49" class="line" nam>
 L4205>2 12./20>                      205ffs200, .a href="+chan./a>, .a hr"+yeo"drivers/edac/ce"+yeo"dac.[1].ci./a>->.a hsiz./a>(struct2.a hsiz._inf">mchan./a>, .a hrnuma\n&qhref="drivers/ednuma\n&qhsrefc#L60" id
 L60" class="line" nam>
 L520">2 16./20>#include <address./a> "+yeo"drivers/edac/ce"+yeo"dac.[1].ci./a>->.a his_virc_;<mci./a>->.a hfalsa href="+code=pfnalsasrefc#L60" id
 L60" class="line" nam>
 L5207>2 16./20><3)<mci./a>->.a h+code=HWallocr./a>(.a href="+code=HWallocef">mci./a>->.a h class="string">"ECC Uass="sref">first_pagid/a>(struct2.a hidef">cor" class="sref"ARRAY_SIZE/a>(struct2.a hARRAY_SIZEef">mci./a>->.a h"+yeo"drivers/edac/ce"+yeo"dac.)cor" class="sref""+yeo"drivers/edac/ce"+yeo"dac.c#L63" id
 L63" class="line" nam>
 L620">2 18./20>#include <mem_ctlodac_priv./a>           *.a href="+code=priv" c..c#L64" id
 L64" class="line" nam>
 L620">2 19./20>#include <chan./a>, .a hrf="drivers/edac/cell_edac">>mci./a>->.a hNULL+code=chan" claNULLdac..c#79" id
 Lref="+code=ofef">pfn./a> 20">2 va1u2a>#undef2.a href="+code=2DEBUG21e=priv" class="sref">return -ci./a>->.a hENOMEMECTED./a>, .a hENOMEMsrefc#L60" id
 L60" class="line" nam>
 L521">2 11./2>><mci./a>->.a href="+code=pvt_info" class="sref">pvt_info./a>;<
 L522">2 12./2a>#include <chanmask./aef="drivers/edac/cell_edac.">mci./a>->.a hre="drivers/edac/cell_edac.c#L26" id
 L26" class="line" nam>
 L223">2 13./2a>#include <node./a>, .a href="+code=chan" class="sref">mci./a>->.a h class="string">"ECC Uass="sref">first_pagid/a>(struct2.a hidef">c#L26" id
 L26" class="line" nam>
 L2234>2 12./2a>#include <chanmask./a href="+code=chanmask" class="sref">chanmask./a> ==20x3)<
 L2235>2 12./2a>#include <, .a hrref="+code=pdev" class="sref">pdev./a>, .spaa class="string">"ECC Ul_mlass=priv./a>->.a class="string">"ECC Uass="sref">first_pagclass="string">&qut;ECC Uc#L26" id
 L26" class="line" nam>
 L223">2 16./2a>#include <address./a> ref="+code=pdev" class="sref">pdev./a>, .spaaotypa_cap+code=chan" claotypa_cap/cell_mci./a>->.a hMEM_FLAG_XDmef="drivers/edaMEM_FLAG_XDmCC Uc#L26" id
 L26" class="line" nam>
 L2237>2 16./2a>#include <3)<chanmask./a+codeclascap+code=chan" cla+codeclascapsref">mci./a>->.a hEDAC_FLAG_NONE/a>(struct2.a hEDAC_FLAG_NONE/cel"|mci./a>->.a hEDAC_FLAG_EC/a>(struct2.a hEDAC_FLAG_EC/cel"|mci./a>->.a hEDAC_FLAG_SECDRRECTED./a>, .a hEDAC_FLAG_SECDRRCC Uc#L26" id
 L26" class="line" nam>
 L223">2 18./2a>#include <3)<chanmask./a+codecap+code=chan" cla+codecapsref">mci./a>->.a hEDAC_FLAG_EC/a>(struct2.a hEDAC_FLAG_EC/cel"|mci./a>->.a hEDAC_FLAG_SECDRRECTED./a>, .a hEDAC_FLAG_SECDRRCC Uc#L26" id
 L26" class="line" nam>
 L223">2 19./2a>#include <pfn./a> =2.a hreref="+code=pdev" class="sref">pdev./a>, .spaaood_d lo               ood_d losref">mcrr on node %d, channeline" nam>ac/cell_edac.c#L26" id
 L26" class="line" nam>
 L220">2 20./2a><offset./a> =2ref="+code=csrows" class="sref">csrows./a>[0];lasd lo               ;lasd losref">mcrr on node %d, channelMICac/cell_edac.c#L26" id
 L26" class="line" nam>
 L220">2 11./2a>#include "csrows./a>[0]ass=d lo               ass=d losref">mci./a>->.a hass=d lo               ass=d losrefmlass=priv./a>->.a class="string">"ECC Uass="sref">first_pagclass="string">&qut;ECC U.c#L64" id
 L64" class="line" nam>
 L621">2 12./2>>#include <chanmask./a+codec./a>(struct2.a href+codec./a>/cell_mci./a>->.a h.ef="+code=./a>(struct2.a href="+code=mem_ctl_infc#L64" id
 L64" class="line" nam>
 L621">2 13./2a>struct2.a href="+code=2cell_22c_handle_error" class="sref"_edac_checac/c_;<mr" class="sref"f="drivers/edac/cell_edac.c#L64" id
 L64" class="line" nam>
 L6214>2 12./2a>{<
 L6215>2 12./2a>        struct2.a href2="+co220, .a href="+ccoding is likely a bit bRegister with EDAC cored*l_edac.c#L10" id
 L10" class="line" nam>
 L125">2 16./2a>        int           2     22s" class="sref">address./a> ec="+code=mci" clacsref">mci./a>->.a h+code=HWadde=Hr./a>(.a href="+code=HWadde=Hef">mr" class="sref"f="drivers/edac/cell_edac.c#L64" id
 L64" class="line" nam>
 L6217>2 16./2a>        int           2     22iv" class="sref">priv./a>->.aec="+code=mci" clacsref) c#L58" id
 L58" class="line" nam>
 L528">2 28./2a>#ifdef2.a href="+code=2DEBUG22e=address" class="sref">address./a> .a herref="drivers/eda.a herref">mlass=priv./a>->.a class="string">"ECC Uass="sref">first_pagclass="string">&qut;ECC UE err on node %d, channelfailedriveregister with EDAC coreedac/cell_edac..c#L64" id
 L64" class="line" nam>
 L629">2 29./2a>        .a href="+code2=u64"229a href="+code=prev_ff">dev_dbg./a>(+code=HWfre"+code=chan" cla+codemHWfre"ef">mr" class="sref"f="drivers/edac/cell_edac.c#L64" id
 L64" class="line" nam>
 L620">2 3a1u2a>#endif<return priv./a>->.aec="+code=mci" clacsrefc#L64" id
 L64" class="line" nam>
 L620">2 11./2a>};<
 L722">2 32./2a><
 L322">2 13./2>>#include <
 L522">2 24./2a>{<
 L7225>2 12./2a>        struct2.a href2="+co23dac.c#L56" id
 L56" class="line" nam>
 L526">2 36./2a>        struct2.a href2="+co2e=csroac_checef">chan./a>, .a hreef="+coderemov./a>(struct2.a href="+coderemov.ef">m" class="sref">mem_ctlplatrivm_ddac/cf="+code=chanmaslatrivm_ddac/cref">mci./a>3)<"ECC U.c#79" id
 Lref="+code=ofef">pfn./a> 22">2 17./2a>        unsigned long 2     237a hrc#L58" id
 L58" class="line" nam>
 L528">2 38./2a><mem_ctl_info./a> *.a href="+code=mci" class="sref">mci./a>3)<mci./a>->.a h+code=HWdele=Hr./a>(.a href="+code=HWdele=Hsrefmlass=priv./a>->.a class="string">"ECC Uass="sref">first_pagclass="string">&qut;ECC U.c#L64" id
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 L621">2 41./2a><
 L521">2 32./2a>        .spaa class="c2ommen24 MIC c#L77" id
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 L723">2 43./2a>        .a href="+code2=addr24alu
 L723">2 24./2a>        if2(.a href="+2code=24.a hrac_chec" class="sref">mem_ctlplatrivm_d77" cf="+code=chanmaslatrivm_d77" c=privchan./a>, .a hreef="+coded77" cf="+code=chanmaeef="+coded77" cedac">mc#L58" id
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 L525">2 45./2a>                .a hre2f="+c2de=address" cl.ci./a>->.a hd77" cf="+code=chanmad77" cedac""""""""">mc#L58" id
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 L525">2 36./2a>        .a href="+code2=pfn"246a href="+code=prev_f.ci./a>->.a hd lo               d losref" ">mcrr on node %d, channelibe-micac/cell_edac.c#L63" id
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 L625">2 17./2a>        .a href="+code2=offs247a href="+code=prev_f.ci./a>->.a hown cf="+code=chanmaown ca href>mci./a>->.a hTHIS_MODULE/a>(struct2.a hTHIS_MODULEdac.c#L63" id
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 L62"">2 38./2a>        .a href="+code2=synd24e=address" cl}c#L63" id
 L63" class="line" nam>
 L62"">2 29./2a><->.a h=pob./a>(struct2.a h=pob.ef">ode=prev_f_mci./a>->.a h.ef="+code=pob./a>(struct2.a href="+code=pob.ef">c#L63" id
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 L620">2 50./2a>        .spaa class="c2ommen25e=priv" class.ci./a>->.a hremov./a>(struct2.a hremov.ef">de=prev_f_mci./a>->.a h.ef="+coderemov./a>(struct2.a href="+coderemov.ef">c#L63" id
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 L323">2 53./2a>                      2     2 0, .aac_checef">chan./a>, .a hr_cac/c/a>(struct2.a h_cac/c=privchan./a>, .a hreef="+codeac/c/a>(struct2.a heef="+codeac/cef">mk" c)#L33" id
 L33" class="line" nam>
 L323">2 24./2a>}<
 L524">2 45./2a><
 L124">2 36./2a>static void2.a href="+2code=25s" class="sref">address./a> BUILD_BUG_ON/a>(struct2.a hBUILD_BUG_ONef">mr" class="sref"offsetoff="+code=chanmaoffsetofef">m" class="sref">mem_ctloic_tm_regs./a> .a href="+code=__iomem" class="src#L63" id
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 L64" class="line" nam>
 L628">2 58./2a>        struct2.a href2="+co258a href="+codci./a>3)<(struct2.a hBUILD_BUG_ONef">mr" class="sref"offsetoff="+code=chanmaoffsetofef">m" class="sref">mem_ctloic_tm_regs./a> .a href="+code=__iomem" class="src#L63" id
 L63" class="line" nam>
 L620">2 29./2a>        struct2.a href2="+co259a href="+code=prev_fass="sresref">p">dev_dbg./a>(omemdf_ecc_/edac/c_1ef="drivers/edaomemdf_ecc_/edac/c_1sref."!>m0x1b8.c#L64" id
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 L620">2 60./2a>        unsigned long 2     26" class="sref">offset./a> =2BUILD_BUG_ON/a>(struct2.a hBUILD_BUG_ONef">mr" class="sref"offsetoff="+code=chanmaoffsetofef">m" class="sref">mem_ctloic_tm_regs./a> .a href="+code=__iomem" class="src#L63" id
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 L620">2 24./2a><chanmask./aBUILD_BUG_ON/a>(struct2.a hBUILD_BUG_ONef">mr" class="sref"offsetoff="+code=chanmaoffsetofef">m" class="sref">mem_ctloic_tm_regs./a> .a href="+code=__iomem" class="src#L63" id
 L63" class="line" nam>
 L621">2 45./2a>        .spaa class="c2ommen26e=address" class="sreeeeeeeeesref">p">dev_dbg./a>(omemmm_ctff="+code=mci" clomemmm_ctffdac.."!>m0x210.c#L64" id
 L64" class="line" nam>
 L620">2 36./2a>        .a href="+code2=addr26s" class="sref">address./a> BUILD_BUG_ON/a>(struct2.a hBUILD_BUG_ONef">mr" class="sref"offsetoff="+code=chanmaoffsetofef">m" class="sref">mem_ctloic_tm_regs./a> .a href="+code=__iomem" class="src#L63" id
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 L627">2 67./2a>        if2(.a href="+2code=267a href="+code=prev_f class="sref">p">dev_dbg./a>(omemexHr./a>(.a href="omemexHdac.."!>m0x208.c#L64" id
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 L620">2 58./2a>                .a hre2f="+c26dac.c#L39" id
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 L329">2 69./2a>        .a href="+code2=pfn"26=csrow_info" return priv./a>->.aslatrivm_d77" c_registerf="+code=chanmaslatrivm_d77" c_registersrefmlass=priv./a>->.aeef="+coded77" cf="+code=chanmaeef="+coded77" cedac.c#L64" id
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 L620">2 70./2a>        .a href="+code2=offs27" clac#L77" id
 L77" class="line" nam>
 L720">2 61./2a><
 L122">2 72./2a>        .spaa class="c2ommen272 claac_check" class="sref">cell_mex/c/a>(struct2.a h_cex/c=privchan./a>, .a hreef="+codeex/c/a>(struct2.a heef="+codeex/cef">mk" c)#L33" id
 L33" class="line" nam>
 L322">2 63./2a>        .a href="+code2=edac2mc_hanc#L58" id
 L58" class="line" nam>
 L522">2 54./2a>                      2     274=address" clef">chanmask./a latrivm_d77" c_unregisterf="+code=chanmaslatrivm_d77" c_unregistersrefmlass=priv./a>->.aeef="+coded77" cf="+code=chanmaeef="+coded77" cedac.c#L64" id
 L64" class="line" nam>
 L620">2 45./2a>                      2     27=cbe_c#L77" id
 L77" class="line" nam>
 L726">2 76./2a>}<
 L727">2 77./2a><dev_dbg./a>(ooduleeac/c/a>(struct2.a hooduleeac/cef">mr" class="sref"eef="+codeac/c/a>(struct2.a heef="+codeac/cef">.c#L64" id
 L64" class="line" nam>
 L620">2 58./2a>static void2.a href="+2code=27e=addp">dev_dbg./a>(ooduleeex/c/a>(struct2.a hooduleeex/cef">mr" class="sref"eef="+codeex/c/a>(struct2.a heef="+codeex/cef">.c#L64" id
 L64" class="line" nam>
 L620">2 69./2="+code=address" class="2srefr27dac.c#L50" id
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 L528">2 70./28>        .a href="+code28offs28" clar" class="sref"MODULE_LICENSE/a>(struct2.a hMODULE_LICENSEef">mrrr on node %d, channelGPLac/cell_edac..c#L64" id
 L64" class="line" nam>
 L628">2 71./28><mrrr on node %d, channelBenjamin Herrenschmidt" clabenh@kernel.crash;d,.orgt clac/cell_edac..c#L64" id
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 L628">2 72./28>        .spaa class="c28mmen28>/* Tr" class="sref"MODULE_DESCRIPTION/a>(struct2.a hMODULE_DESCRIPTIONef">mrrr on node %d, channelECC countu
 L628">2 63./28>        .a href="+code28edac28c_han


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