linux/drivers/clk/clk-max77686.c
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   1/*
   2 * clk-max77686.c - Clock driver for Maxim 77686
   3 *
   4 * Copyright (C) 2012 Samsung Electornics
   5 * Jonghwa Lee <jonghwa3.lee@samsung.com>
   6 *
   7 * This program is free software; you can redistribute  it and/or modify it
   8 * under  the terms of  the GNU General  Public License as published by the
   9 * Free Software Foundation;  either version 2 of the  License, or (at your
  10 * option) any later version.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License
  18 * along with this program; if not, write to the Free Software
  19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20 *
  21 */
  22
  23#include <linux/kernel.h>
  24#include <linux/slab.h>
  25#include <linux/err.h>
  26#include <linux/platform_device.h>
  27#include <linux/mfd/max77686.h>
  28#include <linux/mfd/max77686-private.h>
  29#include <linux/clk-provider.h>
  30#include <linux/mutex.h>
  31#include <linux/clkdev.h>
  32
  33enum {
  34        MAX77686_CLK_AP = 0,
  35        MAX77686_CLK_CP,
  36        MAX77686_CLK_PMIC,
  37        MAX77686_CLKS_NUM,
  38};
  39
  40struct max77686_clk {
  41        struct max77686_dev *iodev;
  42        u32 mask;
  43        struct clk_hw hw;
  44        struct clk_lookup *lookup;
  45};
  46
  47static struct max77686_clk *to_max77686_clk(struct clk_hw *hw)
  48{
  49        return container_of(hw, struct max77686_clk, hw);
  50}
  51
  52static int max77686_clk_prepare(struct clk_hw *hw)
  53{
  54        struct max77686_clk *max77686 = to_max77686_clk(hw);
  55
  56        return regmap_update_bits(max77686->iodev->regmap,
  57                                  MAX77686_REG_32KHZ, max77686->mask,
  58                                  max77686->mask);
  59}
  60
  61static void max77686_clk_unprepare(struct clk_hw *hw)
  62{
  63        struct max77686_clk *max77686 = to_max77686_clk(hw);
  64
  65        regmap_update_bits(max77686->iodev->regmap,
  66                MAX77686_REG_32KHZ, max77686->mask, ~max77686->mask);
  67}
  68
  69static int max77686_clk_is_enabled(struct clk_hw *hw)
  70{
  71        struct max77686_clk *max77686 = to_max77686_clk(hw);
  72        int ret;
  73        u32 val;
  74
  75        ret = regmap_read(max77686->iodev->regmap,
  76                                MAX77686_REG_32KHZ, &val);
  77
  78        if (ret < 0)
  79                return -EINVAL;
  80
  81        return val & max77686->mask;
  82}
  83
  84static struct clk_ops max77686_clk_ops = {
  85        .prepare        = max77686_clk_prepare,
  86        .unprepare      = max77686_clk_unprepare,
  87        .is_enabled     = max77686_clk_is_enabled,
  88};
  89
  90static struct clk_init_data max77686_clks_init[MAX77686_CLKS_NUM] = {
  91        [MAX77686_CLK_AP] = {
  92                .name = "32khz_ap",
  93                .ops = &max77686_clk_ops,
  94                .flags = CLK_IS_ROOT,
  95        },
  96        [MAX77686_CLK_CP] = {
  97                .name = "32khz_cp",
  98                .ops = &max77686_clk_ops,
  99                .flags = CLK_IS_ROOT,
 100        },
 101        [MAX77686_CLK_PMIC] = {
 102                .name = "32khz_pmic",
 103                .ops = &max77686_clk_ops,
 104                .flags = CLK_IS_ROOT,
 105        },
 106};
 107
 108static int max77686_clk_register(struct device *dev,
 109                                struct max77686_clk *max77686)
 110{
 111        struct clk *clk;
 112        struct clk_hw *hw = &max77686->hw;
 113
 114        clk = clk_register(dev, hw);
 115
 116        if (IS_ERR(clk))
 117                return -ENOMEM;
 118
 119        max77686->lookup = kzalloc(sizeof(struct clk_lookup), GFP_KERNEL);
 120        if (!max77686->lookup)
 121                return -ENOMEM;
 122
 123        max77686->lookup->con_id = hw->init->name;
 124        max77686->lookup->clk = clk;
 125
 126        clkdev_add(max77686->lookup);
 127
 128        return 0;
 129}
 130
 131static int max77686_clk_probe(struct platform_device *pdev)
 132{
 133        struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
 134        struct max77686_clk **max77686_clks;
 135        int i, ret;
 136
 137        max77686_clks = devm_kzalloc(&pdev->dev, sizeof(struct max77686_clk *)
 138                                        * MAX77686_CLKS_NUM, GFP_KERNEL);
 139        if (!max77686_clks)
 140                return -ENOMEM;
 141
 142        for (i = 0; i < MAX77686_CLKS_NUM; i++) {
 143                max77686_clks[i] = devm_kzalloc(&pdev->dev,
 144                                        sizeof(struct max77686_clk), GFP_KERNEL);
 145                if (!max77686_clks[i])
 146                        return -ENOMEM;
 147        }
 148
 149        for (i = 0; i < MAX77686_CLKS_NUM; i++) {
 150                max77686_clks[i]->iodev = iodev;
 151                max77686_clks[i]->mask = 1 << i;
 152                max77686_clks[i]->hw.init = &max77686_clks_init[i];
 153
 154                ret = max77686_clk_register(&pdev->dev, max77686_clks[i]);
 155                if (ret) {
 156                        switch (i) {
 157                        case MAX77686_CLK_AP:
 158                                dev_err(&pdev->dev, "Fail to register CLK_AP\n");
 159                                goto err_clk_ap;
 160                                break;
 161                        case MAX77686_CLK_CP:
 162                                dev_err(&pdev->dev, "Fail to register CLK_CP\n");
 163                                goto err_clk_cp;
 164                                break;
 165                        case MAX77686_CLK_PMIC:
 166                                dev_err(&pdev->dev, "Fail to register CLK_PMIC\n");
 167                                goto err_clk_pmic;
 168                        }
 169                }
 170        }
 171
 172        platform_set_drvdata(pdev, max77686_clks);
 173
 174        goto out;
 175
 176err_clk_pmic:
 177        clkdev_drop(max77686_clks[MAX77686_CLK_CP]->lookup);
 178        kfree(max77686_clks[MAX77686_CLK_CP]->hw.clk);
 179err_clk_cp:
 180        clkdev_drop(max77686_clks[MAX77686_CLK_AP]->lookup);
 181        kfree(max77686_clks[MAX77686_CLK_AP]->hw.clk);
 182err_clk_ap:
 183out:
 184        return ret;
 185}
 186
 187static int max77686_clk_remove(struct platform_device *pdev)
 188{
 189        struct max77686_clk **max77686_clks = platform_get_drvdata(pdev);
 190        int i;
 191
 192        for (i = 0; i < MAX77686_CLKS_NUM; i++) {
 193                clkdev_drop(max77686_clks[i]->lookup);
 194                kfree(max77686_clks[i]->hw.clk);
 195        }
 196        return 0;
 197}
 198
 199static const struct platform_device_id max77686_clk_id[] = {
 200        { "max77686-clk", 0},
 201        { },
 202};
 203MODULE_DEVICE_TABLE(platform, max77686_clk_id);
 204
 205static struct platform_driver max77686_clk_driver = {
 206        .driver = {
 207                .name  = "max77686-clk",
 208                .owner = THIS_MODULE,
 209        },
 210        .probe = max77686_clk_probe,
 211        .remove = max77686_clk_remove,
 212        .id_table = max77686_clk_id,
 213};
 214
 215static int __init max77686_clk_init(void)
 216{
 217        return platform_driver_register(&max77686_clk_driver);
 218}
 219subsys_initcall(max77686_clk_init);
 220
 221static void __init max77686_clk_cleanup(void)
 222{
 223        platform_driver_unregister(&max77686_clk_driver);
 224}
 225module_exit(max77686_clk_cleanup);
 226
 227MODULE_DESCRIPTION("MAXIM 77686 Clock Driver");
 228MODULE_AUTHOR("Jonghwa Lee <jonghwa3.lee@samsung.com>");
 229MODULE_LICENSE("GPL");
 230
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