1/* 2 * Copyright (c) 2008-2009 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#ifndef DEBUG_H 18#define DEBUG_H 19 20#include "hw.h" 21#include "rc.h" 22 23struct ath_txq; 24struct ath_buf; 25 26#ifdef CONFIG_ATH9K_DEBUGFS 27#define TX_STAT_INC(q, c) sc->debug.stats.txstats[q].c++ 28#else 29#define TX_STAT_INC(q, c) do { } while (0) 30#endif 31 32#ifdef CONFIG_ATH9K_DEBUGFS 33 34/** 35 * struct ath_interrupt_stats - Contains statistics about interrupts 36 * @total: Total no. of interrupts generated so far 37 * @rxok: RX with no errors 38 * @rxlp: RX with low priority RX 39 * @rxhp: RX with high priority, uapsd only 40 * @rxeol: RX with no more RXDESC available 41 * @rxorn: RX FIFO overrun 42 * @txok: TX completed at the requested rate 43 * @txurn: TX FIFO underrun 44 * @mib: MIB regs reaching its threshold 45 * @rxphyerr: RX with phy errors 46 * @rx_keycache_miss: RX with key cache misses 47 * @swba: Software Beacon Alert 48 * @bmiss: Beacon Miss 49 * @bnr: Beacon Not Ready 50 * @cst: Carrier Sense TImeout 51 * @gtt: Global TX Timeout 52 * @tim: RX beacon TIM occurrence 53 * @cabend: RX End of CAB traffic 54 * @dtimsync: DTIM sync lossage 55 * @dtim: RX Beacon with DTIM 56 * @bb_watchdog: Baseband watchdog 57 */ 58struct ath_interrupt_stats { 59 u32 total; 60 u32 rxok; 61 u32 rxlp; 62 u32 rxhp; 63 u32 rxeol; 64 u32 rxorn; 65 u32 txok; 66 u32 txeol; 67 u32 txurn; 68 u32 mib; 69 u32 rxphyerr; 70 u32 rx_keycache_miss; 71 u32 swba; 72 u32 bmiss; 73 u32 bnr; 74 u32 cst; 75 u32 gtt; 76 u32 tim; 77 u32 cabend; 78 u32 dtimsync; 79 u32 dtim; 80 u32 bb_watchdog; 81}; 82 83/** 84 * struct ath_tx_stats - Statistics about TX 85 * @tx_pkts_all: No. of total frames transmitted, including ones that 86 may have had errors. 87 * @tx_bytes_all: No. of total bytes transmitted, including ones that 88 may have had errors. 89 * @queued: Total MPDUs (non-aggr) queued 90 * @completed: Total MPDUs (non-aggr) completed 91 * @a_aggr: Total no. of aggregates queued 92 * @a_queued: Total AMPDUs queued 93 * @a_completed: Total AMPDUs completed 94 * @a_retries: No. of AMPDUs retried (SW) 95 * @a_xretries: No. of AMPDUs dropped due to xretries 96 * @fifo_underrun: FIFO underrun occurrences 97 Valid only for: 98 - non-aggregate condition. 99 - first packet of aggregate. 100 * @xtxop: No. of frames filtered because of TXOP limit 101 * @timer_exp: Transmit timer expiry 102 * @desc_cfg_err: Descriptor configuration errors 103 * @data_urn: TX data underrun errors 104 * @delim_urn: TX delimiter underrun errors 105 */ 106struct ath_tx_stats { 107 u32 tx_pkts_all; 108 u32 tx_bytes_all; 109 u32 queued; 110 u32 completed; 111 u32 a_aggr; 112 u32 a_queued; 113 u32 a_completed; 114 u32 a_retries; 115 u32 a_xretries; 116 u32 fifo_underrun; 117 u32 xtxop; 118 u32 timer_exp; 119 u32 desc_cfg_err; 120 u32 data_underrun; 121 u32 delim_underrun; 122}; 123 124/** 125 * struct ath_rx_stats - RX Statistics 126 * @rx_pkts_all: No. of total frames received, including ones that 127 may have had errors. 128 * @rx_bytes_all: No. of total bytes received, including ones that 129 may have had errors. 130 * @crc_err: No. of frames with incorrect CRC value 131 * @decrypt_crc_err: No. of frames whose CRC check failed after 132 decryption process completed 133 * @phy_err: No. of frames whose reception failed because the PHY 134 encountered an error 135 * @mic_err: No. of frames with incorrect TKIP MIC verification failure 136 * @pre_delim_crc_err: Pre-Frame delimiter CRC error detections 137 * @post_delim_crc_err: Post-Frame delimiter CRC error detections 138 * @decrypt_busy_err: Decryption interruptions counter 139 * @phy_err_stats: Individual PHY error statistics 140 */ 141struct ath_rx_stats { 142 u32 rx_pkts_all; 143 u32 rx_bytes_all; 144 u32 crc_err; 145 u32 decrypt_crc_err; 146 u32 phy_err; 147 u32 mic_err; 148 u32 pre_delim_crc_err; 149 u32 post_delim_crc_err; 150 u32 decrypt_busy_err; 151 u32 phy_err_stats[ATH9K_PHYERR_MAX]; 152}; 153 154struct ath_stats { 155 struct ath_interrupt_stats istats; 156 struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES]; 157 struct ath_rx_stats rxstats; 158}; 159 160struct ath9k_debug { 161 struct dentry *debugfs_phy; 162 u32 regidx; 163 struct ath_stats stats; 164}; 165 166int ath9k_init_debug(struct ath_hw *ah); 167 168void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status); 169void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf, 170 struct ath_tx_status *ts); 171void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs); 172 173#else 174 175static inline int ath9k_init_debug(struct ath_hw *ah) 176{ 177 return 0; 178} 179 180static inline void ath_debug_stat_interrupt(struct ath_softc *sc, 181 enum ath9k_int status) 182{ 183} 184 185static inline void ath_debug_stat_tx(struct ath_softc *sc, 186 struct ath_buf *bf, 187 struct ath_tx_status *ts) 188{ 189} 190 191static inline void ath_debug_stat_rx(struct ath_softc *sc, 192 struct ath_rx_status *rs) 193{ 194} 195 196#endif /* CONFIG_ATH9K_DEBUGFS */ 197 198#endif /* DEBUG_H */ 199