LXR linux/include/linux/ssb/ssb.h

   1#ifndef LINUX_SSB_H_
   2#define LINUX_SSB_H_
   3
   4#include <linux/device.h>
   5#include <linux/list.h>
   6#include <linux/types.h>
   7#include <linux/spinlock.h>
   8#include <linux/pci.h>
   9#include <linux/mod_devicetable.h>
  10#include <linux/dma-mapping.h>
  11
  12#include <linux/ssb/ssb_regs.h>
  13
  14
  15struct pcmcia_device;
  16struct ssb_bus;
  17struct ssb_driver;
  18
  19struct ssb_sprom {
  20        u8 revision;
  21        u8 il0mac[6];           /* MAC address for 802.11b/g */
  22        u8 et0mac[6];           /* MAC address for Ethernet */
  23        u8 et1mac[6];           /* MAC address for 802.11a */
  24        u8 et0phyaddr;          /* MII address for enet0 */
  25        u8 et1phyaddr;          /* MII address for enet1 */
  26        u8 et0mdcport;          /* MDIO for enet0 */
  27        u8 et1mdcport;          /* MDIO for enet1 */
  28        u8 board_rev;           /* Board revision number from SPROM. */
  29        u8 country_code;        /* Country Code */
  30        u8 ant_available_a;     /* 2GHz antenna available bits (up to 4) */
  31        u8 ant_available_bg;    /* 5GHz antenna available bits (up to 4) */
  32        u16 pa0b0;
  33        u16 pa0b1;
  34        u16 pa0b2;
  35        u16 pa1b0;
  36        u16 pa1b1;
  37        u16 pa1b2;
  38        u16 pa1lob0;
  39        u16 pa1lob1;
  40        u16 pa1lob2;
  41        u16 pa1hib0;
  42        u16 pa1hib1;
  43        u16 pa1hib2;
  44        u8 gpio0;               /* GPIO pin 0 */
  45        u8 gpio1;               /* GPIO pin 1 */
  46        u8 gpio2;               /* GPIO pin 2 */
  47        u8 gpio3;               /* GPIO pin 3 */
  48        u16 maxpwr_bg;          /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */
  49        u16 maxpwr_al;          /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */
  50        u16 maxpwr_a;           /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */
  51        u16 maxpwr_ah;          /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */
  52        u8 itssi_a;             /* Idle TSSI Target for A-PHY */
  53        u8 itssi_bg;            /* Idle TSSI Target for B/G-PHY */
  54        u8 tri2g;               /* 2.4GHz TX isolation */
  55        u8 tri5gl;              /* 5.2GHz TX isolation */
  56        u8 tri5g;               /* 5.3GHz TX isolation */
  57        u8 tri5gh;              /* 5.8GHz TX isolation */
  58        u8 rxpo2g;              /* 2GHz RX power offset */
  59        u8 rxpo5g;              /* 5GHz RX power offset */
  60        u8 rssisav2g;           /* 2GHz RSSI params */
  61        u8 rssismc2g;
  62        u8 rssismf2g;
  63        u8 bxa2g;               /* 2GHz BX arch */
  64        u8 rssisav5g;           /* 5GHz RSSI params */
  65        u8 rssismc5g;
  66        u8 rssismf5g;
  67        u8 bxa5g;               /* 5GHz BX arch */
  68        u16 cck2gpo;            /* CCK power offset */
  69        u32 ofdm2gpo;           /* 2.4GHz OFDM power offset */
  70        u32 ofdm5glpo;          /* 5.2GHz OFDM power offset */
  71        u32 ofdm5gpo;           /* 5.3GHz OFDM power offset */
  72        u32 ofdm5ghpo;          /* 5.8GHz OFDM power offset */
  73        u16 boardflags_lo;      /* Board flags (bits 0-15) */
  74        u16 boardflags_hi;      /* Board flags (bits 16-31) */
  75        u16 boardflags2_lo;     /* Board flags (bits 32-47) */
  76        u16 boardflags2_hi;     /* Board flags (bits 48-63) */
  77        /* TODO store board flags in a single u64 */
  78
  79        /* Antenna gain values for up to 4 antennas
  80         * on each band. Values in dBm/4 (Q5.2). Negative gain means the
  81         * loss in the connectors is bigger than the gain. */
  82        struct {
  83                struct {
  84                        s8 a0, a1, a2, a3;
  85                } ghz24;        /* 2.4GHz band */
  86                struct {
  87                        s8 a0, a1, a2, a3;
  88                } ghz5;         /* 5GHz band */
  89        } antenna_gain;
  90
  91        /* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
  92};
  93
  94/* Information about the PCB the circuitry is soldered on. */
  95struct ssb_boardinfo {
  96        u16 vendor;
  97        u16 type;
  98        u16 rev;
  99};
 100
 101
 102struct ssb_device;
 103/* Lowlevel read/write operations on the device MMIO.
 104 * Internal, don't use that outside of ssb. */
 105struct ssb_bus_ops {
 106        u8 (*read8)(struct ssb_device *dev, u16 offset);
 107        u16 (*read16)(struct ssb_device *dev, u16 offset);
 108        u32 (*read32)(struct ssb_device *dev, u16 offset);
 109        void (*write8)(struct ssb_device *dev, u16 offset, u8 value);
 110        void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
 111        void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
 112#ifdef CONFIG_SSB_BLOCKIO
 113        void (*block_read)(struct ssb_device *dev, void *buffer,
 114                           size_t count, u16 offset, u8 reg_width);
 115        void (*block_write)(struct ssb_device *dev, const void *buffer,
 116                            size_t count, u16 offset, u8 reg_width);
 117#endif
 118};
 119
 120
 121/* Core-ID values. */
 122#define SSB_DEV_CHIPCOMMON      0x800
 123#define SSB_DEV_ILINE20         0x801
 124#define SSB_DEV_SDRAM           0x803
 125#define SSB_DEV_PCI             0x804
 126#define SSB_DEV_MIPS            0x805
 127#define SSB_DEV_ETHERNET        0x806
 128#define SSB_DEV_V90             0x807
 129#define SSB_DEV_USB11_HOSTDEV   0x808
 130#define SSB_DEV_ADSL            0x809
 131#define SSB_DEV_ILINE100        0x80A
 132#define SSB_DEV_IPSEC           0x80B
 133#define SSB_DEV_PCMCIA          0x80D
 134#define SSB_DEV_INTERNAL_MEM    0x80E
 135#define SSB_DEV_MEMC_SDRAM      0x80F
 136#define SSB_DEV_EXTIF           0x811
 137#define SSB_DEV_80211           0x812
 138#define SSB_DEV_MIPS_3302       0x816
 139#define SSB_DEV_USB11_HOST      0x817
 140#define SSB_DEV_USB11_DEV       0x818
 141#define SSB_DEV_USB20_HOST      0x819
 142#define SSB_DEV_USB20_DEV       0x81A
 143#define SSB_DEV_SDIO_HOST       0x81B
 144#define SSB_DEV_ROBOSWITCH      0x81C
 145#define SSB_DEV_PARA_ATA        0x81D
 146#define SSB_DEV_SATA_XORDMA     0x81E
 147#define SSB_DEV_ETHERNET_GBIT   0x81F
 148#define SSB_DEV_PCIE            0x820
 149#define SSB_DEV_MIMO_PHY        0x821
 150#define SSB_DEV_SRAM_CTRLR      0x822
 151#define SSB_DEV_MINI_MACPHY     0x823
 152#define SSB_DEV_ARM_1176        0x824
 153#define SSB_DEV_ARM_7TDMI       0x825
 154
 155/* Vendor-ID values */
 156#define SSB_VENDOR_BROADCOM     0x4243
 157
 158/* Some kernel subsystems poke with dev->drvdata, so we must use the
 159 * following ugly workaround to get from struct device to struct ssb_device */
 160struct __ssb_dev_wrapper {
 161        struct device dev;
 162        struct ssb_device *sdev;
 163};
 164
 165struct ssb_device {
 166        /* Having a copy of the ops pointer in each dev struct
 167         * is an optimization. */
 168        const struct ssb_bus_ops *ops;
 169
 170        struct device *dev;
 171
 172        struct ssb_bus *bus;
 173        struct ssb_device_id id;
 174
 175        u8 core_index;
 176        unsigned int irq;
 177
 178        /* Internal-only stuff follows. */
 179        void *drvdata;          /* Per-device data */
 180        void *devtypedata;      /* Per-devicetype (eg 802.11) data */
 181};
 182
 183/* Go from struct device to struct ssb_device. */
 184static inline
 185struct ssb_device * dev_to_ssb_dev(struct device *dev)
 186{
 187        struct __ssb_dev_wrapper *wrap;
 188        wrap = container_of(dev, struct __ssb_dev_wrapper, dev);
 189        return wrap->sdev;
 190}
 191
 192/* Device specific user data */
 193static inline
 194void ssb_set_drvdata(struct ssb_device *dev, void *data)
 195{
 196        dev->drvdata = data;
 197}
 198static inline
 199void * ssb_get_drvdata(struct ssb_device *dev)
 200{
 201        return dev->drvdata;
 202}
 203
 204/* Devicetype specific user data. This is per device-type (not per device) */
 205void ssb_set_devtypedata(struct ssb_device *dev, void *data);
 206static inline
 207void * ssb_get_devtypedata(struct ssb_device *dev)
 208{
 209        return dev->devtypedata;
 210}
 211
 212
 213struct ssb_driver {
 214        const char *name;
 215        const struct ssb_device_id *id_table;
 216
 217        int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id);
 218        void (*remove)(struct ssb_device *dev);
 219        int (*suspend)(struct ssb_device *dev, pm_message_t state);
 220        int (*resume)(struct ssb_device *dev);
 221        void (*shutdown)(struct ssb_device *dev);
 222
 223        struct device_driver drv;
 224};
 225#define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
 226
 227extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
 228static inline int ssb_driver_register(struct ssb_driver *drv)
 229{
 230        return __ssb_driver_register(drv, THIS_MODULE);
 231}
 232extern void ssb_driver_unregister(struct ssb_driver *drv);
 233
 234
 235
 236
 237enum ssb_bustype {
 238        SSB_BUSTYPE_SSB,        /* This SSB bus is the system bus */
 239        SSB_BUSTYPE_PCI,        /* SSB is connected to PCI bus */
 240        SSB_BUSTYPE_PCMCIA,     /* SSB is connected to PCMCIA bus */
 241        SSB_BUSTYPE_SDIO,       /* SSB is connected to SDIO bus */
 242};
 243
 244/* board_vendor */
 245#define SSB_BOARDVENDOR_BCM     0x14E4  /* Broadcom */
 246#define SSB_BOARDVENDOR_DELL    0x1028  /* Dell */
 247#define SSB_BOARDVENDOR_HP      0x0E11  /* HP */
 248/* board_type */
 249#define SSB_BOARD_BCM94306MP    0x0418
 250#define SSB_BOARD_BCM4309G      0x0421
 251#define SSB_BOARD_BCM4306CB     0x0417
 252#define SSB_BOARD_BCM4309MP     0x040C
 253#define SSB_BOARD_MP4318        0x044A
 254#define SSB_BOARD_BU4306        0x0416
 255#define SSB_BOARD_BU4309        0x040A
 256/* chip_package */
 257#define SSB_CHIPPACK_BCM4712S   1       /* Small 200pin 4712 */
 258#define SSB_CHIPPACK_BCM4712M   2       /* Medium 225pin 4712 */
 259#define SSB_CHIPPACK_BCM4712L   0       /* Large 340pin 4712 */
 260
 261#include <linux/ssb/ssb_driver_chipcommon.h>
 262#include <linux/ssb/ssb_driver_mips.h>
 263#include <linux/ssb/ssb_driver_extif.h>
 264#include <linux/ssb/ssb_driver_pci.h>
 265
 266struct ssb_bus {
 267        /* The MMIO area. */
 268        void __iomem *mmio;
 269
 270        const struct ssb_bus_ops *ops;
 271
 272        /* The core currently mapped into the MMIO window.
 273         * Not valid on all host-buses. So don't use outside of SSB. */
 274        struct ssb_device *mapped_device;
 275        union {
 276                /* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
 277                u8 mapped_pcmcia_seg;
 278                /* Current SSB base address window for SDIO. */
 279                u32 sdio_sbaddr;
 280        };
 281        /* Lock for core and segment switching.
 282         * On PCMCIA-host busses this is used to protect the whole MMIO access. */
 283        spinlock_t bar_lock;
 284
 285        /* The host-bus this backplane is running on. */
 286        enum ssb_bustype bustype;
 287        /* Pointers to the host-bus. Check bustype before using any of these pointers. */
 288        union {
 289                /* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */
 290                struct pci_dev *host_pci;
 291                /* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
 292                struct pcmcia_device *host_pcmcia;
 293                /* Pointer to the SDIO device (only if bustype == SSB_BUSTYPE_SDIO). */
 294                struct sdio_func *host_sdio;
 295        };
 296
 297        /* See enum ssb_quirks */
 298        unsigned int quirks;
 299
 300#ifdef CONFIG_SSB_SPROM
 301        /* Mutex to protect the SPROM writing. */
 302        struct mutex sprom_mutex;
 303#endif
 304
 305        /* ID information about the Chip. */
 306        u16 chip_id;
 307        u16 chip_rev;
 308        u16 sprom_offset;
 309        u16 sprom_size;         /* number of words in sprom */
 310        u8 chip_package;
 311
 312        /* List of devices (cores) on the backplane. */
 313        struct ssb_device devices[SSB_MAX_NR_CORES];
 314        u8 nr_devices;
 315
 316        /* Software ID number for this bus. */
 317        unsigned int busnumber;
 318
 319        /* The ChipCommon device (if available). */
 320        struct ssb_chipcommon chipco;
 321        /* The PCI-core device (if available). */
 322        struct ssb_pcicore pcicore;
 323        /* The MIPS-core device (if available). */
 324        struct ssb_mipscore mipscore;
 325        /* The EXTif-core device (if available). */
 326        struct ssb_extif extif;
 327
 328        /* The following structure elements are not available in early
 329         * SSB initialization. Though, they are available for regular
 330         * registered drivers at any stage. So be careful when
 331         * using them in the ssb core code. */
 332
 333        /* ID information about the PCB. */
 334        struct ssb_boardinfo boardinfo;
 335        /* Contents of the SPROM. */
 336        struct ssb_sprom sprom;
 337        /* If the board has a cardbus slot, this is set to true. */
 338        bool has_cardbus_slot;
 339
 340#ifdef CONFIG_SSB_EMBEDDED
 341        /* Lock for GPIO register access. */
 342        spinlock_t gpio_lock;
 343#endif /* EMBEDDED */
 344
 345        /* Internal-only stuff follows. Do not touch. */
 346        struct list_head list;
 347#ifdef CONFIG_SSB_DEBUG
 348        /* Is the bus already powered up? */
 349        bool powered_up;
 350        int power_warn_count;
 351#endif /* DEBUG */
 352};
 353
 354enum ssb_quirks {
 355        /* SDIO connected card requires performing a read after writing a 32-bit value */
 356        SSB_QUIRK_SDIO_READ_AFTER_WRITE32       = (1 << 0),
 357};
 358
 359/* The initialization-invariants. */
 360struct ssb_init_invariants {
 361        /* Versioning information about the PCB. */
 362        struct ssb_boardinfo boardinfo;
 363        /* The SPROM information. That's either stored in an
 364         * EEPROM or NVRAM on the board. */
 365        struct ssb_sprom sprom;
 366        /* If the board has a cardbus slot, this is set to true. */
 367        bool has_cardbus_slot;
 368};
 369/* Type of function to fetch the invariants. */
 370typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,
 371                                     struct ssb_init_invariants *iv);
 372
 373/* Register a SSB system bus. get_invariants() is called after the
 374 * basic system devices are initialized.
 375 * The invariants are usually fetched from some NVRAM.
 376 * Put the invariants into the struct pointed to by iv. */
 377extern int ssb_bus_ssbbus_register(struct ssb_bus *bus,
 378                                   unsigned long baseaddr,
 379                                   ssb_invariants_func_t get_invariants);
 380#ifdef CONFIG_SSB_PCIHOST
 381extern int ssb_bus_pcibus_register(struct ssb_bus *bus,
 382                                   struct pci_dev *host_pci);
 383#endif /* CONFIG_SSB_PCIHOST */
 384#ifdef CONFIG_SSB_PCMCIAHOST
 385extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
 386                                      struct pcmcia_device *pcmcia_dev,
 387                                      unsigned long baseaddr);
 388#endif /* CONFIG_SSB_PCMCIAHOST */
 389#ifdef CONFIG_SSB_SDIOHOST
 390extern int ssb_bus_sdiobus_register(struct ssb_bus *bus,
 391                                    struct sdio_func *sdio_func,
 392                                    unsigned int quirks);
 393#endif /* CONFIG_SSB_SDIOHOST */
 394
 395
 396extern void ssb_bus_unregister(struct ssb_bus *bus);
 397
 398/* Does the device have an SPROM? */
 399extern bool ssb_is_sprom_available(struct ssb_bus *bus);
 400
 401/* Set a fallback SPROM.
 402 * See kdoc at the function definition for complete documentation. */
 403extern int ssb_arch_set_fallback_sprom(const struct ssb_sprom *sprom);
 404
 405/* Suspend a SSB bus.
 406 * Call this from the parent bus suspend routine. */
 407extern int ssb_bus_suspend(struct ssb_bus *bus);
 408/* Resume a SSB bus.
 409 * Call this from the parent bus resume routine. */
 410extern int ssb_bus_resume(struct ssb_bus *bus);
 411
 412extern u32 ssb_clockspeed(struct ssb_bus *bus);
 413
 414/* Is the device enabled in hardware? */
 415int ssb_device_is_enabled(struct ssb_device *dev);
 416/* Enable a device and pass device-specific SSB_TMSLOW flags.
 417 * If no device-specific flags are available, use 0. */
 418void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
 419/* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */
 420void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
 421
 422
 423/* Device MMIO register read/write functions. */
 424static inline u8 ssb_read8(struct ssb_device *dev, u16 offset)
 425{
 426        return dev->ops->read8(dev, offset);
 427}
 428static inline u16 ssb_read16(struct ssb_device *dev, u16 offset)
 429{
 430        return dev->ops->read16(dev, offset);
 431}
 432static inline u32 ssb_read32(struct ssb_device *dev, u16 offset)
 433{
 434        return dev->ops->read32(dev, offset);
 435}
 436static inline void ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
 437{
 438        dev->ops->write8(dev, offset, value);
 439}
 440static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
 441{
 442        dev->ops->write16(dev, offset, value);
 443}
 444static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
 445{
 446        dev->ops->write32(dev, offset, value);
 447}
 448#ifdef CONFIG_SSB_BLOCKIO
 449static inline void ssb_block_read(struct ssb_device *dev, void *buffer,
 450                                  size_t count, u16 offset, u8 reg_width)
 451{
 452        dev->ops->block_read(dev, buffer, count, offset, reg_width);
 453}
 454
 455static inline void ssb_block_write(struct ssb_device *dev, const void *buffer,
 456                                   size_t count, u16 offset, u8 reg_width)
 457{
 458        dev->ops->block_write(dev, buffer, count, offset, reg_width);
 459}
 460#endif /* CONFIG_SSB_BLOCKIO */
 461
 462
 463/* The SSB DMA API. Use this API for any DMA operation on the device.
 464 * This API basically is a wrapper that calls the correct DMA API for
 465 * the host device type the SSB device is attached to. */
 466
 467/* Translation (routing) bits that need to be ORed to DMA
 468 * addresses before they are given to a device. */
 469extern u32 ssb_dma_translation(struct ssb_device *dev);
 470#define SSB_DMA_TRANSLATION_MASK        0xC0000000
 471#define SSB_DMA_TRANSLATION_SHIFT       30
 472
 473extern int ssb_dma_set_mask(struct ssb_device *dev, u64 mask);
 474
 475extern void * ssb_dma_alloc_consistent(struct ssb_device *dev, size_t size,
 476                                       dma_addr_t *dma_handle, gfp_t gfp_flags);
 477extern void ssb_dma_free_consistent(struct ssb_device *dev, size_t size,
 478                                    void *vaddr, dma_addr_t dma_handle,
 479                                    gfp_t gfp_flags);
 480
 481static inline void __cold __ssb_dma_not_implemented(struct ssb_device *dev)
 482{
 483#ifdef CONFIG_SSB_DEBUG
 484        printk(KERN_ERR "SSB: BUG! Calling DMA API for "
 485               "unsupported bustype %d\n", dev->bus->bustype);
 486#endif /* DEBUG */
 487}
 488
 489static inline int ssb_dma_mapping_error(struct ssb_device *dev, dma_addr_t addr)
 490{
 491        switch (dev->bus->bustype) {
 492        case SSB_BUSTYPE_PCI:
 493#ifdef CONFIG_SSB_PCIHOST
 494                return pci_dma_mapping_error(dev->bus->host_pci, addr);
 495#endif
 496                break;
 497        case SSB_BUSTYPE_SSB:
 498                return dma_mapping_error(dev->dev, addr);
 499        default:
 500                break;
 501        }
 502        __ssb_dma_not_implemented(dev);
 503        return -ENOSYS;
 504}
 505
 506static inline dma_addr_t ssb_dma_map_single(struct ssb_device *dev, void *p,
 507                                            size_t size, enum dma_data_direction dir)
 508{
 509        switch (dev->bus->bustype) {
 510        case SSB_BUSTYPE_PCI:
 511#ifdef CONFIG_SSB_PCIHOST
 512                return pci_map_single(dev->bus->host_pci, p, size, dir);
 513#endif
 514                break;
 515        case SSB_BUSTYPE_SSB:
 516                return dma_map_single(dev->dev, p, size, dir);
 517        default:
 518                break;
 519        }
 520        __ssb_dma_not_implemented(dev);
 521        return 0;
 522}
 523
 524static inline void ssb_dma_unmap_single(struct ssb_device *dev, dma_addr_t dma_addr,
 525                                        size_t size, enum dma_data_direction dir)
 526{
 527        switch (dev->bus->bustype) {
 528        case SSB_BUSTYPE_PCI:
 529#ifdef CONFIG_SSB_PCIHOST
 530                pci_unmap_single(dev->bus->host_pci, dma_addr, size, dir);
 531                return;
 532#endif
 533                break;
 534        case SSB_BUSTYPE_SSB:
 535                dma_unmap_single(dev->dev, dma_addr, size, dir);
 536                return;
 537        default:
 538                break;
 539        }
 540        __ssb_dma_not_implemented(dev);
 541}
 542
 543static inline void ssb_dma_sync_single_for_cpu(struct ssb_device *dev,
 544                                               dma_addr_t dma_addr,
 545                                               size_t size,
 546                                               enum dma_data_direction dir)
 547{
 548        switch (dev->bus->bustype) {
 549        case SSB_BUSTYPE_PCI:
 550#ifdef CONFIG_SSB_PCIHOST
 551                pci_dma_sync_single_for_cpu(dev->bus->host_pci, dma_addr,
 552                                            size, dir);
 553                return;
 554#endif
 555                break;
 556        case SSB_BUSTYPE_SSB:
 557                dma_sync_single_for_cpu(dev->dev, dma_addr, size, dir);
 558                return;
 559        default:
 560                break;
 561        }
 562        __ssb_dma_not_implemented(dev);
 563}
 564
 565static inline void ssb_dma_sync_single_for_device(struct ssb_device *dev,
 566                                                  dma_addr_t dma_addr,
 567                                                  size_t size,
 568                                                  enum dma_data_direction dir)
 569{
 570        switch (dev->bus->bustype) {
 571        case SSB_BUSTYPE_PCI:
 572#ifdef CONFIG_SSB_PCIHOST
 573                pci_dma_sync_single_for_device(dev->bus->host_pci, dma_addr,
 574                                               size, dir);
 575                return;
 576#endif
 577                break;
 578        case SSB_BUSTYPE_SSB:
 579                dma_sync_single_for_device(dev->dev, dma_addr, size, dir);
 580                return;
 581        default:
 582                break;
 583        }
 584        __ssb_dma_not_implemented(dev);
 585}
 586
 587static inline void ssb_dma_sync_single_range_for_cpu(struct ssb_device *dev,
 588                                                     dma_addr_t dma_addr,
 589                                                     unsigned long offset,
 590                                                     size_t size,
 591                                                     enum dma_data_direction dir)
 592{
 593        switch (dev->bus->bustype) {
 594        case SSB_BUSTYPE_PCI:
 595#ifdef CONFIG_SSB_PCIHOST
 596                /* Just sync everything. That's all the PCI API can do. */
 597                pci_dma_sync_single_for_cpu(dev->bus->host_pci, dma_addr,
 598                                            offset + size, dir);
 599                return;
 600#endif
 601                break;
 602        case SSB_BUSTYPE_SSB:
 603                dma_sync_single_range_for_cpu(dev->dev, dma_addr, offset,
 604                                              size, dir);
 605                return;
 606        default:
 607                break;
 608        }
 609        __ssb_dma_not_implemented(dev);
 610}
 611
 612static inline void ssb_dma_sync_single_range_for_device(struct ssb_device *dev,
 613                                                        dma_addr_t dma_addr,
 614                                                        unsigned long offset,
 615                                                        size_t size,
 616                                                        enum dma_data_direction dir)
 617{
 618        switch (dev->bus->bustype) {
 619        case SSB_BUSTYPE_PCI:
 620#ifdef CONFIG_SSB_PCIHOST
 621                /* Just sync everything. That's all the PCI API can do. */
 622                pci_dma_sync_single_for_device(dev->bus->host_pci, dma_addr,
 623                                               offset + size, dir);
 624                return;
 625#endif
 626                break;
 627        case SSB_BUSTYPE_SSB:
 628                dma_sync_single_range_for_device(dev->dev, dma_addr, offset,
 629                                                 size, dir);
 630                return;
 631        default:
 632                break;
 633        }
 634        __ssb_dma_not_implemented(dev);
 635}
 636
 637
 638#ifdef CONFIG_SSB_PCIHOST
 639/* PCI-host wrapper driver */
 640extern int ssb_pcihost_register(struct pci_driver *driver);
 641static inline void ssb_pcihost_unregister(struct pci_driver *driver)
 642{
 643        pci_unregister_driver(driver);
 644}
 645
 646static inline
 647void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
 648{
 649        if (sdev->bus->bustype == SSB_BUSTYPE_PCI)
 650                pci_set_power_state(sdev->bus->host_pci, state);
 651}
 652#else
 653static inline void ssb_pcihost_unregister(struct pci_driver *driver)
 654{
 655}
 656
 657static inline
 658void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
 659{
 660}
 661#endif /* CONFIG_SSB_PCIHOST */
 662
 663
 664/* If a driver is shutdown or suspended, call this to signal
 665 * that the bus may be completely powered down. SSB will decide,
 666 * if it's really time to power down the bus, based on if there
 667 * are other devices that want to run. */
 668extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
 669/* Before initializing and enabling a device, call this to power-up the bus.
 670 * If you want to allow use of dynamic-power-control, pass the flag.
 671 * Otherwise static always-on powercontrol will be used. */
 672extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
 673
 674
 675/* Various helper functions */
 676extern u32 ssb_admatch_base(u32 adm);
 677extern u32 ssb_admatch_size(u32 adm);
 678
 679/* PCI device mapping and fixup routines.
 680 * Called from the architecture pcibios init code.
 681 * These are only available on SSB_EMBEDDED configurations. */
 682#ifdef CONFIG_SSB_EMBEDDED
 683int ssb_pcibios_plat_dev_init(struct pci_dev *dev);
 684int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
 685#endif /* CONFIG_SSB_EMBEDDED */
 686
 687#endif /* LINUX_SSB_H_ */
 688