1#ifndef LINUX_B43_PHY_COMMON_H_ 2#define LINUX_B43_PHY_COMMON_H_ 3 4#include <linux/types.h> 5 6struct b43_wldev; 7 8/* Complex number using 2 32-bit signed integers */ 9struct b43_c32 { s32 i, q; }; 10 11#define CORDIC_CONVERT(value) (((value) >= 0) ? \ 12 ((((value) >> 15) + 1) >> 1) : \ 13 -((((-(value)) >> 15) + 1) >> 1)) 14 15/* PHY register routing bits */ 16#define B43_PHYROUTE 0x0C00 /* PHY register routing bits mask */ 17#define B43_PHYROUTE_BASE 0x0000 /* Base registers */ 18#define B43_PHYROUTE_OFDM_GPHY 0x0400 /* OFDM register routing for G-PHYs */ 19#define B43_PHYROUTE_EXT_GPHY 0x0800 /* Extended G-PHY registers */ 20#define B43_PHYROUTE_N_BMODE 0x0C00 /* N-PHY BMODE registers */ 21 22/* CCK (B-PHY) registers. */ 23#define B43_PHY_CCK(reg) ((reg) | B43_PHYROUTE_BASE) 24/* N-PHY registers. */ 25#define B43_PHY_N(reg) ((reg) | B43_PHYROUTE_BASE) 26/* N-PHY BMODE registers. */ 27#define B43_PHY_N_BMODE(reg) ((reg) | B43_PHYROUTE_N_BMODE) 28/* OFDM (A-PHY) registers. */ 29#define B43_PHY_OFDM(reg) ((reg) | B43_PHYROUTE_OFDM_GPHY) 30/* Extended G-PHY registers. */ 31#define B43_PHY_EXTG(reg) ((reg) | B43_PHYROUTE_EXT_GPHY) 32 33 34/* Masks for the PHY versioning registers. */ 35#define B43_PHYVER_ANALOG 0xF000 36#define B43_PHYVER_ANALOG_SHIFT 12 37#define B43_PHYVER_TYPE 0x0F00 38#define B43_PHYVER_TYPE_SHIFT 8 39#define B43_PHYVER_VERSION 0x00FF 40 41/** 42 * enum b43_interference_mitigation - Interference Mitigation mode 43 * 44 * @B43_INTERFMODE_NONE: Disabled 45 * @B43_INTERFMODE_NONWLAN: Non-WLAN Interference Mitigation 46 * @B43_INTERFMODE_MANUALWLAN: WLAN Interference Mitigation 47 * @B43_INTERFMODE_AUTOWLAN: Automatic WLAN Interference Mitigation 48 */ 49enum b43_interference_mitigation { 50 B43_INTERFMODE_NONE, 51 B43_INTERFMODE_NONWLAN, 52 B43_INTERFMODE_MANUALWLAN, 53 B43_INTERFMODE_AUTOWLAN, 54}; 55 56/* Antenna identifiers */ 57enum { 58 B43_ANTENNA0 = 0, /* Antenna 0 */ 59 B43_ANTENNA1 = 1, /* Antenna 1 */ 60 B43_ANTENNA_AUTO0 = 2, /* Automatic, starting with antenna 0 */ 61 B43_ANTENNA_AUTO1 = 3, /* Automatic, starting with antenna 1 */ 62 B43_ANTENNA2 = 4, 63 B43_ANTENNA3 = 8, 64 65 B43_ANTENNA_AUTO = B43_ANTENNA_AUTO0, 66 B43_ANTENNA_DEFAULT = B43_ANTENNA_AUTO, 67}; 68 69/** 70 * enum b43_txpwr_result - Return value for the recalc_txpower PHY op. 71 * 72 * @B43_TXPWR_RES_NEED_ADJUST: Values changed. Hardware adjustment is needed. 73 * @B43_TXPWR_RES_DONE: No more work to do. Everything is done. 74 */ 75enum b43_txpwr_result { 76 B43_TXPWR_RES_NEED_ADJUST, 77 B43_TXPWR_RES_DONE, 78}; 79 80/** 81 * struct b43_phy_operations - Function pointers for PHY ops. 82 * 83 * @allocate: Allocate and initialise the PHY data structures. 84 * Must not be NULL. 85 * @free: Destroy and free the PHY data structures. 86 * Must not be NULL. 87 * 88 * @prepare_structs: Prepare the PHY data structures. 89 * The data structures allocated in @allocate are 90 * initialized here. 91 * Must not be NULL. 92 * @prepare_hardware: Prepare the PHY. This is called before b43_chip_init to 93 * do some early early PHY hardware init. 94 * Can be NULL, if not required. 95 * @init: Initialize the PHY. 96 * Must not be NULL. 97 * @exit: Shutdown the PHY. 98 * Can be NULL, if not required. 99 * 100 * @phy_read: Read from a PHY register. 101 * Must not be NULL. 102 * @phy_write: Write to a PHY register. 103 * Must not be NULL. 104 * @phy_maskset: Maskset a PHY register, taking shortcuts. 105 * If it is NULL, a generic algorithm is used. 106 * @radio_read: Read from a Radio register. 107 * Must not be NULL. 108 * @radio_write: Write to a Radio register. 109 * Must not be NULL. 110 * 111 * @supports_hwpctl: Returns a boolean whether Hardware Power Control 112 * is supported or not. 113 * If NULL, hwpctl is assumed to be never supported. 114 * @software_rfkill: Turn the radio ON or OFF. 115 * Possible state values are 116 * RFKILL_STATE_SOFT_BLOCKED or 117 * RFKILL_STATE_UNBLOCKED 118 * Must not be NULL. 119 * @switch_analog: Turn the Analog on/off. 120 * Must not be NULL. 121 * @switch_channel: Switch the radio to another channel. 122 * Must not be NULL. 123 * @get_default_chan: Just returns the default channel number. 124 * Must not be NULL. 125 * @set_rx_antenna: Set the antenna used for RX. 126 * Can be NULL, if not supported. 127 * @interf_mitigation: Switch the Interference Mitigation mode. 128 * Can be NULL, if not supported. 129 * 130 * @recalc_txpower: Recalculate the transmission power parameters. 131 * This callback has to recalculate the TX power settings, 132 * but does not need to write them to the hardware, yet. 133 * Returns enum b43_txpwr_result to indicate whether the hardware 134 * needs to be adjusted. 135 * If B43_TXPWR_NEED_ADJUST is returned, @adjust_txpower 136 * will be called later. 137 * If the parameter "ignore_tssi" is true, the TSSI values should 138 * be ignored and a recalculation of the power settings should be 139 * done even if the TSSI values did not change. 140 * This function may sleep, but should not. 141 * Must not be NULL. 142 * @adjust_txpower: Write the previously calculated TX power settings 143 * (from @recalc_txpower) to the hardware. 144 * This function may sleep. 145 * Can be NULL, if (and ONLY if) @recalc_txpower _always_ 146 * returns B43_TXPWR_RES_DONE. 147 * 148 * @pwork_15sec: Periodic work. Called every 15 seconds. 149 * Can be NULL, if not required. 150 * @pwork_60sec: Periodic work. Called every 60 seconds. 151 * Can be NULL, if not required. 152 */ 153struct b43_phy_operations { 154 /* Initialisation */ 155 int (*allocate)(struct b43_wldev *dev); 156 void (*free)(struct b43_wldev *dev); 157 void (*prepare_structs)(struct b43_wldev *dev); 158 int (*prepare_hardware)(struct b43_wldev *dev); 159 int (*init)(struct b43_wldev *dev); 160 void (*exit)(struct b43_wldev *dev); 161 162 /* Register access */ 163 u16 (*phy_read)(struct b43_wldev *dev, u16 reg); 164 void (*phy_write)(struct b43_wldev *dev, u16 reg, u16 value); 165 void (*phy_maskset)(struct b43_wldev *dev, u16 reg, u16 mask, u16 set); 166 u16 (*radio_read)(struct b43_wldev *dev, u16 reg); 167 void (*radio_write)(struct b43_wldev *dev, u16 reg, u16 value); 168 169 /* Radio */ 170 bool (*supports_hwpctl)(struct b43_wldev *dev); 171 void (*software_rfkill)(struct b43_wldev *dev, bool blocked); 172 void (*switch_analog)(struct b43_wldev *dev, bool on); 173 int (*switch_channel)(struct b43_wldev *dev, unsigned int new_channel); 174 unsigned int (*get_default_chan)(struct b43_wldev *dev); 175 void (*set_rx_antenna)(struct b43_wldev *dev, int antenna); 176 int (*interf_mitigation)(struct b43_wldev *dev, 177 enum b43_interference_mitigation new_mode); 178 179 /* Transmission power adjustment */ 180 enum b43_txpwr_result (*recalc_txpower)(struct b43_wldev *dev, 181 bool ignore_tssi); 182 void (*adjust_txpower)(struct b43_wldev *dev); 183 184 /* Misc */ 185 void (*pwork_15sec)(struct b43_wldev *dev); 186 void (*pwork_60sec)(struct b43_wldev *dev); 187}; 188 189struct b43_phy_a; 190struct b43_phy_g; 191struct b43_phy_n; 192struct b43_phy_lp; 193 194struct b43_phy { 195 /* Hardware operation callbacks. */ 196 const struct b43_phy_operations *ops; 197 198 /* Most hardware context information is stored in the standard- 199 * specific data structures pointed to by the pointers below. 200 * Only one of them is valid (the currently enabled PHY). */ 201#ifdef CONFIG_B43_DEBUG 202 /* No union for debug build to force NULL derefs in buggy code. */ 203 struct { 204#else 205 union { 206#endif 207 /* A-PHY specific information */ 208 struct b43_phy_a *a; 209 /* G-PHY specific information */ 210 struct b43_phy_g *g; 211 /* N-PHY specific information */ 212 struct b43_phy_n *n; 213 /* LP-PHY specific information */ 214 struct b43_phy_lp *lp; 215 }; 216 217 /* Band support flags. */ 218 bool supports_2ghz; 219 bool supports_5ghz; 220 221 /* HT info */ 222 bool is_40mhz; 223 224 /* GMODE bit enabled? */ 225 bool gmode; 226 227 /* Analog Type */ 228 u8 analog; 229 /* B43_PHYTYPE_ */ 230 u8 type; 231 /* PHY revision number. */ 232 u8 rev; 233 234 /* Radio versioning */ 235 u16 radio_manuf; /* Radio manufacturer */ 236 u16 radio_ver; /* Radio version */ 237 u8 radio_rev; /* Radio revision */ 238 239 /* Software state of the radio */ 240 bool radio_on; 241 242 /* Desired TX power level (in dBm). 243 * This is set by the user and adjusted in b43_phy_xmitpower(). */ 244 int desired_txpower; 245 246 /* Hardware Power Control enabled? */ 247 bool hardware_power_control; 248 249 /* The time (in absolute jiffies) when the next TX power output 250 * check is needed. */ 251 unsigned long next_txpwr_check_time; 252 253 /* current channel */ 254 unsigned int channel; 255 256 /* PHY TX errors counter. */ 257 atomic_t txerr_cnt; 258 259#ifdef CONFIG_B43_DEBUG 260 /* PHY registers locked (w.r.t. firmware) */ 261 bool phy_locked; 262 /* Radio registers locked (w.r.t. firmware) */ 263 bool radio_locked; 264#endif /* B43_DEBUG */ 265}; 266 267 268/** 269 * b43_phy_allocate - Allocate PHY structs 270 * Allocate the PHY data structures, based on the current dev->phy.type 271 */ 272int b43_phy_allocate(struct b43_wldev *dev); 273 274/** 275 * b43_phy_free - Free PHY structs 276 */ 277void b43_phy_free(struct b43_wldev *dev); 278 279/** 280 * b43_phy_init - Initialise the PHY 281 */ 282int b43_phy_init(struct b43_wldev *dev); 283 284/** 285 * b43_phy_exit - Cleanup PHY 286 */ 287void b43_phy_exit(struct b43_wldev *dev); 288 289/** 290 * b43_has_hardware_pctl - Hardware Power Control supported? 291 * Returns a boolean, whether hardware power control is supported. 292 */ 293bool b43_has_hardware_pctl(struct b43_wldev *dev); 294 295/** 296 * b43_phy_read - 16bit PHY register read access 297 */ 298u16 b43_phy_read(struct b43_wldev *dev, u16 reg); 299 300/** 301 * b43_phy_write - 16bit PHY register write access 302 */ 303void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value); 304 305/** 306 * b43_phy_copy - copy contents of 16bit PHY register to another 307 */ 308void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg); 309 310/** 311 * b43_phy_mask - Mask a PHY register with a mask 312 */ 313void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask); 314 315/** 316 * b43_phy_set - OR a PHY register with a bitmap 317 */ 318void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set); 319 320/** 321 * b43_phy_maskset - Mask and OR a PHY register with a mask and bitmap 322 */ 323void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set); 324 325/** 326 * b43_radio_read - 16bit Radio register read access 327 */ 328u16 b43_radio_read(struct b43_wldev *dev, u16 reg); 329#define b43_radio_read16 b43_radio_read /* DEPRECATED */ 330 331/** 332 * b43_radio_write - 16bit Radio register write access 333 */ 334void b43_radio_write(struct b43_wldev *dev, u16 reg, u16 value); 335#define b43_radio_write16 b43_radio_write /* DEPRECATED */ 336 337/** 338 * b43_radio_mask - Mask a 16bit radio register with a mask 339 */ 340void b43_radio_mask(struct b43_wldev *dev, u16 offset, u16 mask); 341 342/** 343 * b43_radio_set - OR a 16bit radio register with a bitmap 344 */ 345void b43_radio_set(struct b43_wldev *dev, u16 offset, u16 set); 346 347/** 348 * b43_radio_maskset - Mask and OR a radio register with a mask and bitmap 349 */ 350void b43_radio_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set); 351 352/** 353 * b43_radio_lock - Lock firmware radio register access 354 */ 355void b43_radio_lock(struct b43_wldev *dev); 356 357/** 358 * b43_radio_unlock - Unlock firmware radio register access 359 */ 360void b43_radio_unlock(struct b43_wldev *dev); 361 362/** 363 * b43_phy_lock - Lock firmware PHY register access 364 */ 365void b43_phy_lock(struct b43_wldev *dev); 366 367/** 368 * b43_phy_unlock - Unlock firmware PHY register access 369 */ 370void b43_phy_unlock(struct b43_wldev *dev); 371 372/** 373 * b43_switch_channel - Switch to another channel 374 */ 375int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel); 376/** 377 * B43_DEFAULT_CHANNEL - Switch to the default channel. 378 */ 379#define B43_DEFAULT_CHANNEL UINT_MAX 380 381/** 382 * b43_software_rfkill - Turn the radio ON or OFF in software. 383 */ 384void b43_software_rfkill(struct b43_wldev *dev, bool blocked); 385 386/** 387 * b43_phy_txpower_check - Check TX power output. 388 * 389 * Compare the current TX power output to the desired power emission 390 * and schedule an adjustment in case it mismatches. 391 * 392 * @flags: OR'ed enum b43_phy_txpower_check_flags flags. 393 * See the docs below. 394 */ 395void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags); 396/** 397 * enum b43_phy_txpower_check_flags - Flags for b43_phy_txpower_check() 398 * 399 * @B43_TXPWR_IGNORE_TIME: Ignore the schedule time and force-redo 400 * the check now. 401 * @B43_TXPWR_IGNORE_TSSI: Redo the recalculation, even if the average 402 * TSSI did not change. 403 */ 404enum b43_phy_txpower_check_flags { 405 B43_TXPWR_IGNORE_TIME = (1 << 0), 406 B43_TXPWR_IGNORE_TSSI = (1 << 1), 407}; 408 409struct work_struct; 410void b43_phy_txpower_adjust_work(struct work_struct *work); 411 412/** 413 * b43_phy_shm_tssi_read - Read the average of the last 4 TSSI from SHM. 414 * 415 * @shm_offset: The SHM address to read the values from. 416 * 417 * Returns the average of the 4 TSSI values, or a negative error code. 418 */ 419int b43_phy_shm_tssi_read(struct b43_wldev *dev, u16 shm_offset); 420 421/** 422 * b43_phy_switch_analog_generic - Generic PHY operation for switching the Analog. 423 * 424 * It does the switching based on the PHY0 core register. 425 * Do _not_ call this directly. Only use it as a switch_analog callback 426 * for struct b43_phy_operations. 427 */ 428void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on); 429 430struct b43_c32 b43_cordic(int theta); 431 432#endif /* LINUX_B43_PHY_COMMON_H_ */ 433