LXR linux/include/linux/fsl

   1/*
   2 * include/linux/fsl_devices.h
   3 *
   4 * Definitions for any platform device related flags or structures for
   5 * Freescale processor devices
   6 *
   7 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
   8 *
   9 * Copyright 2004 Freescale Semiconductor, Inc
  10 *
  11 * This program is free software; you can redistribute  it and/or modify it
  12 * under  the terms of  the GNU General  Public License as published by the
  13 * Free Software Foundation;  either version 2 of the  License, or (at your
  14 * option) any later version.
  15 */
  16
  17#ifndef _FSL_DEVICE_H_
  18#define _FSL_DEVICE_H_
  19
  20#include <linux/types.h>
  21
  22/*
  23 * Some conventions on how we handle peripherals on Freescale chips
  24 *
  25 * unique device: a platform_device entry in fsl_plat_devs[] plus
  26 * associated device information in its platform_data structure.
  27 *
  28 * A chip is described by a set of unique devices.
  29 *
  30 * Each sub-arch has its own master list of unique devices and
  31 * enumerates them by enum fsl_devices in a sub-arch specific header
  32 *
  33 * The platform data structure is broken into two parts.  The
  34 * first is device specific information that help identify any
  35 * unique features of a peripheral.  The second is any
  36 * information that may be defined by the board or how the device
  37 * is connected externally of the chip.
  38 *
  39 * naming conventions:
  40 * - platform data structures: <driver>_platform_data
  41 * - platform data device flags: FSL_<driver>_DEV_<FLAG>
  42 * - platform data board flags: FSL_<driver>_BRD_<FLAG>
  43 *
  44 */
  45
  46enum fsl_usb2_operating_modes {
  47        FSL_USB2_MPH_HOST,
  48        FSL_USB2_DR_HOST,
  49        FSL_USB2_DR_DEVICE,
  50        FSL_USB2_DR_OTG,
  51};
  52
  53enum fsl_usb2_phy_modes {
  54        FSL_USB2_PHY_NONE,
  55        FSL_USB2_PHY_ULPI,
  56        FSL_USB2_PHY_UTMI,
  57        FSL_USB2_PHY_UTMI_WIDE,
  58        FSL_USB2_PHY_SERIAL,
  59};
  60
  61struct fsl_usb2_platform_data {
  62        /* board specific information */
  63        enum fsl_usb2_operating_modes   operating_mode;
  64        enum fsl_usb2_phy_modes         phy_mode;
  65        unsigned int                    port_enables;
  66};
  67
  68/* Flags in fsl_usb2_mph_platform_data */
  69#define FSL_USB2_PORT0_ENABLED  0x00000001
  70#define FSL_USB2_PORT1_ENABLED  0x00000002
  71
  72struct spi_device;
  73
  74struct fsl_spi_platform_data {
  75        u32     initial_spmode; /* initial SPMODE value */
  76        s16     bus_num;
  77        unsigned int flags;
  78#define SPI_QE_CPU_MODE         (1 << 0) /* QE CPU ("PIO") mode */
  79#define SPI_CPM_MODE            (1 << 1) /* CPM/QE ("DMA") mode */
  80#define SPI_CPM1                (1 << 2) /* SPI unit is in CPM1 block */
  81#define SPI_CPM2                (1 << 3) /* SPI unit is in CPM2 block */
  82#define SPI_QE                  (1 << 4) /* SPI unit is in QE block */
  83        /* board specific information */
  84        u16     max_chipselect;
  85        void    (*cs_control)(struct spi_device *spi, bool on);
  86        u32     sysclk;
  87};
  88
  89struct mpc8xx_pcmcia_ops {
  90        void(*hw_ctrl)(int slot, int enable);
  91        int(*voltage_set)(int slot, int vcc, int vpp);
  92};
  93
  94/* Returns non-zero if the current suspend operation would
  95 * lead to a deep sleep (i.e. power removed from the core,
  96 * instead of just the clock).
  97 */
  98#if defined(CONFIG_PPC_83xx) && defined(CONFIG_SUSPEND)
  99int fsl_deep_sleep(void);
 100#else
 101static inline int fsl_deep_sleep(void) { return 0; }
 102#endif
 103
 104#endif /* _FSL_DEVICE_H_ */
 105