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29#ifndef __LINUX_ATA_H__
30#define __LINUX_ATA_H__
31
32#include <linux/kernel.h>
33#include <linux/string.h>
34#include <linux/types.h>
35#include <asm/byteorder.h>
36
37
38#define ATA_DMA_BOUNDARY 0xffffUL
39#define ATA_DMA_MASK 0xffffffffULL
40
41enum {
42
43 ATA_MAX_DEVICES = 2,
44 ATA_MAX_PRD = 256,
45 ATA_SECT_SIZE = 512,
46 ATA_MAX_SECTORS_128 = 128,
47 ATA_MAX_SECTORS = 256,
48 ATA_MAX_SECTORS_LBA48 = 65535,
49 ATA_MAX_SECTORS_TAPE = 65535,
50
51 ATA_ID_WORDS = 256,
52 ATA_ID_CONFIG = 0,
53 ATA_ID_CYLS = 1,
54 ATA_ID_HEADS = 3,
55 ATA_ID_SECTORS = 6,
56 ATA_ID_SERNO = 10,
57 ATA_ID_BUF_SIZE = 21,
58 ATA_ID_FW_REV = 23,
59 ATA_ID_PROD = 27,
60 ATA_ID_MAX_MULTSECT = 47,
61 ATA_ID_DWORD_IO = 48,
62 ATA_ID_CAPABILITY = 49,
63 ATA_ID_OLD_PIO_MODES = 51,
64 ATA_ID_OLD_DMA_MODES = 52,
65 ATA_ID_FIELD_VALID = 53,
66 ATA_ID_CUR_CYLS = 54,
67 ATA_ID_CUR_HEADS = 55,
68 ATA_ID_CUR_SECTORS = 56,
69 ATA_ID_MULTSECT = 59,
70 ATA_ID_LBA_CAPACITY = 60,
71 ATA_ID_SWDMA_MODES = 62,
72 ATA_ID_MWDMA_MODES = 63,
73 ATA_ID_PIO_MODES = 64,
74 ATA_ID_EIDE_DMA_MIN = 65,
75 ATA_ID_EIDE_DMA_TIME = 66,
76 ATA_ID_EIDE_PIO = 67,
77 ATA_ID_EIDE_PIO_IORDY = 68,
78 ATA_ID_ADDITIONAL_SUPP = 69,
79 ATA_ID_QUEUE_DEPTH = 75,
80 ATA_ID_MAJOR_VER = 80,
81 ATA_ID_COMMAND_SET_1 = 82,
82 ATA_ID_COMMAND_SET_2 = 83,
83 ATA_ID_CFSSE = 84,
84 ATA_ID_CFS_ENABLE_1 = 85,
85 ATA_ID_CFS_ENABLE_2 = 86,
86 ATA_ID_CSF_DEFAULT = 87,
87 ATA_ID_UDMA_MODES = 88,
88 ATA_ID_HW_CONFIG = 93,
89 ATA_ID_SPG = 98,
90 ATA_ID_LBA_CAPACITY_2 = 100,
91 ATA_ID_SECTOR_SIZE = 106,
92 ATA_ID_LAST_LUN = 126,
93 ATA_ID_DLF = 128,
94 ATA_ID_CSFO = 129,
95 ATA_ID_CFA_POWER = 160,
96 ATA_ID_CFA_KEY_MGMT = 162,
97 ATA_ID_CFA_MODES = 163,
98 ATA_ID_DATA_SET_MGMT = 169,
99 ATA_ID_ROT_SPEED = 217,
100 ATA_ID_PIO4 = (1 << 1),
101
102 ATA_ID_SERNO_LEN = 20,
103 ATA_ID_FW_REV_LEN = 8,
104 ATA_ID_PROD_LEN = 40,
105
106 ATA_PCI_CTL_OFS = 2,
107
108 ATA_PIO0 = (1 << 0),
109 ATA_PIO1 = ATA_PIO0 | (1 << 1),
110 ATA_PIO2 = ATA_PIO1 | (1 << 2),
111 ATA_PIO3 = ATA_PIO2 | (1 << 3),
112 ATA_PIO4 = ATA_PIO3 | (1 << 4),
113 ATA_PIO5 = ATA_PIO4 | (1 << 5),
114 ATA_PIO6 = ATA_PIO5 | (1 << 6),
115
116 ATA_PIO4_ONLY = (1 << 4),
117
118 ATA_SWDMA0 = (1 << 0),
119 ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1),
120 ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2),
121
122 ATA_SWDMA2_ONLY = (1 << 2),
123
124 ATA_MWDMA0 = (1 << 0),
125 ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1),
126 ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2),
127 ATA_MWDMA3 = ATA_MWDMA2 | (1 << 3),
128 ATA_MWDMA4 = ATA_MWDMA3 | (1 << 4),
129
130 ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2),
131 ATA_MWDMA2_ONLY = (1 << 2),
132
133 ATA_UDMA0 = (1 << 0),
134 ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
135 ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
136 ATA_UDMA3 = ATA_UDMA2 | (1 << 3),
137 ATA_UDMA4 = ATA_UDMA3 | (1 << 4),
138 ATA_UDMA5 = ATA_UDMA4 | (1 << 5),
139 ATA_UDMA6 = ATA_UDMA5 | (1 << 6),
140 ATA_UDMA7 = ATA_UDMA6 | (1 << 7),
141
142
143 ATA_UDMA24_ONLY = (1 << 2) | (1 << 4),
144
145 ATA_UDMA_MASK_40C = ATA_UDMA2,
146
147
148 ATA_PRD_SZ = 8,
149 ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
150 ATA_PRD_EOT = (1 << 31),
151
152 ATA_DMA_TABLE_OFS = 4,
153 ATA_DMA_STATUS = 2,
154 ATA_DMA_CMD = 0,
155 ATA_DMA_WR = (1 << 3),
156 ATA_DMA_START = (1 << 0),
157 ATA_DMA_INTR = (1 << 2),
158 ATA_DMA_ERR = (1 << 1),
159 ATA_DMA_ACTIVE = (1 << 0),
160
161
162 ATA_HOB = (1 << 7),
163 ATA_NIEN = (1 << 1),
164 ATA_LBA = (1 << 6),
165 ATA_DEV1 = (1 << 4),
166 ATA_DEVICE_OBS = (1 << 7) | (1 << 5),
167 ATA_DEVCTL_OBS = (1 << 3),
168 ATA_BUSY = (1 << 7),
169 ATA_DRDY = (1 << 6),
170 ATA_DF = (1 << 5),
171 ATA_DSC = (1 << 4),
172 ATA_DRQ = (1 << 3),
173 ATA_CORR = (1 << 2),
174 ATA_IDX = (1 << 1),
175 ATA_ERR = (1 << 0),
176 ATA_SRST = (1 << 2),
177 ATA_ICRC = (1 << 7),
178 ATA_BBK = ATA_ICRC,
179 ATA_UNC = (1 << 6),
180 ATA_MC = (1 << 5),
181 ATA_IDNF = (1 << 4),
182 ATA_MCR = (1 << 3),
183 ATA_ABORTED = (1 << 2),
184 ATA_TRK0NF = (1 << 1),
185 ATA_AMNF = (1 << 0),
186 ATAPI_LFS = 0xF0,
187 ATAPI_EOM = ATA_TRK0NF,
188 ATAPI_ILI = ATA_AMNF,
189 ATAPI_IO = (1 << 1),
190 ATAPI_COD = (1 << 0),
191
192
193 ATA_REG_DATA = 0x00,
194 ATA_REG_ERR = 0x01,
195 ATA_REG_NSECT = 0x02,
196 ATA_REG_LBAL = 0x03,
197 ATA_REG_LBAM = 0x04,
198 ATA_REG_LBAH = 0x05,
199 ATA_REG_DEVICE = 0x06,
200 ATA_REG_STATUS = 0x07,
201
202 ATA_REG_FEATURE = ATA_REG_ERR,
203 ATA_REG_CMD = ATA_REG_STATUS,
204 ATA_REG_BYTEL = ATA_REG_LBAM,
205 ATA_REG_BYTEH = ATA_REG_LBAH,
206 ATA_REG_DEVSEL = ATA_REG_DEVICE,
207 ATA_REG_IRQ = ATA_REG_NSECT,
208
209
210 ATA_CMD_DEV_RESET = 0x08,
211 ATA_CMD_CHK_POWER = 0xE5,
212 ATA_CMD_STANDBY = 0xE2,
213 ATA_CMD_IDLE = 0xE3,
214 ATA_CMD_EDD = 0x90,
215 ATA_CMD_DOWNLOAD_MICRO = 0x92,
216 ATA_CMD_NOP = 0x00,
217 ATA_CMD_FLUSH = 0xE7,
218 ATA_CMD_FLUSH_EXT = 0xEA,
219 ATA_CMD_ID_ATA = 0xEC,
220 ATA_CMD_ID_ATAPI = 0xA1,
221 ATA_CMD_SERVICE = 0xA2,
222 ATA_CMD_READ = 0xC8,
223 ATA_CMD_READ_EXT = 0x25,
224 ATA_CMD_READ_QUEUED = 0x26,
225 ATA_CMD_READ_STREAM_EXT = 0x2B,
226 ATA_CMD_READ_STREAM_DMA_EXT = 0x2A,
227 ATA_CMD_WRITE = 0xCA,
228 ATA_CMD_WRITE_EXT = 0x35,
229 ATA_CMD_WRITE_QUEUED = 0x36,
230 ATA_CMD_WRITE_STREAM_EXT = 0x3B,
231 ATA_CMD_WRITE_STREAM_DMA_EXT = 0x3A,
232 ATA_CMD_WRITE_FUA_EXT = 0x3D,
233 ATA_CMD_WRITE_QUEUED_FUA_EXT = 0x3E,
234 ATA_CMD_FPDMA_READ = 0x60,
235 ATA_CMD_FPDMA_WRITE = 0x61,
236 ATA_CMD_PIO_READ = 0x20,
237 ATA_CMD_PIO_READ_EXT = 0x24,
238 ATA_CMD_PIO_WRITE = 0x30,
239 ATA_CMD_PIO_WRITE_EXT = 0x34,
240 ATA_CMD_READ_MULTI = 0xC4,
241 ATA_CMD_READ_MULTI_EXT = 0x29,
242 ATA_CMD_WRITE_MULTI = 0xC5,
243 ATA_CMD_WRITE_MULTI_EXT = 0x39,
244 ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
245 ATA_CMD_SET_FEATURES = 0xEF,
246 ATA_CMD_SET_MULTI = 0xC6,
247 ATA_CMD_PACKET = 0xA0,
248 ATA_CMD_VERIFY = 0x40,
249 ATA_CMD_VERIFY_EXT = 0x42,
250 ATA_CMD_WRITE_UNCORR_EXT = 0x45,
251 ATA_CMD_STANDBYNOW1 = 0xE0,
252 ATA_CMD_IDLEIMMEDIATE = 0xE1,
253 ATA_CMD_SLEEP = 0xE6,
254 ATA_CMD_INIT_DEV_PARAMS = 0x91,
255 ATA_CMD_READ_NATIVE_MAX = 0xF8,
256 ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
257 ATA_CMD_SET_MAX = 0xF9,
258 ATA_CMD_SET_MAX_EXT = 0x37,
259 ATA_CMD_READ_LOG_EXT = 0x2F,
260 ATA_CMD_WRITE_LOG_EXT = 0x3F,
261 ATA_CMD_READ_LOG_DMA_EXT = 0x47,
262 ATA_CMD_WRITE_LOG_DMA_EXT = 0x57,
263 ATA_CMD_TRUSTED_RCV = 0x5C,
264 ATA_CMD_TRUSTED_RCV_DMA = 0x5D,
265 ATA_CMD_TRUSTED_SND = 0x5E,
266 ATA_CMD_TRUSTED_SND_DMA = 0x5F,
267 ATA_CMD_PMP_READ = 0xE4,
268 ATA_CMD_PMP_WRITE = 0xE8,
269 ATA_CMD_CONF_OVERLAY = 0xB1,
270 ATA_CMD_SEC_SET_PASS = 0xF1,
271 ATA_CMD_SEC_UNLOCK = 0xF2,
272 ATA_CMD_SEC_ERASE_PREP = 0xF3,
273 ATA_CMD_SEC_ERASE_UNIT = 0xF4,
274 ATA_CMD_SEC_FREEZE_LOCK = 0xF5,
275 ATA_CMD_SEC_DISABLE_PASS = 0xF6,
276 ATA_CMD_CONFIG_STREAM = 0x51,
277 ATA_CMD_SMART = 0xB0,
278 ATA_CMD_MEDIA_LOCK = 0xDE,
279 ATA_CMD_MEDIA_UNLOCK = 0xDF,
280 ATA_CMD_DSM = 0x06,
281 ATA_CMD_CHK_MED_CRD_TYP = 0xD1,
282 ATA_CMD_CFA_REQ_EXT_ERR = 0x03,
283 ATA_CMD_CFA_WRITE_NE = 0x38,
284 ATA_CMD_CFA_TRANS_SECT = 0x87,
285 ATA_CMD_CFA_ERASE = 0xC0,
286 ATA_CMD_CFA_WRITE_MULT_NE = 0xCD,
287
288 ATA_CMD_RESTORE = 0x10,
289
290
291 ATA_LOG_SATA_NCQ = 0x10,
292
293
294 ATA_CMD_READ_LONG = 0x22,
295 ATA_CMD_READ_LONG_ONCE = 0x23,
296 ATA_CMD_WRITE_LONG = 0x32,
297 ATA_CMD_WRITE_LONG_ONCE = 0x33,
298
299
300 SETFEATURES_XFER = 0x03,
301 XFER_UDMA_7 = 0x47,
302 XFER_UDMA_6 = 0x46,
303 XFER_UDMA_5 = 0x45,
304 XFER_UDMA_4 = 0x44,
305 XFER_UDMA_3 = 0x43,
306 XFER_UDMA_2 = 0x42,
307 XFER_UDMA_1 = 0x41,
308 XFER_UDMA_0 = 0x40,
309 XFER_MW_DMA_4 = 0x24,
310 XFER_MW_DMA_3 = 0x23,
311 XFER_MW_DMA_2 = 0x22,
312 XFER_MW_DMA_1 = 0x21,
313 XFER_MW_DMA_0 = 0x20,
314 XFER_SW_DMA_2 = 0x12,
315 XFER_SW_DMA_1 = 0x11,
316 XFER_SW_DMA_0 = 0x10,
317 XFER_PIO_6 = 0x0E,
318 XFER_PIO_5 = 0x0D,
319 XFER_PIO_4 = 0x0C,
320 XFER_PIO_3 = 0x0B,
321 XFER_PIO_2 = 0x0A,
322 XFER_PIO_1 = 0x09,
323 XFER_PIO_0 = 0x08,
324 XFER_PIO_SLOW = 0x00,
325
326 SETFEATURES_WC_ON = 0x02,
327 SETFEATURES_WC_OFF = 0x82,
328
329
330 SETFEATURES_AAM_ON = 0x42,
331 SETFEATURES_AAM_OFF = 0xC2,
332
333 SETFEATURES_SPINUP = 0x07,
334
335 SETFEATURES_SATA_ENABLE = 0x10,
336 SETFEATURES_SATA_DISABLE = 0x90,
337
338
339 SATA_FPDMA_OFFSET = 0x01,
340 SATA_FPDMA_AA = 0x02,
341 SATA_DIPM = 0x03,
342 SATA_FPDMA_IN_ORDER = 0x04,
343 SATA_AN = 0x05,
344 SATA_SSP = 0x06,
345
346
347 ATA_SET_MAX_ADDR = 0x00,
348 ATA_SET_MAX_PASSWD = 0x01,
349 ATA_SET_MAX_LOCK = 0x02,
350 ATA_SET_MAX_UNLOCK = 0x03,
351 ATA_SET_MAX_FREEZE_LOCK = 0x04,
352
353
354 ATA_DCO_RESTORE = 0xC0,
355 ATA_DCO_FREEZE_LOCK = 0xC1,
356 ATA_DCO_IDENTIFY = 0xC2,
357 ATA_DCO_SET = 0xC3,
358
359
360 ATA_SMART_ENABLE = 0xD8,
361 ATA_SMART_READ_VALUES = 0xD0,
362 ATA_SMART_READ_THRESHOLDS = 0xD1,
363
364
365 ATA_DSM_TRIM = 0x01,
366
367
368 ATA_SMART_LBAM_PASS = 0x4F,
369 ATA_SMART_LBAH_PASS = 0xC2,
370
371
372 ATAPI_PKT_DMA = (1 << 0),
373 ATAPI_DMADIR = (1 << 2),
374
375 ATAPI_CDB_LEN = 16,
376
377
378 SATA_PMP_MAX_PORTS = 15,
379 SATA_PMP_CTRL_PORT = 15,
380
381 SATA_PMP_GSCR_DWORDS = 128,
382 SATA_PMP_GSCR_PROD_ID = 0,
383 SATA_PMP_GSCR_REV = 1,
384 SATA_PMP_GSCR_PORT_INFO = 2,
385 SATA_PMP_GSCR_ERROR = 32,
386 SATA_PMP_GSCR_ERROR_EN = 33,
387 SATA_PMP_GSCR_FEAT = 64,
388 SATA_PMP_GSCR_FEAT_EN = 96,
389
390 SATA_PMP_PSCR_STATUS = 0,
391 SATA_PMP_PSCR_ERROR = 1,
392 SATA_PMP_PSCR_CONTROL = 2,
393
394 SATA_PMP_FEAT_BIST = (1 << 0),
395 SATA_PMP_FEAT_PMREQ = (1 << 1),
396 SATA_PMP_FEAT_DYNSSC = (1 << 2),
397 SATA_PMP_FEAT_NOTIFY = (1 << 3),
398
399
400 ATA_CBL_NONE = 0,
401 ATA_CBL_PATA40 = 1,
402 ATA_CBL_PATA80 = 2,
403 ATA_CBL_PATA40_SHORT = 3,
404 ATA_CBL_PATA_UNK = 4,
405 ATA_CBL_PATA_IGN = 5,
406 ATA_CBL_SATA = 6,
407
408
409 SCR_STATUS = 0,
410 SCR_ERROR = 1,
411 SCR_CONTROL = 2,
412 SCR_ACTIVE = 3,
413 SCR_NOTIFICATION = 4,
414
415
416 SERR_DATA_RECOVERED = (1 << 0),
417 SERR_COMM_RECOVERED = (1 << 1),
418 SERR_DATA = (1 << 8),
419 SERR_PERSISTENT = (1 << 9),
420 SERR_PROTOCOL = (1 << 10),
421 SERR_INTERNAL = (1 << 11),
422 SERR_PHYRDY_CHG = (1 << 16),
423 SERR_PHY_INT_ERR = (1 << 17),
424 SERR_COMM_WAKE = (1 << 18),
425 SERR_10B_8B_ERR = (1 << 19),
426 SERR_DISPARITY = (1 << 20),
427 SERR_CRC = (1 << 21),
428 SERR_HANDSHAKE = (1 << 22),
429 SERR_LINK_SEQ_ERR = (1 << 23),
430 SERR_TRANS_ST_ERROR = (1 << 24),
431 SERR_UNRECOG_FIS = (1 << 25),
432 SERR_DEV_XCHG = (1 << 26),
433
434
435 ATA_TFLAG_LBA48 = (1 << 0),
436 ATA_TFLAG_ISADDR = (1 << 1),
437 ATA_TFLAG_DEVICE = (1 << 2),
438 ATA_TFLAG_WRITE = (1 << 3),
439 ATA_TFLAG_LBA = (1 << 4),
440 ATA_TFLAG_FUA = (1 << 5),
441 ATA_TFLAG_POLLING = (1 << 6),
442
443
444 ATA_PROT_FLAG_PIO = (1 << 0),
445 ATA_PROT_FLAG_DMA = (1 << 1),
446 ATA_PROT_FLAG_DATA = ATA_PROT_FLAG_PIO | ATA_PROT_FLAG_DMA,
447 ATA_PROT_FLAG_NCQ = (1 << 2),
448 ATA_PROT_FLAG_ATAPI = (1 << 3),
449};
450
451enum ata_tf_protocols {
452
453 ATA_PROT_UNKNOWN,
454 ATA_PROT_NODATA,
455 ATA_PROT_PIO,
456 ATA_PROT_DMA,
457 ATA_PROT_NCQ,
458 ATAPI_PROT_NODATA,
459 ATAPI_PROT_PIO,
460 ATAPI_PROT_DMA,
461};
462
463enum ata_ioctls {
464 ATA_IOC_GET_IO32 = 0x309,
465 ATA_IOC_SET_IO32 = 0x324,
466};
467
468
469
470struct ata_prd {
471 __le32 addr;
472 __le32 flags_len;
473};
474
475struct ata_taskfile {
476 unsigned long flags;
477 u8 protocol;
478
479 u8 ctl;
480
481 u8 hob_feature;
482 u8 hob_nsect;
483 u8 hob_lbal;
484 u8 hob_lbam;
485 u8 hob_lbah;
486
487 u8 feature;
488 u8 nsect;
489 u8 lbal;
490 u8 lbam;
491 u8 lbah;
492
493 u8 device;
494
495 u8 command;
496};
497
498
499
500
501static inline unsigned int ata_prot_flags(u8 prot)
502{
503 switch (prot) {
504 case ATA_PROT_NODATA:
505 return 0;
506 case ATA_PROT_PIO:
507 return ATA_PROT_FLAG_PIO;
508 case ATA_PROT_DMA:
509 return ATA_PROT_FLAG_DMA;
510 case ATA_PROT_NCQ:
511 return ATA_PROT_FLAG_DMA | ATA_PROT_FLAG_NCQ;
512 case ATAPI_PROT_NODATA:
513 return ATA_PROT_FLAG_ATAPI;
514 case ATAPI_PROT_PIO:
515 return ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_PIO;
516 case ATAPI_PROT_DMA:
517 return ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_DMA;
518 }
519 return 0;
520}
521
522static inline int ata_is_atapi(u8 prot)
523{
524 return ata_prot_flags(prot) & ATA_PROT_FLAG_ATAPI;
525}
526
527static inline int ata_is_nodata(u8 prot)
528{
529 return !(ata_prot_flags(prot) & ATA_PROT_FLAG_DATA);
530}
531
532static inline int ata_is_pio(u8 prot)
533{
534 return ata_prot_flags(prot) & ATA_PROT_FLAG_PIO;
535}
536
537static inline int ata_is_dma(u8 prot)
538{
539 return ata_prot_flags(prot) & ATA_PROT_FLAG_DMA;
540}
541
542static inline int ata_is_ncq(u8 prot)
543{
544 return ata_prot_flags(prot) & ATA_PROT_FLAG_NCQ;
545}
546
547static inline int ata_is_data(u8 prot)
548{
549 return ata_prot_flags(prot) & ATA_PROT_FLAG_DATA;
550}
551
552
553
554
555#define ata_id_is_ata(id) (((id)[ATA_ID_CONFIG] & (1 << 15)) == 0)
556#define ata_id_has_lba(id) ((id)[ATA_ID_CAPABILITY] & (1 << 9))
557#define ata_id_has_dma(id) ((id)[ATA_ID_CAPABILITY] & (1 << 8))
558#define ata_id_has_ncq(id) ((id)[76] & (1 << 8))
559#define ata_id_queue_depth(id) (((id)[ATA_ID_QUEUE_DEPTH] & 0x1f) + 1)
560#define ata_id_removeable(id) ((id)[ATA_ID_CONFIG] & (1 << 7))
561#define ata_id_has_atapi_AN(id) \
562 ( (((id)[76] != 0x0000) && ((id)[76] != 0xffff)) && \
563 ((id)[78] & (1 << 5)) )
564#define ata_id_has_fpdma_aa(id) \
565 ( (((id)[76] != 0x0000) && ((id)[76] != 0xffff)) && \
566 ((id)[78] & (1 << 2)) )
567#define ata_id_iordy_disable(id) ((id)[ATA_ID_CAPABILITY] & (1 << 10))
568#define ata_id_has_iordy(id) ((id)[ATA_ID_CAPABILITY] & (1 << 11))
569#define ata_id_u32(id,n) \
570 (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
571#define ata_id_u64(id,n) \
572 ( ((u64) (id)[(n) + 3] << 48) | \
573 ((u64) (id)[(n) + 2] << 32) | \
574 ((u64) (id)[(n) + 1] << 16) | \
575 ((u64) (id)[(n) + 0]) )
576
577#define ata_id_cdb_intr(id) (((id)[ATA_ID_CONFIG] & 0x60) == 0x20)
578
579static inline bool ata_id_has_hipm(const u16 *id)
580{
581 u16 val = id[76];
582
583 if (val == 0 || val == 0xffff)
584 return false;
585
586 return val & (1 << 9);
587}
588
589static inline bool ata_id_has_dipm(const u16 *id)
590{
591 u16 val = id[78];
592
593 if (val == 0 || val == 0xffff)
594 return false;
595
596 return val & (1 << 3);
597}
598
599
600static inline int ata_id_has_fua(const u16 *id)
601{
602 if ((id[ATA_ID_CFSSE] & 0xC000) != 0x4000)
603 return 0;
604 return id[ATA_ID_CFSSE] & (1 << 6);
605}
606
607static inline int ata_id_has_flush(const u16 *id)
608{
609 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
610 return 0;
611 return id[ATA_ID_COMMAND_SET_2] & (1 << 12);
612}
613
614static inline int ata_id_flush_enabled(const u16 *id)
615{
616 if (ata_id_has_flush(id) == 0)
617 return 0;
618 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
619 return 0;
620 return id[ATA_ID_CFS_ENABLE_2] & (1 << 12);
621}
622
623static inline int ata_id_has_flush_ext(const u16 *id)
624{
625 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
626 return 0;
627 return id[ATA_ID_COMMAND_SET_2] & (1 << 13);
628}
629
630static inline int ata_id_flush_ext_enabled(const u16 *id)
631{
632 if (ata_id_has_flush_ext(id) == 0)
633 return 0;
634 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
635 return 0;
636
637
638
639
640 return (id[ATA_ID_CFS_ENABLE_2] & 0x2400) == 0x2400;
641}
642
643static inline int ata_id_has_large_logical_sectors(const u16 *id)
644{
645 if ((id[ATA_ID_SECTOR_SIZE] & 0xc000) != 0x4000)
646 return 0;
647 return id[ATA_ID_SECTOR_SIZE] & (1 << 13);
648}
649
650static inline u16 ata_id_logical_per_physical_sectors(const u16 *id)
651{
652 return 1 << (id[ATA_ID_SECTOR_SIZE] & 0xf);
653}
654
655static inline int ata_id_has_lba48(const u16 *id)
656{
657 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
658 return 0;
659 if (!ata_id_u64(id, ATA_ID_LBA_CAPACITY_2))
660 return 0;
661 return id[ATA_ID_COMMAND_SET_2] & (1 << 10);
662}
663
664static inline int ata_id_lba48_enabled(const u16 *id)
665{
666 if (ata_id_has_lba48(id) == 0)
667 return 0;
668 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
669 return 0;
670 return id[ATA_ID_CFS_ENABLE_2] & (1 << 10);
671}
672
673static inline int ata_id_hpa_enabled(const u16 *id)
674{
675
676 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
677 return 0;
678
679 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
680 return 0;
681
682 if ((id[ATA_ID_CFS_ENABLE_1] & (1 << 10)) == 0)
683 return 0;
684 return id[ATA_ID_COMMAND_SET_1] & (1 << 10);
685}
686
687static inline int ata_id_has_wcache(const u16 *id)
688{
689
690 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
691 return 0;
692 return id[ATA_ID_COMMAND_SET_1] & (1 << 5);
693}
694
695static inline int ata_id_has_pm(const u16 *id)
696{
697 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
698 return 0;
699 return id[ATA_ID_COMMAND_SET_1] & (1 << 3);
700}
701
702static inline int ata_id_rahead_enabled(const u16 *id)
703{
704 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
705 return 0;
706 return id[ATA_ID_CFS_ENABLE_1] & (1 << 6);
707}
708
709static inline int ata_id_wcache_enabled(const u16 *id)
710{
711 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
712 return 0;
713 return id[ATA_ID_CFS_ENABLE_1] & (1 << 5);
714}
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729static inline unsigned int ata_id_major_version(const u16 *id)
730{
731 unsigned int mver;
732
733 if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
734 return 0;
735
736 for (mver = 14; mver >= 1; mver--)
737 if (id[ATA_ID_MAJOR_VER] & (1 << mver))
738 break;
739 return mver;
740}
741
742static inline int ata_id_is_sata(const u16 *id)
743{
744
745
746
747
748
749
750 if (id[ATA_ID_HW_CONFIG] == 0 && (short)id[ATA_ID_MAJOR_VER] >= 0x0020)
751 return 1;
752 return 0;
753}
754
755static inline int ata_id_has_tpm(const u16 *id)
756{
757
758 if (ata_id_major_version(id) < 8)
759 return 0;
760 if ((id[48] & 0xC000) != 0x4000)
761 return 0;
762 return id[48] & (1 << 0);
763}
764
765static inline int ata_id_has_dword_io(const u16 *id)
766{
767
768 if (ata_id_major_version(id) > 7)
769 return 0;
770 if (id[ATA_ID_DWORD_IO] & (1 << 0))
771 return 1;
772 return 0;
773}
774
775static inline int ata_id_has_unload(const u16 *id)
776{
777 if (ata_id_major_version(id) >= 7 &&
778 (id[ATA_ID_CFSSE] & 0xC000) == 0x4000 &&
779 id[ATA_ID_CFSSE] & (1 << 13))
780 return 1;
781 return 0;
782}
783
784static inline int ata_id_form_factor(const u16 *id)
785{
786 u16 val = id[168];
787
788 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
789 return 0;
790
791 val &= 0xf;
792
793 if (val > 5)
794 return 0;
795
796 return val;
797}
798
799static inline int ata_id_rotation_rate(const u16 *id)
800{
801 u16 val = id[217];
802
803 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
804 return 0;
805
806 if (val > 1 && val < 0x401)
807 return 0;
808
809 return val;
810}
811
812static inline int ata_id_has_trim(const u16 *id)
813{
814 if (ata_id_major_version(id) >= 7 &&
815 (id[ATA_ID_DATA_SET_MGMT] & 1))
816 return 1;
817 return 0;
818}
819
820static inline int ata_id_has_zero_after_trim(const u16 *id)
821{
822
823 if (ata_id_has_trim(id) &&
824 (id[ATA_ID_ADDITIONAL_SUPP] & 0x4020) == 0x4020)
825 return 1;
826
827 return 0;
828}
829
830static inline int ata_id_current_chs_valid(const u16 *id)
831{
832
833
834
835 return (id[ATA_ID_FIELD_VALID] & 1) &&
836 id[ATA_ID_CUR_CYLS] &&
837 id[ATA_ID_CUR_HEADS] &&
838 id[ATA_ID_CUR_HEADS] <= 16 &&
839 id[ATA_ID_CUR_SECTORS];
840}
841
842static inline int ata_id_is_cfa(const u16 *id)
843{
844 if ((id[ATA_ID_CONFIG] == 0x848A) ||
845 (id[ATA_ID_CONFIG] == 0x844A))
846 return 1;
847
848
849
850
851
852
853
854
855 if ((id[ATA_ID_COMMAND_SET_2] & 0xC004) == 0x4004)
856 return 1;
857 return 0;
858}
859
860static inline int ata_id_is_ssd(const u16 *id)
861{
862 return id[ATA_ID_ROT_SPEED] == 0x01;
863}
864
865static inline int ata_id_pio_need_iordy(const u16 *id, const u8 pio)
866{
867
868 if (pio > 4 && ata_id_is_cfa(id))
869 return 0;
870
871 if (pio > 2)
872 return 1;
873
874 if (ata_id_has_iordy(id))
875 return 1;
876 return 0;
877}
878
879static inline int ata_drive_40wire(const u16 *dev_id)
880{
881 if (ata_id_is_sata(dev_id))
882 return 0;
883 if ((dev_id[ATA_ID_HW_CONFIG] & 0xE000) == 0x6000)
884 return 0;
885 return 1;
886}
887
888static inline int ata_drive_40wire_relaxed(const u16 *dev_id)
889{
890 if ((dev_id[ATA_ID_HW_CONFIG] & 0x2000) == 0x2000)
891 return 0;
892 return 1;
893}
894
895static inline int atapi_cdb_len(const u16 *dev_id)
896{
897 u16 tmp = dev_id[ATA_ID_CONFIG] & 0x3;
898 switch (tmp) {
899 case 0: return 12;
900 case 1: return 16;
901 default: return -1;
902 }
903}
904
905static inline int atapi_command_packet_set(const u16 *dev_id)
906{
907 return (dev_id[ATA_ID_CONFIG] >> 8) & 0x1f;
908}
909
910static inline int atapi_id_dmadir(const u16 *dev_id)
911{
912 return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000);
913}
914
915
916
917
918
919
920
921
922
923static inline int ata_id_is_lba_capacity_ok(u16 *id)
924{
925 unsigned long lba_sects, chs_sects, head, tail;
926
927
928 if (id[ATA_ID_CYLS] == 0)
929 return 1;
930
931 lba_sects = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
932
933
934
935
936
937
938
939 if ((id[ATA_ID_CYLS] == 16383 ||
940 (id[ATA_ID_CYLS] == 4092 && id[ATA_ID_CUR_CYLS] == 16383)) &&
941 id[ATA_ID_SECTORS] == 63 &&
942 (id[ATA_ID_HEADS] == 15 || id[ATA_ID_HEADS] == 16) &&
943 (lba_sects >= 16383 * 63 * id[ATA_ID_HEADS]))
944 return 1;
945
946 chs_sects = id[ATA_ID_CYLS] * id[ATA_ID_HEADS] * id[ATA_ID_SECTORS];
947
948
949 if (lba_sects - chs_sects < chs_sects/10)
950 return 1;
951
952
953 head = (lba_sects >> 16) & 0xffff;
954 tail = lba_sects & 0xffff;
955 lba_sects = head | (tail << 16);
956
957 if (lba_sects - chs_sects < chs_sects/10) {
958 *(__le32 *)&id[ATA_ID_LBA_CAPACITY] = __cpu_to_le32(lba_sects);
959 return 1;
960 }
961
962 return 0;
963}
964
965static inline void ata_id_to_hd_driveid(u16 *id)
966{
967#ifdef __BIG_ENDIAN
968
969 id[ATA_ID_MAX_MULTSECT] = __cpu_to_le16(id[ATA_ID_MAX_MULTSECT]);
970 id[ATA_ID_CAPABILITY] = __cpu_to_le16(id[ATA_ID_CAPABILITY]);
971 id[ATA_ID_OLD_PIO_MODES] = __cpu_to_le16(id[ATA_ID_OLD_PIO_MODES]);
972 id[ATA_ID_OLD_DMA_MODES] = __cpu_to_le16(id[ATA_ID_OLD_DMA_MODES]);
973 id[ATA_ID_MULTSECT] = __cpu_to_le16(id[ATA_ID_MULTSECT]);
974
975
976 *(u32 *)&id[ATA_ID_LBA_CAPACITY] = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
977 *(u32 *)&id[ATA_ID_SPG] = ata_id_u32(id, ATA_ID_SPG);
978
979
980 *(u64 *)&id[ATA_ID_LBA_CAPACITY_2] =
981 ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
982#endif
983}
984
985
986
987
988
989
990static inline unsigned ata_set_lba_range_entries(void *_buffer,
991 unsigned buf_size, u64 sector, unsigned long count)
992{
993 __le64 *buffer = _buffer;
994 unsigned i = 0, used_bytes;
995
996 while (i < buf_size / 8 ) {
997 u64 entry = sector |
998 ((u64)(count > 0xffff ? 0xffff : count) << 48);
999 buffer[i++] = __cpu_to_le64(entry);
1000 if (count <= 0xffff)
1001 break;
1002 count -= 0xffff;
1003 sector += 0xffff;
1004 }
1005
1006 used_bytes = ALIGN(i * 8, 512);
1007 memset(buffer + i, 0, used_bytes - i * 8);
1008 return used_bytes;
1009}
1010
1011static inline int is_multi_taskfile(struct ata_taskfile *tf)
1012{
1013 return (tf->command == ATA_CMD_READ_MULTI) ||
1014 (tf->command == ATA_CMD_WRITE_MULTI) ||
1015 (tf->command == ATA_CMD_READ_MULTI_EXT) ||
1016 (tf->command == ATA_CMD_WRITE_MULTI_EXT) ||
1017 (tf->command == ATA_CMD_WRITE_MULTI_FUA_EXT);
1018}
1019
1020static inline int ata_ok(u8 status)
1021{
1022 return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
1023 == ATA_DRDY);
1024}
1025
1026static inline int lba_28_ok(u64 block, u32 n_block)
1027{
1028
1029 return ((block + n_block) < ((1 << 28) - 1)) && (n_block <= 256);
1030}
1031
1032static inline int lba_48_ok(u64 block, u32 n_block)
1033{
1034
1035 return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
1036}
1037
1038#define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
1039#define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
1040#define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
1041#define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
1042
1043#endif
1044