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9#include <linux/delay.h>
10#include <linux/module.h>
11#include <linux/err.h>
12#include <linux/proc_fs.h>
13#include <asm/blackfin.h>
14#include <asm/gpio.h>
15#include <asm/portmux.h>
16#include <linux/irq.h>
17
18#if ANOMALY_05000311 || ANOMALY_05000323
19enum {
20 AWA_data = SYSCR,
21 AWA_data_clear = SYSCR,
22 AWA_data_set = SYSCR,
23 AWA_toggle = SYSCR,
24 AWA_maska = BFIN_UART_SCR,
25 AWA_maska_clear = BFIN_UART_SCR,
26 AWA_maska_set = BFIN_UART_SCR,
27 AWA_maska_toggle = BFIN_UART_SCR,
28 AWA_maskb = BFIN_UART_GCTL,
29 AWA_maskb_clear = BFIN_UART_GCTL,
30 AWA_maskb_set = BFIN_UART_GCTL,
31 AWA_maskb_toggle = BFIN_UART_GCTL,
32 AWA_dir = SPORT1_STAT,
33 AWA_polar = SPORT1_STAT,
34 AWA_edge = SPORT1_STAT,
35 AWA_both = SPORT1_STAT,
36#if ANOMALY_05000311
37 AWA_inen = TIMER_ENABLE,
38#elif ANOMALY_05000323
39 AWA_inen = DMA1_1_CONFIG,
40#endif
41};
42
43#define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
44#else
45#define AWA_DUMMY_READ(...) do { } while (0)
46#endif
47
48static struct gpio_port_t * const gpio_array[] = {
49#if defined(BF533_FAMILY) || defined(BF538_FAMILY)
50 (struct gpio_port_t *) FIO_FLAG_D,
51#elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
52 (struct gpio_port_t *) PORTFIO,
53 (struct gpio_port_t *) PORTGIO,
54 (struct gpio_port_t *) PORTHIO,
55#elif defined(BF561_FAMILY)
56 (struct gpio_port_t *) FIO0_FLAG_D,
57 (struct gpio_port_t *) FIO1_FLAG_D,
58 (struct gpio_port_t *) FIO2_FLAG_D,
59#elif defined(CONFIG_BF54x)
60 (struct gpio_port_t *)PORTA_FER,
61 (struct gpio_port_t *)PORTB_FER,
62 (struct gpio_port_t *)PORTC_FER,
63 (struct gpio_port_t *)PORTD_FER,
64 (struct gpio_port_t *)PORTE_FER,
65 (struct gpio_port_t *)PORTF_FER,
66 (struct gpio_port_t *)PORTG_FER,
67 (struct gpio_port_t *)PORTH_FER,
68 (struct gpio_port_t *)PORTI_FER,
69 (struct gpio_port_t *)PORTJ_FER,
70#else
71# error no gpio arrays defined
72#endif
73};
74
75#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
76static unsigned short * const port_fer[] = {
77 (unsigned short *) PORTF_FER,
78 (unsigned short *) PORTG_FER,
79 (unsigned short *) PORTH_FER,
80};
81
82# if !defined(BF537_FAMILY)
83static unsigned short * const port_mux[] = {
84 (unsigned short *) PORTF_MUX,
85 (unsigned short *) PORTG_MUX,
86 (unsigned short *) PORTH_MUX,
87};
88
89static const
90u8 pmux_offset[][16] = {
91# if defined(CONFIG_BF52x)
92 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 },
93 { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 },
94 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 },
95# elif defined(CONFIG_BF51x)
96 { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 },
97 { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 },
98 { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 },
99# endif
100};
101# endif
102
103#elif defined(BF538_FAMILY)
104static unsigned short * const port_fer[] = {
105 (unsigned short *) PORTCIO_FER,
106 (unsigned short *) PORTDIO_FER,
107 (unsigned short *) PORTEIO_FER,
108};
109#endif
110
111static unsigned short reserved_gpio_map[GPIO_BANK_NUM];
112static unsigned short reserved_peri_map[gpio_bank(MAX_RESOURCES)];
113static unsigned short reserved_gpio_irq_map[GPIO_BANK_NUM];
114
115#define RESOURCE_LABEL_SIZE 16
116
117static struct str_ident {
118 char name[RESOURCE_LABEL_SIZE];
119} str_ident[MAX_RESOURCES];
120
121#if defined(CONFIG_PM)
122static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
123#endif
124
125inline int check_gpio(unsigned gpio)
126{
127#if defined(CONFIG_BF54x)
128 if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
129 || gpio == GPIO_PH14 || gpio == GPIO_PH15
130 || gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
131 return -EINVAL;
132#endif
133 if (gpio >= MAX_BLACKFIN_GPIOS)
134 return -EINVAL;
135 return 0;
136}
137
138static void gpio_error(unsigned gpio)
139{
140 printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
141}
142
143static void set_label(unsigned short ident, const char *label)
144{
145 if (label) {
146 strncpy(str_ident[ident].name, label,
147 RESOURCE_LABEL_SIZE);
148 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
149 }
150}
151
152static char *get_label(unsigned short ident)
153{
154 return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
155}
156
157static int cmp_label(unsigned short ident, const char *label)
158{
159 if (label == NULL) {
160 dump_stack();
161 printk(KERN_ERR "Please provide none-null label\n");
162 }
163
164 if (label)
165 return strcmp(str_ident[ident].name, label);
166 else
167 return -EINVAL;
168}
169
170static void port_setup(unsigned gpio, unsigned short usage)
171{
172#if defined(BF538_FAMILY)
173
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179
180 if (gpio < MAX_BLACKFIN_GPIOS || gpio >= MAX_RESOURCES)
181 return;
182
183 gpio -= MAX_BLACKFIN_GPIOS;
184
185 if (usage == GPIO_USAGE)
186 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
187 else
188 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
189 SSYNC();
190 return;
191#endif
192
193 if (check_gpio(gpio))
194 return;
195
196#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
197 if (usage == GPIO_USAGE)
198 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
199 else
200 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
201 SSYNC();
202#elif defined(CONFIG_BF54x)
203 if (usage == GPIO_USAGE)
204 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
205 else
206 gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
207 SSYNC();
208#endif
209}
210
211#ifdef BF537_FAMILY
212static struct {
213 unsigned short res;
214 unsigned short offset;
215} port_mux_lut[] = {
216 {.res = P_PPI0_D13, .offset = 11},
217 {.res = P_PPI0_D14, .offset = 11},
218 {.res = P_PPI0_D15, .offset = 11},
219 {.res = P_SPORT1_TFS, .offset = 11},
220 {.res = P_SPORT1_TSCLK, .offset = 11},
221 {.res = P_SPORT1_DTPRI, .offset = 11},
222 {.res = P_PPI0_D10, .offset = 10},
223 {.res = P_PPI0_D11, .offset = 10},
224 {.res = P_PPI0_D12, .offset = 10},
225 {.res = P_SPORT1_RSCLK, .offset = 10},
226 {.res = P_SPORT1_RFS, .offset = 10},
227 {.res = P_SPORT1_DRPRI, .offset = 10},
228 {.res = P_PPI0_D8, .offset = 9},
229 {.res = P_PPI0_D9, .offset = 9},
230 {.res = P_SPORT1_DRSEC, .offset = 9},
231 {.res = P_SPORT1_DTSEC, .offset = 9},
232 {.res = P_TMR2, .offset = 8},
233 {.res = P_PPI0_FS3, .offset = 8},
234 {.res = P_TMR3, .offset = 7},
235 {.res = P_SPI0_SSEL4, .offset = 7},
236 {.res = P_TMR4, .offset = 6},
237 {.res = P_SPI0_SSEL5, .offset = 6},
238 {.res = P_TMR5, .offset = 5},
239 {.res = P_SPI0_SSEL6, .offset = 5},
240 {.res = P_UART1_RX, .offset = 4},
241 {.res = P_UART1_TX, .offset = 4},
242 {.res = P_TMR6, .offset = 4},
243 {.res = P_TMR7, .offset = 4},
244 {.res = P_UART0_RX, .offset = 3},
245 {.res = P_UART0_TX, .offset = 3},
246 {.res = P_DMAR0, .offset = 3},
247 {.res = P_DMAR1, .offset = 3},
248 {.res = P_SPORT0_DTSEC, .offset = 1},
249 {.res = P_SPORT0_DRSEC, .offset = 1},
250 {.res = P_CAN0_RX, .offset = 1},
251 {.res = P_CAN0_TX, .offset = 1},
252 {.res = P_SPI0_SSEL7, .offset = 1},
253 {.res = P_SPORT0_TFS, .offset = 0},
254 {.res = P_SPORT0_DTPRI, .offset = 0},
255 {.res = P_SPI0_SSEL2, .offset = 0},
256 {.res = P_SPI0_SSEL3, .offset = 0},
257};
258
259static void portmux_setup(unsigned short per)
260{
261 u16 y, offset, muxreg;
262 u16 function = P_FUNCT2MUX(per);
263
264 for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
265 if (port_mux_lut[y].res == per) {
266
267
268
269 offset = port_mux_lut[y].offset;
270 muxreg = bfin_read_PORT_MUX();
271
272 if (offset != 1)
273 muxreg &= ~(1 << offset);
274 else
275 muxreg &= ~(3 << 1);
276
277 muxreg |= (function << offset);
278 bfin_write_PORT_MUX(muxreg);
279 }
280 }
281}
282#elif defined(CONFIG_BF54x)
283inline void portmux_setup(unsigned short per)
284{
285 u32 pmux;
286 u16 ident = P_IDENT(per);
287 u16 function = P_FUNCT2MUX(per);
288
289 pmux = gpio_array[gpio_bank(ident)]->port_mux;
290
291 pmux &= ~(0x3 << (2 * gpio_sub_n(ident)));
292 pmux |= (function & 0x3) << (2 * gpio_sub_n(ident));
293
294 gpio_array[gpio_bank(ident)]->port_mux = pmux;
295}
296
297inline u16 get_portmux(unsigned short per)
298{
299 u32 pmux;
300 u16 ident = P_IDENT(per);
301
302 pmux = gpio_array[gpio_bank(ident)]->port_mux;
303
304 return (pmux >> (2 * gpio_sub_n(ident)) & 0x3);
305}
306#elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
307inline void portmux_setup(unsigned short per)
308{
309 u16 pmux, ident = P_IDENT(per), function = P_FUNCT2MUX(per);
310 u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
311
312 pmux = *port_mux[gpio_bank(ident)];
313 pmux &= ~(3 << offset);
314 pmux |= (function & 3) << offset;
315 *port_mux[gpio_bank(ident)] = pmux;
316 SSYNC();
317}
318#else
319# define portmux_setup(...) do { } while (0)
320#endif
321
322#ifndef CONFIG_BF54x
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341
342#define SET_GPIO(name) \
343void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
344{ \
345 unsigned long flags; \
346 local_irq_save_hw(flags); \
347 if (arg) \
348 gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
349 else \
350 gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
351 AWA_DUMMY_READ(name); \
352 local_irq_restore_hw(flags); \
353} \
354EXPORT_SYMBOL(set_gpio_ ## name);
355
356SET_GPIO(dir)
357SET_GPIO(inen)
358SET_GPIO(polar)
359SET_GPIO(edge)
360SET_GPIO(both)
361
362
363#define SET_GPIO_SC(name) \
364void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
365{ \
366 unsigned long flags; \
367 if (ANOMALY_05000311 || ANOMALY_05000323) \
368 local_irq_save_hw(flags); \
369 if (arg) \
370 gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
371 else \
372 gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
373 if (ANOMALY_05000311 || ANOMALY_05000323) { \
374 AWA_DUMMY_READ(name); \
375 local_irq_restore_hw(flags); \
376 } \
377} \
378EXPORT_SYMBOL(set_gpio_ ## name);
379
380SET_GPIO_SC(maska)
381SET_GPIO_SC(maskb)
382SET_GPIO_SC(data)
383
384void set_gpio_toggle(unsigned gpio)
385{
386 unsigned long flags;
387 if (ANOMALY_05000311 || ANOMALY_05000323)
388 local_irq_save_hw(flags);
389 gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
390 if (ANOMALY_05000311 || ANOMALY_05000323) {
391 AWA_DUMMY_READ(toggle);
392 local_irq_restore_hw(flags);
393 }
394}
395EXPORT_SYMBOL(set_gpio_toggle);
396
397
398
399
400#define SET_GPIO_P(name) \
401void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
402{ \
403 unsigned long flags; \
404 if (ANOMALY_05000311 || ANOMALY_05000323) \
405 local_irq_save_hw(flags); \
406 gpio_array[gpio_bank(gpio)]->name = arg; \
407 if (ANOMALY_05000311 || ANOMALY_05000323) { \
408 AWA_DUMMY_READ(name); \
409 local_irq_restore_hw(flags); \
410 } \
411} \
412EXPORT_SYMBOL(set_gpiop_ ## name);
413
414SET_GPIO_P(data)
415SET_GPIO_P(dir)
416SET_GPIO_P(inen)
417SET_GPIO_P(polar)
418SET_GPIO_P(edge)
419SET_GPIO_P(both)
420SET_GPIO_P(maska)
421SET_GPIO_P(maskb)
422
423
424#define GET_GPIO(name) \
425unsigned short get_gpio_ ## name(unsigned gpio) \
426{ \
427 unsigned long flags; \
428 unsigned short ret; \
429 if (ANOMALY_05000311 || ANOMALY_05000323) \
430 local_irq_save_hw(flags); \
431 ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
432 if (ANOMALY_05000311 || ANOMALY_05000323) { \
433 AWA_DUMMY_READ(name); \
434 local_irq_restore_hw(flags); \
435 } \
436 return ret; \
437} \
438EXPORT_SYMBOL(get_gpio_ ## name);
439
440GET_GPIO(data)
441GET_GPIO(dir)
442GET_GPIO(inen)
443GET_GPIO(polar)
444GET_GPIO(edge)
445GET_GPIO(both)
446GET_GPIO(maska)
447GET_GPIO(maskb)
448
449
450
451#define GET_GPIO_P(name) \
452unsigned short get_gpiop_ ## name(unsigned gpio) \
453{ \
454 unsigned long flags; \
455 unsigned short ret; \
456 if (ANOMALY_05000311 || ANOMALY_05000323) \
457 local_irq_save_hw(flags); \
458 ret = (gpio_array[gpio_bank(gpio)]->name); \
459 if (ANOMALY_05000311 || ANOMALY_05000323) { \
460 AWA_DUMMY_READ(name); \
461 local_irq_restore_hw(flags); \
462 } \
463 return ret; \
464} \
465EXPORT_SYMBOL(get_gpiop_ ## name);
466
467GET_GPIO_P(data)
468GET_GPIO_P(dir)
469GET_GPIO_P(inen)
470GET_GPIO_P(polar)
471GET_GPIO_P(edge)
472GET_GPIO_P(both)
473GET_GPIO_P(maska)
474GET_GPIO_P(maskb)
475
476
477#ifdef CONFIG_PM
478
479static unsigned short wakeup_map[GPIO_BANK_NUM];
480static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
481
482static const unsigned int sic_iwr_irqs[] = {
483#if defined(BF533_FAMILY)
484 IRQ_PROG_INTB
485#elif defined(BF537_FAMILY)
486 IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX
487#elif defined(BF538_FAMILY)
488 IRQ_PORTF_INTB
489#elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
490 IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB
491#elif defined(BF561_FAMILY)
492 IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB
493#else
494# error no SIC_IWR defined
495#endif
496};
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516
517int gpio_pm_wakeup_request(unsigned gpio, unsigned char type)
518{
519 unsigned long flags;
520
521 if ((check_gpio(gpio) < 0) || !type)
522 return -EINVAL;
523
524 local_irq_save_hw(flags);
525 wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
526 wakeup_flags_map[gpio] = type;
527 local_irq_restore_hw(flags);
528
529 return 0;
530}
531EXPORT_SYMBOL(gpio_pm_wakeup_request);
532
533void gpio_pm_wakeup_free(unsigned gpio)
534{
535 unsigned long flags;
536
537 if (check_gpio(gpio) < 0)
538 return;
539
540 local_irq_save_hw(flags);
541
542 wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
543
544 local_irq_restore_hw(flags);
545}
546EXPORT_SYMBOL(gpio_pm_wakeup_free);
547
548static int bfin_gpio_wakeup_type(unsigned gpio, unsigned char type)
549{
550 port_setup(gpio, GPIO_USAGE);
551 set_gpio_dir(gpio, 0);
552 set_gpio_inen(gpio, 1);
553
554 if (type & (PM_WAKE_RISING | PM_WAKE_FALLING))
555 set_gpio_edge(gpio, 1);
556 else
557 set_gpio_edge(gpio, 0);
558
559 if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES))
560 set_gpio_both(gpio, 1);
561 else
562 set_gpio_both(gpio, 0);
563
564 if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW)))
565 set_gpio_polar(gpio, 1);
566 else
567 set_gpio_polar(gpio, 0);
568
569 SSYNC();
570
571 return 0;
572}
573
574u32 bfin_pm_standby_setup(void)
575{
576 u16 bank, mask, i, gpio;
577
578 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
579 mask = wakeup_map[gpio_bank(i)];
580 bank = gpio_bank(i);
581
582 gpio_bank_saved[bank].maskb = gpio_array[bank]->maskb;
583 gpio_array[bank]->maskb = 0;
584
585 if (mask) {
586#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
587 gpio_bank_saved[bank].fer = *port_fer[bank];
588#endif
589 gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
590 gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
591 gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
592 gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
593 gpio_bank_saved[bank].both = gpio_array[bank]->both;
594 gpio_bank_saved[bank].reserved =
595 reserved_gpio_map[bank];
596
597 gpio = i;
598
599 while (mask) {
600 if ((mask & 1) && (wakeup_flags_map[gpio] !=
601 PM_WAKE_IGNORE)) {
602 reserved_gpio_map[gpio_bank(gpio)] |=
603 gpio_bit(gpio);
604 bfin_gpio_wakeup_type(gpio,
605 wakeup_flags_map[gpio]);
606 set_gpio_data(gpio, 0);
607 }
608 gpio++;
609 mask >>= 1;
610 }
611
612 bfin_internal_set_wake(sic_iwr_irqs[bank], 1);
613 gpio_array[bank]->maskb_set = wakeup_map[gpio_bank(i)];
614 }
615 }
616
617 AWA_DUMMY_READ(maskb_set);
618
619 return 0;
620}
621
622void bfin_pm_standby_restore(void)
623{
624 u16 bank, mask, i;
625
626 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
627 mask = wakeup_map[gpio_bank(i)];
628 bank = gpio_bank(i);
629
630 if (mask) {
631#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
632 *port_fer[bank] = gpio_bank_saved[bank].fer;
633#endif
634 gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
635 gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
636 gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
637 gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
638 gpio_array[bank]->both = gpio_bank_saved[bank].both;
639
640 reserved_gpio_map[bank] =
641 gpio_bank_saved[bank].reserved;
642 bfin_internal_set_wake(sic_iwr_irqs[bank], 0);
643 }
644
645 gpio_array[bank]->maskb = gpio_bank_saved[bank].maskb;
646 }
647 AWA_DUMMY_READ(maskb);
648}
649
650void bfin_gpio_pm_hibernate_suspend(void)
651{
652 int i, bank;
653
654 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
655 bank = gpio_bank(i);
656
657#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
658 gpio_bank_saved[bank].fer = *port_fer[bank];
659#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
660 gpio_bank_saved[bank].mux = *port_mux[bank];
661#else
662 if (bank == 0)
663 gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
664#endif
665#endif
666 gpio_bank_saved[bank].data = gpio_array[bank]->data;
667 gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
668 gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
669 gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
670 gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
671 gpio_bank_saved[bank].both = gpio_array[bank]->both;
672 gpio_bank_saved[bank].maska = gpio_array[bank]->maska;
673 }
674
675 AWA_DUMMY_READ(maska);
676}
677
678void bfin_gpio_pm_hibernate_restore(void)
679{
680 int i, bank;
681
682 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
683 bank = gpio_bank(i);
684
685#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
686#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
687 *port_mux[bank] = gpio_bank_saved[bank].mux;
688#else
689 if (bank == 0)
690 bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
691#endif
692 *port_fer[bank] = gpio_bank_saved[bank].fer;
693#endif
694 gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
695 gpio_array[bank]->data_set = gpio_bank_saved[bank].data
696 & gpio_bank_saved[bank].dir;
697 gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
698 gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
699 gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
700 gpio_array[bank]->both = gpio_bank_saved[bank].both;
701 gpio_array[bank]->maska = gpio_bank_saved[bank].maska;
702 }
703 AWA_DUMMY_READ(maska);
704}
705
706
707#endif
708#else
709#ifdef CONFIG_PM
710
711u32 bfin_pm_standby_setup(void)
712{
713 return 0;
714}
715
716void bfin_pm_standby_restore(void)
717{
718
719}
720
721void bfin_gpio_pm_hibernate_suspend(void)
722{
723 int i, bank;
724
725 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
726 bank = gpio_bank(i);
727
728 gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
729 gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
730 gpio_bank_saved[bank].data = gpio_array[bank]->data;
731 gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
732 gpio_bank_saved[bank].dir = gpio_array[bank]->dir_set;
733 }
734}
735
736void bfin_gpio_pm_hibernate_restore(void)
737{
738 int i, bank;
739
740 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
741 bank = gpio_bank(i);
742
743 gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
744 gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
745 gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
746 gpio_array[bank]->dir_set = gpio_bank_saved[bank].dir;
747 gpio_array[bank]->data_set = gpio_bank_saved[bank].data
748 | gpio_bank_saved[bank].dir;
749 }
750}
751#endif
752
753unsigned short get_gpio_dir(unsigned gpio)
754{
755 return (0x01 & (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio)));
756}
757EXPORT_SYMBOL(get_gpio_dir);
758
759#endif
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777int peripheral_request(unsigned short per, const char *label)
778{
779 unsigned long flags;
780 unsigned short ident = P_IDENT(per);
781
782
783
784
785
786 if (per & P_DONTCARE)
787 return 0;
788
789 if (!(per & P_DEFINED))
790 return -ENODEV;
791
792 BUG_ON(ident >= MAX_RESOURCES);
793
794 local_irq_save_hw(flags);
795
796
797
798
799 if (unlikely(!check_gpio(ident) &&
800 reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
801 if (system_state == SYSTEM_BOOTING)
802 dump_stack();
803 printk(KERN_ERR
804 "%s: Peripheral %d is already reserved as GPIO by %s !\n",
805 __func__, ident, get_label(ident));
806 local_irq_restore_hw(flags);
807 return -EBUSY;
808 }
809
810 if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
811
812
813
814
815
816
817#ifdef CONFIG_BF54x
818 if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) {
819#else
820 if (!(per & P_MAYSHARE)) {
821#endif
822
823
824
825
826
827 if (cmp_label(ident, label) == 0)
828 goto anyway;
829
830 if (system_state == SYSTEM_BOOTING)
831 dump_stack();
832 printk(KERN_ERR
833 "%s: Peripheral %d function %d is already reserved by %s !\n",
834 __func__, ident, P_FUNCT2MUX(per), get_label(ident));
835 local_irq_restore_hw(flags);
836 return -EBUSY;
837 }
838 }
839
840 anyway:
841 reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
842
843 portmux_setup(per);
844 port_setup(ident, PERIPHERAL_USAGE);
845
846 local_irq_restore_hw(flags);
847 set_label(ident, label);
848
849 return 0;
850}
851EXPORT_SYMBOL(peripheral_request);
852
853int peripheral_request_list(const unsigned short per[], const char *label)
854{
855 u16 cnt;
856 int ret;
857
858 for (cnt = 0; per[cnt] != 0; cnt++) {
859
860 ret = peripheral_request(per[cnt], label);
861
862 if (ret < 0) {
863 for ( ; cnt > 0; cnt--)
864 peripheral_free(per[cnt - 1]);
865
866 return ret;
867 }
868 }
869
870 return 0;
871}
872EXPORT_SYMBOL(peripheral_request_list);
873
874void peripheral_free(unsigned short per)
875{
876 unsigned long flags;
877 unsigned short ident = P_IDENT(per);
878
879 if (per & P_DONTCARE)
880 return;
881
882 if (!(per & P_DEFINED))
883 return;
884
885 local_irq_save_hw(flags);
886
887 if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) {
888 local_irq_restore_hw(flags);
889 return;
890 }
891
892 if (!(per & P_MAYSHARE))
893 port_setup(ident, GPIO_USAGE);
894
895 reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
896
897 set_label(ident, "free");
898
899 local_irq_restore_hw(flags);
900}
901EXPORT_SYMBOL(peripheral_free);
902
903void peripheral_free_list(const unsigned short per[])
904{
905 u16 cnt;
906 for (cnt = 0; per[cnt] != 0; cnt++)
907 peripheral_free(per[cnt]);
908}
909EXPORT_SYMBOL(peripheral_free_list);
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926int bfin_gpio_request(unsigned gpio, const char *label)
927{
928 unsigned long flags;
929
930 if (check_gpio(gpio) < 0)
931 return -EINVAL;
932
933 local_irq_save_hw(flags);
934
935
936
937
938
939
940
941 if (cmp_label(gpio, label) == 0) {
942 local_irq_restore_hw(flags);
943 return 0;
944 }
945
946 if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
947 if (system_state == SYSTEM_BOOTING)
948 dump_stack();
949 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
950 gpio, get_label(gpio));
951 local_irq_restore_hw(flags);
952 return -EBUSY;
953 }
954 if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
955 if (system_state == SYSTEM_BOOTING)
956 dump_stack();
957 printk(KERN_ERR
958 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
959 gpio, get_label(gpio));
960 local_irq_restore_hw(flags);
961 return -EBUSY;
962 }
963 if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
964 printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"
965 " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);
966 }
967#ifndef CONFIG_BF54x
968 else {
969 set_gpio_polar(gpio, 0);
970 }
971#endif
972
973 reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
974 set_label(gpio, label);
975
976 local_irq_restore_hw(flags);
977
978 port_setup(gpio, GPIO_USAGE);
979
980 return 0;
981}
982EXPORT_SYMBOL(bfin_gpio_request);
983
984void bfin_gpio_free(unsigned gpio)
985{
986 unsigned long flags;
987
988 if (check_gpio(gpio) < 0)
989 return;
990
991 might_sleep();
992
993 local_irq_save_hw(flags);
994
995 if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
996 if (system_state == SYSTEM_BOOTING)
997 dump_stack();
998 gpio_error(gpio);
999 local_irq_restore_hw(flags);
1000 return;
1001 }
1002
1003 reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
1004
1005 set_label(gpio, "free");
1006
1007 local_irq_restore_hw(flags);
1008}
1009EXPORT_SYMBOL(bfin_gpio_free);
1010
1011#ifdef BFIN_SPECIAL_GPIO_BANKS
1012static unsigned short reserved_special_gpio_map[gpio_bank(MAX_RESOURCES)];
1013
1014int bfin_special_gpio_request(unsigned gpio, const char *label)
1015{
1016 unsigned long flags;
1017
1018 local_irq_save_hw(flags);
1019
1020
1021
1022
1023
1024
1025
1026 if (cmp_label(gpio, label) == 0) {
1027 local_irq_restore_hw(flags);
1028 return 0;
1029 }
1030
1031 if (unlikely(reserved_special_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1032 local_irq_restore_hw(flags);
1033 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
1034 gpio, get_label(gpio));
1035
1036 return -EBUSY;
1037 }
1038 if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1039 local_irq_restore_hw(flags);
1040 printk(KERN_ERR
1041 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
1042 gpio, get_label(gpio));
1043
1044 return -EBUSY;
1045 }
1046
1047 reserved_special_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
1048 reserved_peri_map[gpio_bank(gpio)] |= gpio_bit(gpio);
1049
1050 set_label(gpio, label);
1051 local_irq_restore_hw(flags);
1052 port_setup(gpio, GPIO_USAGE);
1053
1054 return 0;
1055}
1056EXPORT_SYMBOL(bfin_special_gpio_request);
1057
1058void bfin_special_gpio_free(unsigned gpio)
1059{
1060 unsigned long flags;
1061
1062 might_sleep();
1063
1064 local_irq_save_hw(flags);
1065
1066 if (unlikely(!(reserved_special_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
1067 gpio_error(gpio);
1068 local_irq_restore_hw(flags);
1069 return;
1070 }
1071
1072 reserved_special_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
1073 reserved_peri_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
1074 set_label(gpio, "free");
1075 local_irq_restore_hw(flags);
1076}
1077EXPORT_SYMBOL(bfin_special_gpio_free);
1078#endif
1079
1080
1081int bfin_gpio_irq_request(unsigned gpio, const char *label)
1082{
1083 unsigned long flags;
1084
1085 if (check_gpio(gpio) < 0)
1086 return -EINVAL;
1087
1088 local_irq_save_hw(flags);
1089
1090 if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1091 if (system_state == SYSTEM_BOOTING)
1092 dump_stack();
1093 printk(KERN_ERR
1094 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
1095 gpio, get_label(gpio));
1096 local_irq_restore_hw(flags);
1097 return -EBUSY;
1098 }
1099 if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))
1100 printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved by %s! "
1101 "(Documentation/blackfin/bfin-gpio-notes.txt)\n",
1102 gpio, get_label(gpio));
1103
1104 reserved_gpio_irq_map[gpio_bank(gpio)] |= gpio_bit(gpio);
1105 set_label(gpio, label);
1106
1107 local_irq_restore_hw(flags);
1108
1109 port_setup(gpio, GPIO_USAGE);
1110
1111 return 0;
1112}
1113
1114void bfin_gpio_irq_free(unsigned gpio)
1115{
1116 unsigned long flags;
1117
1118 if (check_gpio(gpio) < 0)
1119 return;
1120
1121 local_irq_save_hw(flags);
1122
1123 if (unlikely(!(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
1124 if (system_state == SYSTEM_BOOTING)
1125 dump_stack();
1126 gpio_error(gpio);
1127 local_irq_restore_hw(flags);
1128 return;
1129 }
1130
1131 reserved_gpio_irq_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
1132
1133 set_label(gpio, "free");
1134
1135 local_irq_restore_hw(flags);
1136}
1137
1138static inline void __bfin_gpio_direction_input(unsigned gpio)
1139{
1140#ifdef CONFIG_BF54x
1141 gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio);
1142#else
1143 gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
1144#endif
1145 gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
1146}
1147
1148int bfin_gpio_direction_input(unsigned gpio)
1149{
1150 unsigned long flags;
1151
1152 if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1153 gpio_error(gpio);
1154 return -EINVAL;
1155 }
1156
1157 local_irq_save_hw(flags);
1158 __bfin_gpio_direction_input(gpio);
1159 AWA_DUMMY_READ(inen);
1160 local_irq_restore_hw(flags);
1161
1162 return 0;
1163}
1164EXPORT_SYMBOL(bfin_gpio_direction_input);
1165
1166void bfin_gpio_irq_prepare(unsigned gpio)
1167{
1168#ifdef CONFIG_BF54x
1169 unsigned long flags;
1170#endif
1171
1172 port_setup(gpio, GPIO_USAGE);
1173
1174#ifdef CONFIG_BF54x
1175 local_irq_save_hw(flags);
1176 __bfin_gpio_direction_input(gpio);
1177 local_irq_restore_hw(flags);
1178#endif
1179}
1180
1181void bfin_gpio_set_value(unsigned gpio, int arg)
1182{
1183 if (arg)
1184 gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1185 else
1186 gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
1187}
1188EXPORT_SYMBOL(bfin_gpio_set_value);
1189
1190int bfin_gpio_direction_output(unsigned gpio, int value)
1191{
1192 unsigned long flags;
1193
1194 if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1195 gpio_error(gpio);
1196 return -EINVAL;
1197 }
1198
1199 local_irq_save_hw(flags);
1200
1201 gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
1202 gpio_set_value(gpio, value);
1203#ifdef CONFIG_BF54x
1204 gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio);
1205#else
1206 gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
1207#endif
1208
1209 AWA_DUMMY_READ(dir);
1210 local_irq_restore_hw(flags);
1211
1212 return 0;
1213}
1214EXPORT_SYMBOL(bfin_gpio_direction_output);
1215
1216int bfin_gpio_get_value(unsigned gpio)
1217{
1218#ifdef CONFIG_BF54x
1219 return (1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio)));
1220#else
1221 unsigned long flags;
1222
1223 if (unlikely(get_gpio_edge(gpio))) {
1224 int ret;
1225 local_irq_save_hw(flags);
1226 set_gpio_edge(gpio, 0);
1227 ret = get_gpio_data(gpio);
1228 set_gpio_edge(gpio, 1);
1229 local_irq_restore_hw(flags);
1230 return ret;
1231 } else
1232 return get_gpio_data(gpio);
1233#endif
1234}
1235EXPORT_SYMBOL(bfin_gpio_get_value);
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247void bfin_reset_boot_spi_cs(unsigned short pin)
1248{
1249 unsigned short gpio = P_IDENT(pin);
1250 port_setup(gpio, GPIO_USAGE);
1251 gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1252 AWA_DUMMY_READ(data_set);
1253 udelay(1);
1254}
1255
1256#if defined(CONFIG_PROC_FS)
1257static int gpio_proc_read(char *buf, char **start, off_t offset,
1258 int len, int *unused_i, void *unused_v)
1259{
1260 int c, irq, gpio, outlen = 0;
1261
1262 for (c = 0; c < MAX_RESOURCES; c++) {
1263 irq = reserved_gpio_irq_map[gpio_bank(c)] & gpio_bit(c);
1264 gpio = reserved_gpio_map[gpio_bank(c)] & gpio_bit(c);
1265 if (!check_gpio(c) && (gpio || irq))
1266 len = sprintf(buf, "GPIO_%d: \t%s%s \t\tGPIO %s\n", c,
1267 get_label(c), (gpio && irq) ? " *" : "",
1268 get_gpio_dir(c) ? "OUTPUT" : "INPUT");
1269 else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c))
1270 len = sprintf(buf, "GPIO_%d: \t%s \t\tPeripheral\n", c, get_label(c));
1271 else
1272 continue;
1273 buf += len;
1274 outlen += len;
1275 }
1276 return outlen;
1277}
1278
1279static __init int gpio_register_proc(void)
1280{
1281 struct proc_dir_entry *proc_gpio;
1282
1283 proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL);
1284 if (proc_gpio)
1285 proc_gpio->read_proc = gpio_proc_read;
1286 return proc_gpio != NULL;
1287}
1288__initcall(gpio_register_proc);
1289#endif
1290
1291#ifdef CONFIG_GPIOLIB
1292int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio)
1293{
1294 return bfin_gpio_direction_input(gpio);
1295}
1296
1297int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
1298{
1299 return bfin_gpio_direction_output(gpio, level);
1300}
1301
1302int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
1303{
1304 return bfin_gpio_get_value(gpio);
1305}
1306
1307void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
1308{
1309 return bfin_gpio_set_value(gpio, value);
1310}
1311
1312int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
1313{
1314 return bfin_gpio_request(gpio, chip->label);
1315}
1316
1317void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio)
1318{
1319 return bfin_gpio_free(gpio);
1320}
1321
1322static struct gpio_chip bfin_chip = {
1323 .label = "Blackfin-GPIOlib",
1324 .direction_input = bfin_gpiolib_direction_input,
1325 .get = bfin_gpiolib_get_value,
1326 .direction_output = bfin_gpiolib_direction_output,
1327 .set = bfin_gpiolib_set_value,
1328 .request = bfin_gpiolib_gpio_request,
1329 .free = bfin_gpiolib_gpio_free,
1330 .base = 0,
1331 .ngpio = MAX_BLACKFIN_GPIOS,
1332};
1333
1334static int __init bfin_gpiolib_setup(void)
1335{
1336 return gpiochip_add(&bfin_chip);
1337}
1338arch_initcall(bfin_gpiolib_setup);
1339#endif
1340
