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19#include <linux/module.h>
20#include <linux/moduleparam.h>
21#include <linux/init.h>
22#include <linux/delay.h>
23#include <linux/pm.h>
24#include <linux/i2c.h>
25#include <linux/platform_device.h>
26#include <sound/core.h>
27#include <sound/pcm.h>
28#include <sound/pcm_params.h>
29#include <sound/tlv.h>
30#include <sound/soc.h>
31#include <sound/soc-dapm.h>
32#include <sound/initval.h>
33
34#include "wm8903.h"
35
36
37static u16 wm8903_reg_defaults[] = {
38 0x8903,
39 0x0000,
40 0x0000,
41 0x0000,
42 0x0018,
43 0x0000,
44 0x0000,
45 0x0000,
46 0x0001,
47 0x0000,
48 0x0001,
49 0x0000,
50 0x0000,
51 0x0000,
52 0x0000,
53 0x0000,
54 0x0000,
55 0x0000,
56 0x0000,
57 0x0000,
58 0x0400,
59 0x0D07,
60 0x0000,
61 0x0000,
62 0x0050,
63 0x0242,
64 0x0008,
65 0x0022,
66 0x0000,
67 0x0000,
68 0x00C0,
69 0x00C0,
70 0x0000,
71 0x0000,
72 0x0000,
73 0x0000,
74 0x00C0,
75 0x00C0,
76 0x0000,
77 0x0073,
78 0x09BF,
79 0x3241,
80 0x0020,
81 0x0000,
82 0x0085,
83 0x0085,
84 0x0044,
85 0x0044,
86 0x0000,
87 0x0000,
88 0x0008,
89 0x0004,
90 0x0000,
91 0x0000,
92 0x0000,
93 0x0000,
94 0x0000,
95 0x002D,
96 0x002D,
97 0x0039,
98 0x0039,
99 0x0100,
100 0x0139,
101 0x0139,
102 0x0000,
103 0x0000,
104 0x0000,
105 0x0010,
106 0x0100,
107 0x00A4,
108 0x0807,
109 0x0000,
110 0x0000,
111 0x0000,
112 0x0000,
113 0x0000,
114 0x0000,
115 0x0000,
116 0x0000,
117 0x000E,
118 0x0000,
119 0x0000,
120 0x0000,
121 0x0000,
122 0x0000,
123 0x0000,
124 0x0000,
125 0x0006,
126 0x0000,
127 0x0000,
128 0x0000,
129 0x0060,
130 0x0000,
131 0x0000,
132 0x0000,
133 0x0060,
134 0x0000,
135 0x0000,
136 0x0000,
137 0x1F25,
138 0x2B19,
139 0x01C0,
140 0x01EF,
141 0x2B00,
142 0x0000,
143 0x01C0,
144 0x1C10,
145 0x0000,
146 0x0000,
147 0x0000,
148 0x0000,
149 0x0000,
150 0x0000,
151 0x0000,
152 0x0000,
153 0x0000,
154 0x00A8,
155 0x00A8,
156 0x00A8,
157 0x0220,
158 0x01A0,
159 0x0000,
160 0xFFFF,
161 0x0000,
162 0x0000,
163 0x0003,
164 0x0000,
165 0x0000,
166 0x0005,
167 0x0000,
168 0x0000,
169 0x0000,
170 0x0000,
171 0x0000,
172 0x0000,
173 0x03FF,
174 0x0007,
175 0x0040,
176 0x0000,
177 0x0000,
178 0x0000,
179 0x0000,
180 0x0000,
181 0x0000,
182 0x0000,
183 0x0000,
184 0x0000,
185 0x0000,
186 0x4000,
187 0x6810,
188 0x0004,
189 0x0000,
190 0x0000,
191 0x0000,
192 0x0000,
193 0x0000,
194 0x0000,
195 0x0000,
196 0x0000,
197 0x0000,
198 0x0000,
199 0x0000,
200 0x0000,
201 0x0000,
202 0x0028,
203 0x0004,
204 0x0000,
205 0x0060,
206 0x0000,
207 0x0000,
208 0x0000,
209 0x0000,
210 0x0000,
211};
212
213struct wm8903_priv {
214 struct snd_soc_codec codec;
215 u16 reg_cache[ARRAY_SIZE(wm8903_reg_defaults)];
216
217 int sysclk;
218
219
220 int class_w_users;
221 int playback_active;
222 int capture_active;
223
224 struct snd_pcm_substream *master_substream;
225 struct snd_pcm_substream *slave_substream;
226};
227
228static int wm8903_volatile_register(unsigned int reg)
229{
230 switch (reg) {
231 case WM8903_SW_RESET_AND_ID:
232 case WM8903_REVISION_NUMBER:
233 case WM8903_INTERRUPT_STATUS_1:
234 case WM8903_WRITE_SEQUENCER_4:
235 return 1;
236
237 default:
238 return 0;
239 }
240}
241
242static int wm8903_run_sequence(struct snd_soc_codec *codec, unsigned int start)
243{
244 u16 reg[5];
245 struct i2c_client *i2c = codec->control_data;
246
247 BUG_ON(start > 48);
248
249
250 reg[0] = snd_soc_read(codec, WM8903_WRITE_SEQUENCER_0);
251 reg[0] |= WM8903_WSEQ_ENA;
252 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_0, reg[0]);
253
254 dev_dbg(&i2c->dev, "Starting sequence at %d\n", start);
255
256 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_3,
257 start | WM8903_WSEQ_START);
258
259
260
261
262
263 do {
264 msleep(10);
265
266 reg[4] = snd_soc_read(codec, WM8903_WRITE_SEQUENCER_4);
267 } while (reg[4] & WM8903_WSEQ_BUSY);
268
269 dev_dbg(&i2c->dev, "Sequence complete\n");
270
271
272 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_0,
273 reg[0] & ~WM8903_WSEQ_ENA);
274
275 return 0;
276}
277
278static void wm8903_sync_reg_cache(struct snd_soc_codec *codec, u16 *cache)
279{
280 int i;
281
282
283 for (i = 0; i < ARRAY_SIZE(wm8903_reg_defaults); i++)
284 cache[i] = codec->hw_read(codec, i);
285}
286
287static void wm8903_reset(struct snd_soc_codec *codec)
288{
289 snd_soc_write(codec, WM8903_SW_RESET_AND_ID, 0);
290 memcpy(codec->reg_cache, wm8903_reg_defaults,
291 sizeof(wm8903_reg_defaults));
292}
293
294#define WM8903_OUTPUT_SHORT 0x8
295#define WM8903_OUTPUT_OUT 0x4
296#define WM8903_OUTPUT_INT 0x2
297#define WM8903_OUTPUT_IN 0x1
298
299static int wm8903_cp_event(struct snd_soc_dapm_widget *w,
300 struct snd_kcontrol *kcontrol, int event)
301{
302 WARN_ON(event != SND_SOC_DAPM_POST_PMU);
303 mdelay(4);
304
305 return 0;
306}
307
308
309
310
311
312
313static int wm8903_output_event(struct snd_soc_dapm_widget *w,
314 struct snd_kcontrol *kcontrol, int event)
315{
316 struct snd_soc_codec *codec = w->codec;
317 u16 val;
318 u16 reg;
319 u16 dcs_reg;
320 u16 dcs_bit;
321 int shift;
322
323 switch (w->reg) {
324 case WM8903_POWER_MANAGEMENT_2:
325 reg = WM8903_ANALOGUE_HP_0;
326 dcs_bit = 0 + w->shift;
327 break;
328 case WM8903_POWER_MANAGEMENT_3:
329 reg = WM8903_ANALOGUE_LINEOUT_0;
330 dcs_bit = 2 + w->shift;
331 break;
332 default:
333 BUG();
334 return -EINVAL;
335 }
336
337 switch (w->shift) {
338 case 0:
339 shift = 0;
340 break;
341 case 1:
342 shift = 4;
343 break;
344 default:
345 BUG();
346 return -EINVAL;
347 }
348
349 if (event & SND_SOC_DAPM_PRE_PMU) {
350 val = snd_soc_read(codec, reg);
351
352
353 val &= ~(WM8903_OUTPUT_SHORT << shift);
354 snd_soc_write(codec, reg, val);
355 }
356
357 if (event & SND_SOC_DAPM_POST_PMU) {
358 val = snd_soc_read(codec, reg);
359
360 val |= (WM8903_OUTPUT_IN << shift);
361 snd_soc_write(codec, reg, val);
362
363 val |= (WM8903_OUTPUT_INT << shift);
364 snd_soc_write(codec, reg, val);
365
366
367 val |= (WM8903_OUTPUT_OUT << shift);
368 snd_soc_write(codec, reg, val);
369
370
371 dcs_reg = snd_soc_read(codec, WM8903_DC_SERVO_0);
372 dcs_reg |= dcs_bit;
373 snd_soc_write(codec, WM8903_DC_SERVO_0, dcs_reg);
374
375
376 val |= (WM8903_OUTPUT_SHORT << shift);
377 snd_soc_write(codec, reg, val);
378 }
379
380 if (event & SND_SOC_DAPM_PRE_PMD) {
381 val = snd_soc_read(codec, reg);
382
383
384 val &= ~(WM8903_OUTPUT_SHORT << shift);
385 snd_soc_write(codec, reg, val);
386
387
388 dcs_reg = snd_soc_read(codec, WM8903_DC_SERVO_0);
389 dcs_reg &= ~dcs_bit;
390 snd_soc_write(codec, WM8903_DC_SERVO_0, dcs_reg);
391
392
393 val &= ~((WM8903_OUTPUT_OUT | WM8903_OUTPUT_INT |
394 WM8903_OUTPUT_IN) << shift);
395 snd_soc_write(codec, reg, val);
396 }
397
398 return 0;
399}
400
401
402
403
404
405
406
407
408
409static int wm8903_class_w_put(struct snd_kcontrol *kcontrol,
410 struct snd_ctl_elem_value *ucontrol)
411{
412 struct snd_soc_dapm_widget *widget = snd_kcontrol_chip(kcontrol);
413 struct snd_soc_codec *codec = widget->codec;
414 struct wm8903_priv *wm8903 = codec->private_data;
415 struct i2c_client *i2c = codec->control_data;
416 u16 reg;
417 int ret;
418
419 reg = snd_soc_read(codec, WM8903_CLASS_W_0);
420
421
422 if (ucontrol->value.integer.value[0]) {
423 if (wm8903->class_w_users == 0) {
424 dev_dbg(&i2c->dev, "Disabling Class W\n");
425 snd_soc_write(codec, WM8903_CLASS_W_0, reg &
426 ~(WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V));
427 }
428 wm8903->class_w_users++;
429 }
430
431
432 ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol);
433
434
435 if (!ucontrol->value.integer.value[0]) {
436 if (wm8903->class_w_users == 1) {
437 dev_dbg(&i2c->dev, "Enabling Class W\n");
438 snd_soc_write(codec, WM8903_CLASS_W_0, reg |
439 WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V);
440 }
441 wm8903->class_w_users--;
442 }
443
444 dev_dbg(&i2c->dev, "Bypass use count now %d\n",
445 wm8903->class_w_users);
446
447 return ret;
448}
449
450#define SOC_DAPM_SINGLE_W(xname, reg, shift, max, invert) \
451{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
452 .info = snd_soc_info_volsw, \
453 .get = snd_soc_dapm_get_volsw, .put = wm8903_class_w_put, \
454 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
455
456
457
458static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1);
459
460static const DECLARE_TLV_DB_SCALE(digital_sidetone_tlv, -3600, 300, 0);
461static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0);
462
463static const DECLARE_TLV_DB_SCALE(drc_tlv_thresh, 0, 75, 0);
464static const DECLARE_TLV_DB_SCALE(drc_tlv_amp, -2250, 75, 0);
465static const DECLARE_TLV_DB_SCALE(drc_tlv_min, 0, 600, 0);
466static const DECLARE_TLV_DB_SCALE(drc_tlv_max, 1200, 600, 0);
467static const DECLARE_TLV_DB_SCALE(drc_tlv_startup, -300, 50, 0);
468
469static const char *drc_slope_text[] = {
470 "1", "1/2", "1/4", "1/8", "1/16", "0"
471};
472
473static const struct soc_enum drc_slope_r0 =
474 SOC_ENUM_SINGLE(WM8903_DRC_2, 3, 6, drc_slope_text);
475
476static const struct soc_enum drc_slope_r1 =
477 SOC_ENUM_SINGLE(WM8903_DRC_2, 0, 6, drc_slope_text);
478
479static const char *drc_attack_text[] = {
480 "instantaneous",
481 "363us", "762us", "1.45ms", "2.9ms", "5.8ms", "11.6ms", "23.2ms",
482 "46.4ms", "92.8ms", "185.6ms"
483};
484
485static const struct soc_enum drc_attack =
486 SOC_ENUM_SINGLE(WM8903_DRC_1, 12, 11, drc_attack_text);
487
488static const char *drc_decay_text[] = {
489 "186ms", "372ms", "743ms", "1.49s", "2.97s", "5.94s", "11.89s",
490 "23.87s", "47.56s"
491};
492
493static const struct soc_enum drc_decay =
494 SOC_ENUM_SINGLE(WM8903_DRC_1, 8, 9, drc_decay_text);
495
496static const char *drc_ff_delay_text[] = {
497 "5 samples", "9 samples"
498};
499
500static const struct soc_enum drc_ff_delay =
501 SOC_ENUM_SINGLE(WM8903_DRC_0, 5, 2, drc_ff_delay_text);
502
503static const char *drc_qr_decay_text[] = {
504 "0.725ms", "1.45ms", "5.8ms"
505};
506
507static const struct soc_enum drc_qr_decay =
508 SOC_ENUM_SINGLE(WM8903_DRC_1, 4, 3, drc_qr_decay_text);
509
510static const char *drc_smoothing_text[] = {
511 "Low", "Medium", "High"
512};
513
514static const struct soc_enum drc_smoothing =
515 SOC_ENUM_SINGLE(WM8903_DRC_0, 11, 3, drc_smoothing_text);
516
517static const char *soft_mute_text[] = {
518 "Fast (fs/2)", "Slow (fs/32)"
519};
520
521static const struct soc_enum soft_mute =
522 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1, 10, 2, soft_mute_text);
523
524static const char *mute_mode_text[] = {
525 "Hard", "Soft"
526};
527
528static const struct soc_enum mute_mode =
529 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1, 9, 2, mute_mode_text);
530
531static const char *dac_deemphasis_text[] = {
532 "Disabled", "32kHz", "44.1kHz", "48kHz"
533};
534
535static const struct soc_enum dac_deemphasis =
536 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1, 1, 4, dac_deemphasis_text);
537
538static const char *companding_text[] = {
539 "ulaw", "alaw"
540};
541
542static const struct soc_enum dac_companding =
543 SOC_ENUM_SINGLE(WM8903_AUDIO_INTERFACE_0, 0, 2, companding_text);
544
545static const struct soc_enum adc_companding =
546 SOC_ENUM_SINGLE(WM8903_AUDIO_INTERFACE_0, 2, 2, companding_text);
547
548static const char *input_mode_text[] = {
549 "Single-Ended", "Differential Line", "Differential Mic"
550};
551
552static const struct soc_enum linput_mode_enum =
553 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1, 0, 3, input_mode_text);
554
555static const struct soc_enum rinput_mode_enum =
556 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1, 0, 3, input_mode_text);
557
558static const char *linput_mux_text[] = {
559 "IN1L", "IN2L", "IN3L"
560};
561
562static const struct soc_enum linput_enum =
563 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1, 2, 3, linput_mux_text);
564
565static const struct soc_enum linput_inv_enum =
566 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1, 4, 3, linput_mux_text);
567
568static const char *rinput_mux_text[] = {
569 "IN1R", "IN2R", "IN3R"
570};
571
572static const struct soc_enum rinput_enum =
573 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1, 2, 3, rinput_mux_text);
574
575static const struct soc_enum rinput_inv_enum =
576 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1, 4, 3, rinput_mux_text);
577
578
579static const char *sidetone_text[] = {
580 "None", "Left", "Right"
581};
582
583static const struct soc_enum lsidetone_enum =
584 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_0, 2, 3, sidetone_text);
585
586static const struct soc_enum rsidetone_enum =
587 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_0, 0, 3, sidetone_text);
588
589static const struct snd_kcontrol_new wm8903_snd_controls[] = {
590
591
592SOC_SINGLE("Left Input PGA Switch", WM8903_ANALOGUE_LEFT_INPUT_0,
593 7, 1, 1),
594SOC_SINGLE("Left Input PGA Volume", WM8903_ANALOGUE_LEFT_INPUT_0,
595 0, 31, 0),
596SOC_SINGLE("Left Input PGA Common Mode Switch", WM8903_ANALOGUE_LEFT_INPUT_1,
597 6, 1, 0),
598
599SOC_SINGLE("Right Input PGA Switch", WM8903_ANALOGUE_RIGHT_INPUT_0,
600 7, 1, 1),
601SOC_SINGLE("Right Input PGA Volume", WM8903_ANALOGUE_RIGHT_INPUT_0,
602 0, 31, 0),
603SOC_SINGLE("Right Input PGA Common Mode Switch", WM8903_ANALOGUE_RIGHT_INPUT_1,
604 6, 1, 0),
605
606
607SOC_SINGLE("DRC Switch", WM8903_DRC_0, 15, 1, 0),
608SOC_ENUM("DRC Compressor Slope R0", drc_slope_r0),
609SOC_ENUM("DRC Compressor Slope R1", drc_slope_r1),
610SOC_SINGLE_TLV("DRC Compressor Threashold Volume", WM8903_DRC_3, 5, 124, 1,
611 drc_tlv_thresh),
612SOC_SINGLE_TLV("DRC Volume", WM8903_DRC_3, 0, 30, 1, drc_tlv_amp),
613SOC_SINGLE_TLV("DRC Minimum Gain Volume", WM8903_DRC_1, 2, 3, 1, drc_tlv_min),
614SOC_SINGLE_TLV("DRC Maximum Gain Volume", WM8903_DRC_1, 0, 3, 0, drc_tlv_max),
615SOC_ENUM("DRC Attack Rate", drc_attack),
616SOC_ENUM("DRC Decay Rate", drc_decay),
617SOC_ENUM("DRC FF Delay", drc_ff_delay),
618SOC_SINGLE("DRC Anticlip Switch", WM8903_DRC_0, 1, 1, 0),
619SOC_SINGLE("DRC QR Switch", WM8903_DRC_0, 2, 1, 0),
620SOC_SINGLE_TLV("DRC QR Threashold Volume", WM8903_DRC_0, 6, 3, 0, drc_tlv_max),
621SOC_ENUM("DRC QR Decay Rate", drc_qr_decay),
622SOC_SINGLE("DRC Smoothing Switch", WM8903_DRC_0, 3, 1, 0),
623SOC_SINGLE("DRC Smoothing Hysteresis Switch", WM8903_DRC_0, 0, 1, 0),
624SOC_ENUM("DRC Smoothing Threashold", drc_smoothing),
625SOC_SINGLE_TLV("DRC Startup Volume", WM8903_DRC_0, 6, 18, 0, drc_tlv_startup),
626
627SOC_DOUBLE_R_TLV("Digital Capture Volume", WM8903_ADC_DIGITAL_VOLUME_LEFT,
628 WM8903_ADC_DIGITAL_VOLUME_RIGHT, 1, 96, 0, digital_tlv),
629SOC_ENUM("ADC Companding Mode", adc_companding),
630SOC_SINGLE("ADC Companding Switch", WM8903_AUDIO_INTERFACE_0, 3, 1, 0),
631
632SOC_DOUBLE_TLV("Digital Sidetone Volume", WM8903_DAC_DIGITAL_0, 4, 8,
633 12, 0, digital_sidetone_tlv),
634
635
636SOC_DOUBLE_R_TLV("Digital Playback Volume", WM8903_DAC_DIGITAL_VOLUME_LEFT,
637 WM8903_DAC_DIGITAL_VOLUME_RIGHT, 1, 120, 0, digital_tlv),
638SOC_ENUM("DAC Soft Mute Rate", soft_mute),
639SOC_ENUM("DAC Mute Mode", mute_mode),
640SOC_SINGLE("DAC Mono Switch", WM8903_DAC_DIGITAL_1, 12, 1, 0),
641SOC_ENUM("DAC De-emphasis", dac_deemphasis),
642SOC_ENUM("DAC Companding Mode", dac_companding),
643SOC_SINGLE("DAC Companding Switch", WM8903_AUDIO_INTERFACE_0, 1, 1, 0),
644
645
646SOC_DOUBLE_R("Headphone Switch",
647 WM8903_ANALOGUE_OUT1_LEFT, WM8903_ANALOGUE_OUT1_RIGHT,
648 8, 1, 1),
649SOC_DOUBLE_R("Headphone ZC Switch",
650 WM8903_ANALOGUE_OUT1_LEFT, WM8903_ANALOGUE_OUT1_RIGHT,
651 6, 1, 0),
652SOC_DOUBLE_R_TLV("Headphone Volume",
653 WM8903_ANALOGUE_OUT1_LEFT, WM8903_ANALOGUE_OUT1_RIGHT,
654 0, 63, 0, out_tlv),
655
656
657SOC_DOUBLE_R("Line Out Switch",
658 WM8903_ANALOGUE_OUT2_LEFT, WM8903_ANALOGUE_OUT2_RIGHT,
659 8, 1, 1),
660SOC_DOUBLE_R("Line Out ZC Switch",
661 WM8903_ANALOGUE_OUT2_LEFT, WM8903_ANALOGUE_OUT2_RIGHT,
662 6, 1, 0),
663SOC_DOUBLE_R_TLV("Line Out Volume",
664 WM8903_ANALOGUE_OUT2_LEFT, WM8903_ANALOGUE_OUT2_RIGHT,
665 0, 63, 0, out_tlv),
666
667
668SOC_DOUBLE_R("Speaker Switch",
669 WM8903_ANALOGUE_OUT3_LEFT, WM8903_ANALOGUE_OUT3_RIGHT, 8, 1, 1),
670SOC_DOUBLE_R("Speaker ZC Switch",
671 WM8903_ANALOGUE_OUT3_LEFT, WM8903_ANALOGUE_OUT3_RIGHT, 6, 1, 0),
672SOC_DOUBLE_R_TLV("Speaker Volume",
673 WM8903_ANALOGUE_OUT3_LEFT, WM8903_ANALOGUE_OUT3_RIGHT,
674 0, 63, 0, out_tlv),
675};
676
677static const struct snd_kcontrol_new linput_mode_mux =
678 SOC_DAPM_ENUM("Left Input Mode Mux", linput_mode_enum);
679
680static const struct snd_kcontrol_new rinput_mode_mux =
681 SOC_DAPM_ENUM("Right Input Mode Mux", rinput_mode_enum);
682
683static const struct snd_kcontrol_new linput_mux =
684 SOC_DAPM_ENUM("Left Input Mux", linput_enum);
685
686static const struct snd_kcontrol_new linput_inv_mux =
687 SOC_DAPM_ENUM("Left Inverting Input Mux", linput_inv_enum);
688
689static const struct snd_kcontrol_new rinput_mux =
690 SOC_DAPM_ENUM("Right Input Mux", rinput_enum);
691
692static const struct snd_kcontrol_new rinput_inv_mux =
693 SOC_DAPM_ENUM("Right Inverting Input Mux", rinput_inv_enum);
694
695static const struct snd_kcontrol_new lsidetone_mux =
696 SOC_DAPM_ENUM("DACL Sidetone Mux", lsidetone_enum);
697
698static const struct snd_kcontrol_new rsidetone_mux =
699 SOC_DAPM_ENUM("DACR Sidetone Mux", rsidetone_enum);
700
701static const struct snd_kcontrol_new left_output_mixer[] = {
702SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_LEFT_MIX_0, 3, 1, 0),
703SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_LEFT_MIX_0, 2, 1, 0),
704SOC_DAPM_SINGLE_W("Left Bypass Switch", WM8903_ANALOGUE_LEFT_MIX_0, 1, 1, 0),
705SOC_DAPM_SINGLE_W("Right Bypass Switch", WM8903_ANALOGUE_LEFT_MIX_0, 0, 1, 0),
706};
707
708static const struct snd_kcontrol_new right_output_mixer[] = {
709SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_RIGHT_MIX_0, 3, 1, 0),
710SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_RIGHT_MIX_0, 2, 1, 0),
711SOC_DAPM_SINGLE_W("Left Bypass Switch", WM8903_ANALOGUE_RIGHT_MIX_0, 1, 1, 0),
712SOC_DAPM_SINGLE_W("Right Bypass Switch", WM8903_ANALOGUE_RIGHT_MIX_0, 0, 1, 0),
713};
714
715static const struct snd_kcontrol_new left_speaker_mixer[] = {
716SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0, 3, 1, 0),
717SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0, 2, 1, 0),
718SOC_DAPM_SINGLE("Left Bypass Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0, 1, 1, 0),
719SOC_DAPM_SINGLE("Right Bypass Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0,
720 0, 1, 0),
721};
722
723static const struct snd_kcontrol_new right_speaker_mixer[] = {
724SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0, 3, 1, 0),
725SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0, 2, 1, 0),
726SOC_DAPM_SINGLE("Left Bypass Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0,
727 1, 1, 0),
728SOC_DAPM_SINGLE("Right Bypass Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0,
729 0, 1, 0),
730};
731
732static const struct snd_soc_dapm_widget wm8903_dapm_widgets[] = {
733SND_SOC_DAPM_INPUT("IN1L"),
734SND_SOC_DAPM_INPUT("IN1R"),
735SND_SOC_DAPM_INPUT("IN2L"),
736SND_SOC_DAPM_INPUT("IN2R"),
737SND_SOC_DAPM_INPUT("IN3L"),
738SND_SOC_DAPM_INPUT("IN3R"),
739
740SND_SOC_DAPM_OUTPUT("HPOUTL"),
741SND_SOC_DAPM_OUTPUT("HPOUTR"),
742SND_SOC_DAPM_OUTPUT("LINEOUTL"),
743SND_SOC_DAPM_OUTPUT("LINEOUTR"),
744SND_SOC_DAPM_OUTPUT("LOP"),
745SND_SOC_DAPM_OUTPUT("LON"),
746SND_SOC_DAPM_OUTPUT("ROP"),
747SND_SOC_DAPM_OUTPUT("RON"),
748
749SND_SOC_DAPM_MICBIAS("Mic Bias", WM8903_MIC_BIAS_CONTROL_0, 0, 0),
750
751SND_SOC_DAPM_MUX("Left Input Mux", SND_SOC_NOPM, 0, 0, &linput_mux),
752SND_SOC_DAPM_MUX("Left Input Inverting Mux", SND_SOC_NOPM, 0, 0,
753 &linput_inv_mux),
754SND_SOC_DAPM_MUX("Left Input Mode Mux", SND_SOC_NOPM, 0, 0, &linput_mode_mux),
755
756SND_SOC_DAPM_MUX("Right Input Mux", SND_SOC_NOPM, 0, 0, &rinput_mux),
757SND_SOC_DAPM_MUX("Right Input Inverting Mux", SND_SOC_NOPM, 0, 0,
758 &rinput_inv_mux),
759SND_SOC_DAPM_MUX("Right Input Mode Mux", SND_SOC_NOPM, 0, 0, &rinput_mode_mux),
760
761SND_SOC_DAPM_PGA("Left Input PGA", WM8903_POWER_MANAGEMENT_0, 1, 0, NULL, 0),
762SND_SOC_DAPM_PGA("Right Input PGA", WM8903_POWER_MANAGEMENT_0, 0, 0, NULL, 0),
763
764SND_SOC_DAPM_ADC("ADCL", "Left HiFi Capture", WM8903_POWER_MANAGEMENT_6, 1, 0),
765SND_SOC_DAPM_ADC("ADCR", "Right HiFi Capture", WM8903_POWER_MANAGEMENT_6, 0, 0),
766
767SND_SOC_DAPM_MUX("DACL Sidetone", SND_SOC_NOPM, 0, 0, &lsidetone_mux),
768SND_SOC_DAPM_MUX("DACR Sidetone", SND_SOC_NOPM, 0, 0, &rsidetone_mux),
769
770SND_SOC_DAPM_DAC("DACL", "Left Playback", WM8903_POWER_MANAGEMENT_6, 3, 0),
771SND_SOC_DAPM_DAC("DACR", "Right Playback", WM8903_POWER_MANAGEMENT_6, 2, 0),
772
773SND_SOC_DAPM_MIXER("Left Output Mixer", WM8903_POWER_MANAGEMENT_1, 1, 0,
774 left_output_mixer, ARRAY_SIZE(left_output_mixer)),
775SND_SOC_DAPM_MIXER("Right Output Mixer", WM8903_POWER_MANAGEMENT_1, 0, 0,
776 right_output_mixer, ARRAY_SIZE(right_output_mixer)),
777
778SND_SOC_DAPM_MIXER("Left Speaker Mixer", WM8903_POWER_MANAGEMENT_4, 1, 0,
779 left_speaker_mixer, ARRAY_SIZE(left_speaker_mixer)),
780SND_SOC_DAPM_MIXER("Right Speaker Mixer", WM8903_POWER_MANAGEMENT_4, 0, 0,
781 right_speaker_mixer, ARRAY_SIZE(right_speaker_mixer)),
782
783SND_SOC_DAPM_PGA_E("Left Headphone Output PGA", WM8903_POWER_MANAGEMENT_2,
784 1, 0, NULL, 0, wm8903_output_event,
785 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
786 SND_SOC_DAPM_PRE_PMD),
787SND_SOC_DAPM_PGA_E("Right Headphone Output PGA", WM8903_POWER_MANAGEMENT_2,
788 0, 0, NULL, 0, wm8903_output_event,
789 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
790 SND_SOC_DAPM_PRE_PMD),
791
792SND_SOC_DAPM_PGA_E("Left Line Output PGA", WM8903_POWER_MANAGEMENT_3, 1, 0,
793 NULL, 0, wm8903_output_event,
794 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
795 SND_SOC_DAPM_PRE_PMD),
796SND_SOC_DAPM_PGA_E("Right Line Output PGA", WM8903_POWER_MANAGEMENT_3, 0, 0,
797 NULL, 0, wm8903_output_event,
798 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
799 SND_SOC_DAPM_PRE_PMD),
800
801SND_SOC_DAPM_PGA("Left Speaker PGA", WM8903_POWER_MANAGEMENT_5, 1, 0,
802 NULL, 0),
803SND_SOC_DAPM_PGA("Right Speaker PGA", WM8903_POWER_MANAGEMENT_5, 0, 0,
804 NULL, 0),
805
806SND_SOC_DAPM_SUPPLY("Charge Pump", WM8903_CHARGE_PUMP_0, 0, 0,
807 wm8903_cp_event, SND_SOC_DAPM_POST_PMU),
808SND_SOC_DAPM_SUPPLY("CLK_DSP", WM8903_CLOCK_RATES_2, 1, 0, NULL, 0),
809};
810
811static const struct snd_soc_dapm_route intercon[] = {
812
813 { "Left Input Mux", "IN1L", "IN1L" },
814 { "Left Input Mux", "IN2L", "IN2L" },
815 { "Left Input Mux", "IN3L", "IN3L" },
816
817 { "Left Input Inverting Mux", "IN1L", "IN1L" },
818 { "Left Input Inverting Mux", "IN2L", "IN2L" },
819 { "Left Input Inverting Mux", "IN3L", "IN3L" },
820
821 { "Right Input Mux", "IN1R", "IN1R" },
822 { "Right Input Mux", "IN2R", "IN2R" },
823 { "Right Input Mux", "IN3R", "IN3R" },
824
825 { "Right Input Inverting Mux", "IN1R", "IN1R" },
826 { "Right Input Inverting Mux", "IN2R", "IN2R" },
827 { "Right Input Inverting Mux", "IN3R", "IN3R" },
828
829 { "Left Input Mode Mux", "Single-Ended", "Left Input Inverting Mux" },
830 { "Left Input Mode Mux", "Differential Line",
831 "Left Input Mux" },
832 { "Left Input Mode Mux", "Differential Line",
833 "Left Input Inverting Mux" },
834 { "Left Input Mode Mux", "Differential Mic",
835 "Left Input Mux" },
836 { "Left Input Mode Mux", "Differential Mic",
837 "Left Input Inverting Mux" },
838
839 { "Right Input Mode Mux", "Single-Ended",
840 "Right Input Inverting Mux" },
841 { "Right Input Mode Mux", "Differential Line",
842 "Right Input Mux" },
843 { "Right Input Mode Mux", "Differential Line",
844 "Right Input Inverting Mux" },
845 { "Right Input Mode Mux", "Differential Mic",
846 "Right Input Mux" },
847 { "Right Input Mode Mux", "Differential Mic",
848 "Right Input Inverting Mux" },
849
850 { "Left Input PGA", NULL, "Left Input Mode Mux" },
851 { "Right Input PGA", NULL, "Right Input Mode Mux" },
852
853 { "ADCL", NULL, "Left Input PGA" },
854 { "ADCL", NULL, "CLK_DSP" },
855 { "ADCR", NULL, "Right Input PGA" },
856 { "ADCR", NULL, "CLK_DSP" },
857
858 { "DACL Sidetone", "Left", "ADCL" },
859 { "DACL Sidetone", "Right", "ADCR" },
860 { "DACR Sidetone", "Left", "ADCL" },
861 { "DACR Sidetone", "Right", "ADCR" },
862
863 { "DACL", NULL, "DACL Sidetone" },
864 { "DACL", NULL, "CLK_DSP" },
865 { "DACR", NULL, "DACR Sidetone" },
866 { "DACR", NULL, "CLK_DSP" },
867
868 { "Left Output Mixer", "Left Bypass Switch", "Left Input PGA" },
869 { "Left Output Mixer", "Right Bypass Switch", "Right Input PGA" },
870 { "Left Output Mixer", "DACL Switch", "DACL" },
871 { "Left Output Mixer", "DACR Switch", "DACR" },
872
873 { "Right Output Mixer", "Left Bypass Switch", "Left Input PGA" },
874 { "Right Output Mixer", "Right Bypass Switch", "Right Input PGA" },
875 { "Right Output Mixer", "DACL Switch", "DACL" },
876 { "Right Output Mixer", "DACR Switch", "DACR" },
877
878 { "Left Speaker Mixer", "Left Bypass Switch", "Left Input PGA" },
879 { "Left Speaker Mixer", "Right Bypass Switch", "Right Input PGA" },
880 { "Left Speaker Mixer", "DACL Switch", "DACL" },
881 { "Left Speaker Mixer", "DACR Switch", "DACR" },
882
883 { "Right Speaker Mixer", "Left Bypass Switch", "Left Input PGA" },
884 { "Right Speaker Mixer", "Right Bypass Switch", "Right Input PGA" },
885 { "Right Speaker Mixer", "DACL Switch", "DACL" },
886 { "Right Speaker Mixer", "DACR Switch", "DACR" },
887
888 { "Left Line Output PGA", NULL, "Left Output Mixer" },
889 { "Right Line Output PGA", NULL, "Right Output Mixer" },
890
891 { "Left Headphone Output PGA", NULL, "Left Output Mixer" },
892 { "Right Headphone Output PGA", NULL, "Right Output Mixer" },
893
894 { "Left Speaker PGA", NULL, "Left Speaker Mixer" },
895 { "Right Speaker PGA", NULL, "Right Speaker Mixer" },
896
897 { "HPOUTL", NULL, "Left Headphone Output PGA" },
898 { "HPOUTR", NULL, "Right Headphone Output PGA" },
899
900 { "LINEOUTL", NULL, "Left Line Output PGA" },
901 { "LINEOUTR", NULL, "Right Line Output PGA" },
902
903 { "LOP", NULL, "Left Speaker PGA" },
904 { "LON", NULL, "Left Speaker PGA" },
905
906 { "ROP", NULL, "Right Speaker PGA" },
907 { "RON", NULL, "Right Speaker PGA" },
908
909 { "Left Headphone Output PGA", NULL, "Charge Pump" },
910 { "Right Headphone Output PGA", NULL, "Charge Pump" },
911 { "Left Line Output PGA", NULL, "Charge Pump" },
912 { "Right Line Output PGA", NULL, "Charge Pump" },
913};
914
915static int wm8903_add_widgets(struct snd_soc_codec *codec)
916{
917 snd_soc_dapm_new_controls(codec, wm8903_dapm_widgets,
918 ARRAY_SIZE(wm8903_dapm_widgets));
919
920 snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
921
922 snd_soc_dapm_new_widgets(codec);
923
924 return 0;
925}
926
927static int wm8903_set_bias_level(struct snd_soc_codec *codec,
928 enum snd_soc_bias_level level)
929{
930 struct i2c_client *i2c = codec->control_data;
931 u16 reg, reg2;
932
933 switch (level) {
934 case SND_SOC_BIAS_ON:
935 case SND_SOC_BIAS_PREPARE:
936 reg = snd_soc_read(codec, WM8903_VMID_CONTROL_0);
937 reg &= ~(WM8903_VMID_RES_MASK);
938 reg |= WM8903_VMID_RES_50K;
939 snd_soc_write(codec, WM8903_VMID_CONTROL_0, reg);
940 break;
941
942 case SND_SOC_BIAS_STANDBY:
943 if (codec->bias_level == SND_SOC_BIAS_OFF) {
944 snd_soc_write(codec, WM8903_CLOCK_RATES_2,
945 WM8903_CLK_SYS_ENA);
946
947
948 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_0, 0x11);
949 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_1, 0x1257);
950 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_2, 0x2);
951
952 wm8903_run_sequence(codec, 0);
953 wm8903_sync_reg_cache(codec, codec->reg_cache);
954
955
956 reg = snd_soc_read(codec,
957 WM8903_CONTROL_INTERFACE_TEST_1);
958 snd_soc_write(codec, WM8903_CONTROL_INTERFACE_TEST_1,
959 reg | WM8903_TEST_KEY);
960 reg2 = snd_soc_read(codec, WM8903_CHARGE_PUMP_TEST_1);
961 snd_soc_write(codec, WM8903_CHARGE_PUMP_TEST_1,
962 reg2 | WM8903_CP_SW_KELVIN_MODE_MASK);
963 snd_soc_write(codec, WM8903_CONTROL_INTERFACE_TEST_1,
964 reg);
965
966
967
968
969 dev_dbg(&i2c->dev, "Enabling Class W\n");
970 snd_soc_write(codec, WM8903_CLASS_W_0, reg |
971 WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V);
972 }
973
974 reg = snd_soc_read(codec, WM8903_VMID_CONTROL_0);
975 reg &= ~(WM8903_VMID_RES_MASK);
976 reg |= WM8903_VMID_RES_250K;
977 snd_soc_write(codec, WM8903_VMID_CONTROL_0, reg);
978 break;
979
980 case SND_SOC_BIAS_OFF:
981 wm8903_run_sequence(codec, 32);
982 reg = snd_soc_read(codec, WM8903_CLOCK_RATES_2);
983 reg &= ~WM8903_CLK_SYS_ENA;
984 snd_soc_write(codec, WM8903_CLOCK_RATES_2, reg);
985 break;
986 }
987
988 codec->bias_level = level;
989
990 return 0;
991}
992
993static int wm8903_set_dai_sysclk(struct snd_soc_dai *codec_dai,
994 int clk_id, unsigned int freq, int dir)
995{
996 struct snd_soc_codec *codec = codec_dai->codec;
997 struct wm8903_priv *wm8903 = codec->private_data;
998
999 wm8903->sysclk = freq;
1000
1001 return 0;
1002}
1003
1004static int wm8903_set_dai_fmt(struct snd_soc_dai *codec_dai,
1005 unsigned int fmt)
1006{
1007 struct snd_soc_codec *codec = codec_dai->codec;
1008 u16 aif1 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_1);
1009
1010 aif1 &= ~(WM8903_LRCLK_DIR | WM8903_BCLK_DIR | WM8903_AIF_FMT_MASK |
1011 WM8903_AIF_LRCLK_INV | WM8903_AIF_BCLK_INV);
1012
1013 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1014 case SND_SOC_DAIFMT_CBS_CFS:
1015 break;
1016 case SND_SOC_DAIFMT_CBS_CFM:
1017 aif1 |= WM8903_LRCLK_DIR;
1018 break;
1019 case SND_SOC_DAIFMT_CBM_CFM:
1020 aif1 |= WM8903_LRCLK_DIR | WM8903_BCLK_DIR;
1021 break;
1022 case SND_SOC_DAIFMT_CBM_CFS:
1023 aif1 |= WM8903_BCLK_DIR;
1024 break;
1025 default:
1026 return -EINVAL;
1027 }
1028
1029 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1030 case SND_SOC_DAIFMT_DSP_A:
1031 aif1 |= 0x3;
1032 break;
1033 case SND_SOC_DAIFMT_DSP_B:
1034 aif1 |= 0x3 | WM8903_AIF_LRCLK_INV;
1035 break;
1036 case SND_SOC_DAIFMT_I2S:
1037 aif1 |= 0x2;
1038 break;
1039 case SND_SOC_DAIFMT_RIGHT_J:
1040 aif1 |= 0x1;
1041 break;
1042 case SND_SOC_DAIFMT_LEFT_J:
1043 break;
1044 default:
1045 return -EINVAL;
1046 }
1047
1048
1049 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1050 case SND_SOC_DAIFMT_DSP_A:
1051 case SND_SOC_DAIFMT_DSP_B:
1052
1053 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1054 case SND_SOC_DAIFMT_NB_NF:
1055 break;
1056 case SND_SOC_DAIFMT_IB_NF:
1057 aif1 |= WM8903_AIF_BCLK_INV;
1058 break;
1059 default:
1060 return -EINVAL;
1061 }
1062 break;
1063 case SND_SOC_DAIFMT_I2S:
1064 case SND_SOC_DAIFMT_RIGHT_J:
1065 case SND_SOC_DAIFMT_LEFT_J:
1066 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1067 case SND_SOC_DAIFMT_NB_NF:
1068 break;
1069 case SND_SOC_DAIFMT_IB_IF:
1070 aif1 |= WM8903_AIF_BCLK_INV | WM8903_AIF_LRCLK_INV;
1071 break;
1072 case SND_SOC_DAIFMT_IB_NF:
1073 aif1 |= WM8903_AIF_BCLK_INV;
1074 break;
1075 case SND_SOC_DAIFMT_NB_IF:
1076 aif1 |= WM8903_AIF_LRCLK_INV;
1077 break;
1078 default:
1079 return -EINVAL;
1080 }
1081 break;
1082 default:
1083 return -EINVAL;
1084 }
1085
1086 snd_soc_write(codec, WM8903_AUDIO_INTERFACE_1, aif1);
1087
1088 return 0;
1089}
1090
1091static int wm8903_digital_mute(struct snd_soc_dai *codec_dai, int mute)
1092{
1093 struct snd_soc_codec *codec = codec_dai->codec;
1094 u16 reg;
1095
1096 reg = snd_soc_read(codec, WM8903_DAC_DIGITAL_1);
1097
1098 if (mute)
1099 reg |= WM8903_DAC_MUTE;
1100 else
1101 reg &= ~WM8903_DAC_MUTE;
1102
1103 snd_soc_write(codec, WM8903_DAC_DIGITAL_1, reg);
1104
1105 return 0;
1106}
1107
1108
1109
1110
1111static struct {
1112 int div;
1113 int rate;
1114 int mode;
1115 int mclk_div;
1116} clk_sys_ratios[] = {
1117 { 64, 0x0, 0x0, 1 },
1118 { 68, 0x0, 0x1, 1 },
1119 { 125, 0x0, 0x2, 1 },
1120 { 128, 0x1, 0x0, 1 },
1121 { 136, 0x1, 0x1, 1 },
1122 { 192, 0x2, 0x0, 1 },
1123 { 204, 0x2, 0x1, 1 },
1124
1125 { 64, 0x0, 0x0, 2 },
1126 { 68, 0x0, 0x1, 2 },
1127 { 125, 0x0, 0x2, 2 },
1128 { 128, 0x1, 0x0, 2 },
1129 { 136, 0x1, 0x1, 2 },
1130 { 192, 0x2, 0x0, 2 },
1131 { 204, 0x2, 0x1, 2 },
1132
1133 { 250, 0x2, 0x2, 1 },
1134 { 256, 0x3, 0x0, 1 },
1135 { 272, 0x3, 0x1, 1 },
1136 { 384, 0x4, 0x0, 1 },
1137 { 408, 0x4, 0x1, 1 },
1138 { 375, 0x4, 0x2, 1 },
1139 { 512, 0x5, 0x0, 1 },
1140 { 544, 0x5, 0x1, 1 },
1141 { 500, 0x5, 0x2, 1 },
1142 { 768, 0x6, 0x0, 1 },
1143 { 816, 0x6, 0x1, 1 },
1144 { 750, 0x6, 0x2, 1 },
1145 { 1024, 0x7, 0x0, 1 },
1146 { 1088, 0x7, 0x1, 1 },
1147 { 1000, 0x7, 0x2, 1 },
1148 { 1408, 0x8, 0x0, 1 },
1149 { 1496, 0x8, 0x1, 1 },
1150 { 1536, 0x9, 0x0, 1 },
1151 { 1632, 0x9, 0x1, 1 },
1152 { 1500, 0x9, 0x2, 1 },
1153
1154 { 250, 0x2, 0x2, 2 },
1155 { 256, 0x3, 0x0, 2 },
1156 { 272, 0x3, 0x1, 2 },
1157 { 384, 0x4, 0x0, 2 },
1158 { 408, 0x4, 0x1, 2 },
1159 { 375, 0x4, 0x2, 2 },
1160 { 512, 0x5, 0x0, 2 },
1161 { 544, 0x5, 0x1, 2 },
1162 { 500, 0x5, 0x2, 2 },
1163 { 768, 0x6, 0x0, 2 },
1164 { 816, 0x6, 0x1, 2 },
1165 { 750, 0x6, 0x2, 2 },
1166 { 1024, 0x7, 0x0, 2 },
1167 { 1088, 0x7, 0x1, 2 },
1168 { 1000, 0x7, 0x2, 2 },
1169 { 1408, 0x8, 0x0, 2 },
1170 { 1496, 0x8, 0x1, 2 },
1171 { 1536, 0x9, 0x0, 2 },
1172 { 1632, 0x9, 0x1, 2 },
1173 { 1500, 0x9, 0x2, 2 },
1174};
1175
1176
1177static struct {
1178 int ratio;
1179 int div;
1180} bclk_divs[] = {
1181 { 10, 0 },
1182 { 20, 2 },
1183 { 30, 3 },
1184 { 40, 4 },
1185 { 50, 5 },
1186 { 60, 7 },
1187 { 80, 8 },
1188 { 100, 9 },
1189 { 120, 11 },
1190 { 160, 12 },
1191 { 200, 13 },
1192 { 220, 14 },
1193 { 240, 15 },
1194 { 300, 17 },
1195 { 320, 18 },
1196 { 440, 19 },
1197 { 480, 20 },
1198};
1199
1200
1201static struct {
1202 int rate;
1203 int value;
1204} sample_rates[] = {
1205 { 8000, 0 },
1206 { 11025, 1 },
1207 { 12000, 2 },
1208 { 16000, 3 },
1209 { 22050, 4 },
1210 { 24000, 5 },
1211 { 32000, 6 },
1212 { 44100, 7 },
1213 { 48000, 8 },
1214 { 88200, 9 },
1215 { 96000, 10 },
1216 { 0, 0 },
1217};
1218
1219static int wm8903_startup(struct snd_pcm_substream *substream,
1220 struct snd_soc_dai *dai)
1221{
1222 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1223 struct snd_soc_device *socdev = rtd->socdev;
1224 struct snd_soc_codec *codec = socdev->card->codec;
1225 struct wm8903_priv *wm8903 = codec->private_data;
1226 struct i2c_client *i2c = codec->control_data;
1227 struct snd_pcm_runtime *master_runtime;
1228
1229 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1230 wm8903->playback_active++;
1231 else
1232 wm8903->capture_active++;
1233
1234
1235
1236
1237 if (wm8903->master_substream) {
1238 master_runtime = wm8903->master_substream->runtime;
1239
1240 dev_dbg(&i2c->dev, "Constraining to %d bits\n",
1241 master_runtime->sample_bits);
1242
1243 snd_pcm_hw_constraint_minmax(substream->runtime,
1244 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1245 master_runtime->sample_bits,
1246 master_runtime->sample_bits);
1247
1248 wm8903->slave_substream = substream;
1249 } else
1250 wm8903->master_substream = substream;
1251
1252 return 0;
1253}
1254
1255static void wm8903_shutdown(struct snd_pcm_substream *substream,
1256 struct snd_soc_dai *dai)
1257{
1258 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1259 struct snd_soc_device *socdev = rtd->socdev;
1260 struct snd_soc_codec *codec = socdev->card->codec;
1261 struct wm8903_priv *wm8903 = codec->private_data;
1262
1263 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1264 wm8903->playback_active--;
1265 else
1266 wm8903->capture_active--;
1267
1268 if (wm8903->master_substream == substream)
1269 wm8903->master_substream = wm8903->slave_substream;
1270
1271 wm8903->slave_substream = NULL;
1272}
1273
1274static int wm8903_hw_params(struct snd_pcm_substream *substream,
1275 struct snd_pcm_hw_params *params,
1276 struct snd_soc_dai *dai)
1277{
1278 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1279 struct snd_soc_device *socdev = rtd->socdev;
1280 struct snd_soc_codec *codec = socdev->card->codec;
1281 struct wm8903_priv *wm8903 = codec->private_data;
1282 struct i2c_client *i2c = codec->control_data;
1283 int fs = params_rate(params);
1284 int bclk;
1285 int bclk_div;
1286 int i;
1287 int dsp_config;
1288 int clk_config;
1289 int best_val;
1290 int cur_val;
1291 int clk_sys;
1292
1293 u16 aif1 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_1);
1294 u16 aif2 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_2);
1295 u16 aif3 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_3);
1296 u16 clock0 = snd_soc_read(codec, WM8903_CLOCK_RATES_0);
1297 u16 clock1 = snd_soc_read(codec, WM8903_CLOCK_RATES_1);
1298 u16 dac_digital1 = snd_soc_read(codec, WM8903_DAC_DIGITAL_1);
1299
1300 if (substream == wm8903->slave_substream) {
1301 dev_dbg(&i2c->dev, "Ignoring hw_params for slave substream\n");
1302 return 0;
1303 }
1304
1305
1306 if (fs <= 24000)
1307 dac_digital1 |= WM8903_DAC_SB_FILT;
1308 else
1309 dac_digital1 &= ~WM8903_DAC_SB_FILT;
1310
1311
1312 dsp_config = 0;
1313 best_val = abs(sample_rates[dsp_config].rate - fs);
1314 for (i = 1; i < ARRAY_SIZE(sample_rates); i++) {
1315 cur_val = abs(sample_rates[i].rate - fs);
1316 if (cur_val <= best_val) {
1317 dsp_config = i;
1318 best_val = cur_val;
1319 }
1320 }
1321
1322
1323 if (wm8903->capture_active)
1324 switch (sample_rates[dsp_config].rate) {
1325 case 88200:
1326 case 96000:
1327 dev_err(&i2c->dev, "%dHz unsupported by ADC\n",
1328 fs);
1329 return -EINVAL;
1330
1331 default:
1332 break;
1333 }
1334
1335 dev_dbg(&i2c->dev, "DSP fs = %dHz\n", sample_rates[dsp_config].rate);
1336 clock1 &= ~WM8903_SAMPLE_RATE_MASK;
1337 clock1 |= sample_rates[dsp_config].value;
1338
1339 aif1 &= ~WM8903_AIF_WL_MASK;
1340 bclk = 2 * fs;
1341 switch (params_format(params)) {
1342 case SNDRV_PCM_FORMAT_S16_LE:
1343 bclk *= 16;
1344 break;
1345 case SNDRV_PCM_FORMAT_S20_3LE:
1346 bclk *= 20;
1347 aif1 |= 0x4;
1348 break;
1349 case SNDRV_PCM_FORMAT_S24_LE:
1350 bclk *= 24;
1351 aif1 |= 0x8;
1352 break;
1353 case SNDRV_PCM_FORMAT_S32_LE:
1354 bclk *= 32;
1355 aif1 |= 0xc;
1356 break;
1357 default:
1358 return -EINVAL;
1359 }
1360
1361 dev_dbg(&i2c->dev, "MCLK = %dHz, target sample rate = %dHz\n",
1362 wm8903->sysclk, fs);
1363
1364
1365
1366
1367
1368 clk_config = 0;
1369 best_val = abs((wm8903->sysclk /
1370 (clk_sys_ratios[0].mclk_div *
1371 clk_sys_ratios[0].div)) - fs);
1372 for (i = 1; i < ARRAY_SIZE(clk_sys_ratios); i++) {
1373 cur_val = abs((wm8903->sysclk /
1374 (clk_sys_ratios[i].mclk_div *
1375 clk_sys_ratios[i].div)) - fs);
1376
1377 if (cur_val <= best_val) {
1378 clk_config = i;
1379 best_val = cur_val;
1380 }
1381 }
1382
1383 if (clk_sys_ratios[clk_config].mclk_div == 2) {
1384 clock0 |= WM8903_MCLKDIV2;
1385 clk_sys = wm8903->sysclk / 2;
1386 } else {
1387 clock0 &= ~WM8903_MCLKDIV2;
1388 clk_sys = wm8903->sysclk;
1389 }
1390
1391 clock1 &= ~(WM8903_CLK_SYS_RATE_MASK |
1392 WM8903_CLK_SYS_MODE_MASK);
1393 clock1 |= clk_sys_ratios[clk_config].rate << WM8903_CLK_SYS_RATE_SHIFT;
1394 clock1 |= clk_sys_ratios[clk_config].mode << WM8903_CLK_SYS_MODE_SHIFT;
1395
1396 dev_dbg(&i2c->dev, "CLK_SYS_RATE=%x, CLK_SYS_MODE=%x div=%d\n",
1397 clk_sys_ratios[clk_config].rate,
1398 clk_sys_ratios[clk_config].mode,
1399 clk_sys_ratios[clk_config].div);
1400
1401 dev_dbg(&i2c->dev, "Actual CLK_SYS = %dHz\n", clk_sys);
1402
1403
1404
1405
1406
1407
1408 bclk_div = 0;
1409 best_val = ((clk_sys * 10) / bclk_divs[0].ratio) - bclk;
1410 i = 1;
1411 while (i < ARRAY_SIZE(bclk_divs)) {
1412 cur_val = ((clk_sys * 10) / bclk_divs[i].ratio) - bclk;
1413 if (cur_val < 0)
1414 break;
1415 bclk_div = i;
1416 best_val = cur_val;
1417 i++;
1418 }
1419
1420 aif2 &= ~WM8903_BCLK_DIV_MASK;
1421 aif3 &= ~WM8903_LRCLK_RATE_MASK;
1422
1423 dev_dbg(&i2c->dev, "BCLK ratio %d for %dHz - actual BCLK = %dHz\n",
1424 bclk_divs[bclk_div].ratio / 10, bclk,
1425 (clk_sys * 10) / bclk_divs[bclk_div].ratio);
1426
1427 aif2 |= bclk_divs[bclk_div].div;
1428 aif3 |= bclk / fs;
1429
1430 snd_soc_write(codec, WM8903_CLOCK_RATES_0, clock0);
1431 snd_soc_write(codec, WM8903_CLOCK_RATES_1, clock1);
1432 snd_soc_write(codec, WM8903_AUDIO_INTERFACE_1, aif1);
1433 snd_soc_write(codec, WM8903_AUDIO_INTERFACE_2, aif2);
1434 snd_soc_write(codec, WM8903_AUDIO_INTERFACE_3, aif3);
1435 snd_soc_write(codec, WM8903_DAC_DIGITAL_1, dac_digital1);
1436
1437 return 0;
1438}
1439
1440#define WM8903_PLAYBACK_RATES (SNDRV_PCM_RATE_8000 |\
1441 SNDRV_PCM_RATE_11025 | \
1442 SNDRV_PCM_RATE_16000 | \
1443 SNDRV_PCM_RATE_22050 | \
1444 SNDRV_PCM_RATE_32000 | \
1445 SNDRV_PCM_RATE_44100 | \
1446 SNDRV_PCM_RATE_48000 | \
1447 SNDRV_PCM_RATE_88200 | \
1448 SNDRV_PCM_RATE_96000)
1449
1450#define WM8903_CAPTURE_RATES (SNDRV_PCM_RATE_8000 |\
1451 SNDRV_PCM_RATE_11025 | \
1452 SNDRV_PCM_RATE_16000 | \
1453 SNDRV_PCM_RATE_22050 | \
1454 SNDRV_PCM_RATE_32000 | \
1455 SNDRV_PCM_RATE_44100 | \
1456 SNDRV_PCM_RATE_48000)
1457
1458#define WM8903_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
1459 SNDRV_PCM_FMTBIT_S20_3LE |\
1460 SNDRV_PCM_FMTBIT_S24_LE)
1461
1462static struct snd_soc_dai_ops wm8903_dai_ops = {
1463 .startup = wm8903_startup,
1464 .shutdown = wm8903_shutdown,
1465 .hw_params = wm8903_hw_params,
1466 .digital_mute = wm8903_digital_mute,
1467 .set_fmt = wm8903_set_dai_fmt,
1468 .set_sysclk = wm8903_set_dai_sysclk,
1469};
1470
1471struct snd_soc_dai wm8903_dai = {
1472 .name = "WM8903",
1473 .playback = {
1474 .stream_name = "Playback",
1475 .channels_min = 2,
1476 .channels_max = 2,
1477 .rates = WM8903_PLAYBACK_RATES,
1478 .formats = WM8903_FORMATS,
1479 },
1480 .capture = {
1481 .stream_name = "Capture",
1482 .channels_min = 2,
1483 .channels_max = 2,
1484 .rates = WM8903_CAPTURE_RATES,
1485 .formats = WM8903_FORMATS,
1486 },
1487 .ops = &wm8903_dai_ops,
1488 .symmetric_rates = 1,
1489};
1490EXPORT_SYMBOL_GPL(wm8903_dai);
1491
1492static int wm8903_suspend(struct platform_device *pdev, pm_message_t state)
1493{
1494 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1495 struct snd_soc_codec *codec = socdev->card->codec;
1496
1497 wm8903_set_bias_level(codec, SND_SOC_BIAS_OFF);
1498
1499 return 0;
1500}
1501
1502static int wm8903_resume(struct platform_device *pdev)
1503{
1504 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1505 struct snd_soc_codec *codec = socdev->card->codec;
1506 struct i2c_client *i2c = codec->control_data;
1507 int i;
1508 u16 *reg_cache = codec->reg_cache;
1509 u16 *tmp_cache = kmemdup(codec->reg_cache, sizeof(wm8903_reg_defaults),
1510 GFP_KERNEL);
1511
1512
1513 wm8903_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1514 wm8903_set_bias_level(codec, codec->suspend_bias_level);
1515
1516
1517 if (tmp_cache) {
1518 for (i = 2; i < ARRAY_SIZE(wm8903_reg_defaults); i++)
1519 if (tmp_cache[i] != reg_cache[i])
1520 snd_soc_write(codec, i, tmp_cache[i]);
1521 } else {
1522 dev_err(&i2c->dev, "Failed to allocate temporary cache\n");
1523 }
1524
1525 return 0;
1526}
1527
1528static struct snd_soc_codec *wm8903_codec;
1529
1530static __devinit int wm8903_i2c_probe(struct i2c_client *i2c,
1531 const struct i2c_device_id *id)
1532{
1533 struct wm8903_priv *wm8903;
1534 struct snd_soc_codec *codec;
1535 int ret;
1536 u16 val;
1537
1538 wm8903 = kzalloc(sizeof(struct wm8903_priv), GFP_KERNEL);
1539 if (wm8903 == NULL)
1540 return -ENOMEM;
1541
1542 codec = &wm8903->codec;
1543
1544 mutex_init(&codec->mutex);
1545 INIT_LIST_HEAD(&codec->dapm_widgets);
1546 INIT_LIST_HEAD(&codec->dapm_paths);
1547
1548 codec->dev = &i2c->dev;
1549 codec->name = "WM8903";
1550 codec->owner = THIS_MODULE;
1551 codec->bias_level = SND_SOC_BIAS_OFF;
1552 codec->set_bias_level = wm8903_set_bias_level;
1553 codec->dai = &wm8903_dai;
1554 codec->num_dai = 1;
1555 codec->reg_cache_size = ARRAY_SIZE(wm8903->reg_cache);
1556 codec->reg_cache = &wm8903->reg_cache[0];
1557 codec->private_data = wm8903;
1558 codec->volatile_register = wm8903_volatile_register;
1559
1560 i2c_set_clientdata(i2c, codec);
1561 codec->control_data = i2c;
1562
1563 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
1564 if (ret != 0) {
1565 dev_err(&i2c->dev, "Failed to set cache I/O: %d\n", ret);
1566 goto err;
1567 }
1568
1569 val = snd_soc_read(codec, WM8903_SW_RESET_AND_ID);
1570 if (val != wm8903_reg_defaults[WM8903_SW_RESET_AND_ID]) {
1571 dev_err(&i2c->dev,
1572 "Device with ID register %x is not a WM8903\n", val);
1573 return -ENODEV;
1574 }
1575
1576 val = snd_soc_read(codec, WM8903_REVISION_NUMBER);
1577 dev_info(&i2c->dev, "WM8903 revision %d\n",
1578 val & WM8903_CHIP_REV_MASK);
1579
1580 wm8903_reset(codec);
1581
1582
1583 wm8903_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1584
1585
1586 val = snd_soc_read(codec, WM8903_ADC_DIGITAL_VOLUME_LEFT);
1587 val |= WM8903_ADCVU;
1588 snd_soc_write(codec, WM8903_ADC_DIGITAL_VOLUME_LEFT, val);
1589 snd_soc_write(codec, WM8903_ADC_DIGITAL_VOLUME_RIGHT, val);
1590
1591 val = snd_soc_read(codec, WM8903_DAC_DIGITAL_VOLUME_LEFT);
1592 val |= WM8903_DACVU;
1593 snd_soc_write(codec, WM8903_DAC_DIGITAL_VOLUME_LEFT, val);
1594 snd_soc_write(codec, WM8903_DAC_DIGITAL_VOLUME_RIGHT, val);
1595
1596 val = snd_soc_read(codec, WM8903_ANALOGUE_OUT1_LEFT);
1597 val |= WM8903_HPOUTVU;
1598 snd_soc_write(codec, WM8903_ANALOGUE_OUT1_LEFT, val);
1599 snd_soc_write(codec, WM8903_ANALOGUE_OUT1_RIGHT, val);
1600
1601 val = snd_soc_read(codec, WM8903_ANALOGUE_OUT2_LEFT);
1602 val |= WM8903_LINEOUTVU;
1603 snd_soc_write(codec, WM8903_ANALOGUE_OUT2_LEFT, val);
1604 snd_soc_write(codec, WM8903_ANALOGUE_OUT2_RIGHT, val);
1605
1606 val = snd_soc_read(codec, WM8903_ANALOGUE_OUT3_LEFT);
1607 val |= WM8903_SPKVU;
1608 snd_soc_write(codec, WM8903_ANALOGUE_OUT3_LEFT, val);
1609 snd_soc_write(codec, WM8903_ANALOGUE_OUT3_RIGHT, val);
1610
1611
1612 val = snd_soc_read(codec, WM8903_DAC_DIGITAL_1);
1613 val |= WM8903_DAC_MUTEMODE;
1614 snd_soc_write(codec, WM8903_DAC_DIGITAL_1, val);
1615
1616 wm8903_dai.dev = &i2c->dev;
1617 wm8903_codec = codec;
1618
1619 ret = snd_soc_register_codec(codec);
1620 if (ret != 0) {
1621 dev_err(&i2c->dev, "Failed to register codec: %d\n", ret);
1622 goto err;
1623 }
1624
1625 ret = snd_soc_register_dai(&wm8903_dai);
1626 if (ret != 0) {
1627 dev_err(&i2c->dev, "Failed to register DAI: %d\n", ret);
1628 goto err_codec;
1629 }
1630
1631 return ret;
1632
1633err_codec:
1634 snd_soc_unregister_codec(codec);
1635err:
1636 wm8903_codec = NULL;
1637 kfree(wm8903);
1638 return ret;
1639}
1640
1641static __devexit int wm8903_i2c_remove(struct i2c_client *client)
1642{
1643 struct snd_soc_codec *codec = i2c_get_clientdata(client);
1644
1645 snd_soc_unregister_dai(&wm8903_dai);
1646 snd_soc_unregister_codec(codec);
1647
1648 wm8903_set_bias_level(codec, SND_SOC_BIAS_OFF);
1649
1650 kfree(codec->private_data);
1651
1652 wm8903_codec = NULL;
1653 wm8903_dai.dev = NULL;
1654
1655 return 0;
1656}
1657
1658#ifdef CONFIG_PM
1659static int wm8903_i2c_suspend(struct i2c_client *client, pm_message_t msg)
1660{
1661 return snd_soc_suspend_device(&client->dev);
1662}
1663
1664static int wm8903_i2c_resume(struct i2c_client *client)
1665{
1666 return snd_soc_resume_device(&client->dev);
1667}
1668#else
1669#define wm8903_i2c_suspend NULL
1670#define wm8903_i2c_resume NULL
1671#endif
1672
1673
1674static const struct i2c_device_id wm8903_i2c_id[] = {
1675 { "wm8903", 0 },
1676 { }
1677};
1678MODULE_DEVICE_TABLE(i2c, wm8903_i2c_id);
1679
1680static struct i2c_driver wm8903_i2c_driver = {
1681 .driver = {
1682 .name = "WM8903",
1683 .owner = THIS_MODULE,
1684 },
1685 .probe = wm8903_i2c_probe,
1686 .remove = __devexit_p(wm8903_i2c_remove),
1687 .suspend = wm8903_i2c_suspend,
1688 .resume = wm8903_i2c_resume,
1689 .id_table = wm8903_i2c_id,
1690};
1691
1692static int wm8903_probe(struct platform_device *pdev)
1693{
1694 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1695 int ret = 0;
1696
1697 if (!wm8903_codec) {
1698 dev_err(&pdev->dev, "I2C device not yet probed\n");
1699 goto err;
1700 }
1701
1702 socdev->card->codec = wm8903_codec;
1703
1704
1705 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
1706 if (ret < 0) {
1707 dev_err(&pdev->dev, "failed to create pcms\n");
1708 goto err;
1709 }
1710
1711 snd_soc_add_controls(socdev->card->codec, wm8903_snd_controls,
1712 ARRAY_SIZE(wm8903_snd_controls));
1713 wm8903_add_widgets(socdev->card->codec);
1714
1715 ret = snd_soc_init_card(socdev);
1716 if (ret < 0) {
1717 dev_err(&pdev->dev, "wm8903: failed to register card\n");
1718 goto card_err;
1719 }
1720
1721 return ret;
1722
1723card_err:
1724 snd_soc_free_pcms(socdev);
1725 snd_soc_dapm_free(socdev);
1726err:
1727 return ret;
1728}
1729
1730
1731static int wm8903_remove(struct platform_device *pdev)
1732{
1733 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1734 struct snd_soc_codec *codec = socdev->card->codec;
1735
1736 if (codec->control_data)
1737 wm8903_set_bias_level(codec, SND_SOC_BIAS_OFF);
1738
1739 snd_soc_free_pcms(socdev);
1740 snd_soc_dapm_free(socdev);
1741
1742 return 0;
1743}
1744
1745struct snd_soc_codec_device soc_codec_dev_wm8903 = {
1746 .probe = wm8903_probe,
1747 .remove = wm8903_remove,
1748 .suspend = wm8903_suspend,
1749 .resume = wm8903_resume,
1750};
1751EXPORT_SYMBOL_GPL(soc_codec_dev_wm8903);
1752
1753static int __init wm8903_modinit(void)
1754{
1755 return i2c_add_driver(&wm8903_i2c_driver);
1756}
1757module_init(wm8903_modinit);
1758
1759static void __exit wm8903_exit(void)
1760{
1761 i2c_del_driver(&wm8903_i2c_driver);
1762}
1763module_exit(wm8903_exit);
1764
1765MODULE_DESCRIPTION("ASoC WM8903 driver");
1766MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.cm>");
1767MODULE_LICENSE("GPL");
1768
