LXR linux/include/media/davinci/vpss.h

   1/*
   2 * Copyright (C) 2009 Texas Instruments Inc
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License as published by
   6 * the Free Software Foundation; either version 2 of the License, or
   7 * (at your option) any later version.
   8 *
   9 * This program is distributed in the hope that it will be useful,
  10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 * GNU General Public License for more details.
  13 *
  14 * You should have received a copy of the GNU General Public License
  15 * along with this program; if not, write to the Free Software
  16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  17 *
  18 * vpss - video processing subsystem module header file.
  19 *
  20 * Include this header file if a driver needs to configure vpss system
  21 * module. It exports a set of library functions  for video drivers to
  22 * configure vpss system module functions such as clock enable/disable,
  23 * vpss interrupt mux to arm, and other common vpss system module
  24 * functions.
  25 */
  26#ifndef _VPSS_H
  27#define _VPSS_H
  28
  29/* selector for ccdc input selection on DM355 */
  30enum vpss_ccdc_source_sel {
  31        VPSS_CCDCIN,
  32        VPSS_HSSIIN
  33};
  34
  35/* Used for enable/diable VPSS Clock */
  36enum vpss_clock_sel {
  37        /* DM355/DM365 */
  38        VPSS_CCDC_CLOCK,
  39        VPSS_IPIPE_CLOCK,
  40        VPSS_H3A_CLOCK,
  41        VPSS_CFALD_CLOCK,
  42        /*
  43         * When using VPSS_VENC_CLOCK_SEL in vpss_enable_clock() api
  44         * following applies:-
  45         * en = 0 selects ENC_CLK
  46         * en = 1 selects ENC_CLK/2
  47         */
  48        VPSS_VENC_CLOCK_SEL,
  49        VPSS_VPBE_CLOCK,
  50};
  51
  52/* select input to ccdc on dm355 */
  53int vpss_select_ccdc_source(enum vpss_ccdc_source_sel src_sel);
  54/* enable/disable a vpss clock, 0 - success, -1 - failure */
  55int vpss_enable_clock(enum vpss_clock_sel clock_sel, int en);
  56
  57/* wbl reset for dm644x */
  58enum vpss_wbl_sel {
  59        VPSS_PCR_AEW_WBL_0 = 16,
  60        VPSS_PCR_AF_WBL_0,
  61        VPSS_PCR_RSZ4_WBL_0,
  62        VPSS_PCR_RSZ3_WBL_0,
  63        VPSS_PCR_RSZ2_WBL_0,
  64        VPSS_PCR_RSZ1_WBL_0,
  65        VPSS_PCR_PREV_WBL_0,
  66        VPSS_PCR_CCDC_WBL_O,
  67};
  68int vpss_clear_wbl_overflow(enum vpss_wbl_sel wbl_sel);
  69#endif
  70