1#ifndef dprintk
2# define dprintk(x)
3#endif
4
5#define _nblank(x) #x
6#define nblank(x) _nblank(x)[0]
7
8#include <linux/interrupt.h>
9
10
11
12
13
14#ifndef AAC_DRIVER_BUILD
15# define AAC_DRIVER_BUILD 2461
16# define AAC_DRIVER_BRANCH "-ms"
17#endif
18#define MAXIMUM_NUM_CONTAINERS 32
19
20#define AAC_NUM_MGT_FIB 8
21#define AAC_NUM_IO_FIB (512 - AAC_NUM_MGT_FIB)
22#define AAC_NUM_FIB (AAC_NUM_IO_FIB + AAC_NUM_MGT_FIB)
23
24#define AAC_MAX_LUN (8)
25
26#define AAC_MAX_HOSTPHYSMEMPAGES (0xfffff)
27#define AAC_MAX_32BIT_SGBCOUNT ((unsigned short)256)
28
29
30
31
32#define CONTAINER_CHANNEL (0)
33#define CONTAINER_TO_CHANNEL(cont) (CONTAINER_CHANNEL)
34#define CONTAINER_TO_ID(cont) (cont)
35#define CONTAINER_TO_LUN(cont) (0)
36
37#define aac_phys_to_logical(x) ((x)+1)
38#define aac_logical_to_phys(x) ((x)?(x)-1:0)
39
40
41
42struct diskparm
43{
44 int heads;
45 int sectors;
46 int cylinders;
47};
48
49
50
51
52
53
54#define CT_NONE 0
55#define CT_OK 218
56#define FT_FILESYS 8
57#define FT_DRIVE 9
58
59
60
61
62
63
64
65struct sgentry {
66 __le32 addr;
67 __le32 count;
68};
69
70struct user_sgentry {
71 u32 addr;
72 u32 count;
73};
74
75struct sgentry64 {
76 __le32 addr[2];
77 __le32 count;
78};
79
80struct user_sgentry64 {
81 u32 addr[2];
82 u32 count;
83};
84
85struct sgentryraw {
86 __le32 next;
87 __le32 prev;
88 __le32 addr[2];
89 __le32 count;
90 __le32 flags;
91};
92
93struct user_sgentryraw {
94 u32 next;
95 u32 prev;
96 u32 addr[2];
97 u32 count;
98 u32 flags;
99};
100
101
102
103
104
105
106
107
108struct sgmap {
109 __le32 count;
110 struct sgentry sg[1];
111};
112
113struct user_sgmap {
114 u32 count;
115 struct user_sgentry sg[1];
116};
117
118struct sgmap64 {
119 __le32 count;
120 struct sgentry64 sg[1];
121};
122
123struct user_sgmap64 {
124 u32 count;
125 struct user_sgentry64 sg[1];
126};
127
128struct sgmapraw {
129 __le32 count;
130 struct sgentryraw sg[1];
131};
132
133struct user_sgmapraw {
134 u32 count;
135 struct user_sgentryraw sg[1];
136};
137
138struct creation_info
139{
140 u8 buildnum;
141 u8 usec;
142 u8 via;
143
144
145 u8 year;
146 __le32 date;
147
148
149
150
151
152
153 __le32 serial[2];
154};
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169#define NUMBER_OF_COMM_QUEUES 8
170#define HOST_HIGH_CMD_ENTRIES 4
171#define HOST_NORM_CMD_ENTRIES 8
172#define ADAP_HIGH_CMD_ENTRIES 4
173#define ADAP_NORM_CMD_ENTRIES 512
174#define HOST_HIGH_RESP_ENTRIES 4
175#define HOST_NORM_RESP_ENTRIES 512
176#define ADAP_HIGH_RESP_ENTRIES 4
177#define ADAP_NORM_RESP_ENTRIES 8
178
179#define TOTAL_QUEUE_ENTRIES \
180 (HOST_NORM_CMD_ENTRIES + HOST_HIGH_CMD_ENTRIES + ADAP_NORM_CMD_ENTRIES + ADAP_HIGH_CMD_ENTRIES + \
181 HOST_NORM_RESP_ENTRIES + HOST_HIGH_RESP_ENTRIES + ADAP_NORM_RESP_ENTRIES + ADAP_HIGH_RESP_ENTRIES)
182
183
184
185
186
187
188#define QUEUE_ALIGNMENT 16
189
190
191
192
193
194
195
196
197struct aac_entry {
198 __le32 size;
199 __le32 addr;
200};
201
202
203
204
205
206
207struct aac_qhdr {
208 __le64 header_addr;
209
210 __le32 *producer;
211 __le32 *consumer;
212};
213
214
215
216
217
218
219#define HostNormCmdQue 1
220#define HostHighCmdQue 2
221#define HostNormRespQue 3
222#define HostHighRespQue 4
223#define AdapNormRespNotFull 5
224#define AdapHighRespNotFull 6
225#define AdapNormCmdNotFull 7
226#define AdapHighCmdNotFull 8
227#define SynchCommandComplete 9
228#define AdapInternalError 0xfe
229
230
231
232
233
234
235
236#define AdapNormCmdQue 2
237#define AdapHighCmdQue 3
238#define AdapNormRespQue 6
239#define AdapHighRespQue 7
240#define HostShutdown 8
241#define HostPowerFail 9
242#define FatalCommError 10
243#define HostNormRespNotFull 11
244#define HostHighRespNotFull 12
245#define HostNormCmdNotFull 13
246#define HostHighCmdNotFull 14
247#define FastIo 15
248#define AdapPrintfDone 16
249
250
251
252
253
254
255enum aac_queue_types {
256 HostNormCmdQueue = 0,
257 HostHighCmdQueue,
258 AdapNormCmdQueue,
259 AdapHighCmdQueue,
260 HostNormRespQueue,
261 HostHighRespQueue,
262 AdapNormRespQueue,
263 AdapHighRespQueue
264};
265
266
267
268
269
270#define FIB_MAGIC 0x0001
271
272
273
274
275
276#define FsaNormal 1
277
278
279
280
281
282
283struct aac_fibhdr {
284 __le32 XferState;
285 __le16 Command;
286 u8 StructType;
287 u8 Flags;
288 __le16 Size;
289 __le16 SenderSize;
290
291 __le32 SenderFibAddress;
292 __le32 ReceiverFibAddress;
293
294 u32 SenderData;
295 union {
296 struct {
297 __le32 _ReceiverTimeStart;
298
299 __le32 _ReceiverTimeDone;
300
301 } _s;
302 } _u;
303};
304
305struct hw_fib {
306 struct aac_fibhdr header;
307 u8 data[512-sizeof(struct aac_fibhdr)];
308};
309
310
311
312
313
314#define TestCommandResponse 1
315#define TestAdapterCommand 2
316
317
318
319#define LastTestCommand 100
320#define ReinitHostNormCommandQueue 101
321#define ReinitHostHighCommandQueue 102
322#define ReinitHostHighRespQueue 103
323#define ReinitHostNormRespQueue 104
324#define ReinitAdapNormCommandQueue 105
325#define ReinitAdapHighCommandQueue 107
326#define ReinitAdapHighRespQueue 108
327#define ReinitAdapNormRespQueue 109
328#define InterfaceShutdown 110
329#define DmaCommandFib 120
330#define StartProfile 121
331#define TermProfile 122
332#define SpeedTest 123
333#define TakeABreakPt 124
334#define RequestPerfData 125
335#define SetInterruptDefTimer 126
336#define SetInterruptDefCount 127
337#define GetInterruptDefStatus 128
338#define LastCommCommand 129
339
340
341
342#define NuFileSystem 300
343#define UFS 301
344#define HostFileSystem 302
345#define LastFileSystemCommand 303
346
347
348
349#define ContainerCommand 500
350#define ContainerCommand64 501
351#define ContainerRawIo 502
352
353
354
355#define ScsiPortCommand 600
356#define ScsiPortCommand64 601
357
358
359
360#define AifRequest 700
361#define CheckRevision 701
362#define FsaHostShutdown 702
363#define RequestAdapterInfo 703
364#define IsAdapterPaused 704
365#define SendHostTime 705
366#define RequestSupplementAdapterInfo 706
367#define LastMiscCommand 707
368
369
370
371
372
373enum fib_xfer_state {
374 HostOwned = (1<<0),
375 AdapterOwned = (1<<1),
376 FibInitialized = (1<<2),
377 FibEmpty = (1<<3),
378 AllocatedFromPool = (1<<4),
379 SentFromHost = (1<<5),
380 SentFromAdapter = (1<<6),
381 ResponseExpected = (1<<7),
382 NoResponseExpected = (1<<8),
383 AdapterProcessed = (1<<9),
384 HostProcessed = (1<<10),
385 HighPriority = (1<<11),
386 NormalPriority = (1<<12),
387 Async = (1<<13),
388 AsyncIo = (1<<13),
389 PageFileIo = (1<<14),
390 ShutdownRequest = (1<<15),
391 LazyWrite = (1<<16),
392 AdapterMicroFib = (1<<17),
393 BIOSFibPath = (1<<18),
394 FastResponseCapable = (1<<19),
395 ApiFib = (1<<20)
396};
397
398
399
400
401
402
403#define ADAPTER_INIT_STRUCT_REVISION 3
404#define ADAPTER_INIT_STRUCT_REVISION_4 4
405
406struct aac_init
407{
408 __le32 InitStructRevision;
409 __le32 MiniPortRevision;
410 __le32 fsrev;
411 __le32 CommHeaderAddress;
412 __le32 FastIoCommAreaAddress;
413 __le32 AdapterFibsPhysicalAddress;
414 __le32 AdapterFibsVirtualAddress;
415 __le32 AdapterFibsSize;
416 __le32 AdapterFibAlign;
417 __le32 printfbuf;
418 __le32 printfbufsiz;
419 __le32 HostPhysMemPages;
420
421 __le32 HostElapsedSeconds;
422
423
424
425 __le32 InitFlags;
426#define INITFLAGS_NEW_COMM_SUPPORTED 0x00000001
427#define INITFLAGS_DRIVER_USES_UTC_TIME 0x00000010
428#define INITFLAGS_DRIVER_SUPPORTS_PM 0x00000020
429 __le32 MaxIoCommands;
430 __le32 MaxIoSize;
431 __le32 MaxFibSize;
432};
433
434enum aac_log_level {
435 LOG_AAC_INIT = 10,
436 LOG_AAC_INFORMATIONAL = 20,
437 LOG_AAC_WARNING = 30,
438 LOG_AAC_LOW_ERROR = 40,
439 LOG_AAC_MEDIUM_ERROR = 50,
440 LOG_AAC_HIGH_ERROR = 60,
441 LOG_AAC_PANIC = 70,
442 LOG_AAC_DEBUG = 80,
443 LOG_AAC_WINDBG_PRINT = 90
444};
445
446#define FSAFS_NTC_GET_ADAPTER_FIB_CONTEXT 0x030b
447#define FSAFS_NTC_FIB_CONTEXT 0x030c
448
449struct aac_dev;
450struct fib;
451struct scsi_cmnd;
452
453struct adapter_ops
454{
455
456 void (*adapter_interrupt)(struct aac_dev *dev);
457 void (*adapter_notify)(struct aac_dev *dev, u32 event);
458 void (*adapter_disable_int)(struct aac_dev *dev);
459 void (*adapter_enable_int)(struct aac_dev *dev);
460 int (*adapter_sync_cmd)(struct aac_dev *dev, u32 command, u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, u32 *status, u32 *r1, u32 *r2, u32 *r3, u32 *r4);
461 int (*adapter_check_health)(struct aac_dev *dev);
462 int (*adapter_restart)(struct aac_dev *dev, int bled);
463
464 int (*adapter_ioremap)(struct aac_dev * dev, u32 size);
465 irq_handler_t adapter_intr;
466
467 int (*adapter_deliver)(struct fib * fib);
468 int (*adapter_bounds)(struct aac_dev * dev, struct scsi_cmnd * cmd, u64 lba);
469 int (*adapter_read)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count);
470 int (*adapter_write)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count, int fua);
471 int (*adapter_scsi)(struct fib * fib, struct scsi_cmnd * cmd);
472
473 int (*adapter_comm)(struct aac_dev * dev, int comm);
474};
475
476
477
478
479
480struct aac_driver_ident
481{
482 int (*init)(struct aac_dev *dev);
483 char * name;
484 char * vname;
485 char * model;
486 u16 channels;
487 int quirks;
488};
489
490
491
492
493
494
495#define AAC_QUIRK_31BIT 0x0001
496
497
498
499
500
501
502#define AAC_QUIRK_34SG 0x0002
503
504
505
506
507#define AAC_QUIRK_SLAVE 0x0004
508
509
510
511
512#define AAC_QUIRK_MASTER 0x0008
513
514
515
516
517
518
519#define AAC_QUIRK_17SG 0x0010
520
521
522
523
524
525#define AAC_QUIRK_SCSI_32 0x0020
526
527
528
529
530
531
532
533
534
535
536
537struct aac_queue {
538 u64 logical;
539 struct aac_entry *base;
540 struct aac_qhdr headers;
541 u32 entries;
542 wait_queue_head_t qfull;
543 wait_queue_head_t cmdready;
544
545 spinlock_t *lock;
546 spinlock_t lockdata;
547 struct list_head cmdq;
548
549 u32 numpending;
550 struct aac_dev * dev;
551};
552
553
554
555
556
557
558struct aac_queue_block
559{
560 struct aac_queue queue[8];
561};
562
563
564
565
566
567struct sa_drawbridge_CSR {
568
569 __le32 reserved[10];
570 u8 LUT_Offset;
571 u8 reserved1[3];
572 __le32 LUT_Data;
573 __le32 reserved2[26];
574 __le16 PRICLEARIRQ;
575 __le16 SECCLEARIRQ;
576 __le16 PRISETIRQ;
577 __le16 SECSETIRQ;
578 __le16 PRICLEARIRQMASK;
579 __le16 SECCLEARIRQMASK;
580 __le16 PRISETIRQMASK;
581 __le16 SECSETIRQMASK;
582 __le32 MAILBOX0;
583 __le32 MAILBOX1;
584 __le32 MAILBOX2;
585 __le32 MAILBOX3;
586 __le32 MAILBOX4;
587 __le32 MAILBOX5;
588 __le32 MAILBOX6;
589 __le32 MAILBOX7;
590 __le32 ROM_Setup_Data;
591 __le32 ROM_Control_Addr;
592 __le32 reserved3[12];
593 __le32 LUT[64];
594};
595
596#define Mailbox0 SaDbCSR.MAILBOX0
597#define Mailbox1 SaDbCSR.MAILBOX1
598#define Mailbox2 SaDbCSR.MAILBOX2
599#define Mailbox3 SaDbCSR.MAILBOX3
600#define Mailbox4 SaDbCSR.MAILBOX4
601#define Mailbox5 SaDbCSR.MAILBOX5
602#define Mailbox6 SaDbCSR.MAILBOX6
603#define Mailbox7 SaDbCSR.MAILBOX7
604
605#define DoorbellReg_p SaDbCSR.PRISETIRQ
606#define DoorbellReg_s SaDbCSR.SECSETIRQ
607#define DoorbellClrReg_p SaDbCSR.PRICLEARIRQ
608
609
610#define DOORBELL_0 0x0001
611#define DOORBELL_1 0x0002
612#define DOORBELL_2 0x0004
613#define DOORBELL_3 0x0008
614#define DOORBELL_4 0x0010
615#define DOORBELL_5 0x0020
616#define DOORBELL_6 0x0040
617
618
619#define PrintfReady DOORBELL_5
620#define PrintfDone DOORBELL_5
621
622struct sa_registers {
623 struct sa_drawbridge_CSR SaDbCSR;
624};
625
626
627#define Sa_MINIPORT_REVISION 1
628
629#define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
630#define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
631#define sa_writew(AEP, CSR, value) writew(value, &((AEP)->regs.sa->CSR))
632#define sa_writel(AEP, CSR, value) writel(value, &((AEP)->regs.sa->CSR))
633
634
635
636
637
638struct rx_mu_registers {
639
640 __le32 ARSR;
641 __le32 reserved0;
642 __le32 AWR;
643 __le32 reserved1;
644 __le32 IMRx[2];
645 __le32 OMRx[2];
646 __le32 IDR;
647 __le32 IISR;
648
649 __le32 IIMR;
650
651 __le32 ODR;
652 __le32 OISR;
653
654 __le32 OIMR;
655
656 __le32 reserved2;
657 __le32 reserved3;
658 __le32 InboundQueue;
659 __le32 OutboundQueue;
660
661
662};
663
664struct rx_inbound {
665 __le32 Mailbox[8];
666};
667
668#define INBOUNDDOORBELL_0 0x00000001
669#define INBOUNDDOORBELL_1 0x00000002
670#define INBOUNDDOORBELL_2 0x00000004
671#define INBOUNDDOORBELL_3 0x00000008
672#define INBOUNDDOORBELL_4 0x00000010
673#define INBOUNDDOORBELL_5 0x00000020
674#define INBOUNDDOORBELL_6 0x00000040
675
676#define OUTBOUNDDOORBELL_0 0x00000001
677#define OUTBOUNDDOORBELL_1 0x00000002
678#define OUTBOUNDDOORBELL_2 0x00000004
679#define OUTBOUNDDOORBELL_3 0x00000008
680#define OUTBOUNDDOORBELL_4 0x00000010
681
682#define InboundDoorbellReg MUnit.IDR
683#define OutboundDoorbellReg MUnit.ODR
684
685struct rx_registers {
686 struct rx_mu_registers MUnit;
687 __le32 reserved1[2];
688 struct rx_inbound IndexRegs;
689};
690
691#define rx_readb(AEP, CSR) readb(&((AEP)->regs.rx->CSR))
692#define rx_readl(AEP, CSR) readl(&((AEP)->regs.rx->CSR))
693#define rx_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rx->CSR))
694#define rx_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rx->CSR))
695
696
697
698
699
700#define rkt_mu_registers rx_mu_registers
701#define rkt_inbound rx_inbound
702
703struct rkt_registers {
704 struct rkt_mu_registers MUnit;
705 __le32 reserved1[1006];
706 struct rkt_inbound IndexRegs;
707};
708
709#define rkt_readb(AEP, CSR) readb(&((AEP)->regs.rkt->CSR))
710#define rkt_readl(AEP, CSR) readl(&((AEP)->regs.rkt->CSR))
711#define rkt_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rkt->CSR))
712#define rkt_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rkt->CSR))
713
714typedef void (*fib_callback)(void *ctxt, struct fib *fibctx);
715
716struct aac_fib_context {
717 s16 type;
718 s16 size;
719 u32 unique;
720 ulong jiffies;
721 struct list_head next;
722 struct semaphore wait_sem;
723 int wait;
724 unsigned long count;
725 struct list_head fib_list;
726};
727
728struct sense_data {
729 u8 error_code;
730 u8 valid:1;
731
732
733
734 u8 segment_number;
735 u8 sense_key:4;
736 u8 reserved:1;
737 u8 ILI:1;
738 u8 EOM:1;
739 u8 filemark:1;
740
741 u8 information[4];
742
743
744
745 u8 add_sense_len;
746 u8 cmnd_info[4];
747 u8 ASC;
748 u8 ASCQ;
749 u8 FRUC;
750 u8 bit_ptr:3;
751
752
753 u8 BPV:1;
754
755
756 u8 reserved2:2;
757 u8 CD:1;
758
759
760 u8 SKSV:1;
761 u8 field_ptr[2];
762};
763
764struct fsa_dev_info {
765 u64 last;
766 u64 size;
767 u32 type;
768 u32 config_waiting_on;
769 unsigned long config_waiting_stamp;
770 u16 queue_depth;
771 u8 config_needed;
772 u8 valid;
773 u8 ro;
774 u8 locked;
775 u8 deleted;
776 char devname[8];
777 struct sense_data sense_data;
778};
779
780struct fib {
781 void *next;
782 s16 type;
783 s16 size;
784
785
786
787 struct aac_dev *dev;
788
789
790
791
792 struct semaphore event_wait;
793 spinlock_t event_lock;
794
795 u32 done;
796 fib_callback callback;
797 void *callback_data;
798 u32 flags;
799
800
801
802
803 struct list_head fiblink;
804 void *data;
805 struct hw_fib *hw_fib_va;
806 dma_addr_t hw_fib_pa;
807};
808
809
810
811
812
813
814
815struct aac_adapter_info
816{
817 __le32 platform;
818 __le32 cpu;
819 __le32 subcpu;
820 __le32 clock;
821 __le32 execmem;
822 __le32 buffermem;
823 __le32 totalmem;
824 __le32 kernelrev;
825 __le32 kernelbuild;
826 __le32 monitorrev;
827 __le32 monitorbuild;
828 __le32 hwrev;
829 __le32 hwbuild;
830 __le32 biosrev;
831 __le32 biosbuild;
832 __le32 cluster;
833 __le32 clusterchannelmask;
834 __le32 serial[2];
835 __le32 battery;
836 __le32 options;
837 __le32 OEM;
838};
839
840struct aac_supplement_adapter_info
841{
842 u8 AdapterTypeText[17+1];
843 u8 Pad[2];
844 __le32 FlashMemoryByteSize;
845 __le32 FlashImageId;
846 __le32 MaxNumberPorts;
847 __le32 Version;
848 __le32 FeatureBits;
849 u8 SlotNumber;
850 u8 ReservedPad0[3];
851 u8 BuildDate[12];
852 __le32 CurrentNumberPorts;
853 struct {
854 u8 AssemblyPn[8];
855 u8 FruPn[8];
856 u8 BatteryFruPn[8];
857 u8 EcVersionString[8];
858 u8 Tsid[12];
859 } VpdInfo;
860 __le32 FlashFirmwareRevision;
861 __le32 FlashFirmwareBuild;
862 __le32 RaidTypeMorphOptions;
863 __le32 FlashFirmwareBootRevision;
864 __le32 FlashFirmwareBootBuild;
865 u8 MfgPcbaSerialNo[12];
866 u8 MfgWWNName[8];
867 __le32 SupportedOptions2;
868 __le32 StructExpansion;
869
870 __le32 FeatureBits3;
871 __le32 SupportedPerformanceModes;
872 __le32 ReservedForFutureGrowth[80];
873};
874#define AAC_FEATURE_FALCON cpu_to_le32(0x00000010)
875#define AAC_FEATURE_JBOD cpu_to_le32(0x08000000)
876
877#define AAC_OPTION_MU_RESET cpu_to_le32(0x00000001)
878#define AAC_OPTION_IGNORE_RESET cpu_to_le32(0x00000002)
879#define AAC_OPTION_POWER_MANAGEMENT cpu_to_le32(0x00000004)
880#define AAC_SIS_VERSION_V3 3
881#define AAC_SIS_SLOT_UNKNOWN 0xFF
882
883#define GetBusInfo 0x00000009
884struct aac_bus_info {
885 __le32 Command;
886 __le32 ObjType;
887 __le32 MethodId;
888 __le32 ObjectId;
889 __le32 CtlCmd;
890};
891
892struct aac_bus_info_response {
893 __le32 Status;
894 __le32 ObjType;
895 __le32 MethodId;
896 __le32 ObjectId;
897 __le32 CtlCmd;
898 __le32 ProbeComplete;
899 __le32 BusCount;
900 __le32 TargetsPerBus;
901 u8 InitiatorBusId[10];
902 u8 BusValid[10];
903};
904
905
906
907
908#define AAC_BAT_REQ_PRESENT (1)
909#define AAC_BAT_REQ_NOTPRESENT (2)
910#define AAC_BAT_OPT_PRESENT (3)
911#define AAC_BAT_OPT_NOTPRESENT (4)
912#define AAC_BAT_NOT_SUPPORTED (5)
913
914
915
916#define AAC_CPU_SIMULATOR (1)
917#define AAC_CPU_I960 (2)
918#define AAC_CPU_STRONGARM (3)
919
920
921
922
923#define AAC_OPT_SNAPSHOT cpu_to_le32(1)
924#define AAC_OPT_CLUSTERS cpu_to_le32(1<<1)
925#define AAC_OPT_WRITE_CACHE cpu_to_le32(1<<2)
926#define AAC_OPT_64BIT_DATA cpu_to_le32(1<<3)
927#define AAC_OPT_HOST_TIME_FIB cpu_to_le32(1<<4)
928#define AAC_OPT_RAID50 cpu_to_le32(1<<5)
929#define AAC_OPT_4GB_WINDOW cpu_to_le32(1<<6)
930#define AAC_OPT_SCSI_UPGRADEABLE cpu_to_le32(1<<7)
931#define AAC_OPT_SOFT_ERR_REPORT cpu_to_le32(1<<8)
932#define AAC_OPT_SUPPORTED_RECONDITION cpu_to_le32(1<<9)
933#define AAC_OPT_SGMAP_HOST64 cpu_to_le32(1<<10)
934#define AAC_OPT_ALARM cpu_to_le32(1<<11)
935#define AAC_OPT_NONDASD cpu_to_le32(1<<12)
936#define AAC_OPT_SCSI_MANAGED cpu_to_le32(1<<13)
937#define AAC_OPT_RAID_SCSI_MODE cpu_to_le32(1<<14)
938#define AAC_OPT_SUPPLEMENT_ADAPTER_INFO cpu_to_le32(1<<16)
939#define AAC_OPT_NEW_COMM cpu_to_le32(1<<17)
940#define AAC_OPT_NEW_COMM_64 cpu_to_le32(1<<18)
941
942struct aac_dev
943{
944 struct list_head entry;
945 const char *name;
946 int id;
947
948
949
950
951 unsigned max_fib_size;
952 unsigned sg_tablesize;
953
954
955
956
957 dma_addr_t hw_fib_pa;
958 struct hw_fib *hw_fib_va;
959 struct hw_fib *aif_base_va;
960
961
962
963 struct fib *fibs;
964
965 struct fib *free_fib;
966 spinlock_t fib_lock;
967
968 struct aac_queue_block *queues;
969
970
971
972
973
974
975
976 struct list_head fib_list;
977
978 struct adapter_ops a_ops;
979 unsigned long fsrev;
980
981 unsigned base_size;
982 struct aac_init *init;
983 dma_addr_t init_pa;
984
985 struct pci_dev *pdev;
986 void * printfbuf;
987 void * comm_addr;
988 dma_addr_t comm_phys;
989 size_t comm_size;
990
991 struct Scsi_Host *scsi_host_ptr;
992 int maximum_num_containers;
993 int maximum_num_physicals;
994 int maximum_num_channels;
995 struct fsa_dev_info *fsa_dev;
996 struct task_struct *thread;
997 int cardtype;
998
999
1000
1001
1002#ifndef AAC_MIN_FOOTPRINT_SIZE
1003# define AAC_MIN_FOOTPRINT_SIZE 8192
1004#endif
1005 union
1006 {
1007 struct sa_registers __iomem *sa;
1008 struct rx_registers __iomem *rx;
1009 struct rkt_registers __iomem *rkt;
1010 } regs;
1011 volatile void __iomem *base;
1012 volatile struct rx_inbound __iomem *IndexRegs;
1013 u32 OIMR;
1014
1015
1016
1017 u32 aif_thread;
1018 struct aac_adapter_info adapter_info;
1019 struct aac_supplement_adapter_info supplement_adapter_info;
1020
1021
1022
1023 u8 nondasd_support;
1024 u8 jbod;
1025 u8 cache_protected;
1026 u8 dac_support;
1027 u8 needs_dac;
1028 u8 raid_scsi_mode;
1029 u8 comm_interface;
1030# define AAC_COMM_PRODUCER 0
1031# define AAC_COMM_MESSAGE 1
1032
1033# define raw_io_interface \
1034 init->InitStructRevision==cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_4)
1035 u8 raw_io_64;
1036 u8 printf_enabled;
1037 u8 in_reset;
1038 u8 msi;
1039};
1040
1041#define aac_adapter_interrupt(dev) \
1042 (dev)->a_ops.adapter_interrupt(dev)
1043
1044#define aac_adapter_notify(dev, event) \
1045 (dev)->a_ops.adapter_notify(dev, event)
1046
1047#define aac_adapter_disable_int(dev) \
1048 (dev)->a_ops.adapter_disable_int(dev)
1049
1050#define aac_adapter_enable_int(dev) \
1051 (dev)->a_ops.adapter_enable_int(dev)
1052
1053#define aac_adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4) \
1054 (dev)->a_ops.adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4)
1055
1056#define aac_adapter_check_health(dev) \
1057 (dev)->a_ops.adapter_check_health(dev)
1058
1059#define aac_adapter_restart(dev,bled) \
1060 (dev)->a_ops.adapter_restart(dev,bled)
1061
1062#define aac_adapter_ioremap(dev, size) \
1063 (dev)->a_ops.adapter_ioremap(dev, size)
1064
1065#define aac_adapter_deliver(fib) \
1066 ((fib)->dev)->a_ops.adapter_deliver(fib)
1067
1068#define aac_adapter_bounds(dev,cmd,lba) \
1069 dev->a_ops.adapter_bounds(dev,cmd,lba)
1070
1071#define aac_adapter_read(fib,cmd,lba,count) \
1072 ((fib)->dev)->a_ops.adapter_read(fib,cmd,lba,count)
1073
1074#define aac_adapter_write(fib,cmd,lba,count,fua) \
1075 ((fib)->dev)->a_ops.adapter_write(fib,cmd,lba,count,fua)
1076
1077#define aac_adapter_scsi(fib,cmd) \
1078 ((fib)->dev)->a_ops.adapter_scsi(fib,cmd)
1079
1080#define aac_adapter_comm(dev,comm) \
1081 (dev)->a_ops.adapter_comm(dev, comm)
1082
1083#define FIB_CONTEXT_FLAG_TIMED_OUT (0x00000001)
1084#define FIB_CONTEXT_FLAG (0x00000002)
1085
1086
1087
1088
1089
1090#define Null 0
1091#define GetAttributes 1
1092#define SetAttributes 2
1093#define Lookup 3
1094#define ReadLink 4
1095#define Read 5
1096#define Write 6
1097#define Create 7
1098#define MakeDirectory 8
1099#define SymbolicLink 9
1100#define MakeNode 10
1101#define Removex 11
1102#define RemoveDirectoryx 12
1103#define Rename 13
1104#define Link 14
1105#define ReadDirectory 15
1106#define ReadDirectoryPlus 16
1107#define FileSystemStatus 17
1108#define FileSystemInfo 18
1109#define PathConfigure 19
1110#define Commit 20
1111#define Mount 21
1112#define UnMount 22
1113#define Newfs 23
1114#define FsCheck 24
1115#define FsSync 25
1116#define SimReadWrite 26
1117#define SetFileSystemStatus 27
1118#define BlockRead 28
1119#define BlockWrite 29
1120#define NvramIoctl 30
1121#define FsSyncWait 31
1122#define ClearArchiveBit 32
1123#define SetAcl 33
1124#define GetAcl 34
1125#define AssignAcl 35
1126#define FaultInsertion 36
1127#define CrazyCache 37
1128
1129#define MAX_FSACOMMAND_NUM 38
1130
1131
1132
1133
1134
1135
1136
1137#define ST_OK 0
1138#define ST_PERM 1
1139#define ST_NOENT 2
1140#define ST_IO 5
1141#define ST_NXIO 6
1142#define ST_E2BIG 7
1143#define ST_ACCES 13
1144#define ST_EXIST 17
1145#define ST_XDEV 18
1146#define ST_NODEV 19
1147#define ST_NOTDIR 20
1148#define ST_ISDIR 21
1149#define ST_INVAL 22
1150#define ST_FBIG 27
1151#define ST_NOSPC 28
1152#define ST_ROFS 30
1153#define ST_MLINK 31
1154#define ST_WOULDBLOCK 35
1155#define ST_NAMETOOLONG 63
1156#define ST_NOTEMPTY 66
1157#define ST_DQUOT 69
1158#define ST_STALE 70
1159#define ST_REMOTE 71
1160#define ST_NOT_READY 72
1161#define ST_BADHANDLE 10001
1162#define ST_NOT_SYNC 10002
1163#define ST_BAD_COOKIE 10003
1164#define ST_NOTSUPP 10004
1165#define ST_TOOSMALL 10005
1166#define ST_SERVERFAULT 10006
1167#define ST_BADTYPE 10007
1168#define ST_JUKEBOX 10008
1169#define ST_NOTMOUNTED 10009
1170#define ST_MAINTMODE 10010
1171#define ST_STALEACL 10011
1172
1173
1174
1175
1176
1177#define CACHE_CSTABLE 1
1178#define CACHE_UNSTABLE 2
1179
1180
1181
1182
1183
1184
1185#define CMFILE_SYNCH_NVRAM 1
1186#define CMDATA_SYNCH_NVRAM 2
1187#define CMFILE_SYNCH 3
1188#define CMDATA_SYNCH 4
1189#define CMUNSTABLE 5
1190
1191struct aac_read
1192{
1193 __le32 command;
1194 __le32 cid;
1195 __le32 block;
1196 __le32 count;
1197 struct sgmap sg;
1198};
1199
1200struct aac_read64
1201{
1202 __le32 command;
1203 __le16 cid;
1204 __le16 sector_count;
1205 __le32 block;
1206 __le16 pad;
1207 __le16 flags;
1208 struct sgmap64 sg;
1209};
1210
1211struct aac_read_reply
1212{
1213 __le32 status;
1214 __le32 count;
1215};
1216
1217struct aac_write
1218{
1219 __le32 command;
1220 __le32 cid;
1221 __le32 block;
1222 __le32 count;
1223 __le32 stable;
1224 struct sgmap sg;
1225};
1226
1227struct aac_write64
1228{
1229 __le32 command;
1230 __le16 cid;
1231 __le16 sector_count;
1232 __le32 block;
1233 __le16 pad;
1234 __le16 flags;
1235#define IO_TYPE_WRITE 0x00000000
1236#define IO_TYPE_READ 0x00000001
1237#define IO_SUREWRITE 0x00000008
1238 struct sgmap64 sg;
1239};
1240struct aac_write_reply
1241{
1242 __le32 status;
1243 __le32 count;
1244 __le32 committed;
1245};
1246
1247struct aac_raw_io
1248{
1249 __le32 block[2];
1250 __le32 count;
1251 __le16 cid;
1252 __le16 flags;
1253 __le16 bpTotal;
1254 __le16 bpComplete;
1255 struct sgmapraw sg;
1256};
1257
1258#define CT_FLUSH_CACHE 129
1259struct aac_synchronize {
1260 __le32 command;
1261 __le32 type;
1262 __le32 cid;
1263 __le32 parm1;
1264 __le32 parm2;
1265 __le32 parm3;
1266 __le32 parm4;
1267 __le32 count;
1268};
1269
1270struct aac_synchronize_reply {
1271 __le32 dummy0;
1272 __le32 dummy1;
1273 __le32 status;
1274 __le32 parm1;
1275 __le32 parm2;
1276 __le32 parm3;
1277 __le32 parm4;
1278 __le32 parm5;
1279 u8 data[16];
1280};
1281
1282#define CT_POWER_MANAGEMENT 245
1283#define CT_PM_START_UNIT 2
1284#define CT_PM_STOP_UNIT 3
1285#define CT_PM_UNIT_IMMEDIATE 1
1286struct aac_power_management {
1287 __le32 command;
1288 __le32 type;
1289 __le32 sub;
1290 __le32 cid;
1291 __le32 parm;
1292};
1293
1294#define CT_PAUSE_IO 65
1295#define CT_RELEASE_IO 66
1296struct aac_pause {
1297 __le32 command;
1298 __le32 type;
1299 __le32 timeout;
1300 __le32 min;
1301 __le32 noRescan;
1302 __le32 parm3;
1303 __le32 parm4;
1304 __le32 count;
1305};
1306
1307struct aac_srb
1308{
1309 __le32 function;
1310 __le32 channel;
1311 __le32 id;
1312 __le32 lun;
1313 __le32 timeout;
1314 __le32 flags;
1315 __le32 count;
1316 __le32 retry_limit;
1317 __le32 cdb_size;
1318 u8 cdb[16];
1319 struct sgmap sg;
1320};
1321
1322
1323
1324
1325
1326struct user_aac_srb
1327{
1328 u32 function;
1329 u32 channel;
1330 u32 id;
1331 u32 lun;
1332 u32 timeout;
1333 u32 flags;
1334 u32 count;
1335 u32 retry_limit;
1336 u32 cdb_size;
1337 u8 cdb[16];
1338 struct user_sgmap sg;
1339};
1340
1341#define AAC_SENSE_BUFFERSIZE 30
1342
1343struct aac_srb_reply
1344{
1345 __le32 status;
1346 __le32 srb_status;
1347 __le32 scsi_status;
1348 __le32 data_xfer_length;
1349 __le32 sense_data_size;
1350 u8 sense_data[AAC_SENSE_BUFFERSIZE];
1351};
1352
1353
1354
1355#define SRB_NoDataXfer 0x0000
1356#define SRB_DisableDisconnect 0x0004
1357#define SRB_DisableSynchTransfer 0x0008
1358#define SRB_BypassFrozenQueue 0x0010
1359#define SRB_DisableAutosense 0x0020
1360#define SRB_DataIn 0x0040
1361#define SRB_DataOut 0x0080
1362
1363
1364
1365
1366#define SRBF_ExecuteScsi 0x0000
1367#define SRBF_ClaimDevice 0x0001
1368#define SRBF_IO_Control 0x0002
1369#define SRBF_ReceiveEvent 0x0003
1370#define SRBF_ReleaseQueue 0x0004
1371#define SRBF_AttachDevice 0x0005
1372#define SRBF_ReleaseDevice 0x0006
1373#define SRBF_Shutdown 0x0007
1374#define SRBF_Flush 0x0008
1375#define SRBF_AbortCommand 0x0010
1376#define SRBF_ReleaseRecovery 0x0011
1377#define SRBF_ResetBus 0x0012
1378#define SRBF_ResetDevice 0x0013
1379#define SRBF_TerminateIO 0x0014
1380#define SRBF_FlushQueue 0x0015
1381#define SRBF_RemoveDevice 0x0016
1382#define SRBF_DomainValidation 0x0017
1383
1384
1385
1386
1387#define SRB_STATUS_PENDING 0x00
1388#define SRB_STATUS_SUCCESS 0x01
1389#define SRB_STATUS_ABORTED 0x02
1390#define SRB_STATUS_ABORT_FAILED 0x03
1391#define SRB_STATUS_ERROR 0x04
1392#define SRB_STATUS_BUSY 0x05
1393#define SRB_STATUS_INVALID_REQUEST 0x06
1394#define SRB_STATUS_INVALID_PATH_ID 0x07
1395#define SRB_STATUS_NO_DEVICE 0x08
1396#define SRB_STATUS_TIMEOUT 0x09
1397#define SRB_STATUS_SELECTION_TIMEOUT 0x0A
1398#define SRB_STATUS_COMMAND_TIMEOUT 0x0B
1399#define SRB_STATUS_MESSAGE_REJECTED 0x0D
1400#define SRB_STATUS_BUS_RESET 0x0E
1401#define SRB_STATUS_PARITY_ERROR 0x0F
1402#define SRB_STATUS_REQUEST_SENSE_FAILED 0x10
1403#define SRB_STATUS_NO_HBA 0x11
1404#define SRB_STATUS_DATA_OVERRUN 0x12
1405#define SRB_STATUS_UNEXPECTED_BUS_FREE 0x13
1406#define SRB_STATUS_PHASE_SEQUENCE_FAILURE 0x14
1407#define SRB_STATUS_BAD_SRB_BLOCK_LENGTH 0x15
1408#define SRB_STATUS_REQUEST_FLUSHED 0x16
1409#define SRB_STATUS_DELAYED_RETRY 0x17
1410#define SRB_STATUS_INVALID_LUN 0x20
1411#define SRB_STATUS_INVALID_TARGET_ID 0x21
1412#define SRB_STATUS_BAD_FUNCTION 0x22
1413#define SRB_STATUS_ERROR_RECOVERY 0x23
1414#define SRB_STATUS_NOT_STARTED 0x24
1415#define SRB_STATUS_NOT_IN_USE 0x30
1416#define SRB_STATUS_FORCE_ABORT 0x31
1417#define SRB_STATUS_DOMAIN_VALIDATION_FAIL 0x32
1418
1419
1420
1421
1422
1423#define VM_Null 0
1424#define VM_NameServe 1
1425#define VM_ContainerConfig 2
1426#define VM_Ioctl 3
1427#define VM_FilesystemIoctl 4
1428#define VM_CloseAll 5
1429#define VM_CtBlockRead 6
1430#define VM_CtBlockWrite 7
1431#define VM_SliceBlockRead 8
1432#define VM_SliceBlockWrite 9
1433#define VM_DriveBlockRead 10
1434#define VM_DriveBlockWrite 11
1435#define VM_EnclosureMgt 12
1436#define VM_Unused 13
1437#define VM_CtBlockVerify 14
1438#define VM_CtPerf 15
1439#define VM_CtBlockRead64 16
1440#define VM_CtBlockWrite64 17
1441#define VM_CtBlockVerify64 18
1442#define VM_CtHostRead64 19
1443#define VM_CtHostWrite64 20
1444#define VM_DrvErrTblLog 21
1445#define VM_NameServe64 22
1446
1447#define MAX_VMCOMMAND_NUM 23
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457struct aac_fsinfo {
1458 __le32 fsTotalSize;
1459 __le32 fsBlockSize;
1460 __le32 fsFragSize;
1461 __le32 fsMaxExtendSize;
1462 __le32 fsSpaceUnits;
1463 __le32 fsMaxNumFiles;
1464 __le32 fsNumFreeFiles;
1465 __le32 fsInodeDensity;
1466};
1467
1468union aac_contentinfo {
1469 struct aac_fsinfo filesys;
1470};
1471
1472
1473
1474
1475
1476#define CT_GET_CONFIG_STATUS 147
1477struct aac_get_config_status {
1478 __le32 command;
1479 __le32 type;
1480 __le32 parm1;
1481 __le32 parm2;
1482 __le32 parm3;
1483 __le32 parm4;
1484 __le32 parm5;
1485 __le32 count;
1486};
1487
1488#define CFACT_CONTINUE 0
1489#define CFACT_PAUSE 1
1490#define CFACT_ABORT 2
1491struct aac_get_config_status_resp {
1492 __le32 response;
1493 __le32 dummy0;
1494 __le32 status;
1495 __le32 parm1;
1496 __le32 parm2;
1497 __le32 parm3;
1498 __le32 parm4;
1499 __le32 parm5;
1500 struct {
1501 __le32 action;
1502 __le16 flags;
1503 __le16 count;
1504 } data;
1505};
1506
1507
1508
1509
1510
1511#define CT_COMMIT_CONFIG 152
1512
1513struct aac_commit_config {
1514 __le32 command;
1515 __le32 type;
1516};
1517
1518
1519
1520
1521
1522#define CT_GET_CONTAINER_COUNT 4
1523struct aac_get_container_count {
1524 __le32 command;
1525 __le32 type;
1526};
1527
1528struct aac_get_container_count_resp {
1529 __le32 response;
1530 __le32 dummy0;
1531 __le32 MaxContainers;
1532 __le32 ContainerSwitchEntries;
1533 __le32 MaxPartitions;
1534};
1535
1536
1537
1538
1539
1540
1541
1542struct aac_mntent {
1543 __le32 oid;
1544 u8 name[16];
1545 struct creation_info create_info;
1546 __le32 capacity;
1547 __le32 vol;
1548 __le32 obj;
1549 __le32 state;
1550
1551 union aac_contentinfo fileinfo;
1552
1553 __le32 altoid;
1554
1555 __le32 capacityhigh;
1556};
1557
1558#define FSCS_NOTCLEAN 0x0001
1559#define FSCS_READONLY 0x0002
1560#define FSCS_HIDDEN 0x0004
1561#define FSCS_NOT_READY 0x0008
1562
1563struct aac_query_mount {
1564 __le32 command;
1565 __le32 type;
1566 __le32 count;
1567};
1568
1569struct aac_mount {
1570 __le32 status;
1571 __le32 type;
1572 __le32 count;
1573 struct aac_mntent mnt[1];
1574};
1575
1576#define CT_READ_NAME 130
1577struct aac_get_name {
1578 __le32 command;
1579 __le32 type;
1580 __le32 cid;
1581 __le32 parm1;
1582 __le32 parm2;
1583 __le32 parm3;
1584 __le32 parm4;
1585 __le32 count;
1586};
1587
1588struct aac_get_name_resp {
1589 __le32 dummy0;
1590 __le32 dummy1;
1591 __le32 status;
1592 __le32 parm1;
1593 __le32 parm2;
1594 __le32 parm3;
1595 __le32 parm4;
1596 __le32 parm5;
1597 u8 data[16];
1598};
1599
1600#define CT_CID_TO_32BITS_UID 165
1601struct aac_get_serial {
1602 __le32 command;
1603 __le32 type;
1604 __le32 cid;
1605};
1606
1607struct aac_get_serial_resp {
1608 __le32 dummy0;
1609 __le32 dummy1;
1610 __le32 status;
1611 __le32 uid;
1612};
1613
1614
1615
1616
1617
1618struct aac_close {
1619 __le32 command;
1620 __le32 cid;
1621};
1622
1623struct aac_query_disk
1624{
1625 s32 cnum;
1626 s32 bus;
1627 s32 id;
1628 s32 lun;
1629 u32 valid;
1630 u32 locked;
1631 u32 deleted;
1632 s32 instance;
1633 s8 name[10];
1634 u32 unmapped;
1635};
1636
1637struct aac_delete_disk {
1638 u32 disknum;
1639 u32 cnum;
1640};
1641
1642struct fib_ioctl
1643{
1644 u32 fibctx;
1645 s32 wait;
1646 char __user *fib;
1647};
1648
1649struct revision
1650{
1651 u32 compat;
1652 __le32 version;
1653 __le32 build;
1654};
1655
1656
1657
1658
1659
1660
1661#define CTL_CODE(function, method) ( \
1662 (4<< 16) | ((function) << 2) | (method) \
1663)
1664
1665
1666
1667
1668
1669
1670#define METHOD_BUFFERED 0
1671#define METHOD_NEITHER 3
1672
1673
1674
1675
1676
1677#define FSACTL_SENDFIB CTL_CODE(2050, METHOD_BUFFERED)
1678#define FSACTL_SEND_RAW_SRB CTL_CODE(2067, METHOD_BUFFERED)
1679#define FSACTL_DELETE_DISK 0x163
1680#define FSACTL_QUERY_DISK 0x173
1681#define FSACTL_OPEN_GET_ADAPTER_FIB CTL_CODE(2100, METHOD_BUFFERED)
1682#define FSACTL_GET_NEXT_ADAPTER_FIB CTL_CODE(2101, METHOD_BUFFERED)
1683#define FSACTL_CLOSE_GET_ADAPTER_FIB CTL_CODE(2102, METHOD_BUFFERED)
1684#define FSACTL_MINIPORT_REV_CHECK CTL_CODE(2107, METHOD_BUFFERED)
1685#define FSACTL_GET_PCI_INFO CTL_CODE(2119, METHOD_BUFFERED)
1686#define FSACTL_FORCE_DELETE_DISK CTL_CODE(2120, METHOD_NEITHER)
1687#define FSACTL_GET_CONTAINERS 2131
1688#define FSACTL_SEND_LARGE_FIB CTL_CODE(2138, METHOD_BUFFERED)
1689
1690
1691struct aac_common
1692{
1693
1694
1695
1696
1697 u32 irq_mod;
1698 u32 peak_fibs;
1699 u32 zero_fibs;
1700 u32 fib_timeouts;
1701
1702
1703
1704#ifdef DBG
1705 u32 FibsSent;
1706 u32 FibRecved;
1707 u32 NoResponseSent;
1708 u32 NoResponseRecved;
1709 u32 AsyncSent;
1710 u32 AsyncRecved;
1711 u32 NormalSent;
1712 u32 NormalRecved;
1713#endif
1714};
1715
1716extern struct aac_common aac_config;
1717
1718
1719
1720
1721
1722
1723
1724#ifdef DBG
1725#define FIB_COUNTER_INCREMENT(counter) (counter)++
1726#else
1727#define FIB_COUNTER_INCREMENT(counter)
1728#endif
1729
1730
1731
1732
1733
1734
1735#define BREAKPOINT_REQUEST 0x00000004
1736#define INIT_STRUCT_BASE_ADDRESS 0x00000005
1737#define READ_PERMANENT_PARAMETERS 0x0000000a
1738#define WRITE_PERMANENT_PARAMETERS 0x0000000b
1739#define HOST_CRASHING 0x0000000d
1740#define SEND_SYNCHRONOUS_FIB 0x0000000c
1741#define COMMAND_POST_RESULTS 0x00000014
1742#define GET_ADAPTER_PROPERTIES 0x00000019
1743#define GET_DRIVER_BUFFER_PROPERTIES 0x00000023
1744#define RCV_TEMP_READINGS 0x00000025
1745#define GET_COMM_PREFERRED_SETTINGS 0x00000026
1746#define IOP_RESET 0x00001000
1747#define IOP_RESET_ALWAYS 0x00001001
1748#define RE_INIT_ADAPTER 0x000000ee
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771#define SELF_TEST_FAILED 0x00000004
1772#define MONITOR_PANIC 0x00000020
1773#define KERNEL_UP_AND_RUNNING 0x00000080
1774#define KERNEL_PANIC 0x00000100
1775
1776
1777
1778
1779
1780#define DoorBellSyncCmdAvailable (1<<0)
1781#define DoorBellPrintfDone (1<<5)
1782#define DoorBellAdapterNormCmdReady (1<<1)
1783#define DoorBellAdapterNormRespReady (1<<2)
1784#define DoorBellAdapterNormCmdNotFull (1<<3)
1785#define DoorBellAdapterNormRespNotFull (1<<4)
1786#define DoorBellPrintfReady (1<<5)
1787
1788
1789
1790
1791
1792
1793#define AifCmdEventNotify 1
1794#define AifEnConfigChange 3
1795#define AifEnContainerChange 4
1796#define AifEnDeviceFailure 5
1797#define AifEnEnclosureManagement 13
1798#define EM_DRIVE_INSERTION 31
1799#define EM_DRIVE_REMOVAL 32
1800#define AifEnBatteryEvent 14
1801#define AifEnAddContainer 15
1802#define AifEnDeleteContainer 16
1803#define AifEnExpEvent 23
1804#define AifExeFirmwarePanic 3
1805#define AifHighPriority 3
1806#define AifEnAddJBOD 30
1807#define AifEnDeleteJBOD 31
1808
1809#define AifCmdJobProgress 2
1810#define AifJobCtrZero 101
1811#define AifJobStsSuccess 1
1812#define AifJobStsRunning 102
1813#define AifCmdAPIReport 3
1814#define AifCmdDriverNotify 4
1815#define AifDenMorphComplete 200
1816#define AifDenVolumeExtendComplete 201
1817#define AifReqJobList 100
1818#define AifReqJobsForCtr 101
1819#define AifReqJobsForScsi 102
1820#define AifReqJobReport 103
1821#define AifReqTerminateJob 104
1822#define AifReqSuspendJob 105
1823#define AifReqResumeJob 106
1824#define AifReqSendAPIReport 107
1825#define AifReqAPIJobStart 108
1826#define AifReqAPIJobUpdate 109
1827#define AifReqAPIJobFinish 110
1828
1829
1830
1831
1832
1833
1834
1835struct aac_aifcmd {
1836 __le32 command;
1837 __le32 seqnum;
1838 u8 data[1];
1839};
1840
1841
1842
1843
1844
1845
1846static inline unsigned int cap_to_cyls(sector_t capacity, unsigned divisor)
1847{
1848 sector_div(capacity, divisor);
1849 return capacity;
1850}
1851
1852
1853#define AAC_OWNER_MIDLEVEL 0x101
1854#define AAC_OWNER_LOWLEVEL 0x102
1855#define AAC_OWNER_ERROR_HANDLER 0x103
1856#define AAC_OWNER_FIRMWARE 0x106
1857
1858const char *aac_driverinfo(struct Scsi_Host *);
1859struct fib *aac_fib_alloc(struct aac_dev *dev);
1860int aac_fib_setup(struct aac_dev *dev);
1861void aac_fib_map_free(struct aac_dev *dev);
1862void aac_fib_free(struct fib * context);
1863void aac_fib_init(struct fib * context);
1864void aac_printf(struct aac_dev *dev, u32 val);
1865int aac_fib_send(u16 command, struct fib * context, unsigned long size, int priority, int wait, int reply, fib_callback callback, void *ctxt);
1866int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry);
1867void aac_consumer_free(struct aac_dev * dev, struct aac_queue * q, u32 qnum);
1868int aac_fib_complete(struct fib * context);
1869#define fib_data(fibctx) ((void *)(fibctx)->hw_fib_va->data)
1870struct aac_dev *aac_init_adapter(struct aac_dev *dev);
1871int aac_get_config_status(struct aac_dev *dev, int commit_flag);
1872int aac_get_containers(struct aac_dev *dev);
1873int aac_scsi_cmd(struct scsi_cmnd *cmd);
1874int aac_dev_ioctl(struct aac_dev *dev, int cmd, void __user *arg);
1875#ifndef shost_to_class
1876#define shost_to_class(shost) &shost->shost_dev
1877#endif
1878ssize_t aac_get_serial_number(struct device *dev, char *buf);
1879int aac_do_ioctl(struct aac_dev * dev, int cmd, void __user *arg);
1880int aac_rx_init(struct aac_dev *dev);
1881int aac_rkt_init(struct aac_dev *dev);
1882int aac_nark_init(struct aac_dev *dev);
1883int aac_sa_init(struct aac_dev *dev);
1884int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify);
1885unsigned int aac_response_normal(struct aac_queue * q);
1886unsigned int aac_command_normal(struct aac_queue * q);
1887unsigned int aac_intr_normal(struct aac_dev * dev, u32 Index);
1888int aac_reset_adapter(struct aac_dev * dev, int forced);
1889int aac_check_health(struct aac_dev * dev);
1890int aac_command_thread(void *data);
1891int aac_close_fib_context(struct aac_dev * dev, struct aac_fib_context *fibctx);
1892int aac_fib_adapter_complete(struct fib * fibptr, unsigned short size);
1893struct aac_driver_ident* aac_get_driver_ident(int devtype);
1894int aac_get_adapter_info(struct aac_dev* dev);
1895int aac_send_shutdown(struct aac_dev *dev);
1896int aac_probe_container(struct aac_dev *dev, int cid);
1897int _aac_rx_init(struct aac_dev *dev);
1898int aac_rx_select_comm(struct aac_dev *dev, int comm);
1899int aac_rx_deliver_producer(struct fib * fib);
1900char * get_container_type(unsigned type);
1901extern int numacb;
1902extern int acbsize;
1903extern char aac_driver_version[];
1904extern int startup_timeout;
1905extern int aif_timeout;
1906extern int expose_physicals;
1907extern int aac_reset_devices;
1908extern int aac_msi;
1909extern int aac_commit;
1910extern int update_interval;
1911extern int check_interval;
1912extern int aac_check_reset;
1913