linux/drivers/net/smsc911x.c
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   1/***************************************************************************
   2 *
   3 * Copyright (C) 2004-2008 SMSC
   4 * Copyright (C) 2005-2008 ARM
   5 *
   6 * This program is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU General Public License
   8 * as published by the Free Software Foundation; either version 2
   9 * of the License, or (at your option) any later version.
  10 *
  11 * This program is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 * GNU General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU General Public License
  17 * along with this program; if not, write to the Free Software
  18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  19 *
  20 ***************************************************************************
  21 * Rewritten, heavily based on smsc911x simple driver by SMSC.
  22 * Partly uses io macros from smc91x.c by Nicolas Pitre
  23 *
  24 * Supported devices:
  25 *   LAN9115, LAN9116, LAN9117, LAN9118
  26 *   LAN9215, LAN9216, LAN9217, LAN9218
  27 *   LAN9210, LAN9211
  28 *   LAN9220, LAN9221
  29 *
  30 */
  31
  32#include <linux/crc32.h>
  33#include <linux/delay.h>
  34#include <linux/errno.h>
  35#include <linux/etherdevice.h>
  36#include <linux/ethtool.h>
  37#include <linux/init.h>
  38#include <linux/ioport.h>
  39#include <linux/kernel.h>
  40#include <linux/module.h>
  41#include <linux/netdevice.h>
  42#include <linux/platform_device.h>
  43#include <linux/sched.h>
  44#include <linux/slab.h>
  45#include <linux/timer.h>
  46#include <linux/bug.h>
  47#include <linux/bitops.h>
  48#include <linux/irq.h>
  49#include <linux/io.h>
  50#include <linux/swab.h>
  51#include <linux/phy.h>
  52#include <linux/smsc911x.h>
  53#include <linux/device.h>
  54#include "smsc911x.h"
  55
  56#define SMSC_CHIPNAME           "smsc911x"
  57#define SMSC_MDIONAME           "smsc911x-mdio"
  58#define SMSC_DRV_VERSION        "2008-10-21"
  59
  60MODULE_LICENSE("GPL");
  61MODULE_VERSION(SMSC_DRV_VERSION);
  62
  63#if USE_DEBUG > 0
  64static int debug = 16;
  65#else
  66static int debug = 3;
  67#endif
  68
  69module_param(debug, int, 0);
  70MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  71
  72struct smsc911x_data {
  73        void __iomem *ioaddr;
  74
  75        unsigned int idrev;
  76
  77        /* used to decide which workarounds apply */
  78        unsigned int generation;
  79
  80        /* device configuration (copied from platform_data during probe) */
  81        struct smsc911x_platform_config config;
  82
  83        /* This needs to be acquired before calling any of below:
  84         * smsc911x_mac_read(), smsc911x_mac_write()
  85         */
  86        spinlock_t mac_lock;
  87
  88        /* spinlock to ensure 16-bit accesses are serialised.
  89         * unused with a 32-bit bus */
  90        spinlock_t dev_lock;
  91
  92        struct phy_device *phy_dev;
  93        struct mii_bus *mii_bus;
  94        int phy_irq[PHY_MAX_ADDR];
  95        unsigned int using_extphy;
  96        int last_duplex;
  97        int last_carrier;
  98
  99        u32 msg_enable;
 100        unsigned int gpio_setting;
 101        unsigned int gpio_orig_setting;
 102        struct net_device *dev;
 103        struct napi_struct napi;
 104
 105        unsigned int software_irq_signal;
 106
 107#ifdef USE_PHY_WORK_AROUND
 108#define MIN_PACKET_SIZE (64)
 109        char loopback_tx_pkt[MIN_PACKET_SIZE];
 110        char loopback_rx_pkt[MIN_PACKET_SIZE];
 111        unsigned int resetcount;
 112#endif
 113
 114        /* Members for Multicast filter workaround */
 115        unsigned int multicast_update_pending;
 116        unsigned int set_bits_mask;
 117        unsigned int clear_bits_mask;
 118        unsigned int hashhi;
 119        unsigned int hashlo;
 120};
 121
 122/* The 16-bit access functions are significantly slower, due to the locking
 123 * necessary.  If your bus hardware can be configured to do this for you
 124 * (in response to a single 32-bit operation from software), you should use
 125 * the 32-bit access functions instead. */
 126
 127static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
 128{
 129        if (pdata->config.flags & SMSC911X_USE_32BIT)
 130                return readl(pdata->ioaddr + reg);
 131
 132        if (pdata->config.flags & SMSC911X_USE_16BIT) {
 133                u32 data;
 134                unsigned long flags;
 135
 136                /* these two 16-bit reads must be performed consecutively, so
 137                 * must not be interrupted by our own ISR (which would start
 138                 * another read operation) */
 139                spin_lock_irqsave(&pdata->dev_lock, flags);
 140                data = ((readw(pdata->ioaddr + reg) & 0xFFFF) |
 141                        ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
 142                spin_unlock_irqrestore(&pdata->dev_lock, flags);
 143
 144                return data;
 145        }
 146
 147        BUG();
 148        return 0;
 149}
 150
 151static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
 152                                      u32 val)
 153{
 154        if (pdata->config.flags & SMSC911X_USE_32BIT) {
 155                writel(val, pdata->ioaddr + reg);
 156                return;
 157        }
 158
 159        if (pdata->config.flags & SMSC911X_USE_16BIT) {
 160                unsigned long flags;
 161
 162                /* these two 16-bit writes must be performed consecutively, so
 163                 * must not be interrupted by our own ISR (which would start
 164                 * another read operation) */
 165                spin_lock_irqsave(&pdata->dev_lock, flags);
 166                writew(val & 0xFFFF, pdata->ioaddr + reg);
 167                writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
 168                spin_unlock_irqrestore(&pdata->dev_lock, flags);
 169                return;
 170        }
 171
 172        BUG();
 173}
 174
 175/* Writes a packet to the TX_DATA_FIFO */
 176static inline void
 177smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
 178                      unsigned int wordcount)
 179{
 180        if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
 181                while (wordcount--)
 182                        smsc911x_reg_write(pdata, TX_DATA_FIFO, swab32(*buf++));
 183                return;
 184        }
 185
 186        if (pdata->config.flags & SMSC911X_USE_32BIT) {
 187                writesl(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
 188                return;
 189        }
 190
 191        if (pdata->config.flags & SMSC911X_USE_16BIT) {
 192                while (wordcount--)
 193                        smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
 194                return;
 195        }
 196
 197        BUG();
 198}
 199
 200/* Reads a packet out of the RX_DATA_FIFO */
 201static inline void
 202smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
 203                     unsigned int wordcount)
 204{
 205        if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
 206                while (wordcount--)
 207                        *buf++ = swab32(smsc911x_reg_read(pdata, RX_DATA_FIFO));
 208                return;
 209        }
 210
 211        if (pdata->config.flags & SMSC911X_USE_32BIT) {
 212                readsl(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
 213                return;
 214        }
 215
 216        if (pdata->config.flags & SMSC911X_USE_16BIT) {
 217                while (wordcount--)
 218                        *buf++ = smsc911x_reg_read(pdata, RX_DATA_FIFO);
 219                return;
 220        }
 221
 222        BUG();
 223}
 224
 225/* waits for MAC not busy, with timeout.  Only called by smsc911x_mac_read
 226 * and smsc911x_mac_write, so assumes mac_lock is held */
 227static int smsc911x_mac_complete(struct smsc911x_data *pdata)
 228{
 229        int i;
 230        u32 val;
 231
 232        SMSC_ASSERT_MAC_LOCK(pdata);
 233
 234        for (i = 0; i < 40; i++) {
 235                val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
 236                if (!(val & MAC_CSR_CMD_CSR_BUSY_))
 237                        return 0;
 238        }
 239        SMSC_WARNING(HW, "Timed out waiting for MAC not BUSY. "
 240                "MAC_CSR_CMD: 0x%08X", val);
 241        return -EIO;
 242}
 243
 244/* Fetches a MAC register value. Assumes mac_lock is acquired */
 245static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
 246{
 247        unsigned int temp;
 248
 249        SMSC_ASSERT_MAC_LOCK(pdata);
 250
 251        temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
 252        if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
 253                SMSC_WARNING(HW, "MAC busy at entry");
 254                return 0xFFFFFFFF;
 255        }
 256
 257        /* Send the MAC cmd */
 258        smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
 259                MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
 260
 261        /* Workaround for hardware read-after-write restriction */
 262        temp = smsc911x_reg_read(pdata, BYTE_TEST);
 263
 264        /* Wait for the read to complete */
 265        if (likely(smsc911x_mac_complete(pdata) == 0))
 266                return smsc911x_reg_read(pdata, MAC_CSR_DATA);
 267
 268        SMSC_WARNING(HW, "MAC busy after read");
 269        return 0xFFFFFFFF;
 270}
 271
 272/* Set a mac register, mac_lock must be acquired before calling */
 273static void smsc911x_mac_write(struct smsc911x_data *pdata,
 274                               unsigned int offset, u32 val)
 275{
 276        unsigned int temp;
 277
 278        SMSC_ASSERT_MAC_LOCK(pdata);
 279
 280        temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
 281        if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
 282                SMSC_WARNING(HW,
 283                        "smsc911x_mac_write failed, MAC busy at entry");
 284                return;
 285        }
 286
 287        /* Send data to write */
 288        smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
 289
 290        /* Write the actual data */
 291        smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
 292                MAC_CSR_CMD_CSR_BUSY_));
 293
 294        /* Workaround for hardware read-after-write restriction */
 295        temp = smsc911x_reg_read(pdata, BYTE_TEST);
 296
 297        /* Wait for the write to complete */
 298        if (likely(smsc911x_mac_complete(pdata) == 0))
 299                return;
 300
 301        SMSC_WARNING(HW,
 302                "smsc911x_mac_write failed, MAC busy after write");
 303}
 304
 305/* Get a phy register */
 306static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
 307{
 308        struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
 309        unsigned long flags;
 310        unsigned int addr;
 311        int i, reg;
 312
 313        spin_lock_irqsave(&pdata->mac_lock, flags);
 314
 315        /* Confirm MII not busy */
 316        if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
 317                SMSC_WARNING(HW,
 318                        "MII is busy in smsc911x_mii_read???");
 319                reg = -EIO;
 320                goto out;
 321        }
 322
 323        /* Set the address, index & direction (read from PHY) */
 324        addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
 325        smsc911x_mac_write(pdata, MII_ACC, addr);
 326
 327        /* Wait for read to complete w/ timeout */
 328        for (i = 0; i < 100; i++)
 329                if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
 330                        reg = smsc911x_mac_read(pdata, MII_DATA);
 331                        goto out;
 332                }
 333
 334        SMSC_WARNING(HW, "Timed out waiting for MII read to finish");
 335        reg = -EIO;
 336
 337out:
 338        spin_unlock_irqrestore(&pdata->mac_lock, flags);
 339        return reg;
 340}
 341
 342/* Set a phy register */
 343static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
 344                           u16 val)
 345{
 346        struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
 347        unsigned long flags;
 348        unsigned int addr;
 349        int i, reg;
 350
 351        spin_lock_irqsave(&pdata->mac_lock, flags);
 352
 353        /* Confirm MII not busy */
 354        if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
 355                SMSC_WARNING(HW,
 356                        "MII is busy in smsc911x_mii_write???");
 357                reg = -EIO;
 358                goto out;
 359        }
 360
 361        /* Put the data to write in the MAC */
 362        smsc911x_mac_write(pdata, MII_DATA, val);
 363
 364        /* Set the address, index & direction (write to PHY) */
 365        addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
 366                MII_ACC_MII_WRITE_;
 367        smsc911x_mac_write(pdata, MII_ACC, addr);
 368
 369        /* Wait for write to complete w/ timeout */
 370        for (i = 0; i < 100; i++)
 371                if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
 372                        reg = 0;
 373                        goto out;
 374                }
 375
 376        SMSC_WARNING(HW, "Timed out waiting for MII write to finish");
 377        reg = -EIO;
 378
 379out:
 380        spin_unlock_irqrestore(&pdata->mac_lock, flags);
 381        return reg;
 382}
 383
 384/* Switch to external phy. Assumes tx and rx are stopped. */
 385static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
 386{
 387        unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
 388
 389        /* Disable phy clocks to the MAC */
 390        hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
 391        hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
 392        smsc911x_reg_write(pdata, HW_CFG, hwcfg);
 393        udelay(10);     /* Enough time for clocks to stop */
 394
 395        /* Switch to external phy */
 396        hwcfg |= HW_CFG_EXT_PHY_EN_;
 397        smsc911x_reg_write(pdata, HW_CFG, hwcfg);
 398
 399        /* Enable phy clocks to the MAC */
 400        hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
 401        hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
 402        smsc911x_reg_write(pdata, HW_CFG, hwcfg);
 403        udelay(10);     /* Enough time for clocks to restart */
 404
 405        hwcfg |= HW_CFG_SMI_SEL_;
 406        smsc911x_reg_write(pdata, HW_CFG, hwcfg);
 407}
 408
 409/* Autodetects and enables external phy if present on supported chips.
 410 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
 411 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
 412static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
 413{
 414        unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
 415
 416        if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
 417                SMSC_TRACE(HW, "Forcing internal PHY");
 418                pdata->using_extphy = 0;
 419        } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
 420                SMSC_TRACE(HW, "Forcing external PHY");
 421                smsc911x_phy_enable_external(pdata);
 422                pdata->using_extphy = 1;
 423        } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
 424                SMSC_TRACE(HW, "HW_CFG EXT_PHY_DET set, using external PHY");
 425                smsc911x_phy_enable_external(pdata);
 426                pdata->using_extphy = 1;
 427        } else {
 428                SMSC_TRACE(HW, "HW_CFG EXT_PHY_DET clear, using internal PHY");
 429                pdata->using_extphy = 0;
 430        }
 431}
 432
 433/* Fetches a tx status out of the status fifo */
 434static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
 435{
 436        unsigned int result =
 437            smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
 438
 439        if (result != 0)
 440                result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
 441
 442        return result;
 443}
 444
 445/* Fetches the next rx status */
 446static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
 447{
 448        unsigned int result =
 449            smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
 450
 451        if (result != 0)
 452                result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
 453
 454        return result;
 455}
 456
 457#ifdef USE_PHY_WORK_AROUND
 458static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
 459{
 460        unsigned int tries;
 461        u32 wrsz;
 462        u32 rdsz;
 463        ulong bufp;
 464
 465        for (tries = 0; tries < 10; tries++) {
 466                unsigned int txcmd_a;
 467                unsigned int txcmd_b;
 468                unsigned int status;
 469                unsigned int pktlength;
 470                unsigned int i;
 471
 472                /* Zero-out rx packet memory */
 473                memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
 474
 475                /* Write tx packet to 118 */
 476                txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
 477                txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
 478                txcmd_a |= MIN_PACKET_SIZE;
 479
 480                txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
 481
 482                smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
 483                smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
 484
 485                bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
 486                wrsz = MIN_PACKET_SIZE + 3;
 487                wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
 488                wrsz >>= 2;
 489
 490                smsc911x_tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
 491
 492                /* Wait till transmit is done */
 493                i = 60;
 494                do {
 495                        udelay(5);
 496                        status = smsc911x_tx_get_txstatus(pdata);
 497                } while ((i--) && (!status));
 498
 499                if (!status) {
 500                        SMSC_WARNING(HW, "Failed to transmit "
 501                                "during loopback test");
 502                        continue;
 503                }
 504                if (status & TX_STS_ES_) {
 505                        SMSC_WARNING(HW, "Transmit encountered "
 506                                "errors during loopback test");
 507                        continue;
 508                }
 509
 510                /* Wait till receive is done */
 511                i = 60;
 512                do {
 513                        udelay(5);
 514                        status = smsc911x_rx_get_rxstatus(pdata);
 515                } while ((i--) && (!status));
 516
 517                if (!status) {
 518                        SMSC_WARNING(HW,
 519                                "Failed to receive during loopback test");
 520                        continue;
 521                }
 522                if (status & RX_STS_ES_) {
 523                        SMSC_WARNING(HW, "Receive encountered "
 524                                "errors during loopback test");
 525                        continue;
 526                }
 527
 528                pktlength = ((status & 0x3FFF0000UL) >> 16);
 529                bufp = (ulong)pdata->loopback_rx_pkt;
 530                rdsz = pktlength + 3;
 531                rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
 532                rdsz >>= 2;
 533
 534                smsc911x_rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
 535
 536                if (pktlength != (MIN_PACKET_SIZE + 4)) {
 537                        SMSC_WARNING(HW, "Unexpected packet size "
 538                                "during loop back test, size=%d, will retry",
 539                                pktlength);
 540                } else {
 541                        unsigned int j;
 542                        int mismatch = 0;
 543                        for (j = 0; j < MIN_PACKET_SIZE; j++) {
 544                                if (pdata->loopback_tx_pkt[j]
 545                                    != pdata->loopback_rx_pkt[j]) {
 546                                        mismatch = 1;
 547                                        break;
 548                                }
 549                        }
 550                        if (!mismatch) {
 551                                SMSC_TRACE(HW, "Successfully verified "
 552                                           "loopback packet");
 553                                return 0;
 554                        } else {
 555                                SMSC_WARNING(HW, "Data mismatch "
 556                                        "during loop back test, will retry");
 557                        }
 558                }
 559        }
 560
 561        return -EIO;
 562}
 563
 564static int smsc911x_phy_reset(struct smsc911x_data *pdata)
 565{
 566        struct phy_device *phy_dev = pdata->phy_dev;
 567        unsigned int temp;
 568        unsigned int i = 100000;
 569
 570        BUG_ON(!phy_dev);
 571        BUG_ON(!phy_dev->bus);
 572
 573        SMSC_TRACE(HW, "Performing PHY BCR Reset");
 574        smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
 575        do {
 576                msleep(1);
 577                temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
 578                        MII_BMCR);
 579        } while ((i--) && (temp & BMCR_RESET));
 580
 581        if (temp & BMCR_RESET) {
 582                SMSC_WARNING(HW, "PHY reset failed to complete.");
 583                return -EIO;
 584        }
 585        /* Extra delay required because the phy may not be completed with
 586        * its reset when BMCR_RESET is cleared. Specs say 256 uS is
 587        * enough delay but using 1ms here to be safe */
 588        msleep(1);
 589
 590        return 0;
 591}
 592
 593static int smsc911x_phy_loopbacktest(struct net_device *dev)
 594{
 595        struct smsc911x_data *pdata = netdev_priv(dev);
 596        struct phy_device *phy_dev = pdata->phy_dev;
 597        int result = -EIO;
 598        unsigned int i, val;
 599        unsigned long flags;
 600
 601        /* Initialise tx packet using broadcast destination address */
 602        memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN);
 603
 604        /* Use incrementing source address */
 605        for (i = 6; i < 12; i++)
 606                pdata->loopback_tx_pkt[i] = (char)i;
 607
 608        /* Set length type field */
 609        pdata->loopback_tx_pkt[12] = 0x00;
 610        pdata->loopback_tx_pkt[13] = 0x00;
 611
 612        for (i = 14; i < MIN_PACKET_SIZE; i++)
 613                pdata->loopback_tx_pkt[i] = (char)i;
 614
 615        val = smsc911x_reg_read(pdata, HW_CFG);
 616        val &= HW_CFG_TX_FIF_SZ_;
 617        val |= HW_CFG_SF_;
 618        smsc911x_reg_write(pdata, HW_CFG, val);
 619
 620        smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
 621        smsc911x_reg_write(pdata, RX_CFG,
 622                (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
 623
 624        for (i = 0; i < 10; i++) {
 625                /* Set PHY to 10/FD, no ANEG, and loopback mode */
 626                smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
 627                        BMCR_LOOPBACK | BMCR_FULLDPLX);
 628
 629                /* Enable MAC tx/rx, FD */
 630                spin_lock_irqsave(&pdata->mac_lock, flags);
 631                smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
 632                                   | MAC_CR_TXEN_ | MAC_CR_RXEN_);
 633                spin_unlock_irqrestore(&pdata->mac_lock, flags);
 634
 635                if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
 636                        result = 0;
 637                        break;
 638                }
 639                pdata->resetcount++;
 640
 641                /* Disable MAC rx */
 642                spin_lock_irqsave(&pdata->mac_lock, flags);
 643                smsc911x_mac_write(pdata, MAC_CR, 0);
 644                spin_unlock_irqrestore(&pdata->mac_lock, flags);
 645
 646                smsc911x_phy_reset(pdata);
 647        }
 648
 649        /* Disable MAC */
 650        spin_lock_irqsave(&pdata->mac_lock, flags);
 651        smsc911x_mac_write(pdata, MAC_CR, 0);
 652        spin_unlock_irqrestore(&pdata->mac_lock, flags);
 653
 654        /* Cancel PHY loopback mode */
 655        smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
 656
 657        smsc911x_reg_write(pdata, TX_CFG, 0);
 658        smsc911x_reg_write(pdata, RX_CFG, 0);
 659
 660        return result;
 661}
 662#endif                          /* USE_PHY_WORK_AROUND */
 663
 664static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
 665{
 666        struct phy_device *phy_dev = pdata->phy_dev;
 667        u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
 668        u32 flow;
 669        unsigned long flags;
 670
 671        if (phy_dev->duplex == DUPLEX_FULL) {
 672                u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
 673                u16 rmtadv = phy_read(phy_dev, MII_LPA);
 674                u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
 675
 676                if (cap & FLOW_CTRL_RX)
 677                        flow = 0xFFFF0002;
 678                else
 679                        flow = 0;
 680
 681                if (cap & FLOW_CTRL_TX)
 682                        afc |= 0xF;
 683                else
 684                        afc &= ~0xF;
 685
 686                SMSC_TRACE(HW, "rx pause %s, tx pause %s",
 687                        (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
 688                        (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
 689        } else {
 690                SMSC_TRACE(HW, "half duplex");
 691                flow = 0;
 692                afc |= 0xF;
 693        }
 694
 695        spin_lock_irqsave(&pdata->mac_lock, flags);
 696        smsc911x_mac_write(pdata, FLOW, flow);
 697        spin_unlock_irqrestore(&pdata->mac_lock, flags);
 698
 699        smsc911x_reg_write(pdata, AFC_CFG, afc);
 700}
 701
 702/* Update link mode if anything has changed.  Called periodically when the
 703 * PHY is in polling mode, even if nothing has changed. */
 704static void smsc911x_phy_adjust_link(struct net_device *dev)
 705{
 706        struct smsc911x_data *pdata = netdev_priv(dev);
 707        struct phy_device *phy_dev = pdata->phy_dev;
 708        unsigned long flags;
 709        int carrier;
 710
 711        if (phy_dev->duplex != pdata->last_duplex) {
 712                unsigned int mac_cr;
 713                SMSC_TRACE(HW, "duplex state has changed");
 714
 715                spin_lock_irqsave(&pdata->mac_lock, flags);
 716                mac_cr = smsc911x_mac_read(pdata, MAC_CR);
 717                if (phy_dev->duplex) {
 718                        SMSC_TRACE(HW,
 719                                "configuring for full duplex mode");
 720                        mac_cr |= MAC_CR_FDPX_;
 721                } else {
 722                        SMSC_TRACE(HW,
 723                                "configuring for half duplex mode");
 724                        mac_cr &= ~MAC_CR_FDPX_;
 725                }
 726                smsc911x_mac_write(pdata, MAC_CR, mac_cr);
 727                spin_unlock_irqrestore(&pdata->mac_lock, flags);
 728
 729                smsc911x_phy_update_flowcontrol(pdata);
 730                pdata->last_duplex = phy_dev->duplex;
 731        }
 732
 733        carrier = netif_carrier_ok(dev);
 734        if (carrier != pdata->last_carrier) {
 735                SMSC_TRACE(HW, "carrier state has changed");
 736                if (carrier) {
 737                        SMSC_TRACE(HW, "configuring for carrier OK");
 738                        if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
 739                            (!pdata->using_extphy)) {
 740                                /* Restore orginal GPIO configuration */
 741                                pdata->gpio_setting = pdata->gpio_orig_setting;
 742                                smsc911x_reg_write(pdata, GPIO_CFG,
 743                                        pdata->gpio_setting);
 744                        }
 745                } else {
 746                        SMSC_TRACE(HW, "configuring for no carrier");
 747                        /* Check global setting that LED1
 748                         * usage is 10/100 indicator */
 749                        pdata->gpio_setting = smsc911x_reg_read(pdata,
 750                                GPIO_CFG);
 751                        if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_)
 752                            && (!pdata->using_extphy)) {
 753                                /* Force 10/100 LED off, after saving
 754                                 * orginal GPIO configuration */
 755                                pdata->gpio_orig_setting = pdata->gpio_setting;
 756
 757                                pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
 758                                pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
 759                                                        | GPIO_CFG_GPIODIR0_
 760                                                        | GPIO_CFG_GPIOD0_);
 761                                smsc911x_reg_write(pdata, GPIO_CFG,
 762                                        pdata->gpio_setting);
 763                        }
 764                }
 765                pdata->last_carrier = carrier;
 766        }
 767}
 768
 769static int smsc911x_mii_probe(struct net_device *dev)
 770{
 771        struct smsc911x_data *pdata = netdev_priv(dev);
 772        struct phy_device *phydev = NULL;
 773        int phy_addr;
 774
 775        /* find the first phy */
 776        for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
 777                if (pdata->mii_bus->phy_map[phy_addr]) {
 778                        phydev = pdata->mii_bus->phy_map[phy_addr];
 779                        SMSC_TRACE(PROBE, "PHY %d: addr %d, phy_id 0x%08X",
 780                                phy_addr, phydev->addr, phydev->phy_id);
 781                        break;
 782                }
 783        }
 784
 785        if (!phydev) {
 786                pr_err("%s: no PHY found\n", dev->name);
 787                return -ENODEV;
 788        }
 789
 790        phydev = phy_connect(dev, dev_name(&phydev->dev),
 791                &smsc911x_phy_adjust_link, 0, pdata->config.phy_interface);
 792
 793        if (IS_ERR(phydev)) {
 794                pr_err("%s: Could not attach to PHY\n", dev->name);
 795                return PTR_ERR(phydev);
 796        }
 797
 798        pr_info("%s: attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
 799                dev->name, phydev->drv->name,
 800                dev_name(&phydev->dev), phydev->irq);
 801
 802        /* mask with MAC supported features */
 803        phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
 804                              SUPPORTED_Asym_Pause);
 805        phydev->advertising = phydev->supported;
 806
 807        pdata->phy_dev = phydev;
 808        pdata->last_duplex = -1;
 809        pdata->last_carrier = -1;
 810
 811#ifdef USE_PHY_WORK_AROUND
 812        if (smsc911x_phy_loopbacktest(dev) < 0) {
 813                SMSC_WARNING(HW, "Failed Loop Back Test");
 814                return -ENODEV;
 815        }
 816        SMSC_TRACE(HW, "Passed Loop Back Test");
 817#endif                          /* USE_PHY_WORK_AROUND */
 818
 819        SMSC_TRACE(HW, "phy initialised succesfully");
 820        return 0;
 821}
 822
 823static int __devinit smsc911x_mii_init(struct platform_device *pdev,
 824                                       struct net_device *dev)
 825{
 826        struct smsc911x_data *pdata = netdev_priv(dev);
 827        int err = -ENXIO, i;
 828
 829        pdata->mii_bus = mdiobus_alloc();
 830        if (!pdata->mii_bus) {
 831                err = -ENOMEM;
 832                goto err_out_1;
 833        }
 834
 835        pdata->mii_bus->name = SMSC_MDIONAME;
 836        snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id);
 837        pdata->mii_bus->priv = pdata;
 838        pdata->mii_bus->read = smsc911x_mii_read;
 839        pdata->mii_bus->write = smsc911x_mii_write;
 840        pdata->mii_bus->irq = pdata->phy_irq;
 841        for (i = 0; i < PHY_MAX_ADDR; ++i)
 842                pdata->mii_bus->irq[i] = PHY_POLL;
 843
 844        pdata->mii_bus->parent = &pdev->dev;
 845
 846        switch (pdata->idrev & 0xFFFF0000) {
 847        case 0x01170000:
 848        case 0x01150000:
 849        case 0x117A0000:
 850        case 0x115A0000:
 851                /* External PHY supported, try to autodetect */
 852                smsc911x_phy_initialise_external(pdata);
 853                break;
 854        default:
 855                SMSC_TRACE(HW, "External PHY is not supported, "
 856                        "using internal PHY");
 857                pdata->using_extphy = 0;
 858                break;
 859        }
 860
 861        if (!pdata->using_extphy) {
 862                /* Mask all PHYs except ID 1 (internal) */
 863                pdata->mii_bus->phy_mask = ~(1 << 1);
 864        }
 865
 866        if (mdiobus_register(pdata->mii_bus)) {
 867                SMSC_WARNING(PROBE, "Error registering mii bus");
 868                goto err_out_free_bus_2;
 869        }
 870
 871        if (smsc911x_mii_probe(dev) < 0) {
 872                SMSC_WARNING(PROBE, "Error registering mii bus");
 873                goto err_out_unregister_bus_3;
 874        }
 875
 876        return 0;
 877
 878err_out_unregister_bus_3:
 879        mdiobus_unregister(pdata->mii_bus);
 880err_out_free_bus_2:
 881        mdiobus_free(pdata->mii_bus);
 882err_out_1:
 883        return err;
 884}
 885
 886/* Gets the number of tx statuses in the fifo */
 887static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
 888{
 889        return (smsc911x_reg_read(pdata, TX_FIFO_INF)
 890                & TX_FIFO_INF_TSUSED_) >> 16;
 891}
 892
 893/* Reads tx statuses and increments counters where necessary */
 894static void smsc911x_tx_update_txcounters(struct net_device *dev)
 895{
 896        struct smsc911x_data *pdata = netdev_priv(dev);
 897        unsigned int tx_stat;
 898
 899        while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
 900                if (unlikely(tx_stat & 0x80000000)) {
 901                        /* In this driver the packet tag is used as the packet
 902                         * length. Since a packet length can never reach the
 903                         * size of 0x8000, this bit is reserved. It is worth
 904                         * noting that the "reserved bit" in the warning above
 905                         * does not reference a hardware defined reserved bit
 906                         * but rather a driver defined one.
 907                         */
 908                        SMSC_WARNING(HW,
 909                                "Packet tag reserved bit is high");
 910                } else {
 911                        if (unlikely(tx_stat & TX_STS_ES_)) {
 912                                dev->stats.tx_errors++;
 913                        } else {
 914                                dev->stats.tx_packets++;
 915                                dev->stats.tx_bytes += (tx_stat >> 16);
 916                        }
 917                        if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
 918                                dev->stats.collisions += 16;
 919                                dev->stats.tx_aborted_errors += 1;
 920                        } else {
 921                                dev->stats.collisions +=
 922                                    ((tx_stat >> 3) & 0xF);
 923                        }
 924                        if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
 925                                dev->stats.tx_carrier_errors += 1;
 926                        if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
 927                                dev->stats.collisions++;
 928                                dev->stats.tx_aborted_errors++;
 929                        }
 930                }
 931        }
 932}
 933
 934/* Increments the Rx error counters */
 935static void
 936smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
 937{
 938        int crc_err = 0;
 939
 940        if (unlikely(rxstat & RX_STS_ES_)) {
 941                dev->stats.rx_errors++;
 942                if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
 943                        dev->stats.rx_crc_errors++;
 944                        crc_err = 1;
 945                }
 946        }
 947        if (likely(!crc_err)) {
 948                if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
 949                             (rxstat & RX_STS_LENGTH_ERR_)))
 950                        dev->stats.rx_length_errors++;
 951                if (rxstat & RX_STS_MCAST_)
 952                        dev->stats.multicast++;
 953        }
 954}
 955
 956/* Quickly dumps bad packets */
 957static void
 958smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktbytes)
 959{
 960        unsigned int pktwords = (pktbytes + NET_IP_ALIGN + 3) >> 2;
 961
 962        if (likely(pktwords >= 4)) {
 963                unsigned int timeout = 500;
 964                unsigned int val;
 965                smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
 966                do {
 967                        udelay(1);
 968                        val = smsc911x_reg_read(pdata, RX_DP_CTRL);
 969                } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
 970
 971                if (unlikely(timeout == 0))
 972                        SMSC_WARNING(HW, "Timed out waiting for "
 973                                "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
 974        } else {
 975                unsigned int temp;
 976                while (pktwords--)
 977                        temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
 978        }
 979}
 980
 981/* NAPI poll function */
 982static int smsc911x_poll(struct napi_struct *napi, int budget)
 983{
 984        struct smsc911x_data *pdata =
 985                container_of(napi, struct smsc911x_data, napi);
 986        struct net_device *dev = pdata->dev;
 987        int npackets = 0;
 988
 989        while (npackets < budget) {
 990                unsigned int pktlength;
 991                unsigned int pktwords;
 992                struct sk_buff *skb;
 993                unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
 994
 995                if (!rxstat) {
 996                        unsigned int temp;
 997                        /* We processed all packets available.  Tell NAPI it can
 998                         * stop polling then re-enable rx interrupts */
 999                        smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1000                        napi_complete(napi);
1001                        temp = smsc911x_reg_read(pdata, INT_EN);
1002                        temp |= INT_EN_RSFL_EN_;
1003                        smsc911x_reg_write(pdata, INT_EN, temp);
1004                        break;
1005                }
1006
1007                /* Count packet for NAPI scheduling, even if it has an error.
1008                 * Error packets still require cycles to discard */
1009                npackets++;
1010
1011                pktlength = ((rxstat & 0x3FFF0000) >> 16);
1012                pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1013                smsc911x_rx_counterrors(dev, rxstat);
1014
1015                if (unlikely(rxstat & RX_STS_ES_)) {
1016                        SMSC_WARNING(RX_ERR,
1017                                "Discarding packet with error bit set");
1018                        /* Packet has an error, discard it and continue with
1019                         * the next */
1020                        smsc911x_rx_fastforward(pdata, pktwords);
1021                        dev->stats.rx_dropped++;
1022                        continue;
1023                }
1024
1025                skb = netdev_alloc_skb(dev, pktlength + NET_IP_ALIGN);
1026                if (unlikely(!skb)) {
1027                        SMSC_WARNING(RX_ERR,
1028                                "Unable to allocate skb for rx packet");
1029                        /* Drop the packet and stop this polling iteration */
1030                        smsc911x_rx_fastforward(pdata, pktwords);
1031                        dev->stats.rx_dropped++;
1032                        break;
1033                }
1034
1035                skb->data = skb->head;
1036                skb_reset_tail_pointer(skb);
1037
1038                /* Align IP on 16B boundary */
1039                skb_reserve(skb, NET_IP_ALIGN);
1040                skb_put(skb, pktlength - 4);
1041                smsc911x_rx_readfifo(pdata, (unsigned int *)skb->head,
1042                                     pktwords);
1043                skb->protocol = eth_type_trans(skb, dev);
1044                skb->ip_summed = CHECKSUM_NONE;
1045                netif_receive_skb(skb);
1046
1047                /* Update counters */
1048                dev->stats.rx_packets++;
1049                dev->stats.rx_bytes += (pktlength - 4);
1050        }
1051
1052        /* Return total received packets */
1053        return npackets;
1054}
1055
1056/* Returns hash bit number for given MAC address
1057 * Example:
1058 * 01 00 5E 00 00 01 -> returns bit number 31 */
1059static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1060{
1061        return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1062}
1063
1064static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1065{
1066        /* Performs the multicast & mac_cr update.  This is called when
1067         * safe on the current hardware, and with the mac_lock held */
1068        unsigned int mac_cr;
1069
1070        SMSC_ASSERT_MAC_LOCK(pdata);
1071
1072        mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1073        mac_cr |= pdata->set_bits_mask;
1074        mac_cr &= ~(pdata->clear_bits_mask);
1075        smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1076        smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1077        smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1078        SMSC_TRACE(HW, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1079                mac_cr, pdata->hashhi, pdata->hashlo);
1080}
1081
1082static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1083{
1084        unsigned int mac_cr;
1085
1086        /* This function is only called for older LAN911x devices
1087         * (revA or revB), where MAC_CR, HASHH and HASHL should not
1088         * be modified during Rx - newer devices immediately update the
1089         * registers.
1090         *
1091         * This is called from interrupt context */
1092
1093        spin_lock(&pdata->mac_lock);
1094
1095        /* Check Rx has stopped */
1096        if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1097                SMSC_WARNING(DRV, "Rx not stopped");
1098
1099        /* Perform the update - safe to do now Rx has stopped */
1100        smsc911x_rx_multicast_update(pdata);
1101
1102        /* Re-enable Rx */
1103        mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1104        mac_cr |= MAC_CR_RXEN_;
1105        smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1106
1107        pdata->multicast_update_pending = 0;
1108
1109        spin_unlock(&pdata->mac_lock);
1110}
1111
1112static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1113{
1114        unsigned int timeout;
1115        unsigned int temp;
1116
1117        /* Reset the LAN911x */
1118        smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
1119        timeout = 10;
1120        do {
1121                udelay(10);
1122                temp = smsc911x_reg_read(pdata, HW_CFG);
1123        } while ((--timeout) && (temp & HW_CFG_SRST_));
1124
1125        if (unlikely(temp & HW_CFG_SRST_)) {
1126                SMSC_WARNING(DRV, "Failed to complete reset");
1127                return -EIO;
1128        }
1129        return 0;
1130}
1131
1132/* Sets the device MAC address to dev_addr, called with mac_lock held */
1133static void
1134smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1135{
1136        u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1137        u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1138            (dev_addr[1] << 8) | dev_addr[0];
1139
1140        SMSC_ASSERT_MAC_LOCK(pdata);
1141
1142        smsc911x_mac_write(pdata, ADDRH, mac_high16);
1143        smsc911x_mac_write(pdata, ADDRL, mac_low32);
1144}
1145
1146static int smsc911x_open(struct net_device *dev)
1147{
1148        struct smsc911x_data *pdata = netdev_priv(dev);
1149        unsigned int timeout;
1150        unsigned int temp;
1151        unsigned int intcfg;
1152
1153        /* if the phy is not yet registered, retry later*/
1154        if (!pdata->phy_dev) {
1155                SMSC_WARNING(HW, "phy_dev is NULL");
1156                return -EAGAIN;
1157        }
1158
1159        if (!is_valid_ether_addr(dev->dev_addr)) {
1160                SMSC_WARNING(HW, "dev_addr is not a valid MAC address");
1161                return -EADDRNOTAVAIL;
1162        }
1163
1164        /* Reset the LAN911x */
1165        if (smsc911x_soft_reset(pdata)) {
1166                SMSC_WARNING(HW, "soft reset failed");
1167                return -EIO;
1168        }
1169
1170        smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1171        smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1172
1173        /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1174        timeout = 50;
1175        while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1176               --timeout) {
1177                udelay(10);
1178        }
1179
1180        if (unlikely(timeout == 0))
1181                SMSC_WARNING(IFUP,
1182                        "Timed out waiting for EEPROM busy bit to clear");
1183
1184        smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1185
1186        /* The soft reset above cleared the device's MAC address,
1187         * restore it from local copy (set in probe) */
1188        spin_lock_irq(&pdata->mac_lock);
1189        smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1190        spin_unlock_irq(&pdata->mac_lock);
1191
1192        /* Initialise irqs, but leave all sources disabled */
1193        smsc911x_reg_write(pdata, INT_EN, 0);
1194        smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1195
1196        /* Set interrupt deassertion to 100uS */
1197        intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1198
1199        if (pdata->config.irq_polarity) {
1200                SMSC_TRACE(IFUP, "irq polarity: active high");
1201                intcfg |= INT_CFG_IRQ_POL_;
1202        } else {
1203                SMSC_TRACE(IFUP, "irq polarity: active low");
1204        }
1205
1206        if (pdata->config.irq_type) {
1207                SMSC_TRACE(IFUP, "irq type: push-pull");
1208                intcfg |= INT_CFG_IRQ_TYPE_;
1209        } else {
1210                SMSC_TRACE(IFUP, "irq type: open drain");
1211        }
1212
1213        smsc911x_reg_write(pdata, INT_CFG, intcfg);
1214
1215        SMSC_TRACE(IFUP, "Testing irq handler using IRQ %d", dev->irq);
1216        pdata->software_irq_signal = 0;
1217        smp_wmb();
1218
1219        temp = smsc911x_reg_read(pdata, INT_EN);
1220        temp |= INT_EN_SW_INT_EN_;
1221        smsc911x_reg_write(pdata, INT_EN, temp);
1222
1223        timeout = 1000;
1224        while (timeout--) {
1225                if (pdata->software_irq_signal)
1226                        break;
1227                msleep(1);
1228        }
1229
1230        if (!pdata->software_irq_signal) {
1231                dev_warn(&dev->dev, "ISR failed signaling test (IRQ %d)\n",
1232                         dev->irq);
1233                return -ENODEV;
1234        }
1235        SMSC_TRACE(IFUP, "IRQ handler passed test using IRQ %d", dev->irq);
1236
1237        dev_info(&dev->dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1238                 (unsigned long)pdata->ioaddr, dev->irq);
1239
1240        /* Reset the last known duplex and carrier */
1241        pdata->last_duplex = -1;
1242        pdata->last_carrier = -1;
1243
1244        /* Bring the PHY up */
1245        phy_start(pdata->phy_dev);
1246
1247        temp = smsc911x_reg_read(pdata, HW_CFG);
1248        /* Preserve TX FIFO size and external PHY configuration */
1249        temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1250        temp |= HW_CFG_SF_;
1251        smsc911x_reg_write(pdata, HW_CFG, temp);
1252
1253        temp = smsc911x_reg_read(pdata, FIFO_INT);
1254        temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1255        temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1256        smsc911x_reg_write(pdata, FIFO_INT, temp);
1257
1258        /* set RX Data offset to 2 bytes for alignment */
1259        smsc911x_reg_write(pdata, RX_CFG, (2 << 8));
1260
1261        /* enable NAPI polling before enabling RX interrupts */
1262        napi_enable(&pdata->napi);
1263
1264        temp = smsc911x_reg_read(pdata, INT_EN);
1265        temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1266        smsc911x_reg_write(pdata, INT_EN, temp);
1267
1268        spin_lock_irq(&pdata->mac_lock);
1269        temp = smsc911x_mac_read(pdata, MAC_CR);
1270        temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1271        smsc911x_mac_write(pdata, MAC_CR, temp);
1272        spin_unlock_irq(&pdata->mac_lock);
1273
1274        smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1275
1276        netif_start_queue(dev);
1277        return 0;
1278}
1279
1280/* Entry point for stopping the interface */
1281static int smsc911x_stop(struct net_device *dev)
1282{
1283        struct smsc911x_data *pdata = netdev_priv(dev);
1284        unsigned int temp;
1285
1286        /* Disable all device interrupts */
1287        temp = smsc911x_reg_read(pdata, INT_CFG);
1288        temp &= ~INT_CFG_IRQ_EN_;
1289        smsc911x_reg_write(pdata, INT_CFG, temp);
1290
1291        /* Stop Tx and Rx polling */
1292        netif_stop_queue(dev);
1293        napi_disable(&pdata->napi);
1294
1295        /* At this point all Rx and Tx activity is stopped */
1296        dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1297        smsc911x_tx_update_txcounters(dev);
1298
1299        /* Bring the PHY down */
1300        if (pdata->phy_dev)
1301                phy_stop(pdata->phy_dev);
1302
1303        SMSC_TRACE(IFDOWN, "Interface stopped");
1304        return 0;
1305}
1306
1307/* Entry point for transmitting a packet */
1308static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1309{
1310        struct smsc911x_data *pdata = netdev_priv(dev);
1311        unsigned int freespace;
1312        unsigned int tx_cmd_a;
1313        unsigned int tx_cmd_b;
1314        unsigned int temp;
1315        u32 wrsz;
1316        ulong bufp;
1317
1318        freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1319
1320        if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1321                SMSC_WARNING(TX_ERR,
1322                        "Tx data fifo low, space available: %d", freespace);
1323
1324        /* Word alignment adjustment */
1325        tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1326        tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1327        tx_cmd_a |= (unsigned int)skb->len;
1328
1329        tx_cmd_b = ((unsigned int)skb->len) << 16;
1330        tx_cmd_b |= (unsigned int)skb->len;
1331
1332        smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1333        smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1334
1335        bufp = (ulong)skb->data & (~0x3);
1336        wrsz = (u32)skb->len + 3;
1337        wrsz += (u32)((ulong)skb->data & 0x3);
1338        wrsz >>= 2;
1339
1340        smsc911x_tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1341        freespace -= (skb->len + 32);
1342        dev_kfree_skb(skb);
1343        dev->trans_start = jiffies;
1344
1345        if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1346                smsc911x_tx_update_txcounters(dev);
1347
1348        if (freespace < TX_FIFO_LOW_THRESHOLD) {
1349                netif_stop_queue(dev);
1350                temp = smsc911x_reg_read(pdata, FIFO_INT);
1351                temp &= 0x00FFFFFF;
1352                temp |= 0x32000000;
1353                smsc911x_reg_write(pdata, FIFO_INT, temp);
1354        }
1355
1356        return NETDEV_TX_OK;
1357}
1358
1359/* Entry point for getting status counters */
1360static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1361{
1362        struct smsc911x_data *pdata = netdev_priv(dev);
1363        smsc911x_tx_update_txcounters(dev);
1364        dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1365        return &dev->stats;
1366}
1367
1368/* Entry point for setting addressing modes */
1369static void smsc911x_set_multicast_list(struct net_device *dev)
1370{
1371        struct smsc911x_data *pdata = netdev_priv(dev);
1372        unsigned long flags;
1373
1374        if (dev->flags & IFF_PROMISC) {
1375                /* Enabling promiscuous mode */
1376                pdata->set_bits_mask = MAC_CR_PRMS_;
1377                pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1378                pdata->hashhi = 0;
1379                pdata->hashlo = 0;
1380        } else if (dev->flags & IFF_ALLMULTI) {
1381                /* Enabling all multicast mode */
1382                pdata->set_bits_mask = MAC_CR_MCPAS_;
1383                pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1384                pdata->hashhi = 0;
1385                pdata->hashlo = 0;
1386        } else if (dev->mc_count > 0) {
1387                /* Enabling specific multicast addresses */
1388                unsigned int hash_high = 0;
1389                unsigned int hash_low = 0;
1390                unsigned int count = 0;
1391                struct dev_mc_list *mc_list = dev->mc_list;
1392
1393                pdata->set_bits_mask = MAC_CR_HPFILT_;
1394                pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1395
1396                while (mc_list) {
1397                        count++;
1398                        if ((mc_list->dmi_addrlen) == ETH_ALEN) {
1399                                unsigned int bitnum =
1400                                    smsc911x_hash(mc_list->dmi_addr);
1401                                unsigned int mask = 0x01 << (bitnum & 0x1F);
1402                                if (bitnum & 0x20)
1403                                        hash_high |= mask;
1404                                else
1405                                        hash_low |= mask;
1406                        } else {
1407                                SMSC_WARNING(DRV, "dmi_addrlen != 6");
1408                        }
1409                        mc_list = mc_list->next;
1410                }
1411                if (count != (unsigned int)dev->mc_count)
1412                        SMSC_WARNING(DRV, "mc_count != dev->mc_count");
1413
1414                pdata->hashhi = hash_high;
1415                pdata->hashlo = hash_low;
1416        } else {
1417                /* Enabling local MAC address only */
1418                pdata->set_bits_mask = 0;
1419                pdata->clear_bits_mask =
1420                    (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1421                pdata->hashhi = 0;
1422                pdata->hashlo = 0;
1423        }
1424
1425        spin_lock_irqsave(&pdata->mac_lock, flags);
1426
1427        if (pdata->generation <= 1) {
1428                /* Older hardware revision - cannot change these flags while
1429                 * receiving data */
1430                if (!pdata->multicast_update_pending) {
1431                        unsigned int temp;
1432                        SMSC_TRACE(HW, "scheduling mcast update");
1433                        pdata->multicast_update_pending = 1;
1434
1435                        /* Request the hardware to stop, then perform the
1436                         * update when we get an RX_STOP interrupt */
1437                        temp = smsc911x_mac_read(pdata, MAC_CR);
1438                        temp &= ~(MAC_CR_RXEN_);
1439                        smsc911x_mac_write(pdata, MAC_CR, temp);
1440                } else {
1441                        /* There is another update pending, this should now
1442                         * use the newer values */
1443                }
1444        } else {
1445                /* Newer hardware revision - can write immediately */
1446                smsc911x_rx_multicast_update(pdata);
1447        }
1448
1449        spin_unlock_irqrestore(&pdata->mac_lock, flags);
1450}
1451
1452static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1453{
1454        struct net_device *dev = dev_id;
1455        struct smsc911x_data *pdata = netdev_priv(dev);
1456        u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1457        u32 inten = smsc911x_reg_read(pdata, INT_EN);
1458        int serviced = IRQ_NONE;
1459        u32 temp;
1460
1461        if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1462                temp = smsc911x_reg_read(pdata, INT_EN);
1463                temp &= (~INT_EN_SW_INT_EN_);
1464                smsc911x_reg_write(pdata, INT_EN, temp);
1465                smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1466                pdata->software_irq_signal = 1;
1467                smp_wmb();
1468                serviced = IRQ_HANDLED;
1469        }
1470
1471        if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1472                /* Called when there is a multicast update scheduled and
1473                 * it is now safe to complete the update */
1474                SMSC_TRACE(INTR, "RX Stop interrupt");
1475                smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1476                if (pdata->multicast_update_pending)
1477                        smsc911x_rx_multicast_update_workaround(pdata);
1478                serviced = IRQ_HANDLED;
1479        }
1480
1481        if (intsts & inten & INT_STS_TDFA_) {
1482                temp = smsc911x_reg_read(pdata, FIFO_INT);
1483                temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1484                smsc911x_reg_write(pdata, FIFO_INT, temp);
1485                smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1486                netif_wake_queue(dev);
1487                serviced = IRQ_HANDLED;
1488        }
1489
1490        if (unlikely(intsts & inten & INT_STS_RXE_)) {
1491                SMSC_TRACE(INTR, "RX Error interrupt");
1492                smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1493                serviced = IRQ_HANDLED;
1494        }
1495
1496        if (likely(intsts & inten & INT_STS_RSFL_)) {
1497                if (likely(napi_schedule_prep(&pdata->napi))) {
1498                        /* Disable Rx interrupts */
1499                        temp = smsc911x_reg_read(pdata, INT_EN);
1500                        temp &= (~INT_EN_RSFL_EN_);
1501                        smsc911x_reg_write(pdata, INT_EN, temp);
1502                        /* Schedule a NAPI poll */
1503                        __napi_schedule(&pdata->napi);
1504                } else {
1505                        SMSC_WARNING(RX_ERR,
1506                                "napi_schedule_prep failed");
1507                }
1508                serviced = IRQ_HANDLED;
1509        }
1510
1511        return serviced;
1512}
1513
1514#ifdef CONFIG_NET_POLL_CONTROLLER
1515static void smsc911x_poll_controller(struct net_device *dev)
1516{
1517        disable_irq(dev->irq);
1518        smsc911x_irqhandler(0, dev);
1519        enable_irq(dev->irq);
1520}
1521#endif                          /* CONFIG_NET_POLL_CONTROLLER */
1522
1523static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1524{
1525        struct smsc911x_data *pdata = netdev_priv(dev);
1526        struct sockaddr *addr = p;
1527
1528        /* On older hardware revisions we cannot change the mac address
1529         * registers while receiving data.  Newer devices can safely change
1530         * this at any time. */
1531        if (pdata->generation <= 1 && netif_running(dev))
1532                return -EBUSY;
1533
1534        if (!is_valid_ether_addr(addr->sa_data))
1535                return -EADDRNOTAVAIL;
1536
1537        memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
1538
1539        spin_lock_irq(&pdata->mac_lock);
1540        smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1541        spin_unlock_irq(&pdata->mac_lock);
1542
1543        dev_info(&dev->dev, "MAC Address: %pM\n", dev->dev_addr);
1544
1545        return 0;
1546}
1547
1548/* Standard ioctls for mii-tool */
1549static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1550{
1551        struct smsc911x_data *pdata = netdev_priv(dev);
1552
1553        if (!netif_running(dev) || !pdata->phy_dev)
1554                return -EINVAL;
1555
1556        return phy_mii_ioctl(pdata->phy_dev, if_mii(ifr), cmd);
1557}
1558
1559static int
1560smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1561{
1562        struct smsc911x_data *pdata = netdev_priv(dev);
1563
1564        cmd->maxtxpkt = 1;
1565        cmd->maxrxpkt = 1;
1566        return phy_ethtool_gset(pdata->phy_dev, cmd);
1567}
1568
1569static int
1570smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1571{
1572        struct smsc911x_data *pdata = netdev_priv(dev);
1573
1574        return phy_ethtool_sset(pdata->phy_dev, cmd);
1575}
1576
1577static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1578                                        struct ethtool_drvinfo *info)
1579{
1580        strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1581        strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1582        strlcpy(info->bus_info, dev_name(dev->dev.parent),
1583                sizeof(info->bus_info));
1584}
1585
1586static int smsc911x_ethtool_nwayreset(struct net_device *dev)
1587{
1588        struct smsc911x_data *pdata = netdev_priv(dev);
1589
1590        return phy_start_aneg(pdata->phy_dev);
1591}
1592
1593static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1594{
1595        struct smsc911x_data *pdata = netdev_priv(dev);
1596        return pdata->msg_enable;
1597}
1598
1599static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1600{
1601        struct smsc911x_data *pdata = netdev_priv(dev);
1602        pdata->msg_enable = level;
1603}
1604
1605static int smsc911x_ethtool_getregslen(struct net_device *dev)
1606{
1607        return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1608            sizeof(u32);
1609}
1610
1611static void
1612smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1613                         void *buf)
1614{
1615        struct smsc911x_data *pdata = netdev_priv(dev);
1616        struct phy_device *phy_dev = pdata->phy_dev;
1617        unsigned long flags;
1618        unsigned int i;
1619        unsigned int j = 0;
1620        u32 *data = buf;
1621
1622        regs->version = pdata->idrev;
1623        for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1624                data[j++] = smsc911x_reg_read(pdata, i);
1625
1626        for (i = MAC_CR; i <= WUCSR; i++) {
1627                spin_lock_irqsave(&pdata->mac_lock, flags);
1628                data[j++] = smsc911x_mac_read(pdata, i);
1629                spin_unlock_irqrestore(&pdata->mac_lock, flags);
1630        }
1631
1632        for (i = 0; i <= 31; i++)
1633                data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
1634}
1635
1636static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
1637{
1638        unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
1639        temp &= ~GPIO_CFG_EEPR_EN_;
1640        smsc911x_reg_write(pdata, GPIO_CFG, temp);
1641        msleep(1);
1642}
1643
1644static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
1645{
1646        int timeout = 100;
1647        u32 e2cmd;
1648
1649        SMSC_TRACE(DRV, "op 0x%08x", op);
1650        if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
1651                SMSC_WARNING(DRV, "Busy at start");
1652                return -EBUSY;
1653        }
1654
1655        e2cmd = op | E2P_CMD_EPC_BUSY_;
1656        smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
1657
1658        do {
1659                msleep(1);
1660                e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
1661        } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
1662
1663        if (!timeout) {
1664                SMSC_TRACE(DRV, "TIMED OUT");
1665                return -EAGAIN;
1666        }
1667
1668        if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
1669                SMSC_TRACE(DRV, "Error occured during eeprom operation");
1670                return -EINVAL;
1671        }
1672
1673        return 0;
1674}
1675
1676static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
1677                                         u8 address, u8 *data)
1678{
1679        u32 op = E2P_CMD_EPC_CMD_READ_ | address;
1680        int ret;
1681
1682        SMSC_TRACE(DRV, "address 0x%x", address);
1683        ret = smsc911x_eeprom_send_cmd(pdata, op);
1684
1685        if (!ret)
1686                data[address] = smsc911x_reg_read(pdata, E2P_DATA);
1687
1688        return ret;
1689}
1690
1691static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
1692                                          u8 address, u8 data)
1693{
1694        u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
1695        u32 temp;
1696        int ret;
1697
1698        SMSC_TRACE(DRV, "address 0x%x, data 0x%x", address, data);
1699        ret = smsc911x_eeprom_send_cmd(pdata, op);
1700
1701        if (!ret) {
1702                op = E2P_CMD_EPC_CMD_WRITE_ | address;
1703                smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
1704
1705                /* Workaround for hardware read-after-write restriction */
1706                temp = smsc911x_reg_read(pdata, BYTE_TEST);
1707
1708                ret = smsc911x_eeprom_send_cmd(pdata, op);
1709        }
1710
1711        return ret;
1712}
1713
1714static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
1715{
1716        return SMSC911X_EEPROM_SIZE;
1717}
1718
1719static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
1720                                       struct ethtool_eeprom *eeprom, u8 *data)
1721{
1722        struct smsc911x_data *pdata = netdev_priv(dev);
1723        u8 eeprom_data[SMSC911X_EEPROM_SIZE];
1724        int len;
1725        int i;
1726
1727        smsc911x_eeprom_enable_access(pdata);
1728
1729        len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
1730        for (i = 0; i < len; i++) {
1731                int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
1732                if (ret < 0) {
1733                        eeprom->len = 0;
1734                        return ret;
1735                }
1736        }
1737
1738        memcpy(data, &eeprom_data[eeprom->offset], len);
1739        eeprom->len = len;
1740        return 0;
1741}
1742
1743static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
1744                                       struct ethtool_eeprom *eeprom, u8 *data)
1745{
1746        int ret;
1747        struct smsc911x_data *pdata = netdev_priv(dev);
1748
1749        smsc911x_eeprom_enable_access(pdata);
1750        smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
1751        ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
1752        smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
1753
1754        /* Single byte write, according to man page */
1755        eeprom->len = 1;
1756
1757        return ret;
1758}
1759
1760static const struct ethtool_ops smsc911x_ethtool_ops = {
1761        .get_settings = smsc911x_ethtool_getsettings,
1762        .set_settings = smsc911x_ethtool_setsettings,
1763        .get_link = ethtool_op_get_link,
1764        .get_drvinfo = smsc911x_ethtool_getdrvinfo,
1765        .nway_reset = smsc911x_ethtool_nwayreset,
1766        .get_msglevel = smsc911x_ethtool_getmsglevel,
1767        .set_msglevel = smsc911x_ethtool_setmsglevel,
1768        .get_regs_len = smsc911x_ethtool_getregslen,
1769        .get_regs = smsc911x_ethtool_getregs,
1770        .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
1771        .get_eeprom = smsc911x_ethtool_get_eeprom,
1772        .set_eeprom = smsc911x_ethtool_set_eeprom,
1773};
1774
1775static const struct net_device_ops smsc911x_netdev_ops = {
1776        .ndo_open               = smsc911x_open,
1777        .ndo_stop               = smsc911x_stop,
1778        .ndo_start_xmit         = smsc911x_hard_start_xmit,
1779        .ndo_get_stats          = smsc911x_get_stats,
1780        .ndo_set_multicast_list = smsc911x_set_multicast_list,
1781        .ndo_do_ioctl           = smsc911x_do_ioctl,
1782        .ndo_change_mtu         = eth_change_mtu,
1783        .ndo_validate_addr      = eth_validate_addr,
1784        .ndo_set_mac_address    = smsc911x_set_mac_address,
1785#ifdef CONFIG_NET_POLL_CONTROLLER
1786        .ndo_poll_controller    = smsc911x_poll_controller,
1787#endif
1788};
1789
1790/* copies the current mac address from hardware to dev->dev_addr */
1791static void __devinit smsc911x_read_mac_address(struct net_device *dev)
1792{
1793        struct smsc911x_data *pdata = netdev_priv(dev);
1794        u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
1795        u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
1796
1797        dev->dev_addr[0] = (u8)(mac_low32);
1798        dev->dev_addr[1] = (u8)(mac_low32 >> 8);
1799        dev->dev_addr[2] = (u8)(mac_low32 >> 16);
1800        dev->dev_addr[3] = (u8)(mac_low32 >> 24);
1801        dev->dev_addr[4] = (u8)(mac_high16);
1802        dev->dev_addr[5] = (u8)(mac_high16 >> 8);
1803}
1804
1805/* Initializing private device structures, only called from probe */
1806static int __devinit smsc911x_init(struct net_device *dev)
1807{
1808        struct smsc911x_data *pdata = netdev_priv(dev);
1809        unsigned int byte_test;
1810
1811        SMSC_TRACE(PROBE, "Driver Parameters:");
1812        SMSC_TRACE(PROBE, "LAN base: 0x%08lX",
1813                (unsigned long)pdata->ioaddr);
1814        SMSC_TRACE(PROBE, "IRQ: %d", dev->irq);
1815        SMSC_TRACE(PROBE, "PHY will be autodetected.");
1816
1817        spin_lock_init(&pdata->dev_lock);
1818
1819        if (pdata->ioaddr == 0) {
1820                SMSC_WARNING(PROBE, "pdata->ioaddr: 0x00000000");
1821                return -ENODEV;
1822        }
1823
1824        /* Check byte ordering */
1825        byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1826        SMSC_TRACE(PROBE, "BYTE_TEST: 0x%08X", byte_test);
1827        if (byte_test == 0x43218765) {
1828                SMSC_TRACE(PROBE, "BYTE_TEST looks swapped, "
1829                        "applying WORD_SWAP");
1830                smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
1831
1832                /* 1 dummy read of BYTE_TEST is needed after a write to
1833                 * WORD_SWAP before its contents are valid */
1834                byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1835
1836                byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1837        }
1838
1839        if (byte_test != 0x87654321) {
1840                SMSC_WARNING(DRV, "BYTE_TEST: 0x%08X", byte_test);
1841                if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
1842                        SMSC_WARNING(PROBE,
1843                                "top 16 bits equal to bottom 16 bits");
1844                        SMSC_TRACE(PROBE, "This may mean the chip is set "
1845                                "for 32 bit while the bus is reading 16 bit");
1846                }
1847                return -ENODEV;
1848        }
1849
1850        /* Default generation to zero (all workarounds apply) */
1851        pdata->generation = 0;
1852
1853        pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
1854        switch (pdata->idrev & 0xFFFF0000) {
1855        case 0x01180000:
1856        case 0x01170000:
1857        case 0x01160000:
1858        case 0x01150000:
1859                /* LAN911[5678] family */
1860                pdata->generation = pdata->idrev & 0x0000FFFF;
1861                break;
1862
1863        case 0x118A0000:
1864        case 0x117A0000:
1865        case 0x116A0000:
1866        case 0x115A0000:
1867                /* LAN921[5678] family */
1868                pdata->generation = 3;
1869                break;
1870
1871        case 0x92100000:
1872        case 0x92110000:
1873        case 0x92200000:
1874        case 0x92210000:
1875                /* LAN9210/LAN9211/LAN9220/LAN9221 */
1876                pdata->generation = 4;
1877                break;
1878
1879        default:
1880                SMSC_WARNING(PROBE, "LAN911x not identified, idrev: 0x%08X",
1881                        pdata->idrev);
1882                return -ENODEV;
1883        }
1884
1885        SMSC_TRACE(PROBE, "LAN911x identified, idrev: 0x%08X, generation: %d",
1886                pdata->idrev, pdata->generation);
1887
1888        if (pdata->generation == 0)
1889                SMSC_WARNING(PROBE,
1890                        "This driver is not intended for this chip revision");
1891
1892        /* workaround for platforms without an eeprom, where the mac address
1893         * is stored elsewhere and set by the bootloader.  This saves the
1894         * mac address before resetting the device */
1895        if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS)
1896                smsc911x_read_mac_address(dev);
1897
1898        /* Reset the LAN911x */
1899        if (smsc911x_soft_reset(pdata))
1900                return -ENODEV;
1901
1902        /* Disable all interrupt sources until we bring the device up */
1903        smsc911x_reg_write(pdata, INT_EN, 0);
1904
1905        ether_setup(dev);
1906        dev->flags |= IFF_MULTICAST;
1907        netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
1908        dev->netdev_ops = &smsc911x_netdev_ops;
1909        dev->ethtool_ops = &smsc911x_ethtool_ops;
1910
1911        return 0;
1912}
1913
1914static int __devexit smsc911x_drv_remove(struct platform_device *pdev)
1915{
1916        struct net_device *dev;
1917        struct smsc911x_data *pdata;
1918        struct resource *res;
1919
1920        dev = platform_get_drvdata(pdev);
1921        BUG_ON(!dev);
1922        pdata = netdev_priv(dev);
1923        BUG_ON(!pdata);
1924        BUG_ON(!pdata->ioaddr);
1925        BUG_ON(!pdata->phy_dev);
1926
1927        SMSC_TRACE(IFDOWN, "Stopping driver.");
1928
1929        phy_disconnect(pdata->phy_dev);
1930        pdata->phy_dev = NULL;
1931        mdiobus_unregister(pdata->mii_bus);
1932        mdiobus_free(pdata->mii_bus);
1933
1934        platform_set_drvdata(pdev, NULL);
1935        unregister_netdev(dev);
1936        free_irq(dev->irq, dev);
1937        res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
1938                                           "smsc911x-memory");
1939        if (!res)
1940                res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1941
1942        release_mem_region(res->start, resource_size(res));
1943
1944        iounmap(pdata->ioaddr);
1945
1946        free_netdev(dev);
1947
1948        return 0;
1949}
1950
1951static int __devinit smsc911x_drv_probe(struct platform_device *pdev)
1952{
1953        struct net_device *dev;
1954        struct smsc911x_data *pdata;
1955        struct smsc911x_platform_config *config = pdev->dev.platform_data;
1956        struct resource *res, *irq_res;
1957        unsigned int intcfg = 0;
1958        int res_size, irq_flags;
1959        int retval;
1960
1961        pr_info("%s: Driver version %s.\n", SMSC_CHIPNAME, SMSC_DRV_VERSION);
1962
1963        /* platform data specifies irq & dynamic bus configuration */
1964        if (!pdev->dev.platform_data) {
1965                pr_warning("%s: platform_data not provided\n", SMSC_CHIPNAME);
1966                retval = -ENODEV;
1967                goto out_0;
1968        }
1969
1970        res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
1971                                           "smsc911x-memory");
1972        if (!res)
1973                res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1974        if (!res) {
1975                pr_warning("%s: Could not allocate resource.\n",
1976                        SMSC_CHIPNAME);
1977                retval = -ENODEV;
1978                goto out_0;
1979        }
1980        res_size = resource_size(res);
1981
1982        irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1983        if (!irq_res) {
1984                pr_warning("%s: Could not allocate irq resource.\n",
1985                        SMSC_CHIPNAME);
1986                retval = -ENODEV;
1987                goto out_0;
1988        }
1989
1990        if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
1991                retval = -EBUSY;
1992                goto out_0;
1993        }
1994
1995        dev = alloc_etherdev(sizeof(struct smsc911x_data));
1996        if (!dev) {
1997                pr_warning("%s: Could not allocate device.\n", SMSC_CHIPNAME);
1998                retval = -ENOMEM;
1999                goto out_release_io_1;
2000        }
2001
2002        SET_NETDEV_DEV(dev, &pdev->dev);
2003
2004        pdata = netdev_priv(dev);
2005
2006        dev->irq = irq_res->start;
2007        irq_flags = irq_res->flags & IRQF_TRIGGER_MASK;
2008        pdata->ioaddr = ioremap_nocache(res->start, res_size);
2009
2010        /* copy config parameters across to pdata */
2011        memcpy(&pdata->config, config, sizeof(pdata->config));
2012
2013        pdata->dev = dev;
2014        pdata->msg_enable = ((1 << debug) - 1);
2015
2016        if (pdata->ioaddr == NULL) {
2017                SMSC_WARNING(PROBE,
2018                        "Error smsc911x base address invalid");
2019                retval = -ENOMEM;
2020                goto out_free_netdev_2;
2021        }
2022
2023        retval = smsc911x_init(dev);
2024        if (retval < 0)
2025                goto out_unmap_io_3;
2026
2027        /* configure irq polarity and type before connecting isr */
2028        if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
2029                intcfg |= INT_CFG_IRQ_POL_;
2030
2031        if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
2032                intcfg |= INT_CFG_IRQ_TYPE_;
2033
2034        smsc911x_reg_write(pdata, INT_CFG, intcfg);
2035
2036        /* Ensure interrupts are globally disabled before connecting ISR */
2037        smsc911x_reg_write(pdata, INT_EN, 0);
2038        smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
2039
2040        retval = request_irq(dev->irq, smsc911x_irqhandler,
2041                             irq_flags | IRQF_SHARED, dev->name, dev);
2042        if (retval) {
2043                SMSC_WARNING(PROBE,
2044                        "Unable to claim requested irq: %d", dev->irq);
2045                goto out_unmap_io_3;
2046        }
2047
2048        platform_set_drvdata(pdev, dev);
2049
2050        retval = register_netdev(dev);
2051        if (retval) {
2052                SMSC_WARNING(PROBE,
2053                        "Error %i registering device", retval);
2054                goto out_unset_drvdata_4;
2055        } else {
2056                SMSC_TRACE(PROBE, "Network interface: \"%s\"", dev->name);
2057        }
2058
2059        spin_lock_init(&pdata->mac_lock);
2060
2061        retval = smsc911x_mii_init(pdev, dev);
2062        if (retval) {
2063                SMSC_WARNING(PROBE,
2064                        "Error %i initialising mii", retval);
2065                goto out_unregister_netdev_5;
2066        }
2067
2068        spin_lock_irq(&pdata->mac_lock);
2069
2070        /* Check if mac address has been specified when bringing interface up */
2071        if (is_valid_ether_addr(dev->dev_addr)) {
2072                smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2073                SMSC_TRACE(PROBE, "MAC Address is specified by configuration");
2074        } else {
2075                /* Try reading mac address from device. if EEPROM is present
2076                 * it will already have been set */
2077                smsc911x_read_mac_address(dev);
2078
2079                if (is_valid_ether_addr(dev->dev_addr)) {
2080                        /* eeprom values are valid  so use them */
2081                        SMSC_TRACE(PROBE,
2082                                "Mac Address is read from LAN911x EEPROM");
2083                } else {
2084                        /* eeprom values are invalid, generate random MAC */
2085                        random_ether_addr(dev->dev_addr);
2086                        smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2087                        SMSC_TRACE(PROBE,
2088                                "MAC Address is set to random_ether_addr");
2089                }
2090        }
2091
2092        spin_unlock_irq(&pdata->mac_lock);
2093
2094        dev_info(&dev->dev, "MAC Address: %pM\n", dev->dev_addr);
2095
2096        return 0;
2097
2098out_unregister_netdev_5:
2099        unregister_netdev(dev);
2100out_unset_drvdata_4:
2101        platform_set_drvdata(pdev, NULL);
2102        free_irq(dev->irq, dev);
2103out_unmap_io_3:
2104        iounmap(pdata->ioaddr);
2105out_free_netdev_2:
2106        free_netdev(dev);
2107out_release_io_1:
2108        release_mem_region(res->start, resource_size(res));
2109out_0:
2110        return retval;
2111}
2112
2113#ifdef CONFIG_PM
2114/* This implementation assumes the devices remains powered on its VDDVARIO
2115 * pins during suspend. */
2116
2117/* TODO: implement freeze/thaw callbacks for hibernation.*/
2118
2119static int smsc911x_suspend(struct device *dev)
2120{
2121        struct net_device *ndev = dev_get_drvdata(dev);
2122        struct smsc911x_data *pdata = netdev_priv(ndev);
2123
2124        /* enable wake on LAN, energy detection and the external PME
2125         * signal. */
2126        smsc911x_reg_write(pdata, PMT_CTRL,
2127                PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2128                PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2129
2130        return 0;
2131}
2132
2133static int smsc911x_resume(struct device *dev)
2134{
2135        struct net_device *ndev = dev_get_drvdata(dev);
2136        struct smsc911x_data *pdata = netdev_priv(ndev);
2137        unsigned int to = 100;
2138
2139        /* Note 3.11 from the datasheet:
2140         *      "When the LAN9220 is in a power saving state, a write of any
2141         *       data to the BYTE_TEST register will wake-up the device."
2142         */
2143        smsc911x_reg_write(pdata, BYTE_TEST, 0);
2144
2145        /* poll the READY bit in PMT_CTRL. Any other access to the device is
2146         * forbidden while this bit isn't set. Try for 100ms and return -EIO
2147         * if it failed. */
2148        while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2149                udelay(1000);
2150
2151        return (to == 0) ? -EIO : 0;
2152}
2153
2154static struct dev_pm_ops smsc911x_pm_ops = {
2155        .suspend        = smsc911x_suspend,
2156        .resume         = smsc911x_resume,
2157};
2158
2159#define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2160
2161#else
2162#define SMSC911X_PM_OPS NULL
2163#endif
2164
2165static struct platform_driver smsc911x_driver = {
2166        .probe = smsc911x_drv_probe,
2167        .remove = __devexit_p(smsc911x_drv_remove),
2168        .driver = {
2169                .name   = SMSC_CHIPNAME,
2170                .owner  = THIS_MODULE,
2171                .pm     = SMSC911X_PM_OPS,
2172        },
2173};
2174
2175/* Entry point for loading the module */
2176static int __init smsc911x_init_module(void)
2177{
2178        return platform_driver_register(&smsc911x_driver);
2179}
2180
2181/* entry point for unloading the module */
2182static void __exit smsc911x_cleanup_module(void)
2183{
2184        platform_driver_unregister(&smsc911x_driver);
2185}
2186
2187module_init(smsc911x_init_module);
2188module_exit(smsc911x_cleanup_module);
2189
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