LXR linux/drivers/net/ixgb/ixgb

   1/*******************************************************************************
   2
   3  Intel PRO/10GbE Linux driver
   4  Copyright(c) 1999 - 2008 Intel Corporation.
   5
   6  This program is free software; you can redistribute it and/or modify it
   7  under the terms and conditions of the GNU General Public License,
   8  version 2, as published by the Free Software Foundation.
   9
  10  This program is distributed in the hope it will be useful, but WITHOUT
  11  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  more details.
  14
  15  You should have received a copy of the GNU General Public License along with
  16  this program; if not, write to the Free Software Foundation, Inc.,
  17  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19  The full GNU General Public License is included in this distribution in
  20  the file called "COPYING".
  21
  22  Contact Information:
  23  Linux NICS <linux.nics@intel.com>
  24  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27*******************************************************************************/
  28
  29#ifndef _IXGB_EE_H_
  30#define _IXGB_EE_H_
  31
  32#define IXGB_EEPROM_SIZE    64  /* Size in words */
  33
  34#define IXGB_ETH_LENGTH_OF_ADDRESS   6
  35
  36/* EEPROM Commands */
  37#define EEPROM_READ_OPCODE  0x6 /* EEPROM read opcode */
  38#define EEPROM_WRITE_OPCODE 0x5 /* EEPROM write opcode */
  39#define EEPROM_ERASE_OPCODE 0x7 /* EEPROM erase opcode */
  40#define EEPROM_EWEN_OPCODE  0x13        /* EEPROM erase/write enable */
  41#define EEPROM_EWDS_OPCODE  0x10        /* EEPROM erase/write disable */
  42
  43/* EEPROM MAP (Word Offsets) */
  44#define EEPROM_IA_1_2_REG        0x0000
  45#define EEPROM_IA_3_4_REG        0x0001
  46#define EEPROM_IA_5_6_REG        0x0002
  47#define EEPROM_COMPATIBILITY_REG 0x0003
  48#define EEPROM_PBA_1_2_REG       0x0008
  49#define EEPROM_PBA_3_4_REG       0x0009
  50#define EEPROM_INIT_CONTROL1_REG 0x000A
  51#define EEPROM_SUBSYS_ID_REG     0x000B
  52#define EEPROM_SUBVEND_ID_REG    0x000C
  53#define EEPROM_DEVICE_ID_REG     0x000D
  54#define EEPROM_VENDOR_ID_REG     0x000E
  55#define EEPROM_INIT_CONTROL2_REG 0x000F
  56#define EEPROM_SWDPINS_REG       0x0020
  57#define EEPROM_CIRCUIT_CTRL_REG  0x0021
  58#define EEPROM_D0_D3_POWER_REG   0x0022
  59#define EEPROM_FLASH_VERSION     0x0032
  60#define EEPROM_CHECKSUM_REG      0x003F
  61
  62/* Mask bits for fields in Word 0x0a of the EEPROM */
  63
  64#define EEPROM_ICW1_SIGNATURE_MASK  0xC000
  65#define EEPROM_ICW1_SIGNATURE_VALID 0x4000
  66#define EEPROM_ICW1_SIGNATURE_CLEAR 0x0000
  67
  68/* For checksumming, the sum of all words in the EEPROM should equal 0xBABA. */
  69#define EEPROM_SUM 0xBABA
  70
  71/* EEPROM Map Sizes (Byte Counts) */
  72#define PBA_SIZE 4
  73
  74/* EEPROM Map defines (WORD OFFSETS)*/
  75
  76/* EEPROM structure */
  77struct ixgb_ee_map_type {
  78        u8 mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS];
  79        __le16 compatibility;
  80        __le16 reserved1[4];
  81        __le32 pba_number;
  82        __le16 init_ctrl_reg_1;
  83        __le16 subsystem_id;
  84        __le16 subvendor_id;
  85        __le16 device_id;
  86        __le16 vendor_id;
  87        __le16 init_ctrl_reg_2;
  88        __le16 oem_reserved[16];
  89        __le16 swdpins_reg;
  90        __le16 circuit_ctrl_reg;
  91        u8 d3_power;
  92        u8 d0_power;
  93        __le16 reserved2[28];
  94        __le16 checksum;
  95};
  96
  97/* EEPROM Functions */
  98u16 ixgb_read_eeprom(struct ixgb_hw *hw, u16 reg);
  99
 100bool ixgb_validate_eeprom_checksum(struct ixgb_hw *hw);
 101
 102void ixgb_update_eeprom_checksum(struct ixgb_hw *hw);
 103
 104void ixgb_write_eeprom(struct ixgb_hw *hw, u16 reg, u16 data);
 105
 106#endif                          /* IXGB_EE_H */
 107