1/******************************************************************************* 2 3 Intel PRO/10GbE Linux driver 4 Copyright(c) 1999 - 2008 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 Linux NICS <linux.nics@intel.com> 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26 27*******************************************************************************/ 28 29#include "ixgb_hw.h" 30#include "ixgb_ee.h" 31/* Local prototypes */ 32static u16 ixgb_shift_in_bits(struct ixgb_hw *hw); 33 34static void ixgb_shift_out_bits(struct ixgb_hw *hw, 35 u16 data, 36 u16 count); 37static void ixgb_standby_eeprom(struct ixgb_hw *hw); 38 39static bool ixgb_wait_eeprom_command(struct ixgb_hw *hw); 40 41static void ixgb_cleanup_eeprom(struct ixgb_hw *hw); 42 43/****************************************************************************** 44 * Raises the EEPROM's clock input. 45 * 46 * hw - Struct containing variables accessed by shared code 47 * eecd_reg - EECD's current value 48 *****************************************************************************/ 49static void 50ixgb_raise_clock(struct ixgb_hw *hw, 51 u32 *eecd_reg) 52{ 53 /* Raise the clock input to the EEPROM (by setting the SK bit), and then 54 * wait 50 microseconds. 55 */ 56 *eecd_reg = *eecd_reg | IXGB_EECD_SK; 57 IXGB_WRITE_REG(hw, EECD, *eecd_reg); 58 udelay(50); 59 return; 60} 61 62/****************************************************************************** 63 * Lowers the EEPROM's clock input. 64 * 65 * hw - Struct containing variables accessed by shared code 66 * eecd_reg - EECD's current value 67 *****************************************************************************/ 68static void 69ixgb_lower_clock(struct ixgb_hw *hw, 70 u32 *eecd_reg) 71{ 72 /* Lower the clock input to the EEPROM (by clearing the SK bit), and then 73 * wait 50 microseconds. 74 */ 75 *eecd_reg = *eecd_reg & ~IXGB_EECD_SK; 76 IXGB_WRITE_REG(hw, EECD, *eecd_reg); 77 udelay(50); 78 return; 79} 80 81/****************************************************************************** 82 * Shift data bits out to the EEPROM. 83 * 84 * hw - Struct containing variables accessed by shared code 85 * data - data to send to the EEPROM 86 * count - number of bits to shift out 87 *****************************************************************************/ 88static void 89ixgb_shift_out_bits(struct ixgb_hw *hw, 90 u16 data, 91 u16 count) 92{ 93 u32 eecd_reg; 94 u32 mask; 95 96 /* We need to shift "count" bits out to the EEPROM. So, value in the 97 * "data" parameter will be shifted out to the EEPROM one bit at a time. 98 * In order to do this, "data" must be broken down into bits. 99 */ 100 mask = 0x01 << (count - 1); 101 eecd_reg = IXGB_READ_REG(hw, EECD); 102 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI); 103 do { 104 /* A "1" is shifted out to the EEPROM by setting bit "DI" to a "1", 105 * and then raising and then lowering the clock (the SK bit controls 106 * the clock input to the EEPROM). A "0" is shifted out to the EEPROM 107 * by setting "DI" to "0" and then raising and then lowering the clock. 108 */ 109 eecd_reg &= ~IXGB_EECD_DI; 110 111 if (data & mask) 112 eecd_reg |= IXGB_EECD_DI; 113 114 IXGB_WRITE_REG(hw, EECD, eecd_reg); 115 116 udelay(50); 117 118 ixgb_raise_clock(hw, &eecd_reg); 119 ixgb_lower_clock(hw, &eecd_reg); 120 121 mask = mask >> 1; 122 123 } while (mask); 124 125 /* We leave the "DI" bit set to "0" when we leave this routine. */ 126 eecd_reg &= ~IXGB_EECD_DI; 127 IXGB_WRITE_REG(hw, EECD, eecd_reg); 128 return; 129} 130 131/****************************************************************************** 132 * Shift data bits in from the EEPROM 133 * 134 * hw - Struct containing variables accessed by shared code 135 *****************************************************************************/ 136static u16 137ixgb_shift_in_bits(struct ixgb_hw *hw) 138{ 139 u32 eecd_reg; 140 u32 i; 141 u16 data; 142 143 /* In order to read a register from the EEPROM, we need to shift 16 bits 144 * in from the EEPROM. Bits are "shifted in" by raising the clock input to 145 * the EEPROM (setting the SK bit), and then reading the value of the "DO" 146 * bit. During this "shifting in" process the "DI" bit should always be 147 * clear.. 148 */ 149 150 eecd_reg = IXGB_READ_REG(hw, EECD); 151 152 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI); 153 data = 0; 154 155 for (i = 0; i < 16; i++) { 156 data = data << 1; 157 ixgb_raise_clock(hw, &eecd_reg); 158 159 eecd_reg = IXGB_READ_REG(hw, EECD); 160 161 eecd_reg &= ~(IXGB_EECD_DI); 162 if (eecd_reg & IXGB_EECD_DO) 163 data |= 1; 164 165 ixgb_lower_clock(hw, &eecd_reg); 166 } 167 168 return data; 169} 170 171/****************************************************************************** 172 * Prepares EEPROM for access 173 * 174 * hw - Struct containing variables accessed by shared code 175 * 176 * Lowers EEPROM clock. Clears input pin. Sets the chip select pin. This 177 * function should be called before issuing a command to the EEPROM. 178 *****************************************************************************/ 179static void 180ixgb_setup_eeprom(struct ixgb_hw *hw) 181{ 182 u32 eecd_reg; 183 184 eecd_reg = IXGB_READ_REG(hw, EECD); 185 186 /* Clear SK and DI */ 187 eecd_reg &= ~(IXGB_EECD_SK | IXGB_EECD_DI); 188 IXGB_WRITE_REG(hw, EECD, eecd_reg); 189 190 /* Set CS */ 191 eecd_reg |= IXGB_EECD_CS; 192 IXGB_WRITE_REG(hw, EECD, eecd_reg); 193 return; 194} 195 196/****************************************************************************** 197 * Returns EEPROM to a "standby" state 198 * 199 * hw - Struct containing variables accessed by shared code 200 *****************************************************************************/ 201static void 202ixgb_standby_eeprom(struct ixgb_hw *hw) 203{ 204 u32 eecd_reg; 205 206 eecd_reg = IXGB_READ_REG(hw, EECD); 207 208 /* Deselect EEPROM */ 209 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_SK); 210 IXGB_WRITE_REG(hw, EECD, eecd_reg); 211 udelay(50); 212 213 /* Clock high */ 214 eecd_reg |= IXGB_EECD_SK; 215 IXGB_WRITE_REG(hw, EECD, eecd_reg); 216 udelay(50); 217 218 /* Select EEPROM */ 219 eecd_reg |= IXGB_EECD_CS; 220 IXGB_WRITE_REG(hw, EECD, eecd_reg); 221 udelay(50); 222 223 /* Clock low */ 224 eecd_reg &= ~IXGB_EECD_SK; 225 IXGB_WRITE_REG(hw, EECD, eecd_reg); 226 udelay(50); 227 return; 228} 229 230/****************************************************************************** 231 * Raises then lowers the EEPROM's clock pin 232 * 233 * hw - Struct containing variables accessed by shared code 234 *****************************************************************************/ 235static void 236ixgb_clock_eeprom(struct ixgb_hw *hw) 237{ 238 u32 eecd_reg; 239 240 eecd_reg = IXGB_READ_REG(hw, EECD); 241 242 /* Rising edge of clock */ 243 eecd_reg |= IXGB_EECD_SK; 244 IXGB_WRITE_REG(hw, EECD, eecd_reg); 245 udelay(50); 246 247 /* Falling edge of clock */ 248 eecd_reg &= ~IXGB_EECD_SK; 249 IXGB_WRITE_REG(hw, EECD, eecd_reg); 250 udelay(50); 251 return; 252} 253 254/****************************************************************************** 255 * Terminates a command by lowering the EEPROM's chip select pin 256 * 257 * hw - Struct containing variables accessed by shared code 258 *****************************************************************************/ 259static void 260ixgb_cleanup_eeprom(struct ixgb_hw *hw) 261{ 262 u32 eecd_reg; 263 264 eecd_reg = IXGB_READ_REG(hw, EECD); 265 266 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_DI); 267 268 IXGB_WRITE_REG(hw, EECD, eecd_reg); 269 270 ixgb_clock_eeprom(hw); 271 return; 272} 273 274/****************************************************************************** 275 * Waits for the EEPROM to finish the current command. 276 * 277 * hw - Struct containing variables accessed by shared code 278 * 279 * The command is done when the EEPROM's data out pin goes high. 280 * 281 * Returns: 282 * true: EEPROM data pin is high before timeout. 283 * false: Time expired. 284 *****************************************************************************/ 285static bool 286ixgb_wait_eeprom_command(struct ixgb_hw *hw) 287{ 288 u32 eecd_reg; 289 u32 i; 290 291 /* Toggle the CS line. This in effect tells to EEPROM to actually execute 292 * the command in question. 293 */ 294 ixgb_standby_eeprom(hw); 295 296 /* Now read DO repeatedly until is high (equal to '1'). The EEPROM will 297 * signal that the command has been completed by raising the DO signal. 298 * If DO does not go high in 10 milliseconds, then error out. 299 */ 300 for (i = 0; i < 200; i++) { 301 eecd_reg = IXGB_READ_REG(hw, EECD); 302 303 if (eecd_reg & IXGB_EECD_DO) 304 return (true); 305 306 udelay(50); 307 } 308 ASSERT(0); 309 return (false); 310} 311 312/****************************************************************************** 313 * Verifies that the EEPROM has a valid checksum 314 * 315 * hw - Struct containing variables accessed by shared code 316 * 317 * Reads the first 64 16 bit words of the EEPROM and sums the values read. 318 * If the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is 319 * valid. 320 * 321 * Returns: 322 * true: Checksum is valid 323 * false: Checksum is not valid. 324 *****************************************************************************/ 325bool 326ixgb_validate_eeprom_checksum(struct ixgb_hw *hw) 327{ 328 u16 checksum = 0; 329 u16 i; 330 331 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) 332 checksum += ixgb_read_eeprom(hw, i); 333 334 if (checksum == (u16) EEPROM_SUM) 335 return (true); 336 else 337 return (false); 338} 339 340/****************************************************************************** 341 * Calculates the EEPROM checksum and writes it to the EEPROM 342 * 343 * hw - Struct containing variables accessed by shared code 344 * 345 * Sums the first 63 16 bit words of the EEPROM. Subtracts the sum from 0xBABA. 346 * Writes the difference to word offset 63 of the EEPROM. 347 *****************************************************************************/ 348void 349ixgb_update_eeprom_checksum(struct ixgb_hw *hw) 350{ 351 u16 checksum = 0; 352 u16 i; 353 354 for (i = 0; i < EEPROM_CHECKSUM_REG; i++) 355 checksum += ixgb_read_eeprom(hw, i); 356 357 checksum = (u16) EEPROM_SUM - checksum; 358 359 ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum); 360 return; 361} 362 363/****************************************************************************** 364 * Writes a 16 bit word to a given offset in the EEPROM. 365 * 366 * hw - Struct containing variables accessed by shared code 367 * reg - offset within the EEPROM to be written to 368 * data - 16 bit word to be written to the EEPROM 369 * 370 * If ixgb_update_eeprom_checksum is not called after this function, the 371 * EEPROM will most likely contain an invalid checksum. 372 * 373 *****************************************************************************/ 374void 375ixgb_write_eeprom(struct ixgb_hw *hw, u16 offset, u16 data) 376{ 377 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 378 379 /* Prepare the EEPROM for writing */ 380 ixgb_setup_eeprom(hw); 381 382 /* Send the 9-bit EWEN (write enable) command to the EEPROM (5-bit opcode 383 * plus 4-bit dummy). This puts the EEPROM into write/erase mode. 384 */ 385 ixgb_shift_out_bits(hw, EEPROM_EWEN_OPCODE, 5); 386 ixgb_shift_out_bits(hw, 0, 4); 387 388 /* Prepare the EEPROM */ 389 ixgb_standby_eeprom(hw); 390 391 /* Send the Write command (3-bit opcode + 6-bit addr) */ 392 ixgb_shift_out_bits(hw, EEPROM_WRITE_OPCODE, 3); 393 ixgb_shift_out_bits(hw, offset, 6); 394 395 /* Send the data */ 396 ixgb_shift_out_bits(hw, data, 16); 397 398 ixgb_wait_eeprom_command(hw); 399 400 /* Recover from write */ 401 ixgb_standby_eeprom(hw); 402 403 /* Send the 9-bit EWDS (write disable) command to the EEPROM (5-bit 404 * opcode plus 4-bit dummy). This takes the EEPROM out of write/erase 405 * mode. 406 */ 407 ixgb_shift_out_bits(hw, EEPROM_EWDS_OPCODE, 5); 408 ixgb_shift_out_bits(hw, 0, 4); 409 410 /* Done with writing */ 411 ixgb_cleanup_eeprom(hw); 412 413 /* clear the init_ctrl_reg_1 to signify that the cache is invalidated */ 414 ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR); 415 416 return; 417} 418 419/****************************************************************************** 420 * Reads a 16 bit word from the EEPROM. 421 * 422 * hw - Struct containing variables accessed by shared code 423 * offset - offset of 16 bit word in the EEPROM to read 424 * 425 * Returns: 426 * The 16-bit value read from the eeprom 427 *****************************************************************************/ 428u16 429ixgb_read_eeprom(struct ixgb_hw *hw, 430 u16 offset) 431{ 432 u16 data; 433 434 /* Prepare the EEPROM for reading */ 435 ixgb_setup_eeprom(hw); 436 437 /* Send the READ command (opcode + addr) */ 438 ixgb_shift_out_bits(hw, EEPROM_READ_OPCODE, 3); 439 /* 440 * We have a 64 word EEPROM, there are 6 address bits 441 */ 442 ixgb_shift_out_bits(hw, offset, 6); 443 444 /* Read the data */ 445 data = ixgb_shift_in_bits(hw); 446 447 /* End this read operation */ 448 ixgb_standby_eeprom(hw); 449 450 return (data); 451} 452 453/****************************************************************************** 454 * Reads eeprom and stores data in shared structure. 455 * Validates eeprom checksum and eeprom signature. 456 * 457 * hw - Struct containing variables accessed by shared code 458 * 459 * Returns: 460 * true: if eeprom read is successful 461 * false: otherwise. 462 *****************************************************************************/ 463bool 464ixgb_get_eeprom_data(struct ixgb_hw *hw) 465{ 466 u16 i; 467 u16 checksum = 0; 468 struct ixgb_ee_map_type *ee_map; 469 470 DEBUGFUNC("ixgb_get_eeprom_data"); 471 472 ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 473 474 DEBUGOUT("ixgb_ee: Reading eeprom data\n"); 475 for (i = 0; i < IXGB_EEPROM_SIZE ; i++) { 476 u16 ee_data; 477 ee_data = ixgb_read_eeprom(hw, i); 478 checksum += ee_data; 479 hw->eeprom[i] = cpu_to_le16(ee_data); 480 } 481 482 if (checksum != (u16) EEPROM_SUM) { 483 DEBUGOUT("ixgb_ee: Checksum invalid.\n"); 484 /* clear the init_ctrl_reg_1 to signify that the cache is 485 * invalidated */ 486 ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR); 487 return (false); 488 } 489 490 if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK)) 491 != cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) { 492 DEBUGOUT("ixgb_ee: Signature invalid.\n"); 493 return(false); 494 } 495 496 return(true); 497} 498 499/****************************************************************************** 500 * Local function to check if the eeprom signature is good 501 * If the eeprom signature is good, calls ixgb)get_eeprom_data. 502 * 503 * hw - Struct containing variables accessed by shared code 504 * 505 * Returns: 506 * true: eeprom signature was good and the eeprom read was successful 507 * false: otherwise. 508 ******************************************************************************/ 509static bool 510ixgb_check_and_get_eeprom_data (struct ixgb_hw* hw) 511{ 512 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 513 514 if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK)) 515 == cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) { 516 return (true); 517 } else { 518 return ixgb_get_eeprom_data(hw); 519 } 520} 521 522/****************************************************************************** 523 * return a word from the eeprom 524 * 525 * hw - Struct containing variables accessed by shared code 526 * index - Offset of eeprom word 527 * 528 * Returns: 529 * Word at indexed offset in eeprom, if valid, 0 otherwise. 530 ******************************************************************************/ 531__le16 532ixgb_get_eeprom_word(struct ixgb_hw *hw, u16 index) 533{ 534 535 if ((index < IXGB_EEPROM_SIZE) && 536 (ixgb_check_and_get_eeprom_data(hw) == true)) { 537 return(hw->eeprom[index]); 538 } 539 540 return(0); 541} 542 543/****************************************************************************** 544 * return the mac address from EEPROM 545 * 546 * hw - Struct containing variables accessed by shared code 547 * mac_addr - Ethernet Address if EEPROM contents are valid, 0 otherwise 548 * 549 * Returns: None. 550 ******************************************************************************/ 551void 552ixgb_get_ee_mac_addr(struct ixgb_hw *hw, 553 u8 *mac_addr) 554{ 555 int i; 556 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 557 558 DEBUGFUNC("ixgb_get_ee_mac_addr"); 559 560 if (ixgb_check_and_get_eeprom_data(hw) == true) { 561 for (i = 0; i < IXGB_ETH_LENGTH_OF_ADDRESS; i++) { 562 mac_addr[i] = ee_map->mac_addr[i]; 563 DEBUGOUT2("mac(%d) = %.2X\n", i, mac_addr[i]); 564 } 565 } 566} 567 568 569/****************************************************************************** 570 * return the Printed Board Assembly number from EEPROM 571 * 572 * hw - Struct containing variables accessed by shared code 573 * 574 * Returns: 575 * PBA number if EEPROM contents are valid, 0 otherwise 576 ******************************************************************************/ 577u32 578ixgb_get_ee_pba_number(struct ixgb_hw *hw) 579{ 580 if (ixgb_check_and_get_eeprom_data(hw) == true) 581 return (le16_to_cpu(hw->eeprom[EEPROM_PBA_1_2_REG]) 582 | (le16_to_cpu(hw->eeprom[EEPROM_PBA_3_4_REG])<<16)); 583 584 return(0); 585} 586 587 588/****************************************************************************** 589 * return the Device Id from EEPROM 590 * 591 * hw - Struct containing variables accessed by shared code 592 * 593 * Returns: 594 * Device Id if EEPROM contents are valid, 0 otherwise 595 ******************************************************************************/ 596u16 597ixgb_get_ee_device_id(struct ixgb_hw *hw) 598{ 599 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 600 601 if (ixgb_check_and_get_eeprom_data(hw) == true) 602 return (le16_to_cpu(ee_map->device_id)); 603 604 return (0); 605} 606 607